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/linux-6.14.4/tools/testing/selftests/net/forwarding/
Dbridge_mdb.sh6 # | + $h1.10 | | + $h2.10 |
21 # | | vid 10 vid 10 | |
40 vlan_create $h1 10 v$h1 192.0.2.1/28 2001:db8:1::1/64
47 vlan_destroy $h1 10
54 vlan_create $h2 10 v$h2 192.0.2.2/28
61 vlan_destroy $h2 10
69 bridge vlan add vid 10 dev br0 self
75 bridge vlan add vid 10 dev $swp1
80 bridge vlan add vid 10 dev $swp2
93 bridge vlan del vid 10 dev $swp2
[all …]
/linux-6.14.4/Documentation/gpu/
Dafbc.rst22 corresponds to a color channel (i.e. R, G, B, X, A, Y, Cb, Cr).
32 * Component 1: G
43 * Component 1: G(8)
50 * Component 1: G(8)
66 * Component 1: G(8)
76 which doesn't include alpha can be used, e.g. DRM_FORMAT_BGR888.
81 Formats which are typically multi-planar in linear layouts (e.g. YUV
126 - 10-bit per component RGB, with 2-bit alpha
128 * Component 0: R(10)
129 * Component 1: G(10)
[all …]
/linux-6.14.4/Documentation/userspace-api/media/v4l/
Dsubdev-formats.rst113 - ``reserved``\ [10]
255 - 10
295 - g\ :sub:`3`
296 - g\ :sub:`2`
297 - g\ :sub:`1`
298 - g\ :sub:`0`
367 - g\ :sub:`3`
368 - g\ :sub:`2`
369 - g\ :sub:`1`
370 - g\ :sub:`0`
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Dpixfmt-srggb10p.rst16 10-bit packed Bayer formats
22 These four pixel formats are packed raw sRGB / Bayer formats with 10
45 - G\ :sub:`01high`
47 - G\ :sub:`03high`
48 - G\ :sub:`03low`\ (bits 7--6) B\ :sub:`02low`\ (bits 5--4)
50 G\ :sub:`01low`\ (bits 3--2) B\ :sub:`00low`\ (bits 1--0)
52 - G\ :sub:`10high`
54 - G\ :sub:`12high`
56 - R\ :sub:`13low`\ (bits 7--6) G\ :sub:`12low`\ (bits 5--4)
58 R\ :sub:`11low`\ (bits 3--2) G\ :sub:`10low`\ (bits 1--0)
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Dpixfmt-srggb10.rst16 10-bit Bayer formats expanded to 16 bits
22 These four pixel formats are raw sRGB / Bayer formats with 10 bits per
44 - G\ :sub:`01low`
45 - G\ :sub:`01high`
48 - G\ :sub:`03low`
49 - G\ :sub:`03high`
51 - G\ :sub:`10low`
52 - G\ :sub:`10high`
55 - G\ :sub:`12low`
56 - G\ :sub:`12high`
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Dcrop.svg51 objecttolerance="10"
52 gridtolerance="10"
53 guidetolerance="10"
71 fit-margin-bottom="0" /><g
81 …dth:0.33962813;stroke-linecap:butt;stroke-linejoin:miter;stroke-miterlimit:10;stroke-dasharray:non…
85 …dth:0.33962813;stroke-linecap:butt;stroke-linejoin:miter;stroke-miterlimit:10;stroke-dasharray:non…
89 …dth:0.33962813;stroke-linecap:butt;stroke-linejoin:miter;stroke-miterlimit:10;stroke-dasharray:non…
93 …dth:0.33962813;stroke-linecap:butt;stroke-linejoin:miter;stroke-miterlimit:10;stroke-dasharray:non…
97 …dth:0.33962813;stroke-linecap:butt;stroke-linejoin:miter;stroke-miterlimit:10;stroke-dasharray:non…
105 …dth:0.33962813;stroke-linecap:butt;stroke-linejoin:miter;stroke-miterlimit:10;stroke-dasharray:non…
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Dvbi_hsync.svg22 objecttolerance="10"
23 gridtolerance="10"
24 guidetolerance="10"
64 style="clip-rule:evenodd" /></clipPath></defs><g
68 transform="matrix(1.25,0,0,-1.25,-0.3625824,520.79867)"><g
74 …dth:2.40974998;stroke-linecap:butt;stroke-linejoin:miter;stroke-miterlimit:10;stroke-dasharray:non…
78 …dth:2.40974998;stroke-linecap:butt;stroke-linejoin:miter;stroke-miterlimit:10;stroke-dasharray:non…
82 …dth:2.40974998;stroke-linecap:butt;stroke-linejoin:miter;stroke-miterlimit:10;stroke-dasharray:non…
86 …dth:2.40974998;stroke-linecap:butt;stroke-linejoin:miter;stroke-miterlimit:10;stroke-dasharray:non…
90 …dth:4.81949997;stroke-linecap:butt;stroke-linejoin:miter;stroke-miterlimit:10;stroke-dasharray:non…
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/linux-6.14.4/lib/crypto/
Dblake2s-generic.c19 static const u8 blake2s_sigma[10][16] = {
20 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
21 { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 },
22 { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 },
23 { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 },
24 { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 },
25 { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 },
26 { 12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11 },
27 { 13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10 },
28 { 6, 15, 14, 9, 11, 3, 0, 8, 12, 2, 13, 7, 1, 4, 10, 5 },
[all …]
/linux-6.14.4/include/dt-bindings/memory/
Dmt8195-memory-port.h13 * 0 ~ 4G; 4G ~ 8G; 8G ~ 12G; 12G ~ 16G, we could adjust these masters
16 * b) The iova of any master can NOT cross the 4G/8G/12G boundary.
21 * disp 0 ~ 4G larb0/1/2/3
22 * vcodec 4G ~ 8G larb19/20/21/22/23/24
23 * cam/mdp 8G ~ 12G the other larbs.
24 * N/A 12G ~ 16G
29 * iommu-vdo: larb0/2/5/7/9/10/11/13/17/19/21/24/25/28
110 #define M4U_PORT_L9_IMG_IMGBI_T1_B MTK_M4U_ID(9, 10)
122 #define M4U_PORT_L10_IMG_IMGI_D1_A MTK_M4U_ID(10, 0)
123 #define M4U_PORT_L10_IMG_IMGCI_D1_A MTK_M4U_ID(10, 1)
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Dmt8186-memory-port.h15 * 0 ~ 4G; 4G ~ 8G; 8G ~ 12G; 12G ~ 16G, we could adjust these masters
18 * b) The iova of any master can NOT cross the 4G/8G/12G boundary.
23 * disp 0 ~ 4G larb0/1/2
24 * vcodec 4G ~ 8G larb4/7
25 * cam/mdp 8G ~ 12G the other larbs.
26 * N/A 12G ~ 16G
27 * CCU0 0x24000_0000 ~ 0x243ff_ffff larb13: port 9/10
63 #define IOMMU_PORT_L4_HW_VDEC_UFO_ENC_EXT MTK_M4U_ID(4, 10)
79 #define IOMMU_PORT_L7_JPGENC_C_RDMA MTK_M4U_ID(7, 10)
99 #define IOMMU_PORT_L9_IMG_VIPI_D1 MTK_M4U_ID(9, 10)
[all …]
Dmediatek,mt8188-memory-port.h27 #define SMI_L11A_ID 10
46 * 0 ~ 4G; 4G ~ 8G; 8G ~ 12G; 12G ~ 16G, we could adjust these masters
49 * b) The iova of any master can NOT cross the 4G/8G/12G boundary.
54 * disp 0 ~ 4G larb0/1/2/3
55 * vcodec 4G ~ 8G larb19(21)[1]/21(22)/23
56 * cam/mdp 8G ~ 12G the other larbs.
57 * N/A 12G ~ 16G
62 * iommu-vdo: larb0/2/5/9/10/11A/11C/13/16B/17B/19/21
144 #define M4U_PORT_L9_YUVCO_T1_A MTK_M4U_ID(SMI_L9_ID, 10)
160 /* LARB 10 -- IMG-D */
[all …]
/linux-6.14.4/include/uapi/linux/
Dmdio.h39 #define MDIO_CTRL2 7 /* 10G control 2 */
40 #define MDIO_STAT2 8 /* 10G status 2 */
41 #define MDIO_PMA_TXDIS 9 /* 10G PMA/PMD transmit disable */
42 #define MDIO_PMA_RXDET 10 /* 10G PMA/PMD receive signal detect */
43 #define MDIO_PMA_EXTABLE 11 /* 10G PMA/PMD extended ability */
50 #define MDIO_PMA_NG_EXTABLE 21 /* 2.5G/5G PMA/PMD extended ability */
60 #define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */
61 #define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */
62 #define MDIO_PMA_10GBT_SNR 133 /* 10GBASE-T SNR margin, lane A.
64 #define MDIO_PMA_10GBR_FSRT_CSR 147 /* 10GBASE-R fast retrain status and control */
[all …]
/linux-6.14.4/drivers/media/platform/samsung/exynos-gsc/
Dgsc-regs.h6 * Register definition file for Samsung G-Scaler driver
12 /* G-Scaler enable */
18 /* G-Scaler S/W reset */
22 /* G-Scaler IRQ */
29 /* G-Scaler input control */
65 /* G-Scaler source image size */
70 /* G-Scaler source image offset */
75 /* G-Scaler cropped source image size */
80 /* G-Scaler output control */
84 #define GSC_OUT_RGB_TYPE_MASK (3 << 10)
[all …]
/linux-6.14.4/crypto/
Dblake2b_generic.c26 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
27 { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 },
28 { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 },
29 { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 },
30 { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 },
31 { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 },
32 { 12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11 },
33 { 13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10 },
34 { 6, 15, 14, 9, 11, 3, 0, 8, 12, 2, 13, 7, 1, 4, 10, 5 },
35 { 10, 2, 8, 4, 7, 6, 1, 5, 15, 11, 9, 14, 3, 12, 13, 0 },
[all …]
/linux-6.14.4/include/uapi/drm/
Ddrm_fourcc.h143 /* 10 bpp Red (direct relationship between channel value and brightness) */
144 #define DRM_FORMAT_R10 fourcc_code('R', '1', '0', ' ') /* [15:0] x:R 6:10 little endian */
153 #define DRM_FORMAT_RG88 fourcc_code('R', 'G', '8', '8') /* [15:0] R:G 8:8 little endian */
154 #define DRM_FORMAT_GR88 fourcc_code('G', 'R', '8', '8') /* [15:0] G:R 8:8 little endian */
157 #define DRM_FORMAT_RG1616 fourcc_code('R', 'G', '3', '2') /* [31:0] R:G 16:16 little endian */
158 #define DRM_FORMAT_GR1616 fourcc_code('G', 'R', '3', '2') /* [31:0] G:R 16:16 little endian */
161 #define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B 3:3:2 */
162 #define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R 2:3:3 */
165 #define DRM_FORMAT_XRGB4444 fourcc_code('X', 'R', '1', '2') /* [15:0] x:R:G:B 4:4:4:4 little endian…
166 #define DRM_FORMAT_XBGR4444 fourcc_code('X', 'B', '1', '2') /* [15:0] x:B:G:R 4:4:4:4 little endian…
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/net/
Dfsl,fman-port.yaml49 fsl,fman-10g-port:
51 description: The default port rate is 1G.
52 If this property exists, the port is s 10G port.
56 description: The default port rate is 1G.
57 Can be defined only if 10G-support is set.
58 This property marks a best-effort 10G port (10G port that
/linux-6.14.4/drivers/gpu/drm/exynos/
Dregs-gsc.h7 * Register definition file for Samsung G-Scaler driver
13 /* G-Scaler enable */
33 /* G-Scaler S/W reset */
37 /* G-Scaler IRQ */
45 /* G-Scaler input control */
91 /* G-Scaler source image size */
98 /* G-Scaler source image offset */
105 /* G-Scaler cropped source image size */
112 /* G-Scaler output control */
120 #define GSC_OUT_RGB_TYPE_MASK (3 << 10)
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/phy/
Dmicrochip,sparx5-serdes.yaml38 * 5.15625 Gbps (5GBASE-KR/5G-USXGMII)
49 * 5.15625 Gbps (5GBASE-KR/5G-USXGMII)
50 * 10 Gbps (10G-USGMII)
51 * 10.3125 Gbps (10GBASE-R/10GBASE-KR/USXGMII)
61 * 5.15625 Gbps (5GBASE-KR/5G-USXGMII)
62 * 10 Gbps (10G-USGMII)
63 * 10.3125 Gbps (10GBASE-R/10GBASE-KR/USXGMII)
Dti,phy-j721e-wiz.yaml16 - ti,j721e-wiz-16g
17 - ti,j721e-wiz-10g
18 - ti,j721s2-wiz-10g
19 - ti,am64-wiz-10g
20 - ti,j7200-wiz-10g
21 - ti,j784s4-wiz-10g
192 const: ti,j7200-wiz-10g
204 compatible = "ti,j721e-wiz-16g";
/linux-6.14.4/Documentation/bpf/
Dllvm_reloc.rst40 6: 0f 10 00 00 00 00 00 00 r0 += r1
44 10: 0f 10 00 00 00 00 00 00 r0 += r1
48 14: 0f 10 00 00 00 00 00 00 r0 += r1
115 10 R_BPF_64_32 call insn 32 r_offset + 4 (S + A) / 8 - 1
168 2: 85 10 00 00 ff ff ff ff call -1
173 6: 85 10 00 00 02 00 00 00 call 2
178 10: 61 11 00 00 00 00 00 00 r1 = *(u32 *)(r1 + 0)
179 11: 0f 10 00 00 00 00 00 00 r0 += r1
186 1: 2f 10 00 00 00 00 00 00 r0 *= r1
191 4: 0f 10 00 00 00 00 00 00 r0 += r1
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/display/
Dsimple-framebuffer.yaml48 mode information and enable them. This way if e.g. later on support
97 * `a1r5g5b5` - 16-bit pixels, d[15]=a, d[14:10]=r, d[9:5]=g, d[4:0]=b
98 * `a2r10g10b10` - 32-bit pixels, d[31:30]=a, d[29:20]=r, d[19:10]=g, d[9:0]=b
99 * `a8b8g8r8` - 32-bit pixels, d[31:24]=a, d[23:16]=b, d[15:8]=g, d[7:0]=r
100 * `a8r8g8b8` - 32-bit pixels, d[31:24]=a, d[23:16]=r, d[15:8]=g, d[7:0]=b
101 * `r5g6b5` - 16-bit pixels, d[15:11]=r, d[10:5]=g, d[4:0]=b
102 * `r5g5b5a1` - 16-bit pixels, d[15:11]=r, d[10:6]=g, d[5:1]=b d[1:0]=a
103 * `r8g8b8` - 24-bit pixels, d[23:16]=r, d[15:8]=g, d[7:0]=b
104 * `x1r5g5b5` - 16-bit pixels, d[14:10]=r, d[9:5]=g, d[4:0]=b
105 * `x2r10g10b10` - 32-bit pixels, d[29:20]=r, d[19:10]=g, d[9:0]=b
[all …]
/linux-6.14.4/arch/arm/boot/dts/st/
Dstm32mp15-pinctrl.dtsi109 <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
131 <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
152 <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
170 <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
187 <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
207 <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
222 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
223 <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
224 <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
225 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
[all …]
Dstm32mp13-pinctrl.dtsi36 <STM32_PINMUX('G', 9, AF13)>,/* DCMI_VSYNC */
40 <STM32_PINMUX('G', 10, AF13)>,/* DCMI_D2 */
54 <STM32_PINMUX('G', 9, ANALOG)>,/* DCMI_VSYNC */
58 <STM32_PINMUX('G', 10, ANALOG)>,/* DCMI_D2 */
70 pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
71 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
77 <STM32_PINMUX('G', 2, AF11)>; /* ETH_MDC */
98 <STM32_PINMUX('G', 2, AF11)>; /* ETH_MDC */
105 pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
106 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
[all …]
/linux-6.14.4/drivers/net/ethernet/tehuti/
DKconfig21 tristate "Tehuti Networks 10G Ethernet"
24 Tehuti Networks 10G Ethernet NIC
27 tristate "Tehuti Networks TN40xx 10G Ethernet adapters"
33 This driver supports 10G Ethernet adapters using Tehuti Networks
/linux-6.14.4/Documentation/networking/device_drivers/ethernet/intel/
Dixgbe.rst4 Linux Base Driver for the Intel(R) Ethernet 10 Gigabit PCI Express Adapters
7 Intel 10 Gigabit Linux driver.
53 | Intel | DUAL RATE 1G/10G SFP+ SR (bailed) | FTLX8571D3BCV-IT |
55 | Intel | DUAL RATE 1G/10G SFP+ SR (bailed) | AFBR-703SDZ-IN2 |
57 | Intel | DUAL RATE 1G/10G SFP+ SR (bailed) | AFBR-703SDDZ-IN1 |
61 | Intel | DUAL RATE 1G/10G SFP+ LR (bailed) | FTLX1471D3BCV-IT |
63 | Intel | DUAL RATE 1G/10G SFP+ LR (bailed) | AFCT-701SDZ-IN2 |
65 | Intel | DUAL RATE 1G/10G SFP+ LR (bailed) | AFCT-701SDDZ-IN1 |
74 | Finisar | SFP+ SR bailed, 10g single rate | FTLX8571D3BCL |
76 | Avago | SFP+ SR bailed, 10g single rate | AFBR-700SDZ |
[all …]

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