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/linux-6.14.4/Documentation/devicetree/bindings/interconnect/
Dqcom,sdm660.yaml90 reg = <0x01008000 0x78000>;
96 reg = <0x01704000 0xc100>;
/linux-6.14.4/arch/powerpc/boot/dts/fsl/
Dpq3-dma-1.dtsi2 * PQ3 DMA device tree stub [ controller @ offset 0xc300 ]
39 reg = <0xc300 0x4>;
40 ranges = <0x0 0xc100 0x200>;
42 dma-channel@0 {
44 reg = <0x0 0x80>;
45 cell-index = <0>;
46 interrupts = <76 2 0 0>;
50 reg = <0x80 0x80>;
52 interrupts = <77 2 0 0>;
56 reg = <0x100 0x80>;
[all …]
/linux-6.14.4/arch/arm64/boot/dts/ti/
Dk3-am65-iot2050-common-pg1.dtsi59 dmas = <&main_udmap 0xc100>, /* egress slice 0 */
60 <&main_udmap 0xc101>, /* egress slice 0 */
61 <&main_udmap 0xc102>, /* egress slice 0 */
62 <&main_udmap 0xc103>, /* egress slice 0 */
63 <&main_udmap 0xc104>, /* egress slice 1 */
64 <&main_udmap 0xc105>, /* egress slice 1 */
65 <&main_udmap 0xc106>, /* egress slice 1 */
66 <&main_udmap 0xc107>, /* egress slice 1 */
67 <&main_udmap 0x4100>, /* ingress slice 0 */
68 <&main_udmap 0x4101>, /* ingress slice 1 */
[all …]
Dk3-am654-idk.dtso17 ethernet3 = "/icssg0-eth/ethernet-ports/port@0";
19 ethernet5 = "/icssg1-eth/ethernet-ports/port@0";
27 pinctrl-0 = <&icssg0_rgmii_pins_default>;
50 interrupts = <24 0 2>, <25 1 3>;
53 dmas = <&main_udmap 0xc100>, /* egress slice 0 */
54 <&main_udmap 0xc101>, /* egress slice 0 */
55 <&main_udmap 0xc102>, /* egress slice 0 */
56 <&main_udmap 0xc103>, /* egress slice 0 */
57 <&main_udmap 0xc104>, /* egress slice 1 */
58 <&main_udmap 0xc105>, /* egress slice 1 */
[all …]
Dk3-am642-phyboard-electra-rdk.dts45 pinctrl-0 = <&can_tc1_pins_default>;
46 #phy-cells = <0>;
54 pinctrl-0 = <&can_tc2_pins_default>;
55 #phy-cells = <0>;
64 pinctrl-0 = <&icssg0_rgmii1_pins_default>, <&icssg0_rgmii2_pins_default>;
67 interrupts = <24 0 2>, <25 1 3>;
78 dmas = <&main_pktdma 0xc100 15>, /* egress slice 0 */
79 <&main_pktdma 0xc101 15>, /* egress slice 0 */
80 <&main_pktdma 0xc102 15>, /* egress slice 0 */
81 <&main_pktdma 0xc103 15>, /* egress slice 0 */
[all …]
Dk3-am65-iot2050-common.dtsi45 reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */
46 alignment = <0x1000>;
52 reg = <0 0xa0000000 0 0x100000>;
58 reg = <0 0xa0100000 0 0xf00000>;
64 reg = <0 0xa1000000 0 0x100000>;
70 reg = <0 0xa1100000 0 0xf00000>;
75 reg = <0x00 0xa2000000 0x00 0x00200000>;
76 alignment = <0x1000>;
82 reg = <0x00 0xa2200000 0x00 0x1000>;
90 pinctrl-0 = <&leds_pins_default>;
[all …]
/linux-6.14.4/drivers/dma/ti/
Dk3-psil-am654.c54 PSIL_SA2UL(0x4000, 0),
55 PSIL_SA2UL(0x4001, 0),
56 PSIL_SA2UL(0x4002, 0),
57 PSIL_SA2UL(0x4003, 0),
59 PSIL_ETHERNET(0x4100),
60 PSIL_ETHERNET(0x4101),
61 PSIL_ETHERNET(0x4102),
62 PSIL_ETHERNET(0x4103),
64 PSIL_ETHERNET(0x4200),
65 PSIL_ETHERNET(0x4201),
[all …]
Dk3-psil-am64.c66 PSIL_SAUL(0x4000, 17, 32, 8, 32, 0),
67 PSIL_SAUL(0x4001, 18, 32, 8, 33, 0),
68 PSIL_SAUL(0x4002, 19, 40, 8, 40, 0),
69 PSIL_SAUL(0x4003, 20, 40, 8, 41, 0),
71 PSIL_ETHERNET(0x4100, 21, 48, 16),
72 PSIL_ETHERNET(0x4101, 22, 64, 16),
73 PSIL_ETHERNET(0x4102, 23, 80, 16),
74 PSIL_ETHERNET(0x4103, 24, 96, 16),
76 PSIL_ETHERNET(0x4200, 25, 112, 16),
77 PSIL_ETHERNET(0x4201, 26, 128, 16),
[all …]
Dk3-psil-j721e.c72 PSIL_SA2UL(0x4000, 0),
73 PSIL_SA2UL(0x4001, 0),
74 PSIL_SA2UL(0x4002, 0),
75 PSIL_SA2UL(0x4003, 0),
77 PSIL_ETHERNET(0x4100),
78 PSIL_ETHERNET(0x4101),
79 PSIL_ETHERNET(0x4102),
80 PSIL_ETHERNET(0x4103),
82 PSIL_ETHERNET(0x4200),
83 PSIL_ETHERNET(0x4201),
[all …]
/linux-6.14.4/arch/arm/mach-s5pv210/
Dregs-clock.h12 #define S3C_ADDR_BASE 0xF6000000
14 #define S3C_VA_SYS S3C_ADDR(0x00100000)
18 #define S5P_APLL_LOCK S5P_CLKREG(0x00)
19 #define S5P_MPLL_LOCK S5P_CLKREG(0x08)
20 #define S5P_EPLL_LOCK S5P_CLKREG(0x10)
21 #define S5P_VPLL_LOCK S5P_CLKREG(0x20)
23 #define S5P_APLL_CON S5P_CLKREG(0x100)
24 #define S5P_MPLL_CON S5P_CLKREG(0x108)
25 #define S5P_EPLL_CON S5P_CLKREG(0x110)
26 #define S5P_EPLL_CON1 S5P_CLKREG(0x114)
[all …]
/linux-6.14.4/include/scsi/
Dscsi.h27 #define SCSI_MAX_PROT_SG_SEGMENTS 0xFFFF
33 #define SCAN_WILD_CARD ~0
57 #define SCSI_W_LUN_BASE 0xc100
64 return (lun & 0xff00) == SCSI_W_LUN_BASE; in scsi_is_wlun()
77 if (status < 0) in scsi_status_is_check_condition()
79 status &= 0xfe; in scsi_status_is_check_condition()
86 #define EXTENDED_MODIFY_DATA_POINTER 0x00
87 #define EXTENDED_SDTR 0x01
88 #define EXTENDED_EXTENDED_IDENTIFY 0x02 /* SCSI-I only */
89 #define EXTENDED_WDTR 0x03
[all …]
/linux-6.14.4/arch/arm64/boot/dts/qcom/
Dsdm632-motorola-ocean.dts18 qcom,msm-id = <349 0>;
19 qcom,board-id = <0x141 0xc100>;
20 qcom,pmic-id = <0x10016 0x25 0x00 0x00>;
34 reg = <0 0x90001000 0 (720 * 1520 * 3)>;
57 pinctrl-0 = <&gpio_key_default>;
68 reg = <0x0 0x84300000 0x0 0x2000000>;
73 reg = <0x0 0x90001000 0x0 (720 * 1520 * 3)>;
78 reg = <0x00 0xeefa1800 0x00 0x5e800>;
84 reg = <0x0 0xef000000 0x0 0xbf800>;
85 console-size = <0x40000>;
[all …]
/linux-6.14.4/drivers/mfd/
Dqcom-pm8008.c21 #define I2C_INTR_STATUS_BASE 0x0550
22 #define INT_RT_STS_OFFSET 0x10
23 #define INT_SET_TYPE_OFFSET 0x11
24 #define INT_POL_HIGH_OFFSET 0x12
25 #define INT_POL_LOW_OFFSET 0x13
26 #define INT_LATCHED_CLR_OFFSET 0x14
27 #define INT_EN_SET_OFFSET 0x15
28 #define INT_EN_CLR_OFFSET 0x16
29 #define INT_LATCHED_STS_OFFSET 0x18
39 #define PM8008_PERIPH_0_BASE 0x900
[all …]
/linux-6.14.4/include/ufs/
Dufs.h34 * UFS device may have standard LUs and LUN id could be from 0x00 to
35 * 0x7F. Standard LUs use "Peripheral Device Addressing Format".
37 * which again could be from 0x00 to 0x7F. For W-LUs, device only use
39 * from 0xc100 (SCSI_W_LUN_BASE) onwards.
40 * This means max. LUN number reported from UFS device could be 0xC17F.
42 #define UFS_UPIU_MAX_UNIT_NUM_ID 0x7F
46 /* WriteBooster buffer is available only for the logical unit from 0 to 7 */
53 #define UFS_WB_EXCEED_LIFETIME 0x0B
62 UFS_UPIU_REPORT_LUNS_WLUN = 0x81,
63 UFS_UPIU_UFS_DEVICE_WLUN = 0xD0,
[all …]
/linux-6.14.4/drivers/scsi/
D3w-xxxx.h62 [0x000] = "INFO: AEN queue empty",
63 [0x001] = "INFO: Soft reset occurred",
64 [0x002] = "ERROR: Unit degraded: Unit #",
65 [0x003] = "ERROR: Controller error",
66 [0x004] = "ERROR: Rebuild failed: Unit #",
67 [0x005] = "INFO: Rebuild complete: Unit #",
68 [0x006] = "ERROR: Incomplete unit detected: Unit #",
69 [0x007] = "INFO: Initialization complete: Unit #",
70 [0x008] = "WARNING: Unclean shutdown detected: Unit #",
71 [0x009] = "WARNING: ATA port timeout: Port #",
[all …]
D3w-9xxx.h58 {0x0000, "AEN queue empty"},
59 {0x0001, "Controller reset occurred"},
60 {0x0002, "Degraded unit detected"},
61 {0x0003, "Controller error occurred"},
62 {0x0004, "Background rebuild failed"},
63 {0x0005, "Background rebuild done"},
64 {0x0006, "Incomplete unit detected"},
65 {0x0007, "Background initialize done"},
66 {0x0008, "Unclean shutdown detected"},
67 {0x0009, "Drive timeout detected"},
[all …]
/linux-6.14.4/drivers/net/wireless/realtek/rtw89/
Drtw8852c_rfk_table.c8 RTW89_DECL_RFK_WM(0xc004, BIT(17), 0x1),
9 RTW89_DECL_RFK_WM(0xc024, BIT(17), 0x1),
10 RTW89_DECL_RFK_WM(0xc104, BIT(17), 0x1),
11 RTW89_DECL_RFK_WM(0xc124, BIT(17), 0x1),
17 RTW89_DECL_RFK_WM(0xc000, BIT(17), 0x0),
18 RTW89_DECL_RFK_WM(0xc000, BIT(17), 0x1),
24 RTW89_DECL_RFK_WM(0xc100, BIT(17), 0x0),
25 RTW89_DECL_RFK_WM(0xc100, BIT(17), 0x1),
31 RTW89_DECL_RFK_WM(0x12b8, BIT(30), 0x1),
32 RTW89_DECL_RFK_WM(0x030c, BIT(28), 0x1),
[all …]
/linux-6.14.4/arch/arm/boot/dts/marvell/
Darmada-39x.dtsi32 #size-cells = <0>;
35 cpu@0 {
38 reg = <0>;
59 pcie-mem-aperture = <0xe0000000 0x8000000>;
60 pcie-io-aperture = <0xe8000000 0x100000>;
64 reg = <MBUS_ID(0x01, 0x1d) 0 0x200000>;
71 ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
75 reg = <0x8000 0x1000>;
78 arm,double-linefill-incr = <0>;
79 arm,double-linefill-wrap = <0>;
[all …]
Darmada-375.dtsi36 #clock-cells = <0>;
42 #clock-cells = <0>;
49 #size-cells = <0>;
52 cpu0: cpu@0 {
55 reg = <0>;
75 pcie-mem-aperture = <0xe0000000 0x8000000>;
76 pcie-io-aperture = <0xe8000000 0x100000>;
80 reg = <MBUS_ID(0x01, 0x1d) 0 0x100000>;
85 reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
86 ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
[all …]
Darmada-38x.dtsi42 pcie-mem-aperture = <0xe0000000 0x8000000>;
43 pcie-io-aperture = <0xe8000000 0x100000>;
47 reg = <MBUS_ID(0x01, 0x1d) 0 0x200000>;
52 reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
53 ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
56 clocks = <&coreclk 0>;
62 reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
63 ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
66 clocks = <&coreclk 0>;
72 reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>;
[all …]
/linux-6.14.4/arch/powerpc/boot/dts/
Dxpedite5301.dts16 boot-bank = <0x0>; /* 0: Primary flash, 1: Secondary flash */
29 #size-cells = <0>;
31 PowerPC,8572@0 {
33 reg = <0x0>;
36 d-cache-size = <0x8000>; // L1, 32K
37 i-cache-size = <0x8000>; // L1, 32K
38 timebase-frequency = <0>;
39 bus-frequency = <0>;
40 clock-frequency = <0>;
46 reg = <0x1>;
[all …]
Dxpedite5370.dts27 #size-cells = <0>;
29 PowerPC,8572@0 {
31 reg = <0x0>;
34 d-cache-size = <0x8000>; // L1, 32K
35 i-cache-size = <0x8000>; // L1, 32K
36 timebase-frequency = <0>;
37 bus-frequency = <0>;
38 clock-frequency = <0>;
44 reg = <0x1>;
47 d-cache-size = <0x8000>; // L1, 32K
[all …]
Dxcalibur1501.dts28 #size-cells = <0>;
30 PowerPC,8572@0 {
32 reg = <0x0>;
35 d-cache-size = <0x8000>; // L1, 32K
36 i-cache-size = <0x8000>; // L1, 32K
37 timebase-frequency = <0>;
38 bus-frequency = <0>;
39 clock-frequency = <0>;
45 reg = <0x1>;
48 d-cache-size = <0x8000>; // L1, 32K
[all …]
Dxpedite5330.dts16 boot-bank = <0x0>; /* 0: Primary flash, 1: Secondary flash */
30 #size-cells = <0>;
32 pmcslot@0 {
33 cell-index = <0>;
44 #size-cells = <0>;
46 xmcslot@0 {
47 cell-index = <0>;
65 #size-cells = <0>;
67 PowerPC,8572@0 {
69 reg = <0x0>;
[all …]
/linux-6.14.4/sound/soc/codecs/
Drt1308-sdw.c31 case 0x00e0: in rt1308_readable_register()
32 case 0x00f0: in rt1308_readable_register()
33 case 0x2f01 ... 0x2f07: in rt1308_readable_register()
34 case 0x3000 ... 0x3001: in rt1308_readable_register()
35 case 0x3004 ... 0x3005: in rt1308_readable_register()
36 case 0x3008: in rt1308_readable_register()
37 case 0x300a: in rt1308_readable_register()
38 case 0xc000 ... 0xcff3: in rt1308_readable_register()
48 case 0x2f01 ... 0x2f07: in rt1308_volatile_register()
49 case 0x3000 ... 0x3001: in rt1308_volatile_register()
[all …]

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