/linux-6.14.4/drivers/media/usb/gspca/gl860/ |
D | gl860-mi2020.c | 12 static u8 dat_wbal1[] = {0x8c, 0xa2, 0x0c}; 14 static u8 dat_bright1[] = {0x8c, 0xa2, 0x06}; 15 static u8 dat_bright3[] = {0x8c, 0xa1, 0x02}; 16 static u8 dat_bright4[] = {0x90, 0x00, 0x0f}; 17 static u8 dat_bright5[] = {0x8c, 0xa1, 0x03}; 18 static u8 dat_bright6[] = {0x90, 0x00, 0x05}; 20 static u8 dat_hvflip1[] = {0x8c, 0x27, 0x19}; 21 static u8 dat_hvflip3[] = {0x8c, 0x27, 0x3b}; 22 static u8 dat_hvflip5[] = {0x8c, 0xa1, 0x03}; 23 static u8 dat_hvflip6[] = {0x90, 0x00, 0x06}; [all …]
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/linux-6.14.4/arch/x86/kernel/ |
D | callthunks.c | 33 } while(0) 166 if (insn.opcode.bytes[0] != CALL_INSN_OPCODE) in call_get_dest() 176 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 177 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 178 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 179 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 322 return 0; in x86_call_depth_emit_accounting() 326 return 0; in x86_call_depth_emit_accounting() 366 return 0; in callthunks_debug_show() 394 return 0; in callthunks_debugfs_init()
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/linux-6.14.4/lib/ |
D | string_helpers_kunit.c | 62 int i, p = 0, q_test = 0; in test_string_unescape() 68 for (i = 0; i < ARRAY_SIZE(strings); i++) { in test_string_unescape() 84 in[p++] = '\0'; in test_string_unescape() 144 .in = "\eb \\C\007\"\x90\r]", 146 .out = "\eb \\C\007\"\x90\\r]", 149 .out = "\\eb \\\\C\\a\\\"\x90\r]", 152 .out = "\\eb \\\\C\\a\\\"\x90\\r]", 167 .out = "\eb \\C\007\"\x90\r]", 170 .out = "\eb \\C\007\"\x90\\r]", 173 .out = "\\eb \\C\\a\"\x90\r]", [all …]
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/linux-6.14.4/arch/arm64/boot/dts/freescale/ |
D | imx8mp-iota2-lumpy.dts | 16 pwms = <&pwm4 0 500000 0>; 25 pinctrl-0 = <&pinctrl_gpio_keys>; 37 pinctrl-0 = <&pinctrl_usb_host_vbus>; 47 reg = <0x0 0x40000000 0 0x80000000>, 48 <0x1 0x00000000 0 0x80000000>; 72 pinctrl-0 = <&pinctrl_eqos>; 79 #size-cells = <0>; 81 ethphy0: ethernet-phy@0 { 82 reg = <0>; 85 pinctrl-0 = <&pinctrl_ethphy0>; [all …]
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D | imx8mp-icore-mx8mp-edimm2.2.dts | 28 pinctrl-0 = <&pinctrl_reg_usb1>; 39 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; 49 pinctrl-0 = <&pinctrl_eqos>; 57 #size-cells = <0>; 61 micrel,led-mode = <0>; 70 pinctrl-0 = <&pinctrl_uart2>; 105 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; 113 MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC 0x2 114 MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO 0x2 115 MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0 0x90 [all …]
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D | imx8mn-tqma8mqnl-mba8mx.dts | 28 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; 42 pinctrl-0 = <&pinctrl_usb0hub_sel>; 54 reg = <0x27>; 59 pinctrl-0 = <&pinctrl_expander2>; 96 fsl,pins = <MX8MN_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x00000146>, 97 <MX8MN_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x00000146>, 98 <MX8MN_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x00000146>, 99 <MX8MN_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x00000146>; 103 fsl,pins = <MX8MN_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x00000146>, 104 <MX8MN_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x00000146>, [all …]
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D | imx8mp-phycore-som.dtsi | 21 reg = <0x0 0x40000000 0 0x80000000>; 53 pinctrl-0 = <&pinctrl_fec>; 61 #size-cells = <0>; 63 ethphy1: ethernet-phy@0 { 65 reg = <0>; 78 pinctrl-0 = <&pinctrl_flexspi0>; 81 som_flash: flash@0 { 83 reg = <0>; 93 pinctrl-0 = <&pinctrl_i2c1>; 101 reg = <0x25>; [all …]
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D | imx8mm-phg.dts | 25 pinctrl-0 = <&pinctrl_beeper>; 26 gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; 32 pinctrl-0 = <&pinctrl_gpio_led>; 34 led-0 { 63 pinctrl-0 = <&pinctrl_otg_vbus_ctrl>; 74 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; 100 hsync-active = <0>; 101 vsync-active = <0>; 121 pinctrl-0 = <&pinctrl_ecspi1>; 128 pinctrl-0 = <&pinctrl_fec1>; [all …]
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D | imx8mm-kontron-osm-s.dtsi | 26 reg = <0x0 0x40000000 0 0x80000000>; 36 pinctrl-0 = <&pinctrl_reg_vdd_carrier>; 59 pinctrl-0 = <&pinctrl_reg_usb1_vbus>; 70 pinctrl-0 = <&pinctrl_reg_usb2_vbus>; 81 pinctrl-0 = <&pinctrl_reg_usdhc2_vcc>; 92 pinctrl-0 = <&pinctrl_reg_usdhc3_vcc>; 135 pinctrl-0 = <&pinctrl_ecspi1>; 139 flash@0 { 142 reg = <0>; 149 partition@0 { [all …]
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D | imx8mm-tqma8mqml-mba8mx.dts | 30 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; 45 pinctrl-0 = <&pinctrl_usb1_connector>; 50 #size-cells = <0>; 52 port@0 { 53 reg = <0>; 65 reg = <0x27>; 70 pinctrl-0 = <&pinctrl_expander>; 131 pinctrl-0 = <&pinctrl_usbotg1>; 157 fsl,pins = <MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x00000006>, 158 <MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x00000006>, [all …]
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D | imx8mp-tqma8mpql-mba8mp-ras314.dts | 38 pinctrl-0 = <&pinctrl_backlight>; 39 pwms = <&pwm2 0 5000000 0>; 40 brightness-levels = <0 4 8 16 32 64 128 255>; 54 pinctrl-0 = <&pinctrl_lvdsdisplay>; 64 pinctrl-0 = <&pinctrl_gpioled>; 69 function-enumerator = <0>; 96 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; 136 size = <0 0x38000000>; 137 alloc-ranges = <0 0x40000000 0 0xB0000000>; 145 pinctrl-0 = <&pinctrl_rfkill>; [all …]
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D | imx8mp-venice-gw74xx.dts | 38 reg = <0x0 0x40000000 0 0x80000000>; 43 pinctrl-0 = <&pinctrl_usbcon1>; 59 key-0 { 69 interrupts = <0>; 104 pinctrl-0 = <&pinctrl_gpio_leds>; 106 led-0 { 124 #clock-cells = <0>; 131 pinctrl-0 = <&pinctrl_pps>; 137 pinctrl-0 = <&pinctrl_reg_usb2>; 149 pinctrl-0 = <&pinctrl_reg_can1>; [all …]
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D | imx8mp-beacon-som.dtsi | 14 reg = <0x0 0x40000000 0 0xc0000000>, 15 <0x1 0x00000000 0 0xc0000000>; 21 pinctrl-0 = <&pinctrl_reg_wl_bt>; 49 pinctrl-0 = <&pinctrl_eqos>; 60 #size-cells = <0>; 77 snps,priority = <0x1>; 78 snps,map-to-dma-channel = <0>; 83 snps,priority = <0x2>; 89 snps,priority = <0x4>; 95 snps,priority = <0x8>; [all …]
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D | imx8mm-phycore-som.dtsi | 21 reg = <0x0 0x40000000 0 0x80000000>; 76 pinctrl-0 = <&pinctrl_fec1>; 81 #size-cells = <0>; 83 ethphy0: ethernet-phy@0 { 90 reg = <0>; 101 pinctrl-0 = <&pinctrl_flexspi0>; 104 som_flash: flash@0 { 108 reg = <0>; 125 pinctrl-0 = <&pinctrl_i2c1>; 133 reg = <0x08>; [all …]
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D | imx8mp-venice-gw702x.dtsi | 20 reg = <0x0 0x40000000 0 0x80000000>; 36 interrupts = <0>; 87 pinctrl-0 = <&pinctrl_eqos>; 95 #size-cells = <0>; 97 ethphy0: ethernet-phy@0 { 99 pinctrl-0 = <&pinctrl_ethphy0>; 101 reg = <0x0>; 111 #size-cells = <0>; 134 pinctrl-0 = <&pinctrl_i2c1>; 142 reg = <0x20>; [all …]
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D | imx8mp-evk.dts | 21 pwms = <&pwm2 0 100000 0>; 22 brightness-levels = <0 100>; 44 pinctrl-0 = <&pinctrl_gpio_led>; 55 reg = <0x0 0x40000000 0 0xc0000000>, 56 <0x1 0x00000000 0 0xc0000000>; 73 #clock-cells = <0>; 80 pinctrl-0 = <&pinctrl_audio_pwr_reg>; 92 pinctrl-0 = <&pinctrl_flexcan1_reg>; 103 pinctrl-0 = <&pinctrl_flexcan2_reg>; 113 pinctrl-0 = <&pinctrl_pcie0_reg>; [all …]
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D | imx8mp-tqma8mpql-mba8mpxl.dts | 26 io-channels = <&adc 0>, <&adc 1>; 44 pinctrl-0 = <&pinctrl_backlight>; 45 pwms = <&pwm2 0 5000000 0>; 46 brightness-levels = <0 4 8 16 32 64 128 255>; 55 #clock-cells = <0>; 64 pinctrl-0 = <&pinctrl_usbcon0>; 77 pinctrl-0 = <&pinctrl_pwmfan>; 81 pwms = <&pwm3 0 40000 PWM_POLARITY_INVERTED>; 82 cooling-levels = <0 32 64 128 196 240>; 92 pinctrl-0 = <&pinctrl_gpiobutton>; [all …]
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/linux-6.14.4/drivers/gpu/host1x/ |
D | dev.c | 90 .sync_offset = 0x3000, 94 .num_sid_entries = 0, 105 .sync_offset = 0x3000, 109 .num_sid_entries = 0, 120 .sync_offset = 0x2100, 124 .num_sid_entries = 0, 135 .sync_offset = 0x2100, 139 .num_sid_entries = 0, 145 { /* SE1 */ .base = 0x1ac8, .offset = 0x90, .limit = 0x90 }, 146 { /* SE2 */ .base = 0x1ad0, .offset = 0x90, .limit = 0x90 }, [all …]
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/linux-6.14.4/arch/x86/include/asm/ |
D | linkage.h | 16 #define _THIS_IP_ ({ unsigned long __here; asm ("lea 0(%%rip), %0" : "=r" (__here)); __here; }) 20 #define asmlinkage CPP_ASMLINKAGE __attribute__((regparm(0))) 23 #define __ALIGN .balign CONFIG_FUNCTION_ALIGNMENT, 0x90; 27 #define FUNCTION_PADDING .skip CONFIG_FUNCTION_ALIGNMENT, 0x90; 75 * .skip FUNCTION_PADDING, 0x90 76 * .byte 0xb8 84 * .byte 0xb8 86 * .skip FUNCTION_PADDING, 0x90 94 #define CFI_POST_PADDING .skip CONFIG_FUNCTION_PADDING_BYTES, 0x90; 96 #define CFI_PRE_PADDING .skip CONFIG_FUNCTION_PADDING_BYTES, 0x90; [all …]
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/linux-6.14.4/tools/testing/selftests/bpf/prog_tests/ |
D | sockopt_multi.c | 16 /* Set IP_TOS to the expected value (0x80). */ in run_getsockopt_test() 18 buf = 0x80; in run_getsockopt_test() 20 if (err < 0) { in run_getsockopt_test() 25 buf = 0x00; in run_getsockopt_test() 33 if (buf != 0x80) { in run_getsockopt_test() 34 log_err("Unexpected getsockopt 0x%x != 0x80 without BPF", buf); in run_getsockopt_test() 40 * - kernel: -> 0x80 in run_getsockopt_test() 41 * - child: 0x80 -> 0x90 in run_getsockopt_test() 49 buf = 0x00; in run_getsockopt_test() 57 if (buf != 0x90) { in run_getsockopt_test() [all …]
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/linux-6.14.4/drivers/pinctrl/mediatek/ |
D | pinctrl-mt7988.c | 20 #define MT7988_PIN(_number, _name) MTK_PIN(_number, _name, 0, _number, DRV_GRP4) 25 _x_bits, 32, 0) 33 PIN_FIELD(0, 83, 0x300, 0x10, 0, 4), 37 PIN_FIELD(0, 83, 0x0, 0x10, 0, 1), 41 PIN_FIELD(0, 83, 0x200, 0x10, 0, 1), 45 PIN_FIELD(0, 83, 0x100, 0x10, 0, 1), 49 PIN_FIELD_BASE(0, 0, 5, 0x30, 0x10, 13, 1), 50 PIN_FIELD_BASE(1, 1, 5, 0x30, 0x10, 14, 1), 51 PIN_FIELD_BASE(2, 2, 5, 0x30, 0x10, 11, 1), 52 PIN_FIELD_BASE(3, 3, 5, 0x30, 0x10, 12, 1), [all …]
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D | pinctrl-mt7981.c | 12 MTK_PIN(_number, _name, 0, _number, DRV_GRP4) 16 _x_bits, 32, 0) 23 PIN_FIELD(0, 56, 0x300, 0x10, 0, 4), 27 PIN_FIELD(0, 56, 0x0, 0x10, 0, 1), 31 PIN_FIELD(0, 56, 0x200, 0x10, 0, 1), 35 PIN_FIELD(0, 56, 0x100, 0x10, 0, 1), 39 PIN_FIELD_BASE(0, 0, 1, 0x10, 0x10, 1, 1), 40 PIN_FIELD_BASE(1, 1, 1, 0x10, 0x10, 0, 1), 41 PIN_FIELD_BASE(2, 2, 5, 0x20, 0x10, 6, 1), 42 PIN_FIELD_BASE(3, 3, 4, 0x20, 0x10, 6, 1), [all …]
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/linux-6.14.4/crypto/ |
D | testmgr.h | 34 * @ksize: Length of @key in bytes (0 if no key) 101 * @crypt_error: When @novrfy=0, the expected error from encrypt(). When 199 "\x90\xEF\xA0\x0D\xF3\x77\x4A\x25\x9F\x2E\x62\xB4\xC5\xD9\x9C\xB5" 206 "\xC2\xCD\x2D\xFF\x43\x40\x98\xCD\x20\xD8\xA1\x38\xD0\x90\xBF\x64" 279 "\x47\x1E\x02\x90\xFF\x0A\xF0\x75\x03\x51\xB7\xF8\x78\x86\x4C\xA9" 335 "\x90\x09\xCA\xEC\x0C\xDC\xF9\x2C\xD7\xEB\xAE\xA3\xA4\x47\xD7\x33" 367 "\xEC\x73\xFD\x15\x1B\xA2\xA0\x7A\x0F\x0D\x6E\xB4\x53\x07\x90\x92" 395 "\x0e\xa1\x87\x88\xb9\x2c\x90\xa6\x53\x5e\xe9\xef\xc4\xe2\x4d\xdd" 402 "\x90\xf1\x60\xf2\x65\xdd\x30\xa5\x66\xce\x62\x7b\xd0\xf8\x2d\x3d" 437 "\x0e\xa1\x87\x88\xb9\x2c\x90\xa6\x53\x5e\xe9\xef\xc4\xe2\x4d\xdd" [all …]
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/linux-6.14.4/drivers/phy/freescale/ |
D | phy-fsl-samsung-hdmi.c | 19 #define REG01_PMS_P_MASK GENMASK(3, 0) 23 #define REG13_TG_CODE_LOW_MASK GENMASK(7, 0) 27 #define REG14_TG_CODE_HIGH_MASK GENMASK(0, 0) 30 #define REG21_PMS_S_MASK GENMASK(3, 0) 60 .pixclk = 0, 61 .pll_div_regs = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00 }, 68 .pll_div_regs = { 0xd1, 0x4b, 0xf1, 0x89, 0x88, 0x80, 0x40 }, 71 .pll_div_regs = { 0xd1, 0x50, 0xf1, 0x86, 0x85, 0x80, 0x40 }, 74 .pll_div_regs = { 0xd1, 0x50, 0xf1, 0x99, 0x02, 0x80, 0x40 }, 77 .pll_div_regs = { 0xd1, 0x54, 0xfc, 0xcc, 0x91, 0x80, 0x40 }, [all …]
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/linux-6.14.4/drivers/gpu/drm/panel/ |
D | panel-samsung-s6e8aa0.c | 34 #define PANELCTL_SS_1_800 (0 << 5) 41 #define PANELCTL_CLK1_000 (0 << 3) 43 #define PANELCTL_CLK2_CON_MASK (7 << 0) 44 #define PANELCTL_CLK2_000 (0 << 0) 45 #define PANELCTL_CLK2_001 (1 << 0) 48 #define PANELCTL_INT1_000 (0 << 3) 50 #define PANELCTL_INT2_CON_MASK (7 << 0) 51 #define PANELCTL_INT2_000 (0 << 0) 52 #define PANELCTL_INT2_001 (1 << 0) 55 #define PANELCTL_BICTL_000 (0 << 3) [all …]
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