Searched +full:0 +full:x7fc000 (Results 1 – 3 of 3) sorted by relevance
| /linux-6.14.4/Documentation/devicetree/bindings/net/ |
| D | microchip,sparx5-switch.yaml | 35 pattern: "^switch@[0-9a-f]+$"
101 const: 0
104 "^port@[0-9a-f]+$":
129 minimum: 0
136 3300 ps (147 degree shift at 1Gbps). A value of 0 ps will disable
138 enum: [0, 1000, 1700, 2000, 2500, 3000, 3300]
139 default: 0
145 3300 ps (147 degree shift at 1Gbps). A value of 0 ps will disable
147 enum: [0, 1000, 1700, 2000, 2500, 3000, 3300]
148 default: 0
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| /linux-6.14.4/arch/arm64/boot/dts/microchip/ |
| D | sparx5.dtsi | 28 #size-cells = <0>;
39 cpu0: cpu@0 {
42 reg = <0x0>;
49 reg = <0x1>;
81 #clock-cells = <0>;
89 reg = <0x6 0x1110000c 0x24>;
94 #clock-cells = <0>;
100 #clock-cells = <0>;
116 reg = <0x6 0x00300000 0x10000>, /* GIC Dist */
117 <0x6 0x00340000 0xc0000>, /* GICR */
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| /linux-6.14.4/arch/arm64/boot/dts/qcom/ |
| D | msm8994-msft-lumia-octagon.dtsi | 52 #clock-cells = <0>;
58 pinctrl-0 = <&divclk4_pin_a>;
98 pinctrl-0 = <&hall_front_default &hall_back_default>;
129 reg = <0 0x00200000 0 0x100000>;
134 reg = <0 0x00300000 0 0x80000>;
139 reg = <0 0x00380000 0 0x1000>;
144 reg = <0 0x00381000 0 0x4000>;
149 reg = <0 0x00385000 0 0x1000>;
154 reg = <0 0x00386000 0 0x3000>;
159 reg = <0 0x00389000 0 0x1000>;
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