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/linux-6.14.4/Documentation/devicetree/bindings/pci/
Dqcom,pcie-sm8450.yaml99 reg = <0 0x01c00000 0 0x3000>,
100 <0 0x60000000 0 0xf1d>,
101 <0 0x60000f20 0 0xa8>,
102 <0 0x60001000 0 0x1000>,
103 <0 0x60100000 0 0x100000>;
105 ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>,
106 <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000>;
108 bus-range = <0x00 0xff>;
110 linux,pci-domain = <0>;
154 interrupt-map-mask = <0 0 0 0x7>;
[all …]
/linux-6.14.4/drivers/thermal/intel/int340x_thermal/
Dprocessor_thermal_device_pci.c54 { PROC_THERMAL_MMIO_TJMAX, 0x599c, 16, 0xff },
55 { PROC_THERMAL_MMIO_PP0_TEMP, 0x597c, 0, 0xff },
56 { PROC_THERMAL_MMIO_PP1_TEMP, 0x5980, 0, 0xff },
57 { PROC_THERMAL_MMIO_PKG_TEMP, 0x5978, 0, 0xff },
58 { PROC_THERMAL_MMIO_THRES_0, 0x5820, 8, 0x7F },
59 { PROC_THERMAL_MMIO_THRES_1, 0x5820, 16, 0x7F },
60 { PROC_THERMAL_MMIO_INT_ENABLE_0, 0x5820, 15, 0x01 },
61 { PROC_THERMAL_MMIO_INT_ENABLE_1, 0x5820, 23, 0x01 },
62 { PROC_THERMAL_MMIO_INT_STATUS_0, 0x7200, 6, 0x01 },
63 { PROC_THERMAL_MMIO_INT_STATUS_1, 0x7200, 8, 0x01 },
[all …]
/linux-6.14.4/drivers/net/ethernet/intel/igb/
De1000_regs.h7 #define E1000_CTRL 0x00000 /* Device Control - RW */
8 #define E1000_STATUS 0x00008 /* Device Status - RO */
9 #define E1000_EECD 0x00010 /* EEPROM/Flash Control - RW */
10 #define E1000_EERD 0x00014 /* EEPROM Read - RW */
11 #define E1000_CTRL_EXT 0x00018 /* Extended Device Control - RW */
12 #define E1000_MDIC 0x00020 /* MDI Control - RW */
13 #define E1000_MDICNFG 0x00E04 /* MDI Config - RW */
14 #define E1000_SCTL 0x00024 /* SerDes Control - RW */
15 #define E1000_FCAL 0x00028 /* Flow Control Address Low - RW */
16 #define E1000_FCAH 0x0002C /* Flow Control Address High -RW */
[all …]
/linux-6.14.4/drivers/media/i2c/
Dov5648.c30 #define OV5648_SW_STANDBY_REG 0x100
31 #define OV5648_SW_STANDBY_STREAM_ON BIT(0)
33 #define OV5648_SW_RESET_REG 0x103
34 #define OV5648_SW_RESET_RESET BIT(0)
36 #define OV5648_PAD_OEN0_REG 0x3000
37 #define OV5648_PAD_OEN1_REG 0x3001
38 #define OV5648_PAD_OEN2_REG 0x3002
39 #define OV5648_PAD_OUT0_REG 0x3008
40 #define OV5648_PAD_OUT1_REG 0x3009
42 #define OV5648_CHIP_ID_H_REG 0x300a
[all …]
/linux-6.14.4/drivers/net/ethernet/chelsio/cxgb4/
Dt4_hw.c54 * at the time it indicated completion is stored there. Returns 0 if the
66 return 0; in t4_wait_op_done_val()
68 if (--attempts == 0) in t4_wait_op_done_val()
167 /* Reset ENABLE to 0 so reads of PCIE_CFG_SPACE_DATA won't cause a in t4_hw_pci_read_cfg4()
169 * ENABLE is 0 so a simple register write is easier than a in t4_hw_pci_read_cfg4()
172 t4_write_reg(adap, PCIE_CFG_SPACE_REQ_A, 0); in t4_hw_pci_read_cfg4()
247 log->cursor = 0; in t4_record_mbox()
249 for (i = 0; i < size / 8; i++) in t4_record_mbox()
252 entry->cmd[i++] = 0; in t4_record_mbox()
277 * The return value is 0 on success or a negative errno on failure. A
[all …]
/linux-6.14.4/arch/arm64/boot/dts/qcom/
Dsm8450.dtsi39 #clock-cells = <0>;
45 #clock-cells = <0>;
52 #size-cells = <0>;
54 cpu0: cpu@0 {
57 reg = <0x0 0x0>;
62 qcom,freq-domain = <&cpufreq_hw 0>;
64 clocks = <&cpufreq_hw 0>;
81 reg = <0x0 0x100>;
86 qcom,freq-domain = <&cpufreq_hw 0>;
88 clocks = <&cpufreq_hw 0>;
[all …]
/linux-6.14.4/fs/nls/
Dnls_cp950.c17 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x00-0x07 */
18 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x08-0x0F */
19 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x10-0x17 */
20 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x18-0x1F */
21 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x20-0x27 */
22 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x28-0x2F */
23 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x30-0x37 */
24 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x38-0x3F */
25 0x3000,0xFF0C,0x3001,0x3002,0xFF0E,0x2027,0xFF1B,0xFF1A,/* 0x40-0x47 */
26 0xFF1F,0xFF01,0xFE30,0x2026,0x2025,0xFE50,0xFE51,0xFE52,/* 0x48-0x4F */
[all …]
Dnls_cp936.c17 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x00-0x07 */
18 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x08-0x0F */
19 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x10-0x17 */
20 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x18-0x1F */
21 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x20-0x27 */
22 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x28-0x2F */
23 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x30-0x37 */
24 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x38-0x3F */
25 0x4E02,0x4E04,0x4E05,0x4E06,0x4E0F,0x4E12,0x4E17,0x4E1F,/* 0x40-0x47 */
26 0x4E20,0x4E21,0x4E23,0x4E26,0x4E29,0x4E2E,0x4E2F,0x4E31,/* 0x48-0x4F */
[all …]