Home
last modified time | relevance | path

Searched +full:0 +full:x4800 (Results 1 – 25 of 102) sorted by relevance

12345

/linux-6.14.4/Documentation/devicetree/bindings/pci/
Dfaraday,ftpci100.yaml18 The host controller appear on the PCI bus with vendor ID 0x159b (Faraday
19 Technology) and product ID 0x4321.
34 interrupt-map-mask = <0xf800 0 0 7>;
36 <0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
37 <0x4800 0 0 2 &pci_intc 1>,
38 <0x4800 0 0 3 &pci_intc 2>,
39 <0x4800 0 0 4 &pci_intc 3>,
40 <0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
41 <0x5000 0 0 2 &pci_intc 2>,
42 <0x5000 0 0 3 &pci_intc 3>,
[all …]
Dv3-v360epc-pci.txt18 each be exactly 256MB (0x10000000) in size.
38 reg = <0x62000000 0x10000>, <0x61000000 0x01000000>;
42 bus-range = <0x00 0xff>;
43 ranges = 0x01000000 0 0x00000000 /* I/O space @00000000 */
44 0x60000000 0 0x01000000 /* 16 MiB @ LB 60000000 */
45 0x02000000 0 0x40000000 /* non-prefectable memory @40000000 */
46 0x40000000 0 0x10000000 /* 256 MiB @ LB 40000000 1:1 */
47 0x42000000 0 0x50000000 /* prefetchable memory @50000000 */
48 0x50000000 0 0x10000000>; /* 256 MiB @ LB 50000000 1:1 */
49 dma-ranges = <0x02000000 0 0x20000000 /* EBI memory space */
[all …]
/linux-6.14.4/arch/arm/boot/dts/arm/
Dintegratorap.dts17 #size-cells = <0>;
19 cpu@0 {
28 reg = <0>;
37 operating-points = <71000 0
38 66000 0
39 60000 0
40 48000 0
41 36000 0
42 24000 0
43 12000 0>;
[all …]
/linux-6.14.4/arch/arm/boot/dts/gemini/
Dgemini.dtsi23 pinctrl-0 = <&pflash_default_pins>;
31 reg = <0x40000000 0x1000>;
39 offset = <0x0c>;
41 mask = <0xC0000000>;
49 pinctrl-0 = <&dram_default_pins>, <&system_default_pins>,
159 reg = <0x41000000 0x1000>;
168 reg = <0x42000000 0x100>;
173 pinctrl-0 = <&uart_default_pins>;
179 reg = <0x43000000 0x1000>;
193 reg = <0x45000000 0x100>;
[all …]
/linux-6.14.4/drivers/regulator/
Dqcom_spmi-regulator.c25 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_NONE 0x00
26 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN0 0x01
27 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN1 0x02
28 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN2 0x04
29 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN3 0x08
30 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT 0x10
33 #define SPMI_REGULATOR_PIN_CTRL_HPM_NONE 0x00
34 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN0 0x01
35 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN1 0x02
36 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN2 0x04
[all …]
/linux-6.14.4/drivers/media/i2c/
Dov5647.c42 #define MIPI_CTRL00_CLOCK_LANE_DISABLE BIT(0)
44 #define OV5647_SW_STANDBY 0x0100
45 #define OV5647_SW_RESET 0x0103
46 #define OV5647_REG_CHIPID_H 0x300a
47 #define OV5647_REG_CHIPID_L 0x300b
48 #define OV5640_REG_PAD_OUT 0x300d
49 #define OV5647_REG_EXP_HI 0x3500
50 #define OV5647_REG_EXP_MID 0x3501
51 #define OV5647_REG_EXP_LO 0x3502
52 #define OV5647_REG_AEC_AGC 0x3503
[all …]
Dov8856.c26 #define OV8856_REG_CHIP_ID 0x300a
27 #define OV8856_CHIP_ID 0x00885a
29 #define OV8856_REG_MODE_SELECT 0x0100
30 #define OV8856_MODE_STANDBY 0x00
31 #define OV8856_MODE_STREAMING 0x01
34 #define OV8856_2A_MODULE 0x01
35 #define OV8856_1B_MODULE 0x02
37 /* the OTP read-out buffer is at 0x7000 and 0xf is the offset
40 #define OV8856_MODULE_REVISION 0x700f
41 #define OV8856_OTP_MODE_CTRL 0x3d84
[all …]
Dov5670.c22 #define OV5670_REG_CHIP_ID 0x300a
23 #define OV5670_CHIP_ID 0x005670
25 #define OV5670_REG_MODE_SELECT 0x0100
26 #define OV5670_MODE_STANDBY 0x00
27 #define OV5670_MODE_STREAMING 0x01
29 #define OV5670_REG_SOFTWARE_RST 0x0103
30 #define OV5670_SOFTWARE_RST 0x01
32 #define OV5670_MIPI_SC_CTRL0_REG 0x3018
39 #define OV5670_REG_VTS 0x380e
40 #define OV5670_VTS_30FPS 0x0808 /* default for 30 fps */
[all …]
/linux-6.14.4/drivers/gpu/drm/msm/adreno/
Da2xx_gpu.c18 for (i = 0; i < submit->nr_cmds; i++) { in a2xx_submit()
42 OUT_RING(ring, 0x00000000); in a2xx_submit()
49 OUT_RING(ring, 0x80000000); in a2xx_submit()
58 struct msm_ringbuffer *ring = gpu->rb[0]; in a2xx_me_init()
62 /* All fields present (bits 9:0) */ in a2xx_me_init()
63 OUT_RING(ring, 0x000003ff); in a2xx_me_init()
65 OUT_RING(ring, 0x00000000); in a2xx_me_init()
67 OUT_RING(ring, 0x00000000); in a2xx_me_init()
69 OUT_RING(ring, REG_A2XX_RB_SURFACE_INFO - 0x2000); in a2xx_me_init()
70 OUT_RING(ring, REG_A2XX_PA_SC_WINDOW_OFFSET - 0x2000); in a2xx_me_init()
[all …]
/linux-6.14.4/drivers/video/fbdev/
Dhpfb.c34 #define TC_NBLANK 0x4080
35 #define TC_WEN 0x4088
36 #define TC_REN 0x408c
37 #define TC_FBEN 0x4090
38 #define TC_PRR 0x40ea
41 #define RR_CLEAR 0x0
42 #define RR_COPY 0x3
43 #define RR_NOOP 0x5
44 #define RR_XOR 0x6
45 #define RR_INVERT 0xa
[all …]
/linux-6.14.4/drivers/cpufreq/
Dti-cpufreq.c21 #define REVISION_MASK 0xF
24 #define AM33XX_800M_ARM_MPU_MAX_FREQ 0x1E2F
25 #define AM43XX_600M_ARM_MPU_MAX_FREQ 0xFFA
33 #define DRA7_EFUSE_NOM_MPU_OPP BIT(0)
38 #define OMAP3_CONTROL_DEVICE_STATUS 0x4800244C
39 #define OMAP3_CONTROL_IDCODE 0x4830A204
40 #define OMAP34xx_ProdID_SKUID 0x4830A20C
41 #define OMAP3_SYSCON_BASE (0x48000000 + 0x2000 + 0x270)
47 #define AM625_SUPPORT_K_MPU_OPP BIT(0)
69 #define AM62A7_SUPPORT_N_MPU_OPP BIT(0)
[all …]
/linux-6.14.4/arch/arm/boot/dts/amazon/
Dalpine.dtsi37 reg = <0 0 0 0>;
43 #size-cells = <0>;
46 cpu@0 {
49 reg = <0>;
97 #size-cells = <0>;
98 #address-cells = <0>;
100 reg = <0x0 0xfb001000 0x0 0x1000>,
101 <0x0 0xfb002000 0x0 0x2000>,
102 <0x0 0xfb004000 0x0 0x2000>,
103 <0x0 0xfb006000 0x0 0x2000>;
[all …]
/linux-6.14.4/drivers/mailbox/
Dqcom-cpucp-mbox.c16 #define APSS_CPUCP_MBOX_CMD_OFF 0x4
19 #define APSS_CPUCP_TX_MBOX_CMD(i) (0x100 + ((i) * 8))
22 #define APSS_CPUCP_RX_MBOX_CMD(i) (0x100 + ((i) * 8))
23 #define APSS_CPUCP_RX_MBOX_MAP 0x4000
24 #define APSS_CPUCP_RX_MBOX_STAT 0x4400
25 #define APSS_CPUCP_RX_MBOX_CLEAR 0x4800
26 #define APSS_CPUCP_RX_MBOX_EN 0x4c00
27 #define APSS_CPUCP_RX_MBOX_CMD_MASK GENMASK_ULL(63, 0)
82 return 0; in qcom_cpucp_mbox_startup()
104 return 0; in qcom_cpucp_mbox_send_data()
[all …]
/linux-6.14.4/arch/arm64/boot/dts/amd/
Delba.dtsi20 #clock-cells = <0>;
25 #clock-cells = <0>;
30 #clock-cells = <0>;
35 #clock-cells = <0>;
64 reg = <0x0 0x400 0x0 0x100>;
67 #size-cells = <0>;
75 reg = <0x0 0x1400 0x0 0x100>;
83 reg = <0x0 0x2400 0x0 0x400>,
84 <0x0 0x7fff0000 0x0 0x1000>;
86 #size-cells = <0>;
[all …]
/linux-6.14.4/drivers/gpu/drm/i915/display/
Dintel_cx0_phy.c27 for ((__lane) = 0; (__lane) < 2; (__lane)++) \
30 #define INTEL_CX0_LANE0 BIT(0)
52 return 0; in lane_mask_to_lane()
65 * In DP-alt with pin assignment D, only PHY lane 0 is owned in intel_cx0_get_owned_lane_mask()
132 0, XELPDP_PORT_P2M_RESPONSE_READY | XELPDP_PORT_P2M_ERROR_SET); in intel_clear_response_ready_flag()
170 "PHY %c Timeout waiting for message ACK. Status: 0x%x\n", in intel_cx0_wait_for_ack()
185 "PHY %c Error occurred during %s command. Status: 0x%x\n", in intel_cx0_wait_for_ack()
194 "PHY %c Not a %s response. MSGBUS Status: 0x%x.\n", in intel_cx0_wait_for_ack()
201 return 0; in intel_cx0_wait_for_ack()
228 if (ack < 0) in __intel_cx0_read_once()
[all …]
/linux-6.14.4/arch/arm64/boot/dts/amazon/
Dalpine-v2.dtsi48 #size-cells = <0>;
50 cpu@0 {
53 reg = <0x0 0x0>;
60 reg = <0x0 0x1>;
67 reg = <0x0 0x2>;
74 reg = <0x0 0x3>;
82 cpu_suspend = <0x84000001>;
83 cpu_off = <0x84000002>;
84 cpu_on = <0x84000003>;
89 #clock-cells = <0>;
[all …]
/linux-6.14.4/drivers/net/ethernet/smsc/
Depic100.c35 static int debug = 1; /* 1 normal messages, 0 quiet .. 7 verbose. */
68 #define RX_FIFO_THRESH 1 /* 0-3, 0==32, 64,96, or 3==128 bytes */
102 module_param(debug, int, 0);
103 module_param(rx_copybreak, int, 0);
104 module_param_array(options, int, NULL, 0);
105 module_param_array(full_duplex, int, NULL, 0);
106 MODULE_PARM_DESC(debug, "EPIC/100 debug level (0-5)");
107 MODULE_PARM_DESC(options, "EPIC/100: Bits 0-3: media type, bit 4: full duplex");
146 #define EPIC_TOTAL_SIZE 0x100
150 #define EPIC_BAR 0
[all …]
/linux-6.14.4/drivers/gpu/drm/sun4i/
Dsun4i_backend.h20 #define SUN4I_BACKEND_MODCTL_REG 0x800
24 #define SUN4I_BACKEND_MODCTL_OUT_LCD0 (0 << 20)
34 #define SUN4I_BACKEND_MODCTL_DEBE_EN BIT(0)
36 #define SUN4I_BACKEND_BACKCOLOR_REG 0x804
39 #define SUN4I_BACKEND_DISSIZE_REG 0x808
40 #define SUN4I_BACKEND_DISSIZE(w, h) (((((h) - 1) & 0xffff) << 16) | \
41 (((w) - 1) & 0xffff))
43 #define SUN4I_BACKEND_LAYSIZE_REG(l) (0x810 + (0x4 * (l)))
44 #define SUN4I_BACKEND_LAYSIZE(w, h) (((((h) - 1) & 0x1fff) << 16) | \
45 (((w) - 1) & 0x1fff))
[all …]
/linux-6.14.4/drivers/staging/media/meson/vdec/
Dcodec_hevc_common.c13 #define MMU_COMPRESS_HEADER_SIZE 0x48000
14 #define MMU_MAP_SIZE 0x4800
17 0x0401, 0x8401, 0x0800, 0x0402,
18 0x9002, 0x1423, 0x8CC3, 0x1423,
19 0x8804, 0x9825, 0x0800, 0x04FE,
20 0x8406, 0x8411, 0x1800, 0x8408,
21 0x8409, 0x8C2A, 0x9C2B, 0x1C00,
22 0x840F, 0x8407, 0x8000, 0x8408,
23 0x2000, 0xA800, 0x8410, 0x04DE,
24 0x840C, 0x840D, 0xAC00, 0xA000,
[all …]
/linux-6.14.4/drivers/staging/media/atomisp/i2c/
Dov2722.h27 #define I2C_MSG_LENGTH 0x2
36 * bits 31-16: numerator, bits 15-0: denominator
38 #define OV2722_FOCAL_LENGTH_DEFAULT 0x1160064
42 * bits 31-16: numerator, bits 15-0: denominator
44 #define OV2722_F_NUMBER_DEFAULT 0x1a000a
51 * bits 7-0: min f-number denominator
53 #define OV2722_F_NUMBER_RANGE 0x1a0a1a0a
54 #define OV2720_ID 0x2720
55 #define OV2722_ID 0x2722
57 #define OV2722_FINE_INTG_TIME_MIN 0
[all …]
/linux-6.14.4/arch/mips/boot/dts/loongson/
Dloongson64-2k1000.dtsi15 #size-cells = <0>;
17 cpu0: cpu@0 {
20 reg = <0x0>;
27 #clock-cells = <0>;
33 #address-cells = <0>;
43 ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* ioports */
44 0 0x40000000 0 0x40000000 0 0x40000000
45 0xfe 0x00000000 0xfe 0x00000000 0 0x40000000>;
51 ranges = <1 0x0 0x0 0x18000000 0x4000>;
56 reg = <0 0x1fe07000 0 0x422>;
[all …]
/linux-6.14.4/drivers/media/pci/cobalt/
Dcobalt-driver.h39 #define PCI_DEVICE_ID_COBALT 0x2732
65 #define COBALT_SYSSTAT_DIP0_MSK BIT(0)
98 #define COBALT_I2C_0_BASE 0x0
99 #define COBALT_I2C_1_BASE 0x080
100 #define COBALT_I2C_2_BASE 0x100
101 #define COBALT_I2C_3_BASE 0x180
102 #define COBALT_I2C_HSMA_BASE 0x200
104 #define COBALT_SYS_CTRL_BASE 0x400
114 #define COBALT_SYS_STAT_BASE 0x500
115 #define COBALT_SYS_STAT_MASK (COBALT_SYS_STAT_BASE + 0x08)
[all …]
/linux-6.14.4/drivers/gpu/drm/radeon/reg_srcs/
Dr3001 r300 0x4f60
2 0x1434 SRC_Y_X
3 0x1438 DST_Y_X
4 0x143C DST_HEIGHT_WIDTH
5 0x146C DP_GUI_MASTER_CNTL
6 0x1474 BRUSH_Y_X
7 0x1478 DP_BRUSH_BKGD_CLR
8 0x147C DP_BRUSH_FRGD_CLR
9 0x1480 BRUSH_DATA0
10 0x1484 BRUSH_DATA1
[all …]
/linux-6.14.4/drivers/net/ipa/data/
Dipa_data-v4.5.c15 /* Source resource types; first must have value 0 */
16 IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS = 0,
22 /* Destination resource types; first must have value 0 */
23 IPA_RESOURCE_TYPE_DST_DATA_SECTORS = 0,
30 IPA_RSRC_GROUP_SRC_UNUSED_0 = 0,
38 IPA_RSRC_GROUP_DST_UNUSED_0 = 0,
50 .max_reads = 0, /* no limit (hardware max) */
157 .channel_id = 0,
209 .min = 0, .max = 63,
212 .min = 0, .max = 63,
[all …]
Dipa_data-v4.9.c15 /* Source resource types; first must have value 0 */
16 IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS = 0,
22 /* Destination resource types; first must have value 0 */
23 IPA_RESOURCE_TYPE_DST_DATA_SECTORS = 0,
30 IPA_RSRC_GROUP_SRC_UL_DL = 0,
36 IPA_RSRC_GROUP_DST_UL_DL_DPL = 0,
47 .max_reads = 0, /* no limit (hardware max) */
149 .channel_id = 0,
210 .min = 0, .max = 4,
213 .min = 0, .max = 4,
[all …]

12345