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/linux-6.14.4/Documentation/devicetree/bindings/serial/
Dst,stm32-uart.yaml122 reg = <0x40011000 0x400>;
124 clocks = <&rcc 0 164>;
125 dmas = <&dma2 2 4 0x414 0x0>,
126 <&dma2 7 4 0x414 0x0>;
/linux-6.14.4/arch/arm/boot/dts/st/
Dstm32f746.dtsi53 #clock-cells = <0>;
55 clock-frequency = <0>;
59 #clock-cells = <0>;
65 #clock-cells = <0>;
71 #clock-cells = <0>;
80 #size-cells = <0>;
82 reg = <0x40000000 0x400>;
83 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM2)>;
102 #size-cells = <0>;
104 reg = <0x40000400 0x400>;
[all …]
Dstm32f429.dtsi58 #clock-cells = <0>;
60 clock-frequency = <0>;
64 #clock-cells = <0>;
70 #clock-cells = <0>;
76 #clock-cells = <0>;
78 clock-frequency = <0>;
85 reg = <0x1fff7800 0x400>;
89 reg = <0x22c 0x2>;
92 reg = <0x22e 0x2>;
98 #size-cells = <0>;
[all …]
Dstm32h743.dtsi54 #clock-cells = <0>;
56 clock-frequency = <0>;
60 #clock-cells = <0>;
66 #clock-cells = <0>;
68 clock-frequency = <0>;
75 reg = <0x40000c00 0x400>;
82 #size-cells = <0>;
84 reg = <0x40002400 0x400>;
95 trigger@0 {
97 reg = <0>;
[all …]
Dstm32mp131.dtsi16 #size-cells = <0>;
18 cpu0: cpu@0 {
21 reg = <0>;
43 #size-cells = <0>;
44 linaro,optee-channel-id = <0>;
47 reg = <0x14>;
52 reg = <0x16>;
57 reg = <0x17>;
61 #size-cells = <0>;
63 scmi_reg11: regulator@0 {
[all …]
Dstm32mp151.dtsi16 #size-cells = <0>;
18 cpu0: cpu@0 {
22 reg = <0>;
42 reg = <0xa0021000 0x1000>,
43 <0xa0022000 0x2000>;
58 #clock-cells = <0>;
64 #clock-cells = <0>;
70 #clock-cells = <0>;
76 #clock-cells = <0>;
82 #clock-cells = <0>;
[all …]
/linux-6.14.4/arch/arm/
DKconfig.debug146 0x80000000 | 0xf0000000 | UART0
147 0x80004000 | 0xf0004000 | UART1
148 0x80008000 | 0xf0008000 | UART2
149 0x8000c000 | 0xf000c000 | UART3
150 0x80010000 | 0xf0010000 | UART4
151 0x80014000 | 0xf0014000 | UART5
152 0x80018000 | 0xf0018000 | UART6
153 0x8001c000 | 0xf001c000 | UART7
154 0x80020000 | 0xf0020000 | UART8
155 0x80024000 | 0xf0024000 | UART9
[all …]