Searched +full:0 +full:x2800000 (Results 1 – 25 of 33) sorted by relevance
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/linux-6.14.4/arch/arm/boot/dts/marvell/ |
D | armada-385-linksys-caiman.dts | 18 wan_amber@0 { 20 reg = <0x0>; 25 reg = <0x1>; 30 reg = <0x2>; 35 reg = <0x3>; 40 reg = <0x5>; 45 reg = <0x6>; 50 reg = <0x7>; 55 reg = <0x8>; 60 reg = <0x9>; [all …]
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D | armada-385-linksys-cobra.dts | 18 wan_amber@0 { 20 reg = <0x0>; 25 reg = <0x1>; 30 reg = <0x2>; 35 reg = <0x3>; 40 reg = <0x5>; 45 reg = <0x6>; 50 reg = <0x7>; 55 reg = <0x8>; 60 reg = <0x9>; [all …]
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D | armada-385-linksys-shelby.dts | 18 wan_amber@0 { 20 reg = <0x0>; 25 reg = <0x1>; 30 reg = <0x2>; 35 reg = <0x3>; 40 reg = <0x5>; 45 reg = <0x6>; 50 reg = <0x7>; 55 reg = <0x8>; 60 reg = <0x9>; [all …]
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D | kirkwood-c200-v1.dts | 22 memory@0 { 24 reg = <0x00000000 0x20000000>; 29 pinctrl-0 = <&pmx_buttons>; 59 pinctrl-0 = <&pmx_poweroff>; 66 pinctrl-0 = <&pmx_leds>; 69 led-0 { 174 reg = <0x30>; 179 reg = <0x4c>; 195 partition@0 { 197 reg = <0x0000000 0x200000>; [all …]
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D | armada-370-c200-v2.dts | 27 reg = <0x00000000 0x40000000>; /* 1024 MB */ 31 ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000 32 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000 33 MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>; 61 pinctrl-0 = <&pmx_beeper>; 68 pinctrl-0 = <&pmx_poweroff>; 75 pinctrl-0 = <&pmx_buttons>; 93 gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; 105 pinctrl-0 = <&pmx_leds1 &pmx_leds2>; 108 led-0 { [all …]
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D | armada-xp-linksys-mamba.dts | 6 * remaps internal registers at 0xf1000000. Therefore, if earlyprintk 34 memory@0 { 36 reg = <0x00000000 0x00000000 0x00000000 0x10000000>; /* 256MB */ 40 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000 41 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000 42 MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000 43 MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000 44 MBUS_ID(0x0c, 0x04) 0 0 0xf1200000 0x100000>; 64 pinctrl-0 = <&ge0_rgmii_pins>; 69 bm,pool-long = <0>; [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/rtc/ |
D | fsl,ls-ftm-alarm.yaml | 70 reg = <0x2800000 0x10000>; 71 fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0>;
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/linux-6.14.4/Documentation/devicetree/bindings/net/ |
D | hisilicon-hip04-net.txt | 33 reg = <0x28f1000 0x1000>; 35 #size-cells = <0>; 37 phy0: ethernet-phy@0 { 39 reg = <0>; 40 marvell,reg-init = <18 0x14 0 0x8001>; 46 marvell,reg-init = <18 0x14 0 0x8001>; 52 reg = <0x28c0000 0x10000>; 57 reg = <0x28b0000 0x10000>; 58 interrupts = <0 413 4>; 60 port-handle = <&ppe 31 0 31>; [all …]
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/linux-6.14.4/include/linux/mfd/ |
D | cs40l50.h | 20 #define CS40L50_BLOCK_ENABLES2 0x201C 21 #define CS40L50_ERR_RLS 0x2034 22 #define CS40L50_BST_LPMODE_SEL 0x3810 23 #define CS40L50_DCM_LOW_POWER 0x1 24 #define CS40L50_OVERTEMP_WARN 0x4000010 27 #define CS40L50_IRQ1_INT_1 0xE010 29 #define CS40L50_IRQ1_INT_2 0xE014 30 #define CS40L50_IRQ1_INT_8 0xE02C 31 #define CS40L50_IRQ1_INT_9 0xE030 32 #define CS40L50_IRQ1_INT_10 0xE034 [all …]
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/linux-6.14.4/drivers/firmware/cirrus/test/ |
D | cs_dsp_mock_regmap.c | 61 { 0xffe00, 0x0000 }, /* CONTROL */ 62 { 0xffe02, 0x0000 }, /* CLOCKING */ 63 { 0xffe04, 0x0001 }, /* STATUS1: RAM_RDY=1 */ 64 { 0xffe30, 0x0000 }, /* WDMW_CONFIG_1 */ 65 { 0xffe32, 0x0000 }, /* WDMA_CONFIG_2 */ 66 { 0xffe34, 0x0000 }, /* RDMA_CONFIG_1 */ 67 { 0xffe40, 0x0000 }, /* SCRATCH_0_1 */ 68 { 0xffe42, 0x0000 }, /* SCRATCH_2_3 */ 72 regmap_reg_range(0x80000, 0x88ffe), /* PM */ 73 regmap_reg_range(0xa0000, 0xa9ffe), /* XM */ [all …]
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D | cs_dsp_mock_mem_maps.c | 15 { .type = WMFW_HALO_PM_PACKED, .base = 0x3800000 }, 16 { .type = WMFW_HALO_XM_PACKED, .base = 0x2000000 }, 17 { .type = WMFW_HALO_YM_PACKED, .base = 0x2C00000 }, 18 { .type = WMFW_ADSP2_XM, .base = 0x2800000 }, 19 { .type = WMFW_ADSP2_YM, .base = 0x3400000 }, 25 0x5000, /* PM_PACKED */ 26 0x6000, /* XM_PACKED */ 27 0x47F4, /* YM_PACKED */ 28 0x8000, /* XM_UNPACKED_24 */ 29 0x5FF8, /* YM_UNPACKED_24 */ [all …]
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/linux-6.14.4/include/sound/ |
D | cs35l56.h | 18 #define CS35L56_DEVID 0x0000000 19 #define CS35L56_REVID 0x0000004 20 #define CS35L56_RELID 0x000000C 21 #define CS35L56_OTPID 0x0000010 22 #define CS35L56_SFT_RESET 0x0000020 23 #define CS35L56_GLOBAL_ENABLES 0x0002014 24 #define CS35L56_BLOCK_ENABLES 0x0002018 25 #define CS35L56_BLOCK_ENABLES2 0x000201C 26 #define CS35L56_REFCLK_INPUT 0x0002C04 27 #define CS35L56_GLOBAL_SAMPLE_RATE 0x0002C0C [all …]
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/linux-6.14.4/arch/arm64/boot/dts/qcom/ |
D | msm8956-sony-xperia-loire.dtsi | 16 qcom,msm-id = <266 0x10001>; /* MSM8956 v1.1 */ 17 qcom,board-id = <8 0>; 32 reg = <0x0 0x83000000 0x0 0x2800000>; 37 reg = <0 0x57f00000 0 0x100000>; 38 record-size = <0x20000>; 39 console-size = <0x40000>; 40 ftrace-size = <0x20000>; 41 pmsg-size = <0x20000>; 111 /* Cluster 0 supply */ 274 gpio-reserved-ranges = <0 4>;
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D | sm7125-xiaomi-common.dtsi | 22 qcom,msm-id = <QCOM_ID_SM7125 0>; 31 reg = <0x0 0x9c000000 0x0 (1080 * 2400 * 4)>; 55 reg = <0x0 0x86000000 0x0 0x8400000>; 60 reg = <0x0 0x8ee00000 0x0 0x500000>; 65 reg = <0x0 0x8f300000 0x0 0x1e00000>; 70 reg = <0x0 0x91100000 0x0 0x2800000>; 75 reg = <0x0 0x93900000 0x0 0x200000>; 80 reg = <0x0 0x93b00000 0x0 0x10000>; 85 reg = <0x0 0x93b15000 0x0 0x2000>; 90 reg = <0x0 0x9c000000 0x0 (1080 * 2400 * 4)>; [all …]
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D | qcm6490-idp.dts | 44 pinctrl-0 = <&pmic_lcd_bl_en>; 59 pinctrl-0 = <&lcd_disp_bias_en>; 66 pinctrl-0 = <&key_vol_up_default>; 81 reg = <0x0 0x80700000 0x0 0x100000>; 86 reg = <0x0 0x81800000 0x0 0x1e00000>; 91 reg = <0x0 0x84300000 0x0 0x500000>; 96 reg = <0x0 0x84800000 0x0 0x1900000>; 101 reg = <0x0 0x86100000 0x0 0x2800000>; 106 reg = <0x0 0x88900000 0x0 0x1e00000>; 111 reg = <0x0 0x8a700000 0x0 0x700000>; [all …]
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D | sm8450-sony-xperia-nagara.dtsi | 36 pinctrl-0 = <&focus_n &snapshot_n &vol_down_n>; 68 reg = <0x0 0x85700000 0x0 0x2800000>; 73 reg = <0x0 0x9fd00000 0x0 0x700000>; 79 reg = <0x0 0xf3300000 0x0 0x280000>; 88 reg = <0 0xffc00000 0 0x200000>; 89 console-size = <0x40000>; 90 record-size = <0x1000>; 104 pinctrl-0 = <&telec_pwr_en>; 119 regulators-0 { 493 reg = <0x48>; [all …]
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D | qcs6490-rb3gen2.dts | 78 reg = <0x0 0x80700000 0x0 0x100000>; 83 reg = <0x0 0x81800000 0x0 0x1e00000>; 88 reg = <0x0 0x84300000 0x0 0x500000>; 93 reg = <0x0 0x84800000 0x0 0x1900000>; 98 reg = <0x0 0x86100000 0x0 0x2800000>; 103 reg = <0x0 0x88900000 0x0 0x1e00000>; 108 reg = <0x0 0x8a700000 0x0 0x700000>; 113 reg = <0x0 0x8ae00000 0x0 0x500000>; 118 reg = <0x0 0x8b300000 0x0 0x10000>; 123 reg = <0x0 0x8b310000 0x0 0xa000>; [all …]
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D | sc7180-acer-aspire1.dts | 35 reg = <0x0 0x80840000 0 0x2000>; 40 reg = <0x0 0x85b00000 0 0x500000>; 45 reg = <0x0 0x86000000 0x0 0x2000000>; 50 reg = <0x0 0x8e400000 0x0 0x2800000>; 55 reg = <0x0 0x93900000 0x0 0x200000>; 64 pinctrl-0 = <&_sd_mode_default>; 67 #sound-dai-cells = <0>; 75 pinctrl-0 = <&soc_bkoff_default>; 88 pinctrl-0 = <®_edp_1p2_en_default>; 103 pinctrl-0 = <®_edp_1p8_en_default>; [all …]
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/linux-6.14.4/arch/arm64/boot/dts/freescale/ |
D | fsl-ls1088a-ten64.dts | 55 led-0 { 74 tx-fault-gpios = <&sfpgpio 0 GPIO_ACTIVE_HIGH>; 178 reg = <0xc>; 182 reg = <0xd>; 186 reg = <0xe>; 190 reg = <0xf>; 194 reg = <0x1c>; 198 reg = <0x1d>; 202 reg = <0x1e>; 206 reg = <0x1f>; [all …]
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D | fsl-ls1028a.dtsi | 23 #size-cells = <0>; 25 cpu0: cpu@0 { 28 reg = <0x0>; 30 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 31 i-cache-size = <0xc000>; 34 d-cache-size = <0x8000>; 45 reg = <0x1>; 47 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 48 i-cache-size = <0xc000>; 51 d-cache-size = <0x8000>; [all …]
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D | fsl-ls1088a.dtsi | 27 #size-cells = <0>; 30 cpu0: cpu@0 { 33 reg = <0x0>; 34 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 42 reg = <0x1>; 43 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 51 reg = <0x2>; 52 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 60 reg = <0x3>; 61 clocks = <&clockgen QORIQ_CLK_CMUX 0>; [all …]
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D | fsl-ls208xa.dtsi | 33 #size-cells = <0>; 38 reg = <0x00000000 0x80000000 0 0x80000000>; 44 #clock-cells = <0>; 51 reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */ 52 <0x0 0x06100000 0 0x100000>, /* GICR (RD_base + SGI_base) */ 53 <0x0 0x0c0c0000 0 0x2000>, /* GICC */ 54 <0x0 0x0c0d0000 0 0x1000>, /* GICH */ 55 <0x0 0x0c0e0000 0 0x20000>; /* GICV */ 67 reg = <0x0 0x6020000 0 0x20000>; 73 reg = <0x0 0x1e60000 0x0 0x4>; [all …]
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/linux-6.14.4/drivers/media/dvb-frontends/ |
D | drxd_map_firm.h | 18 #define HI_COMM_EXEC__A 0x400000 19 #define HI_COMM_MB__A 0x400002 20 #define HI_CT_REG_COMM_STATE__A 0x410001 21 #define HI_RA_RAM_SRV_RES__A 0x420031 22 #define HI_RA_RAM_SRV_CMD__A 0x420032 23 #define HI_RA_RAM_SRV_CMD_RESET 0x2 24 #define HI_RA_RAM_SRV_CMD_CONFIG 0x3 25 #define HI_RA_RAM_SRV_CMD_EXECUTE 0x6 26 #define HI_RA_RAM_SRV_RST_KEY__A 0x420033 27 #define HI_RA_RAM_SRV_RST_KEY_ACT 0x3973 [all …]
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D | drxk_map.h | 2 #define AUD_COMM_EXEC__A 0x1000000 3 #define AUD_COMM_EXEC_STOP 0x0 4 #define FEC_COMM_EXEC__A 0x1C00000 5 #define FEC_COMM_EXEC_STOP 0x0 6 #define FEC_COMM_EXEC_ACTIVE 0x1 7 #define FEC_DI_COMM_EXEC__A 0x1C20000 8 #define FEC_DI_COMM_EXEC_STOP 0x0 9 #define FEC_DI_INPUT_CTL__A 0x1C20016 10 #define FEC_RS_COMM_EXEC__A 0x1C30000 11 #define FEC_RS_COMM_EXEC_STOP 0x0 [all …]
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/linux-6.14.4/drivers/net/ethernet/microchip/sparx5/lan969x/ |
D | lan969x.c | 13 { TARGET_CPU, 0xc0000, 0 }, /* 0xe00c0000 */ 14 { TARGET_FDMA, 0xc0400, 0 }, /* 0xe00c0400 */ 15 { TARGET_GCB, 0x2010000, 1 }, /* 0xe2010000 */ 16 { TARGET_QS, 0x2030000, 1 }, /* 0xe2030000 */ 17 { TARGET_PTP, 0x2040000, 1 }, /* 0xe2040000 */ 18 { TARGET_ANA_ACL, 0x2050000, 1 }, /* 0xe2050000 */ 19 { TARGET_LRN, 0x2060000, 1 }, /* 0xe2060000 */ 20 { TARGET_VCAP_SUPER, 0x2080000, 1 }, /* 0xe2080000 */ 21 { TARGET_QSYS, 0x20a0000, 1 }, /* 0xe20a0000 */ 22 { TARGET_QFWD, 0x20b0000, 1 }, /* 0xe20b0000 */ [all …]
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