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/linux-6.14.4/Documentation/devicetree/bindings/spi/
Dspi-nxp-fspi.yaml79 reg = <0x0 0x20c0000 0x0 0x100000>,
80 <0x0 0x20000000 0x0 0x10000000>;
87 #size-cells = <0>;
89 flash@0 {
92 reg = <0>;
/linux-6.14.4/arch/arm/boot/dts/ti/keystone/
Dkeystone-k2hk-netcp.dtsi15 queue-range = <0 0x4000>;
16 linkram0 = <0x100000 0x8000>;
17 linkram1 = <0x0 0x10000>;
24 managed-queues = <0 0x2000>;
25 reg = <0x2a40000 0x20000>,
26 <0x2a06000 0x400>,
27 <0x2a02000 0x1000>,
28 <0x2a03000 0x1000>,
29 <0x23a80000 0x20000>,
30 <0x2a80000 0x20000>;
[all …]
/linux-6.14.4/drivers/net/ethernet/microchip/sparx5/lan969x/
Dlan969x.c13 { TARGET_CPU, 0xc0000, 0 }, /* 0xe00c0000 */
14 { TARGET_FDMA, 0xc0400, 0 }, /* 0xe00c0400 */
15 { TARGET_GCB, 0x2010000, 1 }, /* 0xe2010000 */
16 { TARGET_QS, 0x2030000, 1 }, /* 0xe2030000 */
17 { TARGET_PTP, 0x2040000, 1 }, /* 0xe2040000 */
18 { TARGET_ANA_ACL, 0x2050000, 1 }, /* 0xe2050000 */
19 { TARGET_LRN, 0x2060000, 1 }, /* 0xe2060000 */
20 { TARGET_VCAP_SUPER, 0x2080000, 1 }, /* 0xe2080000 */
21 { TARGET_QSYS, 0x20a0000, 1 }, /* 0xe20a0000 */
22 { TARGET_QFWD, 0x20b0000, 1 }, /* 0xe20b0000 */
[all …]
/linux-6.14.4/arch/arm64/boot/dts/freescale/
Dfsl-ls1088a.dtsi27 #size-cells = <0>;
30 cpu0: cpu@0 {
33 reg = <0x0>;
34 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
42 reg = <0x1>;
43 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
51 reg = <0x2>;
52 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
60 reg = <0x3>;
61 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
[all …]
Dfsl-ls208xa.dtsi33 #size-cells = <0>;
38 reg = <0x00000000 0x80000000 0 0x80000000>;
44 #clock-cells = <0>;
51 reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */
52 <0x0 0x06100000 0 0x100000>, /* GICR (RD_base + SGI_base) */
53 <0x0 0x0c0c0000 0 0x2000>, /* GICC */
54 <0x0 0x0c0d0000 0 0x1000>, /* GICH */
55 <0x0 0x0c0e0000 0 0x20000>; /* GICV */
67 reg = <0x0 0x6020000 0 0x20000>;
73 reg = <0x0 0x1e60000 0x0 0x4>;
[all …]
Dfsl-ls1028a.dtsi23 #size-cells = <0>;
25 cpu0: cpu@0 {
28 reg = <0x0>;
30 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
31 i-cache-size = <0xc000>;
34 d-cache-size = <0x8000>;
45 reg = <0x1>;
47 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
48 i-cache-size = <0xc000>;
51 d-cache-size = <0x8000>;
[all …]
Dfsl-lx2160a.dtsi12 /memreserve/ 0x80000000 0x00010000;
26 #size-cells = <0>;
29 cpu0: cpu@0 {
33 reg = <0x0>;
34 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
35 d-cache-size = <0x8000>;
38 i-cache-size = <0xC000>;
50 reg = <0x1>;
51 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
52 d-cache-size = <0x8000>;
[all …]