Home
last modified time | relevance | path

Searched +full:0 +full:x11820000 (Results 1 – 5 of 5) sorted by relevance

/linux-6.14.4/Documentation/devicetree/bindings/dma/
Drenesas,rz-dmac.yaml67 bits[0:9] - Specifies MID/RID value
125 reg = <0x11820000 0x10000>,
126 <0x11830000 0x10000>;
/linux-6.14.4/arch/arm64/boot/dts/renesas/
Dr9a08g045.dtsi19 #clock-cells = <0>;
21 clock-frequency = <0>;
26 #clock-cells = <0>;
28 clock-frequency = <0>;
33 #size-cells = <0>;
35 cpu0: cpu@0 {
37 reg = <0>;
45 L3_CA55: cache-controller-0 {
49 cache-size = <0x40000>;
55 #clock-cells = <0>;
[all …]
Dr9a07g043.dtsi17 #clock-cells = <0>;
19 clock-frequency = <0>;
24 #clock-cells = <0>;
26 clock-frequency = <0>;
32 #clock-cells = <0>;
33 clock-frequency = <0>;
39 #clock-cells = <0>;
41 clock-frequency = <0>;
44 cluster0_opp: opp-table-0 {
80 reg = <0 0x10001200 0 0xb00>;
[all …]
Dr9a07g054.dtsi18 #clock-cells = <0>;
20 clock-frequency = <0>;
25 #clock-cells = <0>;
27 clock-frequency = <0>;
33 #clock-cells = <0>;
34 clock-frequency = <0>;
40 #clock-cells = <0>;
42 clock-frequency = <0>;
45 cluster0_opp: opp-table-0 {
74 #size-cells = <0>;
[all …]
Dr9a07g044.dtsi18 #clock-cells = <0>;
20 clock-frequency = <0>;
25 #clock-cells = <0>;
27 clock-frequency = <0>;
33 #clock-cells = <0>;
34 clock-frequency = <0>;
40 #clock-cells = <0>;
42 clock-frequency = <0>;
45 cluster0_opp: opp-table-0 {
74 #size-cells = <0>;
[all …]