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/linux-6.14.4/Documentation/devicetree/bindings/phy/
Dmediatek,tphy.yaml15 controllers on MediaTek SoCs, includes USB2.0, USB3.0, PCIe and SATA.
22 shared 0x0000 SPLLC
23 0x0100 FMREG
24 u2 port0 0x0800 U2PHY_COM
25 u3 port0 0x0900 U3PHYD
26 0x0a00 U3PHYD_BANK2
27 0x0b00 U3PHYA
28 0x0c00 U3PHYA_DA
29 u2 port1 0x1000 U2PHY_COM
30 u3 port1 0x1100 U3PHYD
[all …]
/linux-6.14.4/arch/arm64/boot/dts/mediatek/
Dmt7988a.dtsi17 #size-cells = <0>;
19 cpu0: cpu@0 {
21 reg = <0x0>;
32 reg = <0x1>;
43 reg = <0x2>;
54 reg = <0x3>;
63 cluster0_opp: opp-table-0 {
89 #clock-cells = <0>;
111 reg = <0 0x43000000 0 0x50000>;
124 reg = <0 0x0c000000 0 0x40000>, /* GICD */
[all …]
Dmt2712e.dtsi22 cluster0_opp: opp-table-0 {
66 #size-cells = <0>;
85 cpu0: cpu@0 {
88 reg = <0x000>;
100 reg = <0x001>;
113 reg = <0x200>;
126 CPU_SLEEP_0: cpu-sleep-0 {
132 arm,psci-suspend-param = <0x0010000>;
135 CLUSTER_SLEEP_0: cluster-sleep-0 {
141 arm,psci-suspend-param = <0x1010000>;
[all …]
Dmt8173.dtsi53 cluster0_opp: opp-table-0 {
129 #size-cells = <0>;
151 cpu0: cpu@0 {
154 reg = <0x000>;
169 reg = <0x001>;
184 reg = <0x100>;
199 reg = <0x101>;
214 CPU_SLEEP_0: cpu-sleep-0 {
220 arm,psci-suspend-param = <0x0010000>;
242 cpu_suspend = <0x84000001>;
[all …]
Dmt8195.dtsi51 #size-cells = <0>;
53 cpu0: cpu@0 {
56 reg = <0x000>;
58 performance-domains = <&performance 0>;
75 reg = <0x100>;
77 performance-domains = <&performance 0>;
94 reg = <0x200>;
96 performance-domains = <&performance 0>;
113 reg = <0x300>;
115 performance-domains = <&performance 0>;
[all …]
/linux-6.14.4/drivers/net/ethernet/mediatek/
Dmtk_wed_regs.h8 #define MTK_WDMA_DESC_CTRL_LEN1 GENMASK(14, 0)
9 #define MTK_WDMA_DESC_CTRL_LEN1_V2 GENMASK(13, 0)
26 #define MTK_WED_REV_ID 0x004
28 #define MTK_WED_RESET 0x008
29 #define MTK_WED_RESET_TX_BM BIT(0)
48 #define MTK_WED_CTRL 0x00c
49 #define MTK_WED_CTRL_WPDMA_INT_AGENT_EN BIT(0)
75 #define MTK_WED_EXT_INT_STATUS 0x020
76 #define MTK_WED_EXT_INT_STATUS_TF_LEN_ERR BIT(0)
103 #define MTK_WED_EXT_INT_MASK 0x028
[all …]