Searched +full:0 +full:x10019 (Results 1 – 9 of 9) sorted by relevance
| /linux-6.14.4/arch/riscv/boot/dts/allwinner/ |
| D | sun20i-d1s.dtsi | 12 #size-cells = <0>;
14 cpu0: cpu@0 {
17 reg = <0>;
61 reg = <0x6011000 0x20>;
70 reg = <0x10000000 0x4000000>;
75 #address-cells = <0>;
83 <0x00003 0x00003 0x00000008>,
84 <0x00004 0x00004 0x00000010>,
85 <0x00005 0x00005 0x00000200>,
86 <0x00006 0x00006 0x00000100>,
[all …]
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| /linux-6.14.4/Documentation/devicetree/bindings/perf/ |
| D | riscv,pmu.yaml | 78 value of variant must be 0xffffffff_ffffffff.
104 riscv,event-to-mhpmevent = <0x0000B 0x0000 0x0001>;
105 riscv,event-to-mhpmcounters = <0x00001 0x00001 0x00000001>,
106 <0x00002 0x00002 0x00000004>,
107 <0x00003 0x0000A 0x00000ff8>,
108 <0x10000 0x10033 0x000ff000>;
110 /* For event ID 0x0002 */
111 <0x0000 0x0002 0xffffffff 0xffffffff 0x00000f8>,
112 /* For event ID 0-4 */
113 <0x0 0x0 0xffffffff 0xfffffff0 0x00000ff0>,
[all …]
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| /linux-6.14.4/drivers/net/wireless/broadcom/brcm80211/brcmfmac/ |
| D | sdio.h | 13 #define SDIOD_FBR_SIZE 0x100
16 #define SDIO_FUNC_ENABLE_1 0x02
17 #define SDIO_FUNC_ENABLE_2 0x04
20 #define SDIO_FUNC_READY_1 0x02
21 #define SDIO_FUNC_READY_2 0x04
24 #define INTR_STATUS_FUNC1 0x2
25 #define INTR_STATUS_FUNC2 0x4
28 #define REG_F0_REG_MASK 0x7FF
29 #define REG_F1_MISC_MASK 0x1FFFF
31 /* function 0 vendor specific CCCR registers */
[all …]
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| /linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/nbio/ |
| D | nbio_7_11_0_offset.h | 29 // base address: 0x0
30 …NBCFG_SCRATCH_0 0x0068
31 …NBCFG_SCRATCH_1 0x006c
32 …NBCFG_SCRATCH_2 0x0070
33 …NBCFG_SCRATCH_3 0x0074
34 …NBCFG_SCRATCH_4 0x0078
38 // base address: 0x0
42 // base address: 0x0
43 …PCIE_VENDOR_SPECIFIC_ENH_CAP_LIST_GPUIOV 0x0580
47 // base address: 0x13b00000
[all …]
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| D | nbio_7_9_0_offset.h | 29 // base address: 0x0
30 …BIF_BX0_PCIE_INDEX 0x000c
31 …e regBIF_BX0_PCIE_INDEX_BASE_IDX 0
32 …BIF_BX0_PCIE_DATA 0x000d
33 …e regBIF_BX0_PCIE_DATA_BASE_IDX 0
34 …BIF_BX0_PCIE_INDEX2 0x000e
35 …e regBIF_BX0_PCIE_INDEX2_BASE_IDX 0
36 …BIF_BX0_PCIE_DATA2 0x000f
37 …e regBIF_BX0_PCIE_DATA2_BASE_IDX 0
38 …BIF_BX0_PCIE_INDEX_HI 0x0010
[all …]
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| D | nbio_4_3_0_offset.h | 29 // base address: 0x0
30 …BIF_BX0_PCIE_INDEX 0x000c
31 …e regBIF_BX0_PCIE_INDEX_BASE_IDX 0
32 …BIF_BX0_PCIE_DATA 0x000d
33 …e regBIF_BX0_PCIE_DATA_BASE_IDX 0
34 …BIF_BX0_PCIE_INDEX2 0x000e
35 …e regBIF_BX0_PCIE_INDEX2_BASE_IDX 0
36 …BIF_BX0_PCIE_DATA2 0x000f
37 …e regBIF_BX0_PCIE_DATA2_BASE_IDX 0
38 …BIF_BX0_PCIE_INDEX_HI 0x0010
[all …]
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| D | nbio_7_2_0_offset.h | 26 // base address: 0x0
27 …BIF_CFG_DEV0_RC_VENDOR_ID 0x0000
28 …BIF_CFG_DEV0_RC_DEVICE_ID 0x0002
29 …BIF_CFG_DEV0_RC_COMMAND 0x0004
30 …BIF_CFG_DEV0_RC_STATUS 0x0006
31 …BIF_CFG_DEV0_RC_REVISION_ID 0x0008
32 …BIF_CFG_DEV0_RC_PROG_INTERFACE 0x0009
33 …BIF_CFG_DEV0_RC_SUB_CLASS 0x000a
34 …BIF_CFG_DEV0_RC_BASE_CLASS 0x000b
35 …BIF_CFG_DEV0_RC_CACHE_LINE 0x000c
[all …]
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| D | nbio_7_7_0_offset.h | 29 // base address: 0x0
30 …NBCFG_SCRATCH_4 0x0078
34 // base address: 0x0
35 …BIF_CFG_DEV0_RC_VENDOR_ID 0x0000
36 …BIF_CFG_DEV0_RC_DEVICE_ID 0x0002
37 …BIF_CFG_DEV0_RC_COMMAND 0x0004
38 …BIF_CFG_DEV0_RC_STATUS 0x0006
39 …BIF_CFG_DEV0_RC_REVISION_ID 0x0008
40 …BIF_CFG_DEV0_RC_PROG_INTERFACE 0x0009
41 …BIF_CFG_DEV0_RC_SUB_CLASS 0x000a
[all …]
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| /linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/nbif/ |
| D | nbif_6_3_1_offset.h | 28 // base address: 0x0
29 …IRQ_BRIDGE_CNTL 0x003e
33 // base address: 0x0
34 …BIF_CFG_DEV0_EPF0_VENDOR_ID 0x0000
35 …BIF_CFG_DEV0_EPF0_DEVICE_ID 0x0002
36 …BIF_CFG_DEV0_EPF0_COMMAND 0x0004
37 …BIF_CFG_DEV0_EPF0_STATUS 0x0006
38 …BIF_CFG_DEV0_EPF0_REVISION_ID 0x0008
39 …BIF_CFG_DEV0_EPF0_PROG_INTERFACE 0x0009
40 …BIF_CFG_DEV0_EPF0_SUB_CLASS 0x000a
[all …]
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