Searched +full:0 +full:x02090000 (Results 1 – 5 of 5) sorted by relevance
99 maximum: 0xff101 maximum: 0x1f109 0: clock source 0 (oscillator clock)113 minimum: 0128 minimum: 0145 reg = <0x1c000 0x1000>;146 interrupts = <48 0x2>;149 fsl,clk-source = /bits/ 8 <0>;156 reg = <0x02090000 0x4000>;157 interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;[all …]
17 #define MT7981_CON_INFRA_VERSION 0x0209000018 #define MT7986_CON_INFRA_VERSION 0x0207000021 #define MT_INFRACFG_CONN2AP_SLPPROT 0x0d022 #define MT_INFRACFG_AP2CONN_SLPPROT 0x0d426 #define MT_INFRACFG_TX_EN_MASK BIT(0)29 #define MT_TOP_POS_FAST_CTRL 0x11432 #define MT_TOP_POS_SKU 0x21c55 mt76_wr(dev, MT_TOP_SPI_WRITE_DATA_CR(adie), 0); in mt76_wmac_spi_read()65 return 0; in mt76_wmac_spi_read()117 ret = mt76_wmac_spi_rmw(dev, adie, MT_ADIE_EFUSE2_CTRL, BIT(30), 0x0); in mt7986_wmac_adie_efuse_read()[all …]
58 #size-cells = <0>;60 cpu0: cpu@0 {63 reg = <0>;108 #clock-cells = <0>;115 #clock-cells = <0>;122 #clock-cells = <0>;123 clock-frequency = <0>;129 #clock-cells = <0>;130 clock-frequency = <0>;149 reg = <0x00900000 0x20000>;[all …]
59 #clock-cells = <0>;65 #clock-cells = <0>;66 clock-frequency = <0>;71 #clock-cells = <0>;78 #size-cells = <0>;83 lvds-channel@0 {85 #size-cells = <0>;86 reg = <0>;89 port@0 {90 reg = <0>;[all …]
61 #size-cells = <0>;63 cpu0: cpu@0 {66 reg = <0>;100 #clock-cells = <0>;107 #clock-cells = <0>;114 #clock-cells = <0>;115 clock-frequency = <0>;121 #clock-cells = <0>;122 clock-frequency = <0>;128 #clock-cells = <0>;[all …]