Searched +full:0 +full:x01c22c00 (Results 1 – 11 of 11) sorted by relevance
15 const: 0309 #sound-dai-cells = <0>;311 reg = <0x01c22c00 0x40>;312 interrupts = <0 30 4>;313 clocks = <&apb0_gates 0>, <&codec_clk>;315 dmas = <&dma 0 19>, <&dma 0 19>;321 #sound-dai-cells = <0>;323 reg = <0x01c22c00 0x98>;324 interrupts = <0 29 4>;
50 #sound-dai-cells = <0>;52 reg = <0x01c22c00 0x400>;102 reg = <0x01c19400 0x10>, <0x01c1a800 0x4>;
18 #clock-cells = <0>;25 #clock-cells = <0>;34 #size-cells = <0>;36 cpu@0 {39 reg = <0x0>;52 reg = <0x01c00000 0x30>;59 reg = <0x00010000 0x1000>;62 ranges = <0 0x00010000 0x1000>;64 otg_sram: sram-section@0 {67 reg = <0x0000 0x1000>;[all …]
127 cpu@0 {201 sound-dai = <&codec 0>;208 reg = <0x01c0e000 0x1000>;219 reg = <0x01c15000 0x1000>;228 #sound-dai-cells = <0>;230 reg = <0x01c22c00 0x200>;243 reg = <0x01c22e00 0x400>;252 reg = <0x01c25000 0x100>;253 #thermal-sensor-cells = <0>;254 #io-channel-cells = <0>;[all …]
72 #size-cells = <0>;74 cpu@0 {77 reg = <0>;102 #clock-cells = <0>;110 #clock-cells = <0>;126 reg = <0x01000000 0x10000>;138 reg = <0x01100000 0x100000>;139 clocks = <&display_clocks 0>,143 resets = <&display_clocks 0>;147 #size-cells = <0>;[all …]
56 #size-cells = <0>;58 cpu0: cpu@0 {61 reg = <0x0>;97 #clock-cells = <0>;104 #clock-cells = <0>;119 size = <0x6000000>;120 alloc-ranges = <0x40000000 0x10000000>;135 reg = <0x01c00000 0x30>;140 sram_a: sram@0 {142 reg = <0x00000000 0xc000>;[all …]
87 #clock-cells = <0>;95 #clock-cells = <0>;118 reg = <0x01000000 0x10000>;129 compatible = "allwinner,sun8i-h3-de2-mixer-0";130 reg = <0x01100000 0x100000>;139 #size-cells = <0>;153 reg = <0x01c02000 0x1000>;163 reg = <0x01c0c000 0x1000>;172 #size-cells = <0>;174 tcon0_in: port@0 {[all …]
111 #size-cells = <0>;112 cpu0: cpu@0 {115 reg = <0x0>;166 #clock-cells = <0>;173 #clock-cells = <0>;199 size = <0x6000000>;200 alloc-ranges = <0x40000000 0x10000000>;214 reg = <0x01c00000 0x30>;219 sram_a: sram@0 {221 reg = <0x00000000 0xc000>;[all …]
101 #size-cells = <0>;103 cpu0: cpu@0 {106 reg = <0>;213 #clock-cells = <0>;221 #clock-cells = <0>;238 #clock-cells = <0>;245 #clock-cells = <0>;252 #clock-cells = <0>;254 reg = <0x01c200d0 0x4>;274 reg = <0x01c02000 0x1000>;[all …]
101 #size-cells = <0>;103 cpu0: cpu@0 {106 reg = <0>;181 size = <0x6000000>;182 alloc-ranges = <0x40000000 0x10000000>;208 #clock-cells = <0>;215 #clock-cells = <0>;231 #clock-cells = <0>;238 #clock-cells = <0>;245 #clock-cells = <0>;[all …]
47 #size-cells = <0>;49 cpu0: cpu@0 {52 reg = <0>;57 i-cache-size = <0x8000>;60 d-cache-size = <0x8000>;74 i-cache-size = <0x8000>;77 d-cache-size = <0x8000>;91 i-cache-size = <0x8000>;94 d-cache-size = <0x8000>;108 i-cache-size = <0x8000>;[all …]