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/linux-6.14.4/fs/nls/
Dnls_ucs2_utils.c1 // SPDX-License-Identifier: GPL-2.0-or-later
19 MODULE_DESCRIPTION("NLS UCS-2");
26 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 000-00f */
27 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 010-01f */
28 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 020-02f */
29 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 030-03f */
30 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 040-04f */
31 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 050-05f */
32 0, -32, -32, -32, -32, -32, -32, -32, -32, -32, -32,
33 -32, -32, -32, -32, -32, /* 060-06f */
[all …]
/linux-6.14.4/arch/sh/drivers/pci/
Dpcie-sh7786.h1 /* SPDX-License-Identifier: GPL-2.0
3 * SH7786 PCI-Express controller definitions.
11 /* PCIe bus-0(x4) on SH7786 */ // Rev1.171
12 #define SH4A_PCIE_SPW_BASE 0xFE000000 /* spw config address for controller 0 */
13 #define SH4A_PCIE_SPW_BASE1 0xFE200000 /* spw config address for controller 1 (Rev1.14)*/
14 #define SH4A_PCIE_SPW_BASE2 0xFCC00000 /* spw config address for controller 2 (Rev1.171)*/
15 #define SH4A_PCIE_SPW_BASE_LEN 0x00080000
17 #define SH4A_PCI_CNFG_BASE 0xFE040000 /* pci config address for controller 0 */
18 #define SH4A_PCI_CNFG_BASE1 0xFE240000 /* pci config address for controller 1 (Rev1.14)*/
19 #define SH4A_PCI_CNFG_BASE2 0xFCC40000 /* pci config address for controller 2 (Rev1.171)*/
[all …]
/linux-6.14.4/arch/x86/include/asm/
Dcpufeatures.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 #include <asm/required-features.h>
10 #include <asm/disabled-features.h>
16 #define NCAPINTS 22 /* N 32-bit words worth of info */
17 #define NBUGINTS 2 /* N 32-bit bug flags */
25 * please update the table in kernel/cpu/cpuid-deps.c as well.
28 /* Intel-defined CPU features, CPUID level 0x00000001 (EDX), word 0 */
29 #define X86_FEATURE_FPU ( 0*32+ 0) /* "fpu" Onboard FPU */
30 #define X86_FEATURE_VME ( 0*32+ 1) /* "vme" Virtual Mode Extensions */
31 #define X86_FEATURE_DE ( 0*32+ 2) /* "de" Debugging Extensions */
[all …]
Dvmxfeatures.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 #define NVMXINTS 5 /* N 32-bit words worth of info */
16 /* Pin-Based VM-Execution Controls, EPT/VPID, APIC and VM-Functions, word 0 */
17 #define VMX_FEATURE_INTR_EXITING ( 0*32+ 0) /* VM-Exit on vectored interrupts */
18 #define VMX_FEATURE_NMI_EXITING ( 0*32+ 3) /* VM-Exit on NMIs */
19 #define VMX_FEATURE_VIRTUAL_NMIS ( 0*32+ 5) /* "vnmi" NMI virtualization */
20 #define VMX_FEATURE_PREEMPTION_TIMER ( 0*32+ 6) /* "preemption_timer" VMX Preemption Timer */
21 #define VMX_FEATURE_POSTED_INTR ( 0*32+ 7) /* "posted_intr" Posted Interrupts */
23 /* EPT/VPID features, scattered to bits 16-23 */
24 #define VMX_FEATURE_INVVPID ( 0*32+ 16) /* "invvpid" INVVPID is supported */
[all …]
/linux-6.14.4/tools/arch/x86/include/asm/
Dcpufeatures.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 #include <asm/required-features.h>
10 #include <asm/disabled-features.h>
16 #define NCAPINTS 22 /* N 32-bit words worth of info */
17 #define NBUGINTS 2 /* N 32-bit bug flags */
25 * please update the table in kernel/cpu/cpuid-deps.c as well.
28 /* Intel-defined CPU features, CPUID level 0x00000001 (EDX), word 0 */
29 #define X86_FEATURE_FPU ( 0*32+ 0) /* "fpu" Onboard FPU */
30 #define X86_FEATURE_VME ( 0*32+ 1) /* "vme" Virtual Mode Extensions */
31 #define X86_FEATURE_DE ( 0*32+ 2) /* "de" Debugging Extensions */
[all …]
/linux-6.14.4/drivers/staging/rtl8723bs/hal/
DHalHWImg8723B_RF.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
16 ((pDM_Odm->BoardType & BIT4) >> 4) << 0 | /* _GLNA */ in CheckPositive()
17 ((pDM_Odm->BoardType & BIT3) >> 3) << 1 | /* _GPA */ in CheckPositive()
18 ((pDM_Odm->BoardType & BIT7) >> 7) << 2 | /* _ALNA */ in CheckPositive()
19 ((pDM_Odm->BoardType & BIT6) >> 6) << 3 | /* _APA */ in CheckPositive()
20 ((pDM_Odm->BoardType & BIT2) >> 2) << 4; /* _BT */ in CheckPositive()
24 pDM_Odm->CutVersion << 24 | in CheckPositive()
25 pDM_Odm->SupportPlatform << 16 | in CheckPositive()
26 pDM_Odm->PackageType << 12 | in CheckPositive()
[all …]
/linux-6.14.4/arch/sparc/crypto/
Ddes_asm.S1 /* SPDX-License-Identifier: GPL-2.0 */
7 .align 32
11 ld [%o0 + 0x00], %f0
12 ld [%o0 + 0x04], %f1
13 DES_KEXPAND(0, 0, 0)
14 DES_KEXPAND(0, 1, 2)
29 std %f0, [%o1 + 0x00]
30 std %f2, [%o1 + 0x08]
31 std %f4, [%o1 + 0x10]
32 std %f6, [%o1 + 0x18]
[all …]
/linux-6.14.4/tools/testing/selftests/gpio/
Dgpio-mockup.sh1 #!/bin/bash -efu
2 # SPDX-License-Identifier: GPL-2.0
5 #0: success
7 #4: skip test - including run as non-root user
9 BASE=${0%/*}
13 module="gpio-mockup"
29 echo "$0 [-frv] [-t type]"
30 echo "-f: full test (minimal set run by default)"
31 echo "-r: test random lines as well as fence posts"
32 echo "-t: interface type:"
[all …]
/linux-6.14.4/arch/powerpc/crypto/
Dchacha-p10le-8x.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 # Copyright 2023- IBM Corp. All rights reserved
43 #include <asm/asm-offsets.h>
44 #include <asm/asm-compat.h>
79 mflr 0
80 std 0, 16(1)
81 stdu 1,-752(1)
103 SAVE_VRS 20, 0, 9
105 SAVE_VRS 22, 32, 9
138 RESTORE_VRS 20, 0, 9
[all …]
Daes-gcm-p10.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 # Accelerated AES-GCM stitched implementation for ppc64le.
5 # Copyright 2024- IBM Inc.
22 # Hash keys = v3 - v14
29 # v31 - counter 1
32 # vs0 - round key 0
35 # This implementation uses stitched AES-GCM approach to improve overall performance.
52 stxv \VRS+32, \OFFSET(\FRAME)
60 lxv \VRS+32, \OFFSET(\FRAME)
64 mflr 0
[all …]
/linux-6.14.4/arch/powerpc/kernel/
Dcpu_specs_book3s_32.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
12 .pvr_mask = 0xffff0000,
13 .pvr_value = 0x00030000,
17 .mmu_features = 0,
18 .icache_bsize = 32,
19 .dcache_bsize = 32,
25 .pvr_mask = 0xffff0000,
26 .pvr_value = 0x00060000,
30 .mmu_features = 0,
31 .icache_bsize = 32,
[all …]
Dcpu_specs_44x.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
11 .pvr_mask = 0xf0000fff,
12 .pvr_value = 0x40000850,
17 .icache_bsize = 32,
18 .dcache_bsize = 32,
22 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
23 .pvr_mask = 0xf0000fff,
24 .pvr_value = 0x40000858,
29 .icache_bsize = 32,
30 .dcache_bsize = 32,
[all …]
/linux-6.14.4/tools/perf/pmu-events/arch/arm64/freescale/imx95/sys/
Dmetrics.json5 …_beat_filt0\\,axi_mask\\=0x000\\,axi_id\\=0x000@ + imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0…
13 …_beat_filt0\\,axi_mask\\=0x000\\,axi_id\\=0x000@ + imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0…
21 "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x000\\,axi_id\\=0x000@ ) * 32",
22 "ScaleUnit": "9.765625e-4KB",
29 "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x000\\,axi_id\\=0x000@ ) * 32",
30 "ScaleUnit": "9.765625e-4KB",
37 …_beat_filt0\\,axi_mask\\=0x3fc\\,axi_id\\=0x000@ + imx9_ddr0@eddrtq_pm_rd_beat_filt1\\,axi_mask\\=…
38 "ScaleUnit": "9.765625e-4KB",
45 "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3fc\\,axi_id\\=0x000@ ) * 32",
46 "ScaleUnit": "9.765625e-4KB",
[all …]
/linux-6.14.4/arch/x86/crypto/
Dcamellia-aesni-avx2-asm_64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * x86_64/AVX2/AES-NI assembler implementation of Camellia
14 #define key_table 0
51 32-way camellia
56 * x0..x7: byte-sliced AB state
60 * x0..x7: new byte-sliced CD state
65 * S-function with AES subbytes \
147 vpbroadcastq key, t0; /* higher 64-bit duplicate ignored */ \
159 /* P-function */ \
193 vpxor 5 * 32(mem_cd), x1, x1; \
[all …]
/linux-6.14.4/arch/arm64/boot/dts/qcom/
Dsa8540p.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 /delete-node/ &cpu0_opp_table;
10 /delete-node/ &cpu4_opp_table;
13 cpu0_opp_table: opp-table-cpu0 {
14 compatible = "operating-points-v2";
15 opp-shared;
17 opp-300000000 {
18 opp-hz = /bits/ 64 <300000000>;
19 opp-peak-kBps = <(300000 * 32)>;
21 opp-403200000 {
[all …]
/linux-6.14.4/tools/testing/selftests/bpf/progs/
Dverifier_subreg.c1 // SPDX-License-Identifier: GPL-2.0
8 /* This file contains sub-register zero extension checks for insns defining
9 * sub-registers, meaning:
10 * - All insns under BPF_ALU class. Their BPF_ALU32 variants or narrow width
11 * forms (BPF_END) could define sub-registers.
12 * - Narrow direct loads, BPF_B/H/W | BPF_LDX.
13 * - BPF_LD is not exposed to JIT back-ends, so no need for testing.
15 * "get_prandom_u32" is used to initialize low 32-bit of some registers to
16 * prevent potential optimizations done by verifier or JIT back-ends which could
23 __success __success_unpriv __retval(0)
[all …]
Datomics.c1 // SPDX-License-Identifier: GPL-2.0
13 __u32 pid = 0;
16 __u64 add64_result = 0;
18 __u32 add32_result = 0;
19 __u64 add_stack_value_copy = 0;
20 __u64 add_stack_result = 0;
26 if (pid != (bpf_get_current_pid_tgid() >> 32)) in add()
27 return 0; in add()
38 return 0; in add()
42 __s64 sub64_result = 0;
[all …]
/linux-6.14.4/arch/powerpc/boot/
Ddiv64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Divide a 64-bit unsigned number by a 32-bit unsigned number.
4 * This routine assumes that the top 32 bits of the dividend are
5 * non-zero to start with.
7 * the 64-bit quotient, and r4 contains the divisor.
16 lwz r5,0(r3) # get the dividend into r5/r6
19 li r7,0
20 li r8,0
26 1: mr r11,r5 # here dividend.hi != 0
27 andis. r0,r5,0xc000
[all …]
/linux-6.14.4/drivers/scsi/qla2xxx/
Dqla_dbg.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright (c) 2003-2014 QLogic Corporation
17 __be16 mailbox_reg[32];
18 __be16 resp_dma_reg[32];
32 __be16 risc_ram[0xf800];
33 __be16 stack_ram[0x1000];
40 __be16 mailbox_reg[32];
54 __be16 risc_ram[0xf000];
60 __be32 host_reg[32];
62 __be16 mailbox_reg[32];
[all …]
/linux-6.14.4/drivers/gpu/drm/imagination/
Dpvr_stream_defs.c1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
20 PVR_STREAM_DEF_SET(owner, member, PVR_STREAM_SIZE_ ## member_size, 0, PVR_FEATURE_NONE)
23 PVR_STREAM_DEF_SET(owner, member, PVR_STREAM_SIZE_ ## member_size, 0, feature)
26 PVR_STREAM_DEF_SET(owner, member, PVR_STREAM_SIZE_ ## member_size, 0, \
31 sizeof(((struct owner *)0)->member), PVR_FEATURE_NONE)
35 sizeof(((struct owner *)0)->member), feature)
39 sizeof(((struct owner *)0)->member), (feature) | PVR_FEATURE_NOT)
51 PVR_STREAM_DEF_FEATURE(rogue_fwif_cmd_geom, regs.vdm_draw_indirect1, 32,
53 PVR_STREAM_DEF(rogue_fwif_cmd_geom, regs.ppp_ctrl, 32),
54 PVR_STREAM_DEF(rogue_fwif_cmd_geom, regs.te_psg, 32),
[all …]
/linux-6.14.4/arch/sparc/include/asm/
Dpcic.h1 /* SPDX-License-Identifier: GPL-2.0 */
39 static inline int pcic_present(void) { return 0; } in pcic_present()
40 static inline int pcic_probe(void) { return 0; } in pcic_probe()
47 #define PCI_SPACE_SIZE 0x1000000 /* 16 MB */
50 #define PCI_DIAGNOSTIC_0 0x40 /* 32 bits */
51 #define PCI_SIZE_0 0x44 /* 32 bits */
52 #define PCI_SIZE_1 0x48 /* 32 bits */
53 #define PCI_SIZE_2 0x4c /* 32 bits */
54 #define PCI_SIZE_3 0x50 /* 32 bits */
55 #define PCI_SIZE_4 0x54 /* 32 bits */
[all …]
/linux-6.14.4/drivers/infiniband/hw/irdma/
Ddefs.h1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
2 /* Copyright (c) 2015 - 2021 Intel Corporation */
17 #define IRDMA_IRD_HW_SIZE_4 0
24 IRDMA_ANY_PROTOCOL = 0,
29 #define IRDMA_QP_STATE_INVALID 0
55 #define RDMA_OPCODE_M 0x0f
58 #define CQE_MAJOR_DRV 0x8000
69 #define IRDMA_AE_SOURCE_RSVD 0x0
70 #define IRDMA_AE_SOURCE_RQ 0x1
71 #define IRDMA_AE_SOURCE_RQ_0011 0x3
[all …]
/linux-6.14.4/drivers/net/fddi/skfp/h/
Dskfbi.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
15 * FDDI-Fx (x := {I(SA), P(CI)})
19 /*--------------------------------------------------------------------------*/
34 #define I2C_ADDR_VPD 0xA0 /* I2C address for the VPD EEPROM */
38 * Bank 0
40 #define B0_RAP 0x0000 /* 8 bit register address port */
41 /* 0x0001 - 0x0003: reserved */
42 #define B0_CTRL 0x0004 /* 8 bit control register */
43 #define B0_DAS 0x0005 /* 8 Bit control register (DAS) */
44 #define B0_LED 0x0006 /* 8 Bit LED register */
[all …]
/linux-6.14.4/drivers/staging/media/atomisp/pci/isp/kernels/bnr/bnr2_2/
Dia_css_bnr2_2.host.c1 // SPDX-License-Identifier: GPL-2.0
19 0,
20 0,
21 0,
25 0,
26 0,
27 0,
28 0,
33 0,
34 0,
[all …]
/linux-6.14.4/arch/s390/lib/
Dcrc32le-vx.c1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Hardware-accelerated CRC-32 variants for Linux on z Systems
6 * computing of bitreflected CRC-32 checksums for IEEE 802.3 Ethernet
9 * This CRC-32 implementation algorithm is bitreflected and processes
10 * the least-significant bit first (Little-Endian).
18 #include "crc32-vx.h"
20 /* Vector register range containing CRC-32 constants */
29 * The CRC-32 constant block contains reduction constants to fold and
32 * For the CRC-32 variants, the constants are precomputed according to
35 * R1 = [(x4*128+32 mod P'(x) << 32)]' << 1
[all …]

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