1 /*
2 * Copyright © 2024 Igalia S.L.
3 * SPDX-License-Identifier: MIT
4 */
5
6 #pragma once
7
8 #include <stdbool.h>
9 #include <stdint.h>
10
11 #include "util/bitset.h"
12
13 enum etna_feature {
14 ETNA_FEATURE_FAST_CLEAR,
15 ETNA_FEATURE_PIPE_3D,
16 ETNA_FEATURE_32_BIT_INDICES,
17 ETNA_FEATURE_MSAA,
18 ETNA_FEATURE_DXT_TEXTURE_COMPRESSION,
19 ETNA_FEATURE_ETC1_TEXTURE_COMPRESSION,
20 ETNA_FEATURE_NO_EARLY_Z,
21 ETNA_FEATURE_MC20,
22 ETNA_FEATURE_RENDERTARGET_8K,
23 ETNA_FEATURE_TEXTURE_8K,
24 ETNA_FEATURE_HAS_SIGN_FLOOR_CEIL,
25 ETNA_FEATURE_HAS_SQRT_TRIG,
26 ETNA_FEATURE_2BITPERTILE,
27 ETNA_FEATURE_SUPER_TILED,
28 ETNA_FEATURE_AUTO_DISABLE,
29 ETNA_FEATURE_TEXTURE_HALIGN,
30 ETNA_FEATURE_MMU_VERSION,
31 ETNA_FEATURE_HALF_FLOAT,
32 ETNA_FEATURE_WIDE_LINE,
33 ETNA_FEATURE_HALTI0,
34 ETNA_FEATURE_NON_POWER_OF_TWO,
35 ETNA_FEATURE_LINEAR_TEXTURE_SUPPORT,
36 ETNA_FEATURE_LINEAR_PE,
37 ETNA_FEATURE_SUPERTILED_TEXTURE,
38 ETNA_FEATURE_LOGIC_OP,
39 ETNA_FEATURE_HALTI1,
40 ETNA_FEATURE_SEAMLESS_CUBE_MAP,
41 ETNA_FEATURE_LINE_LOOP,
42 ETNA_FEATURE_TEXTURE_TILED_READ,
43 ETNA_FEATURE_BUG_FIXES8,
44 ETNA_FEATURE_PE_DITHER_FIX,
45 ETNA_FEATURE_INSTRUCTION_CACHE,
46 ETNA_FEATURE_HAS_FAST_TRANSCENDENTALS,
47 ETNA_FEATURE_SMALL_MSAA,
48 ETNA_FEATURE_BUG_FIXES18,
49 ETNA_FEATURE_TEXTURE_ASTC,
50 ETNA_FEATURE_SINGLE_BUFFER,
51 ETNA_FEATURE_HALTI2,
52 ETNA_FEATURE_BLT_ENGINE,
53 ETNA_FEATURE_HALTI3,
54 ETNA_FEATURE_HALTI4,
55 ETNA_FEATURE_HALTI5,
56 ETNA_FEATURE_RA_WRITE_DEPTH,
57 ETNA_FEATURE_CACHE128B256BPERLINE,
58 ETNA_FEATURE_NEW_GPIPE,
59 ETNA_FEATURE_NO_ASTC,
60 ETNA_FEATURE_V4_COMPRESSION,
61 ETNA_FEATURE_RS_NEW_BASEADDR,
62 ETNA_FEATURE_PE_NO_ALPHA_TEST,
63 ETNA_FEATURE_SH_NO_ONECONST_LIMIT,
64 ETNA_FEATURE_COMPUTE_ONLY,
65 ETNA_FEATURE_DEC400,
66 ETNA_FEATURE_VIP_V7,
67 ETNA_FEATURE_NN_XYDP0,
68 ETNA_FEATURE_NUM,
69 };
70
71 enum etna_core_type {
72 ETNA_CORE_NOT_SUPPORTED = 0,
73 ETNA_CORE_GPU,
74 ETNA_CORE_NPU,
75 };
76
77 struct etna_core_gpu_info {
78 unsigned max_instructions; /* vertex/fragment shader max instructions */
79 unsigned vertex_output_buffer_size; /* size of vertex shader output buffer */
80 unsigned vertex_cache_size; /* size of a cached vertex (?) */
81 unsigned shader_core_count; /* number of shader cores */
82 unsigned stream_count; /* number of vertex streams */
83 unsigned max_registers; /* maximum number of registers */
84 unsigned pixel_pipes; /* available pixel pipes */
85 unsigned max_varyings; /* maximum number of varyings */
86 unsigned num_constants; /* number of constants */
87 };
88
89 struct etna_core_npu_info {
90 unsigned nn_core_count; /* number of NN cores */
91 unsigned nn_mad_per_core; /* number of MAD units per NN core */
92 unsigned tp_core_count; /* number of TP cores */
93 unsigned on_chip_sram_size; /* Size of on-chip SRAM */
94 unsigned axi_sram_size; /* Size of SRAM behind AXI */
95 unsigned nn_zrl_bits; /* Number of bits for zero run-length compression */
96 unsigned nn_input_buffer_depth; /* Input buffer size, determines tile size */
97 unsigned nn_accum_buffer_depth; /* Accumulation buffer size, determines tile size */
98 };
99
100 struct etna_core_info {
101 uint32_t model;
102 uint32_t revision;
103 uint32_t product_id;
104 uint32_t eco_id;
105 uint32_t customer_id;
106
107 int8_t halti; /* HALTI (gross architecture) level. -1 for pre-HALTI. */
108
109 enum etna_core_type type;
110
111 union {
112 struct etna_core_gpu_info gpu;
113 struct etna_core_npu_info npu;
114 };
115
116 BITSET_DECLARE(feature, ETNA_FEATURE_NUM);
117 };
118
119 static inline bool
etna_core_has_feature(const struct etna_core_info * info,enum etna_feature feature)120 etna_core_has_feature(const struct etna_core_info *info, enum etna_feature feature)
121 {
122 return BITSET_TEST(info->feature, feature);
123 }
124
125 static inline void
etna_core_disable_feature(struct etna_core_info * info,enum etna_feature feature)126 etna_core_disable_feature(struct etna_core_info *info, enum etna_feature feature)
127 {
128 BITSET_CLEAR(info->feature, feature);
129 }
130
131 static inline void
etna_core_enable_feature(struct etna_core_info * info,enum etna_feature feature)132 etna_core_enable_feature(struct etna_core_info *info, enum etna_feature feature)
133 {
134 BITSET_SET(info->feature, feature);
135 }
136