| /linux-6.14.4/drivers/media/platform/nxp/imx8-isi/ |
| D | imx8-isi-hw.c | 16 static inline u32 mxc_isi_read(struct mxc_isi_pipe *pipe, u32 reg) in mxc_isi_read()
21 static inline void mxc_isi_write(struct mxc_isi_pipe *pipe, u32 reg, u32 val) in mxc_isi_write()
30 void mxc_isi_channel_set_inbuf(struct mxc_isi_pipe *pipe, dma_addr_t dma_addr) in mxc_isi_channel_set_inbuf()
38 void mxc_isi_channel_set_outbuf(struct mxc_isi_pipe *pipe, in mxc_isi_channel_set_outbuf()
42 int val; in mxc_isi_channel_set_outbuf() local
83 void mxc_isi_channel_m2m_start(struct mxc_isi_pipe *pipe) in mxc_isi_channel_m2m_start()
85 u32 val; in mxc_isi_channel_m2m_start() local
118 static void mxc_isi_channel_set_scaling(struct mxc_isi_pipe *pipe, in mxc_isi_channel_set_scaling()
126 u32 val; in mxc_isi_channel_set_scaling() local
169 static void mxc_isi_channel_set_crop(struct mxc_isi_pipe *pipe, in mxc_isi_channel_set_crop()
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| /linux-6.14.4/drivers/usb/renesas_usbhs/ |
| D | pipe.c | 33 char *usbhs_pipe_name(struct usbhs_pipe *pipe) in usbhs_pipe_name()
50 static void usbhsp_pipectrl_set(struct usbhs_pipe *pipe, u16 mask, u16 val) in usbhsp_pipectrl_set()
61 static u16 usbhsp_pipectrl_get(struct usbhs_pipe *pipe) in usbhsp_pipectrl_get()
75 static void __usbhsp_pipe_xxx_set(struct usbhs_pipe *pipe, in __usbhsp_pipe_xxx_set()
77 u16 mask, u16 val) in __usbhsp_pipe_xxx_set()
87 static u16 __usbhsp_pipe_xxx_get(struct usbhs_pipe *pipe, in __usbhsp_pipe_xxx_get()
101 static void usbhsp_pipe_cfg_set(struct usbhs_pipe *pipe, u16 mask, u16 val) in usbhsp_pipe_cfg_set()
106 static u16 usbhsp_pipe_cfg_get(struct usbhs_pipe *pipe) in usbhsp_pipe_cfg_get()
114 static void usbhsp_pipe_trn_set(struct usbhs_pipe *pipe, u16 mask, u16 val) in usbhsp_pipe_trn_set()
150 static void usbhsp_pipe_tre_set(struct usbhs_pipe *pipe, u16 mask, u16 val) in usbhsp_pipe_tre_set()
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| /linux-6.14.4/drivers/gpu/drm/i915/display/ |
| D | intel_pipe_crc.c | 59 u32 *val) in i8xx_pipe_crc_ctl_reg()
79 enum pipe pipe, in i9xx_pipe_crc_auto_source()
129 enum pipe pipe, in vlv_pipe_crc_ctl_reg()
131 u32 *val) in vlv_pipe_crc_ctl_reg()
196 enum pipe pipe, in i9xx_pipe_crc_ctl_reg()
198 u32 *val) in i9xx_pipe_crc_ctl_reg()
233 enum pipe pipe) in vlv_undo_pipe_scramble_reset()
256 u32 *val) in ilk_pipe_crc_ctl_reg()
337 enum pipe pipe, in ivb_pipe_crc_ctl_reg()
339 u32 *val) in ivb_pipe_crc_ctl_reg()
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| D | intel_pch_display.c | 41 enum pipe pipe, enum port port, in assert_pch_dp_disabled()
61 enum pipe pipe, enum port port, in assert_pch_hdmi_disabled()
81 enum pipe pipe) in assert_pch_ports_disabled()
107 enum pipe pipe) in assert_pch_transcoder_disabled()
110 u32 val; in assert_pch_transcoder_disabled() local
123 u32 val = intel_de_read(dev_priv, hdmi_reg); in ibx_sanitize_pch_hdmi_port() local
142 u32 val = intel_de_read(dev_priv, dp_reg); in ibx_sanitize_pch_dp_port() local
185 enum pipe pipe = crtc->pipe; in intel_pch_transcoder_set_m1_n1() local
196 enum pipe pipe = crtc->pipe; in intel_pch_transcoder_set_m2_n2() local
207 enum pipe pipe = crtc->pipe; in intel_pch_transcoder_get_m1_n1() local
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| D | intel_audio_regs.h | 20 #define IBX_HDMIW_HDMIEDID(pipe) _MMIO_PIPE(pipe, _IBX_HDMIW_HDMIEDID_A, \ argument
24 #define IBX_AUD_CNTL_ST(pipe) _MMIO_PIPE(pipe, _IBX_AUD_CNTL_ST_A, \ argument
35 #define CPT_HDMIW_HDMIEDID(pipe) _MMIO_PIPE(pipe, _CPT_HDMIW_HDMIEDID_A, _CPT_HDMIW_HDMIEDID_B) argument
38 #define CPT_AUD_CNTL_ST(pipe) _MMIO_PIPE(pipe, _CPT_AUD_CNTL_ST_A, _CPT_AUD_CNTL_ST_B) argument
43 #define VLV_HDMIW_HDMIEDID(pipe) _MMIO_PIPE(pipe, _VLV_HDMIW_HDMIEDID_A, _VLV_HDMIW_HDMIEDID_B) argument
46 #define VLV_AUD_CNTL_ST(pipe) _MMIO_PIPE(pipe, _VLV_AUD_CNTL_ST_A, _VLV_AUD_CNTL_ST_B) argument
51 #define IBX_AUD_CFG(pipe) _MMIO_PIPE(pipe, _IBX_AUD_CONFIG_A, _IBX_AUD_CONFIG_B) argument
54 #define CPT_AUD_CFG(pipe) _MMIO_PIPE(pipe, _CPT_AUD_CONFIG_A, _CPT_AUD_CONFIG_B) argument
57 #define VLV_AUD_CFG(pipe) _MMIO_PIPE(pipe, _VLV_AUD_CONFIG_A, _VLV_AUD_CONFIG_B) argument
137 #define HBLANK_EARLY_ENABLE_ICL(pipe) (0x1 << (20 - (pipe))) argument
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| D | intel_color.c | 216 enum pipe pipe = crtc->pipe; in ilk_update_pipe_csc() local
255 enum pipe pipe = crtc->pipe; in ilk_read_pipe_csc() local
322 enum pipe pipe = crtc->pipe; in icl_update_output_csc() local
358 enum pipe pipe = crtc->pipe; in icl_read_output_csc() local
639 enum pipe pipe = crtc->pipe; in vlv_load_wgc_csc() local
661 enum pipe pipe = crtc->pipe; in vlv_read_wgc_csc() local
741 enum pipe pipe = crtc->pipe; in chv_load_cgm_csc() local
759 enum pipe pipe = crtc->pipe; in chv_read_cgm_csc() local
808 static u32 intel_color_lut_pack(u32 val, int bit_precision) in intel_color_lut_pack()
825 static void i9xx_lut_8_pack(struct drm_color_lut *entry, u32 val) in i9xx_lut_8_pack()
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| D | intel_backlight.c | 86 u32 intel_backlight_invert_pwm_level(struct intel_connector *connector, u32 val) in intel_backlight_invert_pwm_level()
104 void intel_backlight_set_pwm_level(const struct drm_connector_state *conn_state, u32 val) in intel_backlight_set_pwm_level()
115 u32 intel_backlight_level_to_pwm(struct intel_connector *connector, u32 val) in intel_backlight_level_to_pwm()
129 u32 intel_backlight_level_from_pwm(struct intel_connector *connector, u32 val) in intel_backlight_level_from_pwm()
164 u32 val; in i9xx_get_backlight() local
180 static u32 vlv_get_backlight(struct intel_connector *connector, enum pipe pipe) in vlv_get_backlight()
211 u32 val; in lpt_set_backlight() local
259 enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe; in vlv_set_backlight() local
361 static void pch_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) in pch_disable_backlight()
373 static void i9xx_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) in i9xx_disable_backlight()
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| D | intel_dpio_phy.c | 286 u32 old, val; in bxt_dpio_phy_rmw_grp() local
329 u32 val; in bxt_dpio_phy_set_signal_levels() local
385 u32 val = intel_de_read(display, BXT_PORT_REF_DW6(phy)); in bxt_get_grc() local
400 u32 val; in _bxt_dpio_phy_init() local
520 u32 val; in __phy_reg_verify_state() local
649 u32 val = intel_de_read(display, in bxt_dpio_phy_get_lane_lat_optim_mask() local
687 enum dpio_phy vlv_pipe_to_phy(enum pipe pipe) in vlv_pipe_to_phy()
701 enum dpio_channel vlv_pipe_to_channel(enum pipe pipe) in vlv_pipe_to_channel()
724 u32 val; in chv_set_phy_signal_level() local
819 u32 val; in chv_data_lane_soft_reset() local
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| D | intel_display_irq.c | 30 intel_handle_vblank(struct drm_i915_private *dev_priv, enum pipe pipe) in intel_handle_vblank()
113 enum pipe pipe, u32 interrupt_mask, in bdw_update_pipe_irq()
138 enum pipe pipe, u32 bits) in bdw_enable_pipe_irq()
144 enum pipe pipe, u32 bits) in bdw_disable_pipe_irq()
186 enum pipe pipe) in i915_pipestat_enable_mask()
230 enum pipe pipe, u32 status_mask) in i915_enable_pipestat()
253 enum pipe pipe, u32 status_mask) in i915_disable_pipestat()
314 enum pipe pipe, in display_pipe_crc_irq_handler()
350 enum pipe pipe, in display_pipe_crc_irq_handler()
357 enum pipe pipe) in flip_done_handler()
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| D | intel_cursor.c | 327 enum pipe *pipe) in i845_cursor_get_hw_state()
478 enum pipe pipe = plane->pipe; in i9xx_check_cursor() local
537 enum pipe pipe = plane->pipe; in i9xx_cursor_disable_sel_fetch_arm() local
554 enum pipe pipe = plane->pipe; in wa_16021440873() local
572 enum pipe pipe = plane->pipe; in i9xx_cursor_update_sel_fetch_arm() local
579 u32 val = intel_cursor_position(crtc_state, plane_state, in i9xx_cursor_update_sel_fetch_arm() local
606 u32 val = 0; in skl_cursor_wm_reg_val() local
624 enum pipe pipe = plane->pipe; in skl_write_cursor_wm() local
658 enum pipe pipe = plane->pipe; in i9xx_cursor_update_arm() local
729 enum pipe *pipe) in i9xx_cursor_get_hw_state()
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| D | skl_universal_plane_regs.h | 11 #define _SKL_PLANE(pipe, plane, reg_1_a, reg_1_b, reg_2_a, reg_2_b) \ argument
13 #define _SKL_PLANE_DW(pipe, plane, dw, reg_1_a, reg_1_b, reg_2_a, reg_2_b) \ argument
15 #define _MMIO_SKL_PLANE(pipe, plane, reg_1_a, reg_1_b, reg_2_a, reg_2_b) \ argument
17 #define _MMIO_SKL_PLANE_DW(pipe, plane, dw, reg_1_a, reg_1_b, reg_2_a, reg_2_b) \ argument
20 #define _SEL_FETCH(pipe, plane, reg_1_a, reg_1_b, reg_2_a, reg_2_b, reg_5_a, reg_5_b, reg_6_a, reg_… argument
26 #define _MMIO_SEL_FETCH(pipe, plane, reg_1_a, reg_1_b, reg_2_a, reg_2_b, reg_5_a, reg_5_b, reg_6_a,… argument
35 #define PLANE_CTL(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \ argument
106 #define PLANE_STRIDE(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \ argument
116 #define PLANE_POS(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \ argument
128 #define PLANE_SIZE(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \ argument
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| D | skl_universal_plane.c | 609 enum pipe pipe = plane->pipe; in icl_program_input_csc() local
719 u32 val = 0; in xe3_plane_min_ddb_reg_val() local
734 u32 val = 0; in skl_plane_wm_reg_val() local
755 enum pipe pipe = plane->pipe; in skl_write_plane_wm() local
801 enum pipe pipe = plane->pipe; in skl_plane_disable_arm() local
814 enum pipe pipe = plane->pipe; in icl_plane_disable_sel_fetch_arm() local
830 enum pipe pipe = plane->pipe; in icl_plane_disable_arm() local
844 enum pipe *pipe) in skl_plane_get_hw_state()
1282 enum pipe pipe = plane->pipe; in icl_plane_csc_load_black() local
1319 enum pipe pipe = plane->pipe; in skl_plane_update_noarm() local
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| D | skl_watermark.c | 91 u32 val; in intel_sagv_block_time() local
97 u32 val = 0; in intel_sagv_block_time() local
623 enum pipe pipe; in intel_crtc_dbuf_weights() local
663 enum pipe pipe = crtc->pipe; in skl_crtc_allocate_ddb() local
801 const enum pipe pipe, in skl_ddb_get_hw_plane_state()
808 u32 val; in skl_ddb_get_hw_plane_state() local
841 enum pipe pipe = crtc->pipe; in skl_pipe_ddb_get_hw_state() local
1313 static u8 compute_dbuf_slices(enum pipe pipe, u8 active_pipes, bool join_mbus, in compute_dbuf_slices()
1331 static u8 icl_compute_dbuf_slices(enum pipe pipe, u8 active_pipes, bool join_mbus) in icl_compute_dbuf_slices()
1349 static u8 tgl_compute_dbuf_slices(enum pipe pipe, u8 active_pipes, bool join_mbus) in tgl_compute_dbuf_slices()
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| /linux-6.14.4/drivers/gpu/drm/i915/ |
| D | vlv_sideband_reg.h | 13 #define _SSPM0_SSC(val) ((val) << 0) argument
19 #define _SSPM0_SSS(val) ((val) << 24) argument
49 #define _DP_SSC(val, pipe) ((val) << (2 * (pipe))) argument
50 #define DP_SSC_MASK(pipe) _DP_SSC(0x3, (pipe)) argument
51 #define DP_SSC_PWR_ON(pipe) _DP_SSC(0x0, (pipe)) argument
52 #define DP_SSC_CLK_GATE(pipe) _DP_SSC(0x1, (pipe)) argument
53 #define DP_SSC_RESET(pipe) _DP_SSC(0x2, (pipe)) argument
54 #define DP_SSC_PWR_GATE(pipe) _DP_SSC(0x3, (pipe)) argument
55 #define _DP_SSS(val, pipe) ((val) << (2 * (pipe) + 16)) argument
56 #define DP_SSS_MASK(pipe) _DP_SSS(0x3, (pipe)) argument
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| D | intel_clock_gating.c | 134 enum pipe pipe; in g4x_disable_trickle_feed() local
204 enum pipe pipe; in cpt_init_clock_gating() local
205 u32 val; in cpt_init_clock_gating() local
326 u32 val; in gen8_set_l3sqc_credits() local
422 enum pipe pipe; in bdw_init_clock_gating() local
469 enum pipe pipe; in hsw_init_clock_gating() local
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| /linux-6.14.4/drivers/staging/media/ipu3/ |
| D | ipu3-css.c | 192 u32 val; in imgu_hw_wait() local
203 u32 pm_ctrl, state, val; in imgu_css_set_powerup() local
316 u32 val, i; in imgu_css_hw_enable_irq() local
414 u32 val, i; in imgu_css_hw_init() local
649 static void imgu_css_pipeline_cleanup(struct imgu_css *css, unsigned int pipe) in imgu_css_pipeline_cleanup()
668 static int imgu_css_pipeline_init(struct imgu_css *css, unsigned int pipe) in imgu_css_pipeline_init()
1156 static void imgu_css_binary_cleanup(struct imgu_css *css, unsigned int pipe) in imgu_css_binary_cleanup()
1179 static int imgu_css_binary_preallocate(struct imgu_css *css, unsigned int pipe) in imgu_css_binary_preallocate()
1214 static int imgu_css_binary_setup(struct imgu_css *css, unsigned int pipe) in imgu_css_binary_setup()
1287 int r, pipe; in imgu_css_start_streaming() local
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| /linux-6.14.4/drivers/gpu/drm/i915/gvt/ |
| D | fb_decoder.c | 153 static u32 intel_vgpu_get_stride(struct intel_vgpu *vgpu, int pipe, in intel_vgpu_get_stride()
215 u32 val, fmt; in intel_vgpu_decode_primary_plane() local
216 int pipe; in intel_vgpu_decode_primary_plane() local
346 u32 val, mode, index; in intel_vgpu_decode_cursor_plane() local
348 int pipe; in intel_vgpu_decode_cursor_plane() local
424 u32 val, fmt; in intel_vgpu_decode_sprite_plane() local
427 int pipe; in intel_vgpu_decode_sprite_plane() local
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| /linux-6.14.4/drivers/gpu/drm/mcde/ |
| D | mcde_display.c | 93 u32 val; in mcde_display_irq() local
159 static int mcde_display_check(struct drm_simple_display_pipe *pipe, in mcde_display_check()
199 u32 val; in mcde_configure_extsrc() local
344 u32 val; in mcde_configure_overlay() local
494 u32 val; in mcde_configure_channel() local
634 u32 val; in mcde_configure_fifo() local
753 u32 val; in mcde_configure_dsi_formatter() local
846 u32 val; in mcde_enable_fifo() local
874 u32 val; in mcde_disable_fifo() local
918 u32 val; in mcde_drain_pipe() local
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| /linux-6.14.4/fs/ |
| D | pipe.c | 89 void pipe_lock(struct pipe_inode_info *pipe) in pipe_lock()
96 void pipe_unlock(struct pipe_inode_info *pipe) in pipe_unlock()
115 static void anon_pipe_buf_release(struct pipe_inode_info *pipe, in anon_pipe_buf_release()
131 static bool anon_pipe_buf_try_steal(struct pipe_inode_info *pipe, in anon_pipe_buf_try_steal()
155 bool generic_pipe_buf_try_steal(struct pipe_inode_info *pipe, in generic_pipe_buf_try_steal()
183 bool generic_pipe_buf_get(struct pipe_inode_info *pipe, struct pipe_buffer *buf) in generic_pipe_buf_get()
197 void generic_pipe_buf_release(struct pipe_inode_info *pipe, in generic_pipe_buf_release()
211 static inline bool pipe_readable(const struct pipe_inode_info *pipe) in pipe_readable()
219 static inline unsigned int pipe_update_tail(struct pipe_inode_info *pipe, in pipe_update_tail()
254 struct pipe_inode_info *pipe = filp->private_data; in pipe_read() local
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| /linux-6.14.4/drivers/gpu/drm/msm/disp/mdp5/ |
| D | mdp5_smp.c | 39 static inline u32 pipe2client(enum mdp5_pipe pipe, int plane) in pipe2client()
97 enum mdp5_pipe pipe, int nblks) in set_fifo_thresholds()
100 u32 val; in set_fifo_thresholds() local
165 enum mdp5_pipe pipe, uint32_t blkcfg) in mdp5_smp_assign()
196 enum mdp5_pipe pipe) in mdp5_smp_release()
223 u32 blk, val; in update_smp_state() local
277 enum mdp5_pipe pipe = hwpipe->pipe; in write_smp_fifo_regs() local
290 enum mdp5_pipe pipe; in mdp5_smp_prepare_commit() local
316 enum mdp5_pipe pipe; in mdp5_smp_complete_commit() local
346 enum mdp5_pipe pipe = hwpipe->pipe; in mdp5_smp_dump() local
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| /linux-6.14.4/drivers/gpu/drm/tve200/ |
| D | tve200_display.c | 32 u32 val; in tve200_irq() local
71 static int tve200_display_check(struct drm_simple_display_pipe *pipe, in tve200_display_check()
121 static void tve200_display_enable(struct drm_simple_display_pipe *pipe, in tve200_display_enable()
242 static void tve200_display_disable(struct drm_simple_display_pipe *pipe) in tve200_display_disable()
257 static void tve200_display_update(struct drm_simple_display_pipe *pipe, in tve200_display_update()
294 static int tve200_display_enable_vblank(struct drm_simple_display_pipe *pipe) in tve200_display_enable_vblank()
306 static void tve200_display_disable_vblank(struct drm_simple_display_pipe *pipe) in tve200_display_disable_vblank()
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| /linux-6.14.4/drivers/gpu/drm/gma500/ |
| D | psb_irq.c | 24 static inline u32 gma_pipestat(int pipe) in gma_pipestat()
35 static inline u32 gma_pipeconf(int pipe) in gma_pipeconf()
46 void gma_enable_pipestat(struct drm_psb_private *dev_priv, int pipe, u32 mask) in gma_enable_pipestat()
62 void gma_disable_pipestat(struct drm_psb_private *dev_priv, int pipe, u32 mask) in gma_disable_pipestat()
80 static void gma_pipe_event_handler(struct drm_device *dev, int pipe) in gma_pipe_event_handler()
153 u32 val, addr; in gma_sgx_interrupt() local
379 unsigned int pipe = crtc->index; in gma_crtc_enable_vblank() local
412 unsigned int pipe = crtc->index; in gma_crtc_disable_vblank() local
436 unsigned int pipe = crtc->index; in gma_crtc_get_vblank_counter() local
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| D | cdv_intel_display.c | 130 int cdv_sb_read(struct drm_device *dev, u32 reg, u32 *val) in cdv_sb_read()
157 int cdv_sb_write(struct drm_device *dev, u32 reg, u32 val) in cdv_sb_write()
217 int pipe = gma_crtc->pipe; in cdv_dpll_set_clock_cdv() local
456 static bool cdv_intel_pipe_enabled(struct drm_device *dev, int pipe) in cdv_intel_pipe_enabled()
580 int pipe = gma_crtc->pipe; in cdv_intel_crtc_mode_set() local
840 int pipe = gma_crtc->pipe; in cdv_intel_crtc_clock_get() local
918 int pipe = gma_crtc->pipe; in cdv_intel_crtc_mode_get() local
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| /linux-6.14.4/drivers/gpu/drm/ |
| D | drm_mipi_dbi.c | 132 int mipi_dbi_command_read(struct mipi_dbi *dbi, u8 cmd, u8 *val) in mipi_dbi_command_read()
320 enum drm_mode_status mipi_dbi_pipe_mode_valid(struct drm_simple_display_pipe *pipe, in mipi_dbi_pipe_mode_valid()
337 void mipi_dbi_pipe_update(struct drm_simple_display_pipe *pipe, in mipi_dbi_pipe_update()
430 void mipi_dbi_pipe_disable(struct drm_simple_display_pipe *pipe) in mipi_dbi_pipe_disable()
461 int mipi_dbi_pipe_begin_fb_access(struct drm_simple_display_pipe *pipe, in mipi_dbi_pipe_begin_fb_access()
477 void mipi_dbi_pipe_end_fb_access(struct drm_simple_display_pipe *pipe, in mipi_dbi_pipe_end_fb_access()
491 void mipi_dbi_pipe_reset_plane(struct drm_simple_display_pipe *pipe) in mipi_dbi_pipe_reset_plane()
509 struct drm_plane_state *mipi_dbi_pipe_duplicate_plane_state(struct drm_simple_display_pipe *pipe) in mipi_dbi_pipe_duplicate_plane_state()
525 void mipi_dbi_pipe_destroy_plane_state(struct drm_simple_display_pipe *pipe, in mipi_dbi_pipe_destroy_plane_state()
725 u8 val; in mipi_dbi_display_is_on() local
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| /linux-6.14.4/drivers/gpu/drm/amd/amdgpu/ |
| D | mes_v12_0.c | 146 int pipe, void *pkt, int size, in mes_v12_0_submit_pkt_and_poll_completion()
357 u32 i, tmp, val; in gfx_v12_0_request_gfx_index_mutex() local
484 int pipe; in mes_v12_0_reset_hw_queue() local
510 int pipe; in mes_v12_0_map_legacy_queue() local
541 int pipe; in mes_v12_0_unmap_legacy_queue() local
588 static int mes_v12_0_query_sched_status(struct amdgpu_mes *mes, int pipe) in mes_v12_0_query_sched_status()
607 int pipe; in mes_v12_0_misc_op() local
679 static int mes_v12_0_set_hw_resources_1(struct amdgpu_mes *mes, int pipe) in mes_v12_0_set_hw_resources_1()
695 static int mes_v12_0_set_hw_resources(struct amdgpu_mes *mes, int pipe) in mes_v12_0_set_hw_resources()
850 int pipe; in mes_v12_0_reset_legacy_queue() local
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