xref: /nrf52832-nimble/rt-thread/components/drivers/include/drivers/hwtimer.h (revision 104654410c56c573564690304ae786df310c91fc)
1 /*
2  * Copyright (c) 2006-2018, RT-Thread Development Team
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Change Logs:
7  * Date           Author       Notes
8  */
9 #ifndef __HWTIMER_H__
10 #define __HWTIMER_H__
11 
12 #include <rtthread.h>
13 #include <rtdevice.h>
14 
15 #ifdef __cplusplus
16 extern "C" {
17 #endif
18 
19 /* Timer Control Command */
20 typedef enum
21 {
22     HWTIMER_CTRL_FREQ_SET = 0x01,    /* set the count frequency */
23     HWTIMER_CTRL_STOP,               /* stop timer */
24     HWTIMER_CTRL_INFO_GET,           /* get a timer feature information */
25     HWTIMER_CTRL_MODE_SET            /* Setting the timing mode(oneshot/period) */
26 } rt_hwtimer_ctrl_t;
27 
28 /* Timing Mode */
29 typedef enum
30 {
31     HWTIMER_MODE_ONESHOT = 0x01,
32     HWTIMER_MODE_PERIOD
33 } rt_hwtimer_mode_t;
34 
35 /* Time Value */
36 typedef struct rt_hwtimerval
37 {
38     rt_int32_t sec;      /* second */
39     rt_int32_t usec;     /* microsecond */
40 } rt_hwtimerval_t;
41 
42 #define HWTIMER_CNTMODE_UP      0x01 /* increment count mode */
43 #define HWTIMER_CNTMODE_DW      0x02 /* decreasing count mode */
44 
45 struct rt_hwtimer_device;
46 
47 struct rt_hwtimer_ops
48 {
49     void (*init)(struct rt_hwtimer_device *timer, rt_uint32_t state);
50     rt_err_t (*start)(struct rt_hwtimer_device *timer, rt_uint32_t cnt, rt_hwtimer_mode_t mode);
51     void (*stop)(struct rt_hwtimer_device *timer);
52     rt_uint32_t (*count_get)(struct rt_hwtimer_device *timer);
53     rt_err_t (*control)(struct rt_hwtimer_device *timer, rt_uint32_t cmd, void *args);
54 };
55 
56 /* Timer Feature Information */
57 struct rt_hwtimer_info
58 {
59     rt_int32_t maxfreq;    /* the maximum count frequency timer support */
60     rt_int32_t minfreq;    /* the minimum count frequency timer support */
61     rt_uint32_t maxcnt;    /* counter maximum value */
62     rt_uint8_t  cntmode;   /* count mode (inc/dec) */
63 };
64 
65 typedef struct rt_hwtimer_device
66 {
67     struct rt_device parent;
68     const struct rt_hwtimer_ops *ops;
69     const struct rt_hwtimer_info *info;
70 
71     rt_int32_t freq;                /* counting frequency set by the user */
72     rt_int32_t overflow;            /* timer overflows */
73     float period_sec;
74     rt_int32_t cycles;              /* how many times will generate a timeout event after overflow */
75     rt_int32_t reload;              /* reload cycles(using in period mode) */
76     rt_hwtimer_mode_t mode;         /* timing mode(oneshot/period) */
77 } rt_hwtimer_t;
78 
79 rt_err_t rt_device_hwtimer_register(rt_hwtimer_t *timer, const char *name, void *user_data);
80 void rt_device_hwtimer_isr(rt_hwtimer_t *timer);
81 
82 #ifdef __cplusplus
83 }
84 #endif
85 
86 #endif
87