1 /*
2 * Copyright (c) 2019-2021 Arm Limited.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24 #ifdef ARM_COMPUTE_ENABLE_SVE
25
26 #include <cstddef>
27
28 namespace arm_gemm {
29
sve_interleaved_fp32_mla_8x3VL(const float * Apanel,const float * Bpanel,float * Cpanel,int ablocks,int bblocks,int K)30 void sve_interleaved_fp32_mla_8x3VL(
31 const float *Apanel, const float *Bpanel,
32 float *Cpanel, int ablocks, int bblocks, int K) {
33
34 struct KernelArgs {
35 size_t bblocks = {};
36 size_t K = {};
37 const float *Bpanel = {};
38 } ka;
39
40 ka.bblocks = bblocks;
41 ka.K = (K/1) - 1;
42 ka.Bpanel = Bpanel;
43
44 __asm__ __volatile__(
45 "ptrue p0.b\n"
46 "1:" // Height loop
47 "ldr x22, [%x[args_ptr], %[offsetof_bblocks]]\n"
48 "mov x21, %x[Apanel]\n"
49 "ldr x20, [%x[args_ptr], %[offsetof_Bpanel]]\n"
50 "2:" // Width loop
51 "mov z8.b, #0x0\n"
52 "mov z9.b, #0x0\n"
53 "ldr x19, [%x[args_ptr], %[offsetof_K]]\n"
54 "mov z10.b, #0x0\n"
55 "mov z11.b, #0x0\n"
56 "ld1w { z4.s }, p0/Z, [x20]\n"
57 "mov z12.b, #0x0\n"
58 "mov z13.b, #0x0\n"
59 "mov %x[Apanel], x21\n"
60 "mov z14.b, #0x0\n"
61 "mov z15.b, #0x0\n"
62 "cmp x19, #0x2\n"
63 "mov z16.b, #0x0\n"
64 "mov z17.b, #0x0\n"
65 "mov z18.b, #0x0\n"
66 "mov z19.b, #0x0\n"
67 "ld1rqw { z0.s }, p0/Z, [%x[Apanel]]\n"
68 "mov z20.b, #0x0\n"
69 "mov z21.b, #0x0\n"
70 "ld1rqw { z1.s }, p0/Z, [%x[Apanel], #16]\n"
71 "mov z22.b, #0x0\n"
72 "mov z23.b, #0x0\n"
73 "mov z24.b, #0x0\n"
74 "mov z25.b, #0x0\n"
75 "mov z26.b, #0x0\n"
76 "mov z27.b, #0x0\n"
77 "mov z28.b, #0x0\n"
78 "mov z29.b, #0x0\n"
79 "mov z30.b, #0x0\n"
80 "mov z31.b, #0x0\n"
81 "blt 4f\n"
82 "3:" // main loop head
83 "fmla z8.s, z4.s, z0.s[0]\n"
84 "fmla z11.s, z4.s, z0.s[1]\n"
85 "ld1w { z5.s }, p0/Z, [x20, #1, MUL VL]\n"
86 "fmla z14.s, z4.s, z0.s[2]\n"
87 "fmla z17.s, z4.s, z0.s[3]\n"
88 "ld1w { z6.s }, p0/Z, [x20, #2, MUL VL]\n"
89 "fmla z20.s, z4.s, z1.s[0]\n"
90 "fmla z23.s, z4.s, z1.s[1]\n"
91 "ld1rqw { z2.s }, p0/Z, [%x[Apanel], #32]\n"
92 "fmla z26.s, z4.s, z1.s[2]\n"
93 "fmla z29.s, z4.s, z1.s[3]\n"
94 "ld1rqw { z3.s }, p0/Z, [%x[Apanel], #48]\n"
95 "fmla z9.s, z5.s, z0.s[0]\n"
96 "fmla z12.s, z5.s, z0.s[1]\n"
97 "ld1w { z4.s }, p0/Z, [x20, #3, MUL VL]\n"
98 "fmla z15.s, z5.s, z0.s[2]\n"
99 "fmla z18.s, z5.s, z0.s[3]\n"
100 "sub x19, x19, #0x2\n"
101 "fmla z21.s, z5.s, z1.s[0]\n"
102 "fmla z24.s, z5.s, z1.s[1]\n"
103 "cmp x19, #0x2\n"
104 "fmla z27.s, z5.s, z1.s[2]\n"
105 "fmla z30.s, z5.s, z1.s[3]\n"
106 "ld1w { z5.s }, p0/Z, [x20, #4, MUL VL]\n"
107 "fmla z10.s, z6.s, z0.s[0]\n"
108 "fmla z13.s, z6.s, z0.s[1]\n"
109 "add %x[Apanel], %x[Apanel], #0x40\n"
110 "fmla z16.s, z6.s, z0.s[2]\n"
111 "fmla z19.s, z6.s, z0.s[3]\n"
112 "ld1rqw { z0.s }, p0/Z, [%x[Apanel]]\n"
113 "fmla z22.s, z6.s, z1.s[0]\n"
114 "fmla z25.s, z6.s, z1.s[1]\n"
115 "fmla z28.s, z6.s, z1.s[2]\n"
116 "fmla z31.s, z6.s, z1.s[3]\n"
117 "ld1w { z6.s }, p0/Z, [x20, #5, MUL VL]\n"
118 "fmla z8.s, z4.s, z2.s[0]\n"
119 "fmla z11.s, z4.s, z2.s[1]\n"
120 "ld1rqw { z1.s }, p0/Z, [%x[Apanel], #16]\n"
121 "fmla z14.s, z4.s, z2.s[2]\n"
122 "fmla z17.s, z4.s, z2.s[3]\n"
123 "addvl x20, x20, #6\n"
124 "fmla z20.s, z4.s, z3.s[0]\n"
125 "fmla z23.s, z4.s, z3.s[1]\n"
126 "fmla z26.s, z4.s, z3.s[2]\n"
127 "fmla z29.s, z4.s, z3.s[3]\n"
128 "fmla z9.s, z5.s, z2.s[0]\n"
129 "fmla z12.s, z5.s, z2.s[1]\n"
130 "ld1w { z4.s }, p0/Z, [x20]\n"
131 "fmla z15.s, z5.s, z2.s[2]\n"
132 "fmla z18.s, z5.s, z2.s[3]\n"
133 "fmla z21.s, z5.s, z3.s[0]\n"
134 "fmla z24.s, z5.s, z3.s[1]\n"
135 "fmla z27.s, z5.s, z3.s[2]\n"
136 "fmla z30.s, z5.s, z3.s[3]\n"
137 "fmla z10.s, z6.s, z2.s[0]\n"
138 "fmla z13.s, z6.s, z2.s[1]\n"
139 "fmla z16.s, z6.s, z2.s[2]\n"
140 "fmla z19.s, z6.s, z2.s[3]\n"
141 "fmla z22.s, z6.s, z3.s[0]\n"
142 "fmla z25.s, z6.s, z3.s[1]\n"
143 "fmla z28.s, z6.s, z3.s[2]\n"
144 "fmla z31.s, z6.s, z3.s[3]\n"
145 "bge 3b\n"
146 "4:" // main loop skip
147 "fmla z8.s, z4.s, z0.s[0]\n"
148 "fmla z11.s, z4.s, z0.s[1]\n"
149 "ld1w { z5.s }, p0/Z, [x20, #1, MUL VL]\n"
150 "fmla z14.s, z4.s, z0.s[2]\n"
151 "fmla z17.s, z4.s, z0.s[3]\n"
152 "ld1w { z6.s }, p0/Z, [x20, #2, MUL VL]\n"
153 "fmla z20.s, z4.s, z1.s[0]\n"
154 "fmla z23.s, z4.s, z1.s[1]\n"
155 "add %x[Apanel], %x[Apanel], #0x20\n"
156 "fmla z26.s, z4.s, z1.s[2]\n"
157 "fmla z29.s, z4.s, z1.s[3]\n"
158 "addvl x20, x20, #3\n"
159 "fmla z9.s, z5.s, z0.s[0]\n"
160 "fmla z12.s, z5.s, z0.s[1]\n"
161 "fmla z15.s, z5.s, z0.s[2]\n"
162 "fmla z18.s, z5.s, z0.s[3]\n"
163 "fmla z21.s, z5.s, z1.s[0]\n"
164 "fmla z24.s, z5.s, z1.s[1]\n"
165 "fmla z27.s, z5.s, z1.s[2]\n"
166 "fmla z30.s, z5.s, z1.s[3]\n"
167 "fmla z10.s, z6.s, z0.s[0]\n"
168 "fmla z13.s, z6.s, z0.s[1]\n"
169 "fmla z16.s, z6.s, z0.s[2]\n"
170 "fmla z19.s, z6.s, z0.s[3]\n"
171 "fmla z22.s, z6.s, z1.s[0]\n"
172 "fmla z25.s, z6.s, z1.s[1]\n"
173 "fmla z28.s, z6.s, z1.s[2]\n"
174 "fmla z31.s, z6.s, z1.s[3]\n"
175 "cbz x19, 5f\n"
176 "ld1rqw { z0.s }, p0/Z, [%x[Apanel]]\n"
177 "ld1rqw { z1.s }, p0/Z, [%x[Apanel], #16]\n"
178 "add %x[Apanel], %x[Apanel], #0x20\n"
179 "ld1w { z7.s }, p0/Z, [x20]\n"
180 "ld1w { z4.s }, p0/Z, [x20, #1, MUL VL]\n"
181 "ld1w { z5.s }, p0/Z, [x20, #2, MUL VL]\n"
182 "addvl x20, x20, #3\n"
183 "fmla z8.s, z7.s, z0.s[0]\n"
184 "fmla z11.s, z7.s, z0.s[1]\n"
185 "fmla z14.s, z7.s, z0.s[2]\n"
186 "fmla z17.s, z7.s, z0.s[3]\n"
187 "fmla z20.s, z7.s, z1.s[0]\n"
188 "fmla z23.s, z7.s, z1.s[1]\n"
189 "fmla z26.s, z7.s, z1.s[2]\n"
190 "fmla z29.s, z7.s, z1.s[3]\n"
191 "fmla z9.s, z4.s, z0.s[0]\n"
192 "fmla z12.s, z4.s, z0.s[1]\n"
193 "fmla z15.s, z4.s, z0.s[2]\n"
194 "fmla z18.s, z4.s, z0.s[3]\n"
195 "fmla z21.s, z4.s, z1.s[0]\n"
196 "fmla z24.s, z4.s, z1.s[1]\n"
197 "fmla z27.s, z4.s, z1.s[2]\n"
198 "fmla z30.s, z4.s, z1.s[3]\n"
199 "fmla z10.s, z5.s, z0.s[0]\n"
200 "fmla z13.s, z5.s, z0.s[1]\n"
201 "fmla z16.s, z5.s, z0.s[2]\n"
202 "fmla z19.s, z5.s, z0.s[3]\n"
203 "fmla z22.s, z5.s, z1.s[0]\n"
204 "fmla z25.s, z5.s, z1.s[1]\n"
205 "fmla z28.s, z5.s, z1.s[2]\n"
206 "fmla z31.s, z5.s, z1.s[3]\n"
207 "5:" // multiply loop done
208 "st1w { z8.s }, p0, [%x[Cpanel]]\n"
209 "subs x22, x22, #0x1\n"
210 "st1w { z9.s }, p0, [%x[Cpanel], #1, MUL VL]\n"
211 "st1w { z10.s }, p0, [%x[Cpanel], #2, MUL VL]\n"
212 "st1w { z11.s }, p0, [%x[Cpanel], #3, MUL VL]\n"
213 "st1w { z12.s }, p0, [%x[Cpanel], #4, MUL VL]\n"
214 "st1w { z13.s }, p0, [%x[Cpanel], #5, MUL VL]\n"
215 "st1w { z14.s }, p0, [%x[Cpanel], #6, MUL VL]\n"
216 "st1w { z15.s }, p0, [%x[Cpanel], #7, MUL VL]\n"
217 "addvl %x[Cpanel], %x[Cpanel], #16\n"
218 "st1w { z16.s }, p0, [%x[Cpanel], #-8, MUL VL]\n"
219 "st1w { z17.s }, p0, [%x[Cpanel], #-7, MUL VL]\n"
220 "st1w { z18.s }, p0, [%x[Cpanel], #-6, MUL VL]\n"
221 "st1w { z19.s }, p0, [%x[Cpanel], #-5, MUL VL]\n"
222 "st1w { z20.s }, p0, [%x[Cpanel], #-4, MUL VL]\n"
223 "st1w { z21.s }, p0, [%x[Cpanel], #-3, MUL VL]\n"
224 "st1w { z22.s }, p0, [%x[Cpanel], #-2, MUL VL]\n"
225 "st1w { z23.s }, p0, [%x[Cpanel], #-1, MUL VL]\n"
226 "st1w { z24.s }, p0, [%x[Cpanel]]\n"
227 "st1w { z25.s }, p0, [%x[Cpanel], #1, MUL VL]\n"
228 "st1w { z26.s }, p0, [%x[Cpanel], #2, MUL VL]\n"
229 "st1w { z27.s }, p0, [%x[Cpanel], #3, MUL VL]\n"
230 "st1w { z28.s }, p0, [%x[Cpanel], #4, MUL VL]\n"
231 "st1w { z29.s }, p0, [%x[Cpanel], #5, MUL VL]\n"
232 "st1w { z30.s }, p0, [%x[Cpanel], #6, MUL VL]\n"
233 "st1w { z31.s }, p0, [%x[Cpanel], #7, MUL VL]\n"
234 "addvl %x[Cpanel], %x[Cpanel], #8\n"
235 "bgt 2b\n"
236 "subs %x[ablocks], %x[ablocks], #0x1\n"
237 "bne 1b\n"
238 : [Apanel] "+&r" (Apanel), [Cpanel] "+&r" (Cpanel), [ablocks] "+&r" (ablocks)
239 : [args_ptr] "r" (&ka), [offsetof_Bpanel] "I" (offsetof(KernelArgs, Bpanel)), [offsetof_K] "I" (offsetof(KernelArgs, K)), [offsetof_bblocks] "I" (offsetof(KernelArgs, bblocks))
240 : "cc", "memory", "p0", "x19", "x20", "x21", "x22", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
241 );
242 }
243
244 } // namespace arm_gemm
245 #endif // ARM_COMPUTE_ENABLE_SVE
246