1 /* 2 * Copyright © 2022 Imagination Technologies Ltd. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a copy 5 * of this software and associated documentation files (the "Software"), to deal 6 * in the Software without restriction, including without limitation the rights 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 8 * copies of the Software, and to permit persons to whom the Software is 9 * furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 18 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 */ 23 24 #ifndef PVR_JOB_CONTEXT_H 25 #define PVR_JOB_CONTEXT_H 26 27 #include "pvr_common.h" 28 #include "pvr_private.h" 29 #include "pvr_transfer_frag_store.h" 30 #include "pvr_types.h" 31 #include "pvr_uscgen.h" 32 #include "pvr_winsys.h" 33 34 /* Support PDS code/data loading/storing to the 'B' shared register state 35 * buffers. 36 */ 37 #define ROGUE_NUM_SHADER_STATE_BUFFERS 2U 38 39 /* TODO: Add reset framework support. */ 40 struct pvr_reset_cmd { 41 }; 42 43 struct rogue_sr_programs { 44 struct pvr_bo *store_load_state_bo; 45 46 struct { 47 uint8_t unified_size; 48 49 struct pvr_suballoc_bo *store_program_bo; 50 51 struct pvr_suballoc_bo *load_program_bo; 52 } usc; 53 54 struct { 55 struct pvr_pds_upload store_program; 56 struct pvr_pds_upload load_program; 57 } pds; 58 }; 59 60 /****************************************************************************** 61 Render context 62 ******************************************************************************/ 63 64 struct pvr_render_ctx { 65 struct pvr_device *device; 66 67 struct pvr_winsys_render_ctx *ws_ctx; 68 69 /* Buffer to hold the VDM call stack */ 70 struct pvr_bo *vdm_callstack_bo; 71 72 struct pvr_render_ctx_switch { 73 /* Buffer to hold the VDM context resume control stream. */ 74 struct pvr_bo *vdm_state_bo; 75 76 struct pvr_bo *geom_state_bo; 77 78 struct pvr_render_ctx_programs { 79 /* Context switch persistent state programs. */ 80 struct rogue_pt_programs { 81 /* Buffer used to hold the persistent state. */ 82 struct pvr_bo *store_resume_state_bo; 83 84 /* PDS program to store out the persistent state in 85 * 'store_resume_state_bo'. 86 */ 87 struct pvr_pds_upload pds_store_program; 88 89 /* PDS program to load in the persistent state in 90 * 'store_resume_state_bo'. 91 */ 92 struct pvr_pds_upload pds_resume_program; 93 } pt; 94 95 /* Context switch shared register programs. */ 96 struct rogue_sr_programs sr; 97 98 } programs[ROGUE_NUM_SHADER_STATE_BUFFERS]; 99 } ctx_switch; 100 101 /* Reset framework. */ 102 struct pvr_reset_cmd reset_cmd; 103 }; 104 105 /****************************************************************************** 106 Compute context 107 ******************************************************************************/ 108 109 struct pvr_compute_ctx { 110 struct pvr_device *device; 111 112 struct pvr_winsys_compute_ctx *ws_ctx; 113 114 struct pvr_compute_ctx_switch { 115 struct pvr_bo *compute_state_bo; 116 117 struct rogue_sr_programs sr[ROGUE_NUM_SHADER_STATE_BUFFERS]; 118 119 struct pvr_pds_upload sr_fence_terminate_program; 120 } ctx_switch; 121 122 /* Reset framework. */ 123 struct pvr_reset_cmd reset_cmd; 124 }; 125 126 /****************************************************************************** 127 Transfer context 128 ******************************************************************************/ 129 130 /* TODO: Can we move these to pds code headers? */ 131 /* Maximum number of DMAs in the PDS TexState/Uniform program. */ 132 #define PVR_TRANSFER_MAX_UNIFORM_DMA 1U 133 #define PVR_TRANSFER_MAX_TEXSTATE_DMA 2U 134 135 #if (PVR_TRANSFER_MAX_TEXSTATE_DMA >= PVR_PDS_MAX_NUM_DMA_KICKS) || \ 136 (PVR_TRANSFER_MAX_UNIFORM_DMA >= PVR_PDS_MAX_NUM_DMA_KICKS) 137 # error \ 138 "Transfer queue can not support more DMA kicks than supported by PDS codegen." 139 #endif 140 141 struct pvr_transfer_ctx { 142 struct pvr_device *device; 143 144 /* Reset framework. */ 145 struct pvr_reset_cmd reset_cmd; 146 147 struct pvr_winsys_transfer_ctx *ws_ctx; 148 149 struct pvr_transfer_frag_store frag_store; 150 151 struct pvr_suballoc_bo *usc_eot_bos[PVR_TRANSFER_MAX_RENDER_TARGETS]; 152 153 struct pvr_pds_upload pds_unitex_code[PVR_TRANSFER_MAX_TEXSTATE_DMA] 154 [PVR_TRANSFER_MAX_UNIFORM_DMA]; 155 }; 156 157 /****************************************************************************** 158 Function prototypes 159 ******************************************************************************/ 160 161 VkResult pvr_render_ctx_create(struct pvr_device *device, 162 enum pvr_winsys_ctx_priority priority, 163 struct pvr_render_ctx **const ctx_out); 164 void pvr_render_ctx_destroy(struct pvr_render_ctx *ctx); 165 166 VkResult pvr_compute_ctx_create(struct pvr_device *const device, 167 enum pvr_winsys_ctx_priority priority, 168 struct pvr_compute_ctx **const ctx_out); 169 void pvr_compute_ctx_destroy(struct pvr_compute_ctx *ctx); 170 171 VkResult pvr_transfer_ctx_create(struct pvr_device *const device, 172 enum pvr_winsys_ctx_priority priority, 173 struct pvr_transfer_ctx **const ctx_out); 174 void pvr_transfer_ctx_destroy(struct pvr_transfer_ctx *const ctx); 175 176 #endif /* PVR_JOB_CONTEXT_H */ 177