1 /*
2 * Copyright (c) 2008-2024 Broadcom. All Rights Reserved.
3 * The term “Broadcom” refers to Broadcom Inc.
4 * and/or its subsidiaries.
5 * SPDX-License-Identifier: MIT
6 */
7
8 #ifndef SVGA_CONTEXT_H
9 #define SVGA_CONTEXT_H
10
11
12 #include "pipe/p_context.h"
13 #include "pipe/p_defines.h"
14 #include "pipe/p_state.h"
15
16 #include "util/os_time.h"
17
18 #include "util/u_blitter.h"
19 #include "util/list.h"
20
21 #include "svga_screen.h"
22 #include "svga_state.h"
23 #include "svga_winsys.h"
24 #include "svga_hw_reg.h"
25 #include "svga3d_shaderdefs.h"
26 #include "svga_image_view.h"
27 #include "svga_shader_buffer.h"
28 #include "svga_debug.h"
29
30 /** Non-GPU queries for gallium HUD */
31 enum svga_hud {
32 /* per-frame counters */
33 SVGA_QUERY_NUM_DRAW_CALLS = PIPE_QUERY_DRIVER_SPECIFIC,
34 SVGA_QUERY_NUM_FALLBACKS,
35 SVGA_QUERY_NUM_FLUSHES,
36 SVGA_QUERY_NUM_VALIDATIONS,
37 SVGA_QUERY_MAP_BUFFER_TIME,
38 SVGA_QUERY_NUM_BUFFERS_MAPPED,
39 SVGA_QUERY_NUM_TEXTURES_MAPPED,
40 SVGA_QUERY_NUM_BYTES_UPLOADED,
41 SVGA_QUERY_NUM_COMMAND_BUFFERS,
42 SVGA_QUERY_COMMAND_BUFFER_SIZE,
43 SVGA_QUERY_FLUSH_TIME,
44 SVGA_QUERY_SURFACE_WRITE_FLUSHES,
45 SVGA_QUERY_NUM_READBACKS,
46 SVGA_QUERY_NUM_RESOURCE_UPDATES,
47 SVGA_QUERY_NUM_BUFFER_UPLOADS,
48 SVGA_QUERY_NUM_CONST_BUF_UPDATES,
49 SVGA_QUERY_NUM_CONST_UPDATES,
50 SVGA_QUERY_NUM_SHADER_RELOCATIONS,
51 SVGA_QUERY_NUM_SURFACE_RELOCATIONS,
52
53 /* running total counters */
54 SVGA_QUERY_MEMORY_USED,
55 SVGA_QUERY_NUM_SHADERS,
56 SVGA_QUERY_NUM_RESOURCES,
57 SVGA_QUERY_NUM_STATE_OBJECTS,
58 SVGA_QUERY_NUM_SURFACE_VIEWS,
59 SVGA_QUERY_NUM_GENERATE_MIPMAP,
60 SVGA_QUERY_NUM_FAILED_ALLOCATIONS,
61 SVGA_QUERY_NUM_COMMANDS_PER_DRAW,
62 SVGA_QUERY_SHADER_MEM_USED,
63
64 /*SVGA_QUERY_MAX has to be last because it is size of an array*/
65 SVGA_QUERY_MAX
66 };
67
68
69 /**
70 * Maximum supported number of constant buffers per shader
71 * including the zero slot for the default constant buffer.
72 */
73 #define SVGA_MAX_CONST_BUFS 15
74 #define SVGA_MAX_RAW_BUFS 64
75
76 /**
77 * Maximum constant buffer size that can be set in the
78 * DXSetSingleConstantBuffer command is
79 * DX10 constant buffer element count * 4 4-bytes components
80 */
81 #define SVGA_MAX_CONST_BUF_SIZE (4096 * 4 * sizeof(int))
82
83 #define CONST0_UPLOAD_ALIGNMENT 256
84 #define SVGA_MAX_UAVIEWS SVGA3D_DX11_1_MAX_UAVIEWS
85 #define SVGA_MAX_IMAGES SVGA3D_MAX_UAVIEWS
86 #define SVGA_MAX_SHADER_BUFFERS SVGA3D_MAX_UAVIEWS
87 #define SVGA_MAX_ATOMIC_BUFFERS SVGA3D_MAX_UAVIEWS
88
89 enum svga_surface_state
90 {
91 SVGA_SURFACE_STATE_CREATED,
92 SVGA_SURFACE_STATE_INVALIDATED,
93 SVGA_SURFACE_STATE_UPDATED,
94 SVGA_SURFACE_STATE_RENDERED,
95 };
96
97 struct draw_vertex_shader;
98 struct draw_fragment_shader;
99 struct svga_shader_variant;
100 struct SVGACmdMemory;
101 struct util_bitmask;
102
103
104 struct svga_cache_context;
105 struct svga_tracked_state;
106
107 struct svga_blend_state {
108 unsigned need_white_fragments:1;
109 unsigned independent_blend_enable:1;
110 unsigned alpha_to_coverage:1;
111 unsigned alpha_to_one:1;
112 unsigned blend_color_alpha:1; /**< set blend color to alpha value */
113 unsigned logicop_enabled:1;
114 unsigned logicop_mode:5;
115
116 /** Per-render target state */
117 struct {
118 uint8_t writemask;
119
120 bool blend_enable;
121 uint8_t srcblend;
122 uint8_t dstblend;
123 uint8_t blendeq;
124
125 bool separate_alpha_blend_enable;
126 uint8_t srcblend_alpha;
127 uint8_t dstblend_alpha;
128 uint8_t blendeq_alpha;
129 } rt[PIPE_MAX_COLOR_BUFS];
130
131 SVGA3dBlendStateId id; /**< vgpu10 */
132 };
133
134 struct svga_depth_stencil_state {
135 unsigned zfunc:8;
136 unsigned zenable:1;
137 unsigned zwriteenable:1;
138
139 unsigned alphatestenable:1;
140 unsigned alphafunc:8;
141
142 struct {
143 unsigned enabled:1;
144 unsigned func:8;
145 unsigned fail:8;
146 unsigned zfail:8;
147 unsigned pass:8;
148 } stencil[2];
149
150 /* SVGA3D has one ref/mask/writemask triple shared between front &
151 * back face stencil. We really need two:
152 */
153 unsigned stencil_mask:8;
154 unsigned stencil_writemask:8;
155
156 float alpharef;
157
158 SVGA3dDepthStencilStateId id; /**< vgpu10 */
159 };
160
161 #define SVGA_UNFILLED_DISABLE 0
162 #define SVGA_UNFILLED_LINE 1
163 #define SVGA_UNFILLED_POINT 2
164
165 #define SVGA_PIPELINE_FLAG_POINTS (1<<MESA_PRIM_POINTS)
166 #define SVGA_PIPELINE_FLAG_LINES (1<<MESA_PRIM_LINES)
167 #define SVGA_PIPELINE_FLAG_TRIS (1<<MESA_PRIM_TRIANGLES)
168
169 #define SVGA_MAX_FRAMEBUFFER_DEFAULT_SAMPLES 4
170
171 struct svga_rasterizer_state {
172 struct pipe_rasterizer_state templ; /* needed for draw module */
173
174 unsigned shademode:8;
175 unsigned cullmode:8;
176 unsigned scissortestenable:1;
177 unsigned multisampleantialias:1;
178 unsigned antialiasedlineenable:1;
179 unsigned lastpixel:1;
180 unsigned pointsprite:1;
181
182 unsigned linepattern;
183
184 float slopescaledepthbias;
185 float depthbias;
186 float pointsize;
187 float linewidth;
188
189 unsigned hw_fillmode:2; /* PIPE_POLYGON_MODE_x */
190
191 /** Which prims do we need help for? Bitmask of (1 << MESA_PRIM_x) flags */
192 unsigned need_pipeline:16;
193
194 SVGA3dRasterizerStateId id; /**< vgpu10 */
195
196 /* Alternate SVGA rasterizer state object with forcedSampleCount */
197 int altRastIds[SVGA_MAX_FRAMEBUFFER_DEFAULT_SAMPLES+1];
198
199 struct svga_rasterizer_state *no_cull_rasterizer;
200
201 /** For debugging: */
202 const char* need_pipeline_tris_str;
203 const char* need_pipeline_lines_str;
204 const char* need_pipeline_points_str;
205 };
206
207 struct svga_sampler_state {
208 unsigned mipfilter;
209 unsigned magfilter;
210 unsigned minfilter;
211 unsigned aniso_level;
212 float lod_bias;
213 unsigned addressu;
214 unsigned addressv;
215 unsigned addressw;
216 unsigned bordercolor;
217 unsigned normalized_coords:1;
218 unsigned compare_mode:1;
219 unsigned compare_func:3;
220
221 unsigned min_lod;
222 unsigned view_min_lod;
223 unsigned view_max_lod;
224
225 SVGA3dSamplerId id[2];
226 };
227
228
229 struct svga_pipe_sampler_view
230 {
231 struct pipe_sampler_view base;
232
233 SVGA3dShaderResourceViewId id;
234 };
235
236
237 static inline struct svga_pipe_sampler_view *
svga_pipe_sampler_view(struct pipe_sampler_view * v)238 svga_pipe_sampler_view(struct pipe_sampler_view *v)
239 {
240 return (struct svga_pipe_sampler_view *) v;
241 }
242
243
244 struct svga_velems_state {
245 unsigned count;
246 struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS];
247 SVGA3dDeclType decl_type[PIPE_MAX_ATTRIBS]; /**< vertex attrib formats */
248 uint16_t strides[PIPE_MAX_ATTRIBS];
249
250 /** Bitmasks indicating which attributes need format conversion */
251 unsigned adjust_attrib_range; /**< range adjustment */
252 unsigned attrib_is_pure_int; /**< pure int */
253 unsigned adjust_attrib_w_1; /**< set w = 1 */
254 unsigned adjust_attrib_itof; /**< int->float */
255 unsigned adjust_attrib_utof; /**< uint->float */
256 unsigned attrib_is_bgra; /**< R / B swizzling */
257 unsigned attrib_puint_to_snorm; /**< 10_10_10_2 packed uint -> snorm */
258 unsigned attrib_puint_to_uscaled; /**< 10_10_10_2 packed uint -> uscaled */
259 unsigned attrib_puint_to_sscaled; /**< 10_10_10_2 packed uint -> sscaled */
260
261 bool need_swvfetch;
262
263 SVGA3dElementLayoutId id; /**< VGPU10 */
264 };
265
266 struct svga_constant_buffer {
267 struct svga_winsys_surface *handle;
268 unsigned size;
269 };
270
271 struct svga_raw_buffer {
272 struct svga_winsys_surface *handle;
273 unsigned buffer_offset;
274 unsigned buffer_size;
275 struct pipe_resource *buffer;
276 int32 srvid;
277 };
278
279 /* Use to calculate differences between state emitted to hardware and
280 * current driver-calculated state.
281 */
282 struct svga_state
283 {
284 const struct svga_blend_state *blend;
285 const struct svga_depth_stencil_state *depth;
286 const struct svga_sampler_state *sampler[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
287 const struct svga_velems_state *velems;
288
289 struct svga_rasterizer_state *rast;
290 struct pipe_sampler_view *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS]; /* or texture ID's? */
291 struct svga_fragment_shader *fs;
292 struct svga_vertex_shader *vs;
293 struct svga_geometry_shader *user_gs; /* user-specified GS */
294 struct svga_geometry_shader *gs; /* derived GS */
295 /* derived tessellation control shader */
296 struct svga_tcs_shader *tcs;
297 /* derived tessellation evaluation shader */
298 struct svga_tes_shader *tes;
299 struct svga_compute_shader *cs;
300
301 struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
302 /** Constant buffers for each shader.
303 * The size should probably always match with that of
304 * svga_shader_emitter_v10.num_shader_consts.
305 */
306 struct pipe_constant_buffer constbufs[PIPE_SHADER_TYPES][SVGA_MAX_CONST_BUFS];
307 struct svga_raw_buffer rawbufs[PIPE_SHADER_TYPES][SVGA_MAX_RAW_BUFS];
308
309 struct pipe_framebuffer_state framebuffer;
310 float depthscale;
311
312 /* Hack to limit the number of different render targets between
313 * flushes. Helps avoid blowing out our surface cache in EXA.
314 */
315 int nr_fbs;
316
317 struct pipe_poly_stipple poly_stipple;
318 struct pipe_scissor_state scissor[SVGA3D_DX_MAX_VIEWPORTS];
319 struct pipe_blend_color blend_color;
320 struct pipe_stencil_ref stencil_ref;
321 struct pipe_clip_state clip;
322 struct pipe_viewport_state viewport[SVGA3D_DX_MAX_VIEWPORTS];
323
324 bool use_samplers[PIPE_SHADER_TYPES];
325 unsigned num_samplers[PIPE_SHADER_TYPES];
326 unsigned num_sampler_views[PIPE_SHADER_TYPES];
327 unsigned num_vertex_buffers;
328 enum mesa_prim reduced_prim;
329
330 unsigned vertex_id_bias;
331
332 struct {
333 unsigned flag_1d;
334 unsigned flag_srgb;
335 } tex_flags;
336
337 unsigned sample_mask;
338 unsigned vertices_per_patch;
339 float default_tesslevels[6]; /* tessellation (outer[4] + inner[2]) levels */
340
341 /* Image views */
342 unsigned num_image_views[PIPE_SHADER_TYPES];
343 struct svga_image_view image_views[PIPE_SHADER_TYPES][SVGA_MAX_IMAGES];
344
345 /* Shader buffers */
346 unsigned num_shader_buffers[PIPE_SHADER_TYPES];
347 struct svga_shader_buffer shader_buffers[PIPE_SHADER_TYPES][SVGA_MAX_SHADER_BUFFERS];
348
349 /* HW atomic buffers */
350 unsigned num_atomic_buffers;
351 struct svga_shader_buffer atomic_buffers[SVGA_MAX_SHADER_BUFFERS];
352
353 struct {
354 /* Determine the layout of the grid (in block units) to be used. */
355 unsigned size[3];
356 /* If DispatchIndirect is used, this will has grid size info*/
357 struct pipe_resource *indirect;
358 } grid_info;
359
360 };
361
362 struct svga_prescale {
363 float translate[4];
364 float scale[4];
365 bool enabled;
366 };
367
368 struct svga_depthrange {
369 float zmin;
370 float zmax;
371 };
372
373 /* Updated by calling svga_update_state( SVGA_STATE_HW_CLEAR )
374 */
375 struct svga_hw_clear_state
376 {
377 struct pipe_framebuffer_state framebuffer;
378
379 /* VGPU9 only */
380 SVGA3dRect viewport;
381 struct svga_depthrange depthrange;
382
383 /* VGPU10 state */
384 SVGA3dViewport viewports[SVGA3D_DX_MAX_VIEWPORTS];
385 struct svga_prescale prescale[SVGA3D_DX_MAX_VIEWPORTS];
386 struct pipe_scissor_state scissors[SVGA3D_DX_MAX_VIEWPORTS];
387 unsigned num_prescale;
388
389 unsigned num_rendertargets;
390 struct pipe_surface *rtv[SVGA3D_MAX_RENDER_TARGETS];
391 struct pipe_surface *dsv;
392 };
393
394 struct svga_hw_view_state
395 {
396 struct pipe_resource *texture;
397 struct svga_sampler_view *v;
398 unsigned min_lod;
399 unsigned max_lod;
400 bool dirty;
401 };
402
403 /* Updated by calling svga_update_state( SVGA_STATE_HW_DRAW )
404 */
405 struct svga_hw_draw_state
406 {
407 /** VGPU9 rasterization state */
408 unsigned rs[SVGA3D_RS_MAX];
409 /** VGPU9 texture sampler and bindings state */
410 unsigned ts[SVGA3D_PIXEL_SAMPLERREG_MAX][SVGA3D_TS_MAX];
411
412 /** VGPU9 texture views */
413 unsigned num_views;
414 unsigned num_backed_views; /* views with backing copy of texture */
415 struct svga_hw_view_state views[PIPE_MAX_SAMPLERS];
416
417 /** VGPU9 constant buffer values */
418 float cb[PIPE_SHADER_TYPES][SVGA3D_CONSTREG_MAX][4];
419
420 /** Currently bound shaders */
421 struct svga_shader_variant *fs;
422 struct svga_shader_variant *vs;
423 struct svga_shader_variant *gs;
424 struct svga_shader_variant *tcs;
425 struct svga_shader_variant *tes;
426 struct svga_shader_variant *cs;
427
428 /** Currently bound constant buffer, per shader stage */
429 struct pipe_resource *constbuf[PIPE_SHADER_TYPES][SVGA_MAX_CONST_BUFS];
430 struct svga_constant_buffer constbufoffsets[PIPE_SHADER_TYPES][SVGA_MAX_CONST_BUFS];
431 struct svga_raw_buffer rawbufs[PIPE_SHADER_TYPES][SVGA_MAX_RAW_BUFS];
432 uint64_t enabled_rawbufs[PIPE_SHADER_TYPES];
433
434 /** Bitmask of enabled constant buffers */
435 unsigned enabled_constbufs[PIPE_SHADER_TYPES];
436
437 /**
438 * These are used to reduce the number of times we call u_upload_unmap()
439 * while updating the zero-th/default VGPU10 constant buffer.
440 */
441 struct pipe_resource *const0_buffer;
442 struct svga_winsys_surface *const0_handle;
443
444 /** VGPU10 HW state (used to prevent emitting redundant state) */
445 SVGA3dDepthStencilStateId depth_stencil_id;
446 unsigned stencil_ref;
447 SVGA3dBlendStateId blend_id;
448 float blend_factor[4];
449 unsigned blend_sample_mask;
450 SVGA3dRasterizerStateId rasterizer_id;
451 SVGA3dElementLayoutId layout_id;
452 SVGA3dPrimitiveType topology;
453
454 /** Vertex buffer state */
455 SVGA3dVertexBuffer_v2 vbuffer_attrs[PIPE_MAX_ATTRIBS];
456 struct pipe_resource *vbuffers[PIPE_MAX_ATTRIBS];
457 unsigned num_vbuffers;
458
459 struct pipe_resource *ib; /**< index buffer for drawing */
460 SVGA3dSurfaceFormat ib_format;
461 unsigned ib_offset;
462
463 unsigned num_samplers[PIPE_SHADER_TYPES];
464 SVGA3dSamplerId samplers[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
465
466 unsigned num_sampler_views[PIPE_SHADER_TYPES];
467 struct pipe_sampler_view
468 *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
469
470 /* used for rebinding */
471 unsigned default_constbuf_size[PIPE_SHADER_TYPES];
472
473 bool rasterizer_discard; /* set if rasterization is disabled */
474 bool has_backed_views; /* set if any of the rtv/dsv is a backed surface view */
475
476 /* Image Views */
477 int uavSpliceIndex;
478 unsigned num_image_views[PIPE_SHADER_TYPES];
479 struct svga_image_view image_views[PIPE_SHADER_TYPES][SVGA_MAX_IMAGES];
480
481 /* Shader Buffers */
482 unsigned num_shader_buffers[PIPE_SHADER_TYPES];
483 struct svga_shader_buffer shader_buffers[PIPE_SHADER_TYPES][SVGA_MAX_SHADER_BUFFERS];
484 uint64_t enabled_raw_shaderbufs[PIPE_SHADER_TYPES];
485
486 /* HW Atomic Buffers */
487 unsigned num_atomic_buffers;
488 struct svga_shader_buffer atomic_buffers[SVGA_MAX_SHADER_BUFFERS];
489
490 /* UAV state */
491 unsigned num_uavs;
492 SVGA3dUAViewId uaViewIds[SVGA_MAX_UAVIEWS];
493 struct svga_winsys_surface *uaViews[SVGA_MAX_UAVIEWS];
494
495 /* Compute UAV state */
496 unsigned num_cs_uavs;
497 SVGA3dUAViewId csUAViewIds[SVGA_MAX_UAVIEWS];
498 struct svga_winsys_surface *csUAViews[SVGA_MAX_UAVIEWS];
499
500 /* starting uav index for each shader */
501 unsigned uav_start_index[PIPE_SHADER_TYPES];
502
503 /* starting uav index for HW atomic buffers */
504 unsigned uav_atomic_buf_index;
505 };
506
507
508 /* Updated by calling svga_update_state( SVGA_STATE_NEED_SWTNL )
509 */
510 struct svga_sw_state
511 {
512 /* which parts we need */
513 bool need_swvfetch;
514 bool need_pipeline;
515 bool need_swtnl;
516
517 /* Flag to make sure that need sw is on while
518 * updating state within a swtnl call.
519 */
520 bool in_swtnl_draw;
521 };
522
523
524 /* Queue some state updates (like rss) and submit them to hardware in
525 * a single packet.
526 */
527 struct svga_hw_queue;
528
529 struct svga_query;
530 struct svga_qmem_alloc_entry;
531
532 enum svga_uav_type
533 {
534 SVGA_IMAGE_VIEW = 0,
535 SVGA_SHADER_BUFFER
536 };
537
538 struct svga_uav
539 {
540 enum svga_uav_type type;
541 union {
542 struct svga_image_view image_view;
543 struct svga_shader_buffer shader_buffer;
544 } desc;
545 struct pipe_resource *resource;
546 unsigned next_uaView;
547 SVGA3dUAViewId uaViewId;
548 unsigned timestamp[2];
549 };
550
551 struct svga_cache_uav
552 {
553 unsigned num_uaViews;
554 unsigned next_uaView;
555 struct svga_uav uaViews[SVGA3D_DX11_1_MAX_UAVIEWS];
556 };
557
558 struct svga_context
559 {
560 struct pipe_context pipe;
561 struct svga_winsys_context *swc;
562 struct blitter_context *blitter;
563 struct u_upload_mgr *const0_upload;
564 struct u_upload_mgr *tex_upload;
565
566 struct {
567 bool no_swtnl;
568 bool force_swtnl;
569 bool use_min_mipmap;
570
571 /* incremented for each shader */
572 unsigned shader_id;
573
574 bool no_line_width;
575 bool force_hw_line_stipple;
576
577 /** To report perf/conformance/etc issues to the gallium frontend */
578 struct util_debug_callback callback;
579 } debug;
580
581 struct {
582 struct draw_context *draw;
583 struct vbuf_render *backend;
584 unsigned hw_prim;
585 bool new_vbuf;
586 bool new_vdecl;
587 } swtnl;
588
589 /* Bitmask of blend state objects IDs */
590 struct util_bitmask *blend_object_id_bm;
591
592 /* Bitmask of depth/stencil state objects IDs */
593 struct util_bitmask *ds_object_id_bm;
594
595 /* Bitmask of input element object IDs */
596 struct util_bitmask *input_element_object_id_bm;
597
598 /* Bitmask of rasterizer object IDs */
599 struct util_bitmask *rast_object_id_bm;
600
601 /* Bitmask of sampler state objects IDs */
602 struct util_bitmask *sampler_object_id_bm;
603
604 /* Bitmask of sampler view IDs */
605 struct util_bitmask *sampler_view_id_bm;
606
607 /* Bitmask of to-free sampler view IDs created for raw buffer srv */
608 struct util_bitmask *sampler_view_to_free_id_bm;
609
610 /* Bitmask of used shader IDs */
611 struct util_bitmask *shader_id_bm;
612
613 /* Bitmask of used surface view IDs */
614 struct util_bitmask *surface_view_id_bm;
615
616 /* Bitmask of used stream output IDs */
617 struct util_bitmask *stream_output_id_bm;
618
619 /* Bitmask of used query IDs */
620 struct util_bitmask *query_id_bm;
621
622 /* Bitmask of used uav IDs */
623 struct util_bitmask *uav_id_bm;
624
625 /* Bitmask of to-free uav IDs */
626 struct util_bitmask *uav_to_free_id_bm;
627
628 struct {
629 uint64_t dirty[SVGA_STATE_MAX];
630
631 /** bitmasks of which const buffers are changed */
632 unsigned dirty_constbufs[PIPE_SHADER_TYPES];
633
634 /** bitmasks of which const buffers to be bound as srv raw buffers */
635 unsigned raw_constbufs[PIPE_SHADER_TYPES];
636
637 /** bitmasks of which shader buffers to be bound as srv raw buffers */
638 uint64_t raw_shaderbufs[PIPE_SHADER_TYPES];
639
640 unsigned texture_timestamp;
641 unsigned uav_timestamp[2];
642
643 struct svga_sw_state sw;
644 struct svga_hw_draw_state hw_draw;
645 struct svga_hw_clear_state hw_clear;
646 } state;
647
648 struct svga_state curr; /* state from the gallium frontend */
649 uint64_t dirty; /* statechanges since last update_state() */
650
651 union {
652 struct {
653 unsigned rendertargets:1;
654 unsigned texture_samplers:1;
655 unsigned constbufs:1;
656 unsigned vs:1;
657 unsigned fs:1;
658 unsigned gs:1;
659 unsigned tcs:1;
660 unsigned tes:1;
661 unsigned cs:1;
662 unsigned query:1;
663 unsigned images:1;
664 unsigned shaderbufs:1;
665 unsigned atomicbufs:1;
666 unsigned uav:1;
667 unsigned indexbuf:1;
668 unsigned vertexbufs:1;
669 } flags;
670 unsigned val;
671 } rebind;
672
673 struct svga_hwtnl *hwtnl;
674
675 /** Queries states */
676 struct svga_winsys_gb_query *gb_query; /**< gb query object, one per context */
677 unsigned gb_query_len; /**< gb query object size */
678 struct util_bitmask *gb_query_alloc_mask; /**< gb query object allocation mask */
679 struct svga_qmem_alloc_entry *gb_query_map[SVGA_QUERY_MAX];
680 /**< query mem block mapping */
681 struct svga_query *sq[SVGA_QUERY_MAX+12]; /**< queries currently in progress */
682 /* The last 12 entries are for streamout
683 * queries for stream 0..3
684 */
685
686 /** List of buffers with queued transfers */
687 struct list_head dirty_buffers;
688
689 /** performance / info queries for HUD */
690 struct {
691 uint64_t num_draw_calls; /**< SVGA_QUERY_DRAW_CALLS */
692 uint64_t num_fallbacks; /**< SVGA_QUERY_NUM_FALLBACKS */
693 uint64_t num_flushes; /**< SVGA_QUERY_NUM_FLUSHES */
694 uint64_t num_validations; /**< SVGA_QUERY_NUM_VALIDATIONS */
695 uint64_t map_buffer_time; /**< SVGA_QUERY_MAP_BUFFER_TIME */
696 uint64_t num_buffers_mapped; /**< SVGA_QUERY_NUM_BUFFERS_MAPPED */
697 uint64_t num_textures_mapped; /**< SVGA_QUERY_NUM_TEXTURES_MAPPED */
698 uint64_t num_command_buffers; /**< SVGA_QUERY_NUM_COMMAND_BUFFERS */
699 uint64_t command_buffer_size; /**< SVGA_QUERY_COMMAND_BUFFER_SIZE */
700 uint64_t flush_time; /**< SVGA_QUERY_FLUSH_TIME */
701 uint64_t surface_write_flushes; /**< SVGA_QUERY_SURFACE_WRITE_FLUSHES */
702 uint64_t num_readbacks; /**< SVGA_QUERY_NUM_READBACKS */
703 uint64_t num_resource_updates; /**< SVGA_QUERY_NUM_RESOURCE_UPDATES */
704 uint64_t num_buffer_uploads; /**< SVGA_QUERY_NUM_BUFFER_UPLOADS */
705 uint64_t num_const_buf_updates; /**< SVGA_QUERY_NUM_CONST_BUF_UPDATES */
706 uint64_t num_const_updates; /**< SVGA_QUERY_NUM_CONST_UPDATES */
707 uint64_t num_shaders; /**< SVGA_QUERY_NUM_SHADERS */
708
709 /** The following are summed for SVGA_QUERY_NUM_STATE_OBJECTS */
710 uint64_t num_blend_objects;
711 uint64_t num_depthstencil_objects;
712 uint64_t num_rasterizer_objects;
713 uint64_t num_sampler_objects;
714 uint64_t num_samplerview_objects;
715 uint64_t num_vertexelement_objects;
716
717 uint64_t num_surface_views; /**< SVGA_QUERY_NUM_SURFACE_VIEWS */
718 uint64_t num_bytes_uploaded; /**< SVGA_QUERY_NUM_BYTES_UPLOADED */
719 uint64_t num_generate_mipmap; /**< SVGA_QUERY_NUM_GENERATE_MIPMAP */
720 uint64_t shader_mem_used; /**< SVGA_QUERY_SHADER_MEM_USED */
721
722 bool uses_time; /**< os_time_get() calls needed? */
723 } hud;
724
725 /** The currently bound stream output targets */
726 bool in_streamout; /* Set if streamout is active */
727 unsigned num_so_targets;
728 struct svga_winsys_surface *so_surfaces[SVGA3D_DX_MAX_SOTARGETS];
729 struct pipe_stream_output_target *so_targets[SVGA3D_DX_MAX_SOTARGETS];
730 struct svga_stream_output *current_so;
731
732 /**
733 * The following states are used in the workaround for auto draw with
734 * stream instancing.
735 */
736
737 /* Last bound SO targets that can be used to get vertex count */
738 struct pipe_stream_output_target *vcount_so_targets[SVGA3D_DX_MAX_SOTARGETS];
739 unsigned vcount_buffer_stream; /* SO buffer to stream index mask */
740 struct pipe_query *so_queries[4]; /* SO stat queries for each stream */
741
742 /** A blend state with blending disabled, for falling back to when blending
743 * is illegal (e.g. an integer texture is bound)
744 */
745 struct svga_blend_state *noop_blend;
746
747 struct {
748 struct pipe_resource *texture;
749 struct svga_pipe_sampler_view *sampler_view;
750 void *sampler;
751 } polygon_stipple;
752
753 /** Depth stencil state created to disable depth stencil test */
754 struct svga_depth_stencil_state *depthstencil_disable;
755
756 /** Current conditional rendering predicate */
757 struct {
758 SVGA3dQueryId query_id;
759 bool cond;
760 } pred;
761
762 bool render_condition;
763 bool disable_rasterizer; /* Set if to disable rasterization */
764 uint8_t patch_vertices;
765
766 struct {
767 struct svga_tcs_shader *passthrough_tcs;
768 struct svga_vertex_shader *vs;
769 struct svga_tes_shader *tes;
770 unsigned vertices_per_patch;
771 bool passthrough;
772 } tcs;
773
774 struct svga_cache_uav cache_uav;
775 struct pipe_resource *dummy_resource;
776 };
777
778 /* A flag for each frontend state object:
779 */
780 #define SVGA_NEW_BLEND ((uint64_t) 0x1)
781 #define SVGA_NEW_DEPTH_STENCIL_ALPHA ((uint64_t) 0x2)
782 #define SVGA_NEW_RAST ((uint64_t) 0x4)
783 #define SVGA_NEW_SAMPLER ((uint64_t) 0x8)
784 #define SVGA_NEW_TEXTURE ((uint64_t) 0x10)
785 #define SVGA_NEW_VBUFFER ((uint64_t) 0x20)
786 #define SVGA_NEW_VELEMENT ((uint64_t) 0x40)
787 #define SVGA_NEW_FS ((uint64_t) 0x80)
788 #define SVGA_NEW_VS ((uint64_t) 0x100)
789 #define SVGA_NEW_FS_CONST_BUFFER ((uint64_t) 0x200)
790 #define SVGA_NEW_VS_CONST_BUFFER ((uint64_t) 0x400)
791 #define SVGA_NEW_FRAME_BUFFER ((uint64_t) 0x800)
792 #define SVGA_NEW_STIPPLE ((uint64_t) 0x1000)
793 #define SVGA_NEW_SCISSOR ((uint64_t) 0x2000)
794 #define SVGA_NEW_BLEND_COLOR ((uint64_t) 0x4000)
795 #define SVGA_NEW_CLIP ((uint64_t) 0x8000)
796 #define SVGA_NEW_VIEWPORT ((uint64_t) 0x10000)
797 #define SVGA_NEW_PRESCALE ((uint64_t) 0x20000)
798 #define SVGA_NEW_REDUCED_PRIMITIVE ((uint64_t) 0x40000)
799 #define SVGA_NEW_TEXTURE_BINDING ((uint64_t) 0x80000)
800 #define SVGA_NEW_NEED_PIPELINE ((uint64_t) 0x100000)
801 #define SVGA_NEW_NEED_SWVFETCH ((uint64_t) 0x200000)
802 #define SVGA_NEW_NEED_SWTNL ((uint64_t) 0x400000)
803 #define SVGA_NEW_FS_VARIANT ((uint64_t) 0x800000)
804 #define SVGA_NEW_VS_VARIANT ((uint64_t) 0x1000000)
805 #define SVGA_NEW_TEXTURE_FLAGS ((uint64_t) 0x4000000)
806 #define SVGA_NEW_STENCIL_REF ((uint64_t) 0x8000000)
807 #define SVGA_NEW_GS ((uint64_t) 0x10000000)
808 #define SVGA_NEW_GS_CONST_BUFFER ((uint64_t) 0x20000000)
809 #define SVGA_NEW_GS_VARIANT ((uint64_t) 0x40000000)
810 #define SVGA_NEW_TEXTURE_CONSTS ((uint64_t) 0x80000000)
811 #define SVGA_NEW_TCS ((uint64_t) 0x100000000)
812 #define SVGA_NEW_TES ((uint64_t) 0x200000000)
813 #define SVGA_NEW_TCS_VARIANT ((uint64_t) 0x400000000)
814 #define SVGA_NEW_TES_VARIANT ((uint64_t) 0x800000000)
815 #define SVGA_NEW_TCS_CONST_BUFFER ((uint64_t) 0x1000000000)
816 #define SVGA_NEW_TES_CONST_BUFFER ((uint64_t) 0x2000000000)
817 #define SVGA_NEW_TCS_PARAM ((uint64_t) 0x4000000000)
818 #define SVGA_NEW_IMAGE_VIEW ((uint64_t) 0x8000000000)
819 #define SVGA_NEW_SHADER_BUFFER ((uint64_t) 0x10000000000)
820 #define SVGA_NEW_CS ((uint64_t) 0x20000000000)
821 #define SVGA_NEW_CS_VARIANT ((uint64_t) 0x40000000000)
822 #define SVGA_NEW_CS_CONST_BUFFER ((uint64_t) 0x80000000000)
823 #define SVGA_NEW_FS_CONSTS ((uint64_t) 0x100000000000)
824 #define SVGA_NEW_VS_CONSTS ((uint64_t) 0x200000000000)
825 #define SVGA_NEW_GS_CONSTS ((uint64_t) 0x400000000000)
826 #define SVGA_NEW_TCS_CONSTS ((uint64_t) 0x800000000000)
827 #define SVGA_NEW_TES_CONSTS ((uint64_t) 0x1000000000000)
828 #define SVGA_NEW_CS_CONSTS ((uint64_t) 0x2000000000000)
829 #define SVGA_NEW_FS_RAW_BUFFER ((uint64_t) 0x4000000000000)
830 #define SVGA_NEW_VS_RAW_BUFFER ((uint64_t) 0x8000000000000)
831 #define SVGA_NEW_GS_RAW_BUFFER ((uint64_t) 0x10000000000000)
832 #define SVGA_NEW_TCS_RAW_BUFFER ((uint64_t) 0x20000000000000)
833 #define SVGA_NEW_TES_RAW_BUFFER ((uint64_t) 0x40000000000000)
834 #define SVGA_NEW_CS_RAW_BUFFER ((uint64_t) 0x80000000000000)
835 #define SVGA_NEW_ALL ((uint64_t) 0xFFFFFFFFFFFFFFFF)
836
837 #define SVGA_NEW_CONST_BUFFER \
838 (SVGA_NEW_FS_CONST_BUFFER | SVGA_NEW_VS_CONST_BUFFER | \
839 SVGA_NEW_GS_CONST_BUFFER | SVGA_NEW_CS_CONST_BUFFER | \
840 SVGA_NEW_TCS_CONST_BUFFER | SVGA_NEW_TES_CONST_BUFFER)
841
842
843 /** Program pipelines */
844 enum svga_pipe_type
845 {
846 SVGA_PIPE_GRAPHICS = 0,
847 SVGA_PIPE_COMPUTE = 1
848 };
849
850 void svga_init_state_functions( struct svga_context *svga );
851 void svga_init_flush_functions( struct svga_context *svga );
852 void svga_init_string_functions( struct svga_context *svga );
853 void svga_init_blit_functions(struct svga_context *svga);
854
855 void svga_init_blend_functions( struct svga_context *svga );
856 void svga_init_depth_stencil_functions( struct svga_context *svga );
857 void svga_init_misc_functions( struct svga_context *svga );
858 void svga_init_rasterizer_functions( struct svga_context *svga );
859 void svga_init_sampler_functions( struct svga_context *svga );
860 void svga_init_cs_functions( struct svga_context *svga );
861 void svga_init_fs_functions( struct svga_context *svga );
862 void svga_init_vs_functions( struct svga_context *svga );
863 void svga_init_gs_functions( struct svga_context *svga );
864 void svga_init_ts_functions( struct svga_context *svga );
865 void svga_init_vertex_functions( struct svga_context *svga );
866 void svga_init_constbuffer_functions( struct svga_context *svga );
867 void svga_init_draw_functions( struct svga_context *svga );
868 void svga_init_query_functions( struct svga_context *svga );
869 void svga_init_surface_functions(struct svga_context *svga);
870 void svga_init_stream_output_functions( struct svga_context *svga );
871 void svga_init_clear_functions( struct svga_context *svga );
872 void svga_init_shader_image_functions( struct svga_context *svga );
873
874 void svga_cleanup_vertex_state( struct svga_context *svga );
875 void svga_cleanup_sampler_state( struct svga_context *svga );
876 void svga_cleanup_tss_binding( struct svga_context *svga );
877 void svga_cleanup_framebuffer( struct svga_context *svga );
878 void svga_cleanup_tcs_state( struct svga_context *svga );
879
880 void svga_context_flush( struct svga_context *svga,
881 struct pipe_fence_handle **pfence );
882
883 void svga_context_finish(struct svga_context *svga);
884
885 void svga_hwtnl_flush_retry( struct svga_context *svga );
886 void svga_hwtnl_flush_buffer( struct svga_context *svga,
887 struct pipe_resource *buffer );
888 bool svga_hwtnl_has_pending_prim(struct svga_hwtnl *);
889
890 void svga_surfaces_flush(struct svga_context *svga);
891
892 struct pipe_context *
893 svga_context_create(struct pipe_screen *screen,
894 void *priv, unsigned flags);
895
896 void svga_toggle_render_condition(struct svga_context *svga,
897 bool render_condition_enabled,
898 bool on);
899
900 int svga_define_rasterizer_object(struct svga_context *svga,
901 struct svga_rasterizer_state *,
902 unsigned samples);
903
904 enum pipe_error
905 svga_validate_sampler_resources(struct svga_context *svga,
906 enum svga_pipe_type);
907
908 enum pipe_error
909 svga_validate_constant_buffers(struct svga_context *svga,
910 enum svga_pipe_type);
911
912 enum pipe_error
913 svga_validate_image_views(struct svga_context *svga,
914 enum svga_pipe_type);
915
916 enum pipe_error
917 svga_validate_shader_buffers(struct svga_context *svga,
918 enum svga_pipe_type);
919
920 void
921 svga_destroy_rawbuf_srv(struct svga_context *svga);
922
923 void
924 svga_uav_cache_init(struct svga_context *svga);
925
926 void
927 svga_destroy_rawbuf_srv(struct svga_context *svga);
928
929
930 /***********************************************************************
931 * Inline conversion functions. These are better-typed than the
932 * macros used previously:
933 */
934 static inline struct svga_context *
svga_context(struct pipe_context * pipe)935 svga_context( struct pipe_context *pipe )
936 {
937 return (struct svga_context *)pipe;
938 }
939
940 static inline struct svga_winsys_screen *
svga_sws(struct svga_context * svga)941 svga_sws(struct svga_context *svga)
942 {
943 return svga_screen(svga->pipe.screen)->sws;
944 }
945
946 static inline bool
svga_have_gb_objects(const struct svga_context * svga)947 svga_have_gb_objects(const struct svga_context *svga)
948 {
949 return svga_screen(svga->pipe.screen)->sws->have_gb_objects;
950 }
951
952 static inline bool
svga_have_gb_dma(const struct svga_context * svga)953 svga_have_gb_dma(const struct svga_context *svga)
954 {
955 return svga_screen(svga->pipe.screen)->sws->have_gb_dma;
956 }
957
958 static inline bool
svga_have_vgpu10(const struct svga_context * svga)959 svga_have_vgpu10(const struct svga_context *svga)
960 {
961 return svga_screen(svga->pipe.screen)->sws->have_vgpu10;
962 }
963
964 static inline bool
svga_have_sm4_1(const struct svga_context * svga)965 svga_have_sm4_1(const struct svga_context *svga)
966 {
967 return svga_screen(svga->pipe.screen)->sws->have_sm4_1;
968 }
969
970 static inline bool
svga_have_sm5(const struct svga_context * svga)971 svga_have_sm5(const struct svga_context *svga)
972 {
973 return svga_screen(svga->pipe.screen)->sws->have_sm5;
974 }
975
976 static inline bool
svga_have_gl43(const struct svga_context * svga)977 svga_have_gl43(const struct svga_context *svga)
978 {
979 return svga_screen(svga->pipe.screen)->sws->have_gl43;
980 }
981
982 static inline bool
svga_need_to_rebind_resources(const struct svga_context * svga)983 svga_need_to_rebind_resources(const struct svga_context *svga)
984 {
985 return svga_screen(svga->pipe.screen)->sws->need_to_rebind_resources;
986 }
987
988 static inline bool
svga_rects_equal(const SVGA3dRect * r1,const SVGA3dRect * r2)989 svga_rects_equal(const SVGA3dRect *r1, const SVGA3dRect *r2)
990 {
991 return memcmp(r1, r2, sizeof(*r1)) == 0;
992 }
993
994
995 /* A helper function to return TRUE if sampler state mapping is
996 * to be used. Sampler state mapping is used in GL43 context
997 * if the number of sampler states exceeds the SVGA device limit or
998 * the sampler state mapping environment variable is set.
999 */
1000 static inline bool
svga_use_sampler_state_mapping(const struct svga_context * svga,unsigned num_sampler_states)1001 svga_use_sampler_state_mapping(const struct svga_context *svga,
1002 unsigned num_sampler_states)
1003 {
1004 return svga_have_gl43(svga) &&
1005 (svga_screen(svga->pipe.screen)->debug.sampler_state_mapping ||
1006 num_sampler_states > SVGA3D_DX_MAX_SAMPLERS);
1007 }
1008
1009
1010 static inline void
svga_set_curr_shader_use_samplers_flag(struct svga_context * svga,enum pipe_shader_type shader_type,bool use_samplers)1011 svga_set_curr_shader_use_samplers_flag(struct svga_context *svga,
1012 enum pipe_shader_type shader_type,
1013 bool use_samplers)
1014 {
1015 svga->curr.use_samplers[shader_type] = use_samplers;
1016 }
1017
1018
1019 static inline bool
svga_curr_shader_use_samplers(const struct svga_context * svga,enum pipe_shader_type shader_type)1020 svga_curr_shader_use_samplers(const struct svga_context *svga,
1021 enum pipe_shader_type shader_type)
1022 {
1023 return svga->curr.use_samplers[shader_type];
1024 }
1025
1026
1027 /**
1028 * If the Gallium HUD is enabled, this will return the current time.
1029 * Otherwise, just return zero.
1030 */
1031 static inline int64_t
svga_get_time(struct svga_context * svga)1032 svga_get_time(struct svga_context *svga)
1033 {
1034 return svga->hud.uses_time ? os_time_get() : 0;
1035 }
1036
1037 /*
1038 * The SVGA_TRY_XX family of macros can be used to optionally replace a
1039 * function call with an error value, the purpose is to trigger and test
1040 * retry path handling.
1041 */
1042 #if MESA_DEBUG
1043
1044 /*
1045 * Optionally replace a function call with a PIPE_ERROR_OUT_OF_MEMORY
1046 * return value
1047 */
1048 #define SVGA_TRY(_func) \
1049 ((SVGA_DEBUG & DEBUG_RETRY) ? PIPE_ERROR_OUT_OF_MEMORY : (_func))
1050
1051 /* Optionally replace a function call with a NULL return value */
1052 #define SVGA_TRY_PTR(_func) \
1053 ((SVGA_DEBUG & DEBUG_RETRY) ? NULL : (_func))
1054
1055 /*
1056 * Optionally replace a function call with a NULL return value, and set
1057 * the _retry parameter to TRUE.
1058 */
1059 #define SVGA_TRY_MAP(_func, _retry) \
1060 ((SVGA_DEBUG & DEBUG_RETRY) ? (_retry) = true, NULL : (_func))
1061 #else
1062
1063 #define SVGA_TRY(_func) (_func)
1064
1065 #define SVGA_TRY_PTR(_func) (_func)
1066
1067 #define SVGA_TRY_MAP(_func, _retry) (_func)
1068 #endif
1069
1070 /**
1071 * Enter retry processing after hitting out-of-command space
1072 */
1073 static inline void
svga_retry_enter(struct svga_context * svga)1074 svga_retry_enter(struct svga_context *svga)
1075 {
1076 /* We shouldn't nest retries, but currently we do. */
1077 if ((SVGA_DEBUG & DEBUG_RETRY) && svga->swc->in_retry) {
1078 debug_printf("WARNING: Recursive retry. Level: %u.\n",
1079 svga->swc->in_retry);
1080 }
1081 svga->swc->in_retry++;
1082 }
1083
1084 /**
1085 * Exit retry processing after hitting out-of-command space
1086 */
1087 static inline void
svga_retry_exit(struct svga_context * svga)1088 svga_retry_exit(struct svga_context *svga)
1089 {
1090 assert(svga->swc->in_retry > 0);
1091 svga->swc->in_retry--;
1092 }
1093
1094 /**
1095 * Perform a function call, and on failure flush the context and retry,
1096 * asserting that the retry succeeded. On return, the boolean argument
1097 * _retried indicates whether the function call was retried or not.
1098 */
1099 #define SVGA_RETRY_CHECK(_svga, _func, _retried) \
1100 do { \
1101 enum pipe_error ret; \
1102 \
1103 ret = SVGA_TRY(_func); \
1104 (_retried) = (ret != PIPE_OK); \
1105 if (_retried) { \
1106 svga_retry_enter(_svga); \
1107 svga_context_flush(_svga, NULL); \
1108 ret = (_func); \
1109 assert(ret == PIPE_OK); \
1110 svga_retry_exit(_svga); \
1111 } \
1112 } while(0)
1113
1114 /**
1115 * Perform a function call, and on failure flush the context and retry,
1116 * asserting that the retry succeeded.
1117 */
1118 #define SVGA_RETRY(_svga, _func) \
1119 do { \
1120 UNUSED bool retried; \
1121 \
1122 SVGA_RETRY_CHECK(_svga, _func, retried); \
1123 } while(0)
1124
1125 /**
1126 * Perform a function call, and on out-of-memory, flush the context and
1127 * retry. The retry return value is stored in _ret for reuse.
1128 */
1129 #define SVGA_RETRY_OOM(_svga, _ret, _func) \
1130 do { \
1131 (_ret) = SVGA_TRY(_func); \
1132 if ((_ret) == PIPE_ERROR_OUT_OF_MEMORY) { \
1133 svga_retry_enter(_svga); \
1134 svga_context_flush(_svga, NULL); \
1135 (_ret) = (_func); \
1136 svga_retry_exit(_svga); \
1137 } \
1138 } while (0);
1139
1140 #endif
1141