xref: /aosp_15_r20/external/intel-media-driver/media_driver/agnostic/gen11/hw/vdbox/mhw_vdbox_hcp_g11_X.cpp (revision ba62d9d3abf0e404f2022b4cd7a85e107f48596f)
1 /*
2 * Copyright (c) 2017-2018, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file     mhw_vdbox_hcp_g11_X.cpp
24 //! \brief    Constructs VdBox HCP commands on Gen11-based platforms
25 
26 #include "mhw_vdbox_hcp_g11_X.h"
27 #include "mhw_mi_hwcmd_g11_X.h"
28 #include "mhw_vdbox_vdenc_hwcmd_g11_X.h"
29 #include "mhw_vdbox_g11_X.h"
30 #include "mhw_mmio_g11.h"
31 
32 static uint16_t RDOQLamdas8bits[2][2][2][52] = //[Intra Slice/Inter Slice][Intra/Inter][Luma/Chroma][QP]
33 {
34     {
35         {
36             {   //Intra Luma
37                 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0001, 0x0001, 0x0001,
38                 0x0001, 0x0001, 0x0002, 0x0002, 0x0003, 0x0003, 0x0004, 0x0005,
39                 0x0007, 0x0008, 0x000a, 0x000d, 0x0011, 0x0015, 0x001a, 0x0021,
40                 0x002a, 0x0034, 0x0042, 0x0053, 0x0069, 0x0084, 0x00a6, 0x00d2,
41                 0x0108, 0x014d, 0x01a3, 0x0210, 0x029a, 0x0347, 0x0421, 0x0533,
42                 0x068d, 0x0841, 0x0a66, 0x0d1a, 0x1082, 0x14cd, 0x1a35, 0x2105,
43                 0x299a, 0x346a, 0x4209, 0x5333
44             },
45             {   //Intra Chroma
46                 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0001, 0x0001, 0x0001,
47                 0x0001, 0x0001, 0x0002, 0x0002, 0x0003, 0x0003, 0x0004, 0x0005,
48                 0x0007, 0x0008, 0x000a, 0x000d, 0x0011, 0x0015, 0x001a, 0x0021,
49                 0x002a, 0x0034, 0x0042, 0x0053, 0x0069, 0x0084, 0x00a6, 0x00d2,
50                 0x0108, 0x014d, 0x01a3, 0x0210, 0x029a, 0x0347, 0x0421, 0x0533,
51                 0x068d, 0x0841, 0x0a66, 0x0d1a, 0x1082, 0x14cd, 0x1a35, 0x2105,
52                 0x299a, 0x346a, 0x4209, 0x5333
53             },
54         },
55         {
56             {   //Inter Luma
57                 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 0x0002, 0x0002, 0x0003,
58                 0x0003, 0x0004, 0x0006, 0x0007, 0x0009, 0x000b, 0x000e, 0x0012,
59                 0x0016, 0x001c, 0x0023, 0x002c, 0x0038, 0x0046, 0x0059, 0x0075,
60                 0x009b, 0x00cc, 0x010c, 0x0160, 0x01cd, 0x025b, 0x0314, 0x0405,
61                 0x053d, 0x06d2, 0x08df, 0x0b2d, 0x0e14, 0x11bd, 0x165a, 0x1c29,
62                 0x237b, 0x2cb4, 0x3852, 0x46f5, 0x5967, 0x70a4, 0x8deb, 0xb2ce,
63                 0xe148, 0xffff, 0xffff, 0xffff
64             },
65             {   //Inter Chroma
66                 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 0x0002, 0x0002, 0x0003,
67                 0x0003, 0x0004, 0x0005, 0x0007, 0x0008, 0x000b, 0x000d, 0x0011,
68                 0x0015, 0x001b, 0x0021, 0x002a, 0x0035, 0x0043, 0x0054, 0x006c,
69                 0x008c, 0x00b4, 0x00e7, 0x0129, 0x017d, 0x01ea, 0x0275, 0x0327,
70                 0x040c, 0x0530, 0x06a7, 0x0862, 0x0a8f, 0x0d4e, 0x10c3, 0x151f,
71                 0x1a9c, 0x2187, 0x2a3d, 0x3538, 0x430d, 0x547b, 0x6a70, 0x861b,
72                 0xa8f6, 0xd4e0, 0xffff, 0xffff
73             },
74         },
75     },
76     {
77         {
78             {   //Intra Luma
79                 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 0x0002, 0x0002, 0x0003,
80                 0x0003, 0x0004, 0x0006, 0x0007, 0x0009, 0x000b, 0x000e, 0x0012,
81                 0x0016, 0x001c, 0x0023, 0x002c, 0x0038, 0x0046, 0x0059, 0x0075,
82                 0x009b, 0x00cc, 0x010c, 0x0160, 0x01cd, 0x025b, 0x0314, 0x0405,
83                 0x053d, 0x06d2, 0x08df, 0x0b2d, 0x0e14, 0x11bd, 0x165a, 0x1c29,
84                 0x237b, 0x2cb4, 0x3852, 0x46f5, 0x5967, 0x70a4, 0x8deb, 0xb2ce,
85                 0xe148, 0xffff, 0xffff, 0xffff
86             },
87             {   //Intra Chroma
88                 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 0x0002, 0x0002, 0x0003,
89                 0x0003, 0x0004, 0x0005, 0x0007, 0x0008, 0x000b, 0x000d, 0x0011,
90                 0x0015, 0x001b, 0x0021, 0x002a, 0x0035, 0x0043, 0x0054, 0x006c,
91                 0x008c, 0x00b4, 0x00e7, 0x0129, 0x017d, 0x01ea, 0x0275, 0x0327,
92                 0x040c, 0x0530, 0x06a7, 0x0862, 0x0a8f, 0x0d4e, 0x10c3, 0x151f,
93                 0x1a9c, 0x2187, 0x2a3d, 0x3538, 0x430d, 0x547b, 0x6a70, 0x861b,
94                 0xa8f6, 0xd4e0, 0xffff, 0xffff
95             },
96         },
97         {
98             {   //Inter Luma
99                 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 0x0002, 0x0002, 0x0003,
100                 0x0003, 0x0004, 0x0006, 0x0007, 0x0009, 0x000b, 0x000e, 0x0012,
101                 0x0016, 0x001c, 0x0023, 0x002c, 0x0038, 0x0046, 0x0059, 0x0075,
102                 0x009b, 0x00cc, 0x010c, 0x0160, 0x01cd, 0x025b, 0x0314, 0x0405,
103                 0x053d, 0x06d2, 0x08df, 0x0b2d, 0x0e14, 0x11bd, 0x165a, 0x1c29,
104                 0x237b, 0x2cb4, 0x3852, 0x46f5, 0x5967, 0x70a4, 0x8deb, 0xb2ce,
105                 0xe148, 0xffff, 0xffff, 0xffff
106             },
107             {   //Inter Chroma
108                 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 0x0002, 0x0002, 0x0003,
109                 0x0003, 0x0004, 0x0005, 0x0007, 0x0008, 0x000b, 0x000d, 0x0011,
110                 0x0015, 0x001b, 0x0021, 0x002a, 0x0035, 0x0043, 0x0054, 0x006c,
111                 0x008c, 0x00b4, 0x00e7, 0x0129, 0x017d, 0x01ea, 0x0275, 0x0327,
112                 0x040c, 0x0530, 0x06a7, 0x0862, 0x0a8f, 0x0d4e, 0x10c3, 0x151f,
113                 0x1a9c, 0x2187, 0x2a3d, 0x3538, 0x430d, 0x547b, 0x6a70, 0x861b,
114                 0xa8f6, 0xd4e0, 0xffff, 0xffff
115             },
116         },
117     }
118 };
119 
120 static uint16_t RDOQLamdas10bits[2][2][2][64] = //[Intra Slice/Inter Slice][Intra/Inter][Luma/Chroma][QP]
121 {
122     {
123         {
124             {   //Intra Luma
125                 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
126                 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
127                 0x0000, 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 0x0002, 0x0002,
128                 0x0003, 0x0003, 0x0004, 0x0005, 0x0007, 0x0008, 0x000a, 0x000d,
129                 0x0011, 0x0015, 0x001a, 0x0021, 0x002a, 0x0034, 0x0042, 0x0053,
130                 0x0069, 0x0084, 0x00a6, 0x00d2, 0x0108, 0x014d, 0x01a3, 0x0210,
131                 0x029a, 0x0347, 0x0421, 0x0533, 0x068d, 0x0841, 0x0a66, 0x0d1a,
132                 0x1082, 0x14cd, 0x1a35, 0x2105, 0x299a, 0x346a, 0x4209, 0x5333
133             },
134             {   //Intra Chroma
135                 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
136                 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
137                 0x0000, 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 0x0002, 0x0002,
138                 0x0003, 0x0003, 0x0004, 0x0005, 0x0007, 0x0008, 0x000a, 0x000d,
139                 0x0011, 0x0015, 0x001a, 0x0021, 0x002a, 0x0034, 0x0042, 0x0053,
140                 0x0069, 0x0084, 0x00a6, 0x00d2, 0x0108, 0x014d, 0x01a3, 0x0210,
141                 0x029a, 0x0347, 0x0421, 0x0533, 0x068d, 0x0841, 0x0a66, 0x0d1a,
142                 0x1082, 0x14cd, 0x1a35, 0x2105, 0x299a, 0x346a, 0x4209, 0x5333
143             },
144         },
145         {
146             {   //Inter Luma
147                 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
148                 0x0000, 0x0000, 0x0000, 0x0000, 0x0001, 0x0001, 0x0001, 0x0001,
149                 0x0001, 0x0002, 0x0002, 0x0003, 0x0003, 0x0004, 0x0006, 0x0007,
150                 0x0009, 0x000b, 0x000e, 0x0012, 0x0016, 0x001c, 0x0023, 0x002c,
151                 0x0038, 0x0046, 0x0059, 0x0075, 0x009b, 0x00cc, 0x010c, 0x0160,
152                 0x01cd, 0x025b, 0x0314, 0x0405, 0x053d, 0x06d2, 0x08df, 0x0b2d,
153                 0x0e14, 0x11bd, 0x165a, 0x1c29, 0x237b, 0x2cb4, 0x3852, 0x46f5,
154                 0x5967, 0x70a4, 0x8deb, 0xb2ce, 0xe148, 0xffff, 0xffff, 0xffff
155             },
156             {   //Inter Chroma
157                 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
158                 0x0000, 0x0000, 0x0000, 0x0000, 0x0001, 0x0001, 0x0001, 0x0001,
159                 0x0001, 0x0002, 0x0002, 0x0003, 0x0003, 0x0004, 0x0005, 0x0007,
160                 0x0008, 0x000b, 0x000d, 0x0011, 0x0015, 0x001b, 0x0021, 0x002a,
161                 0x0035, 0x0043, 0x0054, 0x006c, 0x008c, 0x00b4, 0x00e7, 0x0129,
162                 0x017d, 0x01ea, 0x0275, 0x0327, 0x040c, 0x0530, 0x06a7, 0x0862,
163                 0x0a8f, 0x0d4e, 0x10c3, 0x151f, 0x1a9c, 0x2187, 0x2a3d, 0x3538,
164                 0x430d, 0x547b, 0x6a70, 0x861b, 0xa8f6, 0xd4e0, 0xffff, 0xffff
165             },
166         },
167     },
168     {
169         {
170             {   //Intra Luma
171                 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
172                 0x0000, 0x0000, 0x0000, 0x0000, 0x0001, 0x0001, 0x0001, 0x0001,
173                 0x0001, 0x0002, 0x0002, 0x0003, 0x0003, 0x0004, 0x0006, 0x0007,
174                 0x0009, 0x000b, 0x000e, 0x0012, 0x0016, 0x001c, 0x0023, 0x002c,
175                 0x0038, 0x0046, 0x0059, 0x0075, 0x009b, 0x00cc, 0x010c, 0x0160,
176                 0x01cd, 0x025b, 0x0314, 0x0405, 0x053d, 0x06d2, 0x08df, 0x0b2d,
177                 0x0e14, 0x11bd, 0x165a, 0x1c29, 0x237b, 0x2cb4, 0x3852, 0x46f5,
178                 0x5967, 0x70a4, 0x8deb, 0xb2ce, 0xe148, 0xffff, 0xffff, 0xffff
179             },
180             {   //Intra Chroma
181                 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
182                 0x0000, 0x0000, 0x0000, 0x0000, 0x0001, 0x0001, 0x0001, 0x0001,
183                 0x0001, 0x0002, 0x0002, 0x0003, 0x0003, 0x0004, 0x0005, 0x0007,
184                 0x0008, 0x000b, 0x000d, 0x0011, 0x0015, 0x001b, 0x0021, 0x002a,
185                 0x0035, 0x0043, 0x0054, 0x006c, 0x008c, 0x00b4, 0x00e7, 0x0129,
186                 0x017d, 0x01ea, 0x0275, 0x0327, 0x040c, 0x0530, 0x06a7, 0x0862,
187                 0x0a8f, 0x0d4e, 0x10c3, 0x151f, 0x1a9c, 0x2187, 0x2a3d, 0x3538,
188                 0x430d, 0x547b, 0x6a70, 0x861b, 0xa8f6, 0xd4e0, 0xffff, 0xffff
189             },
190         },
191         {
192             {   //Inter Luma
193                 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
194                 0x0000, 0x0000, 0x0000, 0x0000, 0x0001, 0x0001, 0x0001, 0x0001,
195                 0x0001, 0x0002, 0x0002, 0x0003, 0x0003, 0x0004, 0x0006, 0x0007,
196                 0x0009, 0x000b, 0x000e, 0x0012, 0x0016, 0x001c, 0x0023, 0x002c,
197                 0x0038, 0x0046, 0x0059, 0x0075, 0x009b, 0x00cc, 0x010c, 0x0160,
198                 0x01cd, 0x025b, 0x0314, 0x0405, 0x053d, 0x06d2, 0x08df, 0x0b2d,
199                 0x0e14, 0x11bd, 0x165a, 0x1c29, 0x237b, 0x2cb4, 0x3852, 0x46f5,
200                 0x5967, 0x70a4, 0x8deb, 0xb2ce, 0xe148, 0xffff, 0xffff, 0xffff
201             },
202             {   //Inter Chroma
203                 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
204                 0x0000, 0x0000, 0x0000, 0x0000, 0x0001, 0x0001, 0x0001, 0x0001,
205                 0x0001, 0x0002, 0x0002, 0x0003, 0x0003, 0x0004, 0x0005, 0x0007,
206                 0x0008, 0x000b, 0x000d, 0x0011, 0x0015, 0x001b, 0x0021, 0x002a,
207                 0x0035, 0x0043, 0x0054, 0x006c, 0x008c, 0x00b4, 0x00e7, 0x0129,
208                 0x017d, 0x01ea, 0x0275, 0x0327, 0x040c, 0x0530, 0x06a7, 0x0862,
209                 0x0a8f, 0x0d4e, 0x10c3, 0x151f, 0x1a9c, 0x2187, 0x2a3d, 0x3538,
210                 0x430d, 0x547b, 0x6a70, 0x861b, 0xa8f6, 0xd4e0, 0xffff, 0xffff
211             },
212         },
213     }
214 };
215 
InitMmioRegisters()216 void MhwVdboxHcpInterfaceG11::InitMmioRegisters()
217 {
218     MmioRegistersHcp *mmioRegisters = &m_mmioRegisters[MHW_VDBOX_NODE_1];
219 
220     mmioRegisters->watchdogCountCtrlOffset                           = WATCHDOG_COUNT_CTRL_OFFSET_INIT_G11;
221     mmioRegisters->watchdogCountThresholdOffset                      = WATCHDOG_COUNT_THRESTHOLD_OFFSET_INIT_G11;
222     mmioRegisters->hcpDebugFEStreamOutSizeRegOffset                  = HCP_DEBUG_FE_STREAM_OUT_SIZE_REG_OFFSET_INIT_G11;
223     mmioRegisters->hcpEncImageStatusMaskRegOffset                    = HCP_ENC_IMAGE_STATUS_MASK_REG_OFFSET_INIT_G11;
224     mmioRegisters->hcpEncImageStatusCtrlRegOffset                    = HCP_ENC_IMAGE_STATUS_CTRL_REG_OFFSET_INIT_G11;
225     mmioRegisters->hcpEncBitstreamBytecountFrameRegOffset            = HCP_ENC_BIT_STREAM_BYTE_COUNT_FRAME_REG_OFFSET_INIT_G11;
226     mmioRegisters->hcpEncBitstreamSeBitcountFrameRegOffset           = HCP_ENC_BIT_STREAM_SE_BIT_COUNT_FRAME_REG_OFFSET_INIT_G11;
227     mmioRegisters->hcpEncBitstreamBytecountFrameNoHeaderRegOffset    = HCP_ENC_BIT_STREAM_BYTE_COUNT_FRAME_NO_HEADER_REG_OFFSET_INIT_G11;
228     mmioRegisters->hcpEncQpStatusCountRegOffset                      = HCP_ENC_QP_STATUS_COUNT_REG_OFFSET_INIT_G11;
229     mmioRegisters->hcpEncSliceCountRegOffset                         = HCP_ENC_SLICE_COUNT_REG_OFFSET_INIT_G11;
230     mmioRegisters->hcpEncVdencModeTimerRegOffset                     = HCP_ENC_VDENC_MODE_TIMER_REG_OFFSET_INIT_G11;
231     mmioRegisters->hcpVp9EncBitstreamBytecountFrameRegOffset         = HCP_VP9_ENC_BITSTREAM_BYTE_COUNT_FRAME_REG_OFFSET_INIT_G11;
232     mmioRegisters->hcpVp9EncBitstreamBytecountFrameNoHeaderRegOffset = HCP_VP9_ENC_BITSTREAM_BYTE_COUNT_FRAME_NO_HEADER_REG_OFFSET_INIT_G11;
233     mmioRegisters->hcpVp9EncImageStatusMaskRegOffset                 = HCP_VP9_ENC_IMAGE_STATUS_MASK_REG_OFFSET_INIT_G11;
234     mmioRegisters->hcpVp9EncImageStatusCtrlRegOffset                 = HCP_VP9_ENC_IMAGE_STATUS_CTRL_REG_OFFSET_INIT_G11;
235     mmioRegisters->csEngineIdOffset                                  = CS_ENGINE_ID_OFFSET_INIT_G11;
236     mmioRegisters->hcpDecStatusRegOffset                             = HCP_DEC_STATUS_REG_OFFSET_INIT_G11;
237     mmioRegisters->hcpCabacStatusRegOffset                           = HCP_CABAC_STATUS_REG_OFFSET_INIT_G11;
238 
239     m_mmioRegisters[MHW_VDBOX_NODE_2] = m_mmioRegisters[MHW_VDBOX_NODE_1];
240 }
241 
InitRowstoreUserFeatureSettings()242 void MhwVdboxHcpInterfaceG11::InitRowstoreUserFeatureSettings()
243 {
244     MOS_USER_FEATURE_VALUE_DATA userFeatureData;
245     MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData));
246 
247     if (m_osInterface->bSimIsActive)
248     {
249         // Disable RowStore Cache on simulation by default
250         userFeatureData.u32Data = 1;
251     }
252     else
253     {
254         userFeatureData.u32Data = 0;
255     }
256 
257     userFeatureData.i32DataFlag = MOS_USER_FEATURE_VALUE_DATA_FLAG_CUSTOM_DEFAULT_VALUE_TYPE;
258 #if (_DEBUG || _RELEASE_INTERNAL)
259     MOS_UserFeature_ReadValue_ID(
260         nullptr,
261         __MEDIA_USER_FEATURE_VALUE_ROWSTORE_CACHE_DISABLE_ID,
262         &userFeatureData,
263         m_osInterface->pOsContext);
264 #endif // _DEBUG || _RELEASE_INTERNAL
265     m_rowstoreCachingSupported = userFeatureData.i32Data ? false : true;
266 
267     if (m_rowstoreCachingSupported)
268     {
269         MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData));
270 #if (_DEBUG || _RELEASE_INTERNAL)
271         MOS_UserFeature_ReadValue_ID(
272             nullptr,
273             __MEDIA_USER_FEATURE_VALUE_HEVCDATROWSTORECACHE_DISABLE_ID,
274             &userFeatureData,
275             m_osInterface->pOsContext);
276 #endif // _DEBUG || _RELEASE_INTERNAL
277         m_hevcDatRowStoreCache.bSupported = userFeatureData.i32Data ? false : true;
278 
279         MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData));
280 #if (_DEBUG || _RELEASE_INTERNAL)
281         MOS_UserFeature_ReadValue_ID(
282             nullptr,
283             __MEDIA_USER_FEATURE_VALUE_HEVCDFROWSTORECACHE_DISABLE_ID,
284             &userFeatureData,
285             m_osInterface->pOsContext);
286 #endif // _DEBUG || _RELEASE_INTERNAL
287         m_hevcDfRowStoreCache.bSupported = userFeatureData.i32Data ? false : true;
288 
289         MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData));
290 #if (_DEBUG || _RELEASE_INTERNAL)
291         MOS_UserFeature_ReadValue_ID(
292             nullptr,
293             __MEDIA_USER_FEATURE_VALUE_HEVCSAOROWSTORECACHE_DISABLE_ID,
294             &userFeatureData,
295             m_osInterface->pOsContext);
296 #endif // _DEBUG || _RELEASE_INTERNAL
297         m_hevcSaoRowStoreCache.bSupported = userFeatureData.i32Data ? false : true;
298 
299         MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData));
300 #if (_DEBUG || _RELEASE_INTERNAL)
301         MOS_UserFeature_ReadValue_ID(
302             nullptr,
303             __MEDIA_USER_FEATURE_VALUE_VP9_HVDROWSTORECACHE_DISABLE_ID,
304             &userFeatureData,
305             m_osInterface->pOsContext);
306 #endif // _DEBUG || _RELEASE_INTERNAL
307         m_vp9HvdRowStoreCache.bSupported = userFeatureData.i32Data ? false : true;
308 
309         MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData));
310 #if (_DEBUG || _RELEASE_INTERNAL)
311         MOS_UserFeature_ReadValue_ID(
312             nullptr,
313             __MEDIA_USER_FEATURE_VALUE_VP9_DATROWSTORECACHE_DISABLE_ID,
314             &userFeatureData,
315             m_osInterface->pOsContext);
316 #endif // _DEBUG || _RELEASE_INTERNAL
317         m_vp9DatRowStoreCache.bSupported = userFeatureData.i32Data ? false : true;
318 
319         MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData));
320 #if (_DEBUG || _RELEASE_INTERNAL)
321         MOS_UserFeature_ReadValue_ID(
322             nullptr,
323             __MEDIA_USER_FEATURE_VALUE_VP9_DFROWSTORECACHE_DISABLE_ID,
324             &userFeatureData,
325             m_osInterface->pOsContext);
326 #endif // _DEBUG || _RELEASE_INTERNAL
327         m_vp9DfRowStoreCache.bSupported = userFeatureData.i32Data ? false : true;
328     }
329 }
330 
GetRowstoreCachingAddrs(PMHW_VDBOX_ROWSTORE_PARAMS rowstoreParams)331 MOS_STATUS MhwVdboxHcpInterfaceG11::GetRowstoreCachingAddrs(
332     PMHW_VDBOX_ROWSTORE_PARAMS rowstoreParams)
333 {
334     MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
335 
336     MHW_FUNCTION_ENTER;
337 
338     MHW_MI_CHK_NULL(rowstoreParams);
339 
340     if (rowstoreParams->Mode == CODECHAL_DECODE_MODE_HEVCVLD || rowstoreParams->Mode == CODECHAL_ENCODE_MODE_HEVC)
341     {
342         if (rowstoreParams->dwPicWidth <= MHW_VDBOX_PICWIDTH_1920)
343         {
344             if (rowstoreParams->ucBitDepthMinus8 > 0)
345             {
346                 if (rowstoreParams->ucChromaFormat == HCP_CHROMA_FORMAT_YUV444)
347                 {
348                     if (m_hevcDatRowStoreCache.bSupported)
349                     {
350                         m_hevcDatRowStoreCache.bEnabled = true;
351                         m_hevcDatRowStoreCache.dwAddress = 0;
352                     }
353 
354                     if (m_hevcDfRowStoreCache.bSupported)
355                     {
356                         m_hevcDfRowStoreCache.bEnabled = false;
357                         m_hevcDfRowStoreCache.dwAddress = 0;
358                     }
359 
360                     if (m_hevcSaoRowStoreCache.bSupported)
361                     {
362                         m_hevcSaoRowStoreCache.bEnabled = true;
363                         m_hevcSaoRowStoreCache.dwAddress = HEVCSAOROWSTORE_BASEADDRESS_444_10BIT_PICWIDTH_LESS_THAN_OR_EQU_TO_1920;
364                     }
365                 }
366                 else
367                 {
368                     if (m_hevcDatRowStoreCache.bSupported)
369                     {
370                         m_hevcDatRowStoreCache.bEnabled = true;
371                         m_hevcDatRowStoreCache.dwAddress = 0;
372                     }
373 
374                     if (m_hevcDfRowStoreCache.bSupported)
375                     {
376                         m_hevcDfRowStoreCache.bEnabled = true;
377                         m_hevcDfRowStoreCache.dwAddress = HEVCDFROWSTORE_BASEADDRESS_NON444_PICWIDTH_LESS_THAN_OR_EQU_TO_1920;
378                     }
379 
380                     if (m_hevcSaoRowStoreCache.bSupported)
381                     {
382                         m_hevcSaoRowStoreCache.bEnabled = false;
383                         m_hevcSaoRowStoreCache.dwAddress = 0;
384                     }
385                 }
386             }
387             else //8bit
388             {
389                 if (rowstoreParams->ucChromaFormat == HCP_CHROMA_FORMAT_YUV444)
390                 {
391                     if (m_hevcDatRowStoreCache.bSupported)
392                     {
393                         m_hevcDatRowStoreCache.bEnabled = false;
394                         m_hevcDatRowStoreCache.dwAddress = 0;
395                     }
396 
397                     if (m_hevcDfRowStoreCache.bSupported)
398                     {
399                         m_hevcDfRowStoreCache.bEnabled = true;
400                         m_hevcDfRowStoreCache.dwAddress = 0;
401                     }
402 
403                     if (m_hevcSaoRowStoreCache.bSupported)
404                     {
405                         m_hevcSaoRowStoreCache.bEnabled = true;
406                         m_hevcSaoRowStoreCache.dwAddress = HEVCSAOROWSTORE_BASEADDRESS_8BIT_PICWIDTH_LESS_THAN_OR_EQU_TO_1920;
407                     }
408                 }
409                 else
410                 {
411                     if (m_hevcDatRowStoreCache.bSupported)
412                     {
413                         m_hevcDatRowStoreCache.bEnabled = true;
414                         m_hevcDatRowStoreCache.dwAddress = 0;
415                     }
416 
417                     if (m_hevcDfRowStoreCache.bSupported)
418                     {
419                         m_hevcDfRowStoreCache.bEnabled = true;
420                         m_hevcDfRowStoreCache.dwAddress = HEVCDFROWSTORE_BASEADDRESS_NON444_PICWIDTH_LESS_THAN_OR_EQU_TO_1920;
421                     }
422 
423                     if (m_hevcSaoRowStoreCache.bSupported)
424                     {
425                         m_hevcSaoRowStoreCache.bEnabled = true;
426                         m_hevcSaoRowStoreCache.dwAddress = HEVCSAOROWSTORE_BASEADDRESS_8BIT_PICWIDTH_LESS_THAN_OR_EQU_TO_1920;
427                     }
428                 }
429             }
430         }
431         else if (rowstoreParams->dwPicWidth > MHW_VDBOX_PICWIDTH_1920 && rowstoreParams->dwPicWidth <= MHW_VDBOX_PICWIDTH_3840)
432         {
433             if (m_hevcDatRowStoreCache.bSupported)
434             {
435                 m_hevcDatRowStoreCache.bEnabled = false;
436                 m_hevcDatRowStoreCache.dwAddress = 0;
437             }
438 
439             if (m_hevcDfRowStoreCache.bSupported)
440             {
441                 m_hevcDfRowStoreCache.bEnabled = false;
442                 m_hevcDfRowStoreCache.dwAddress = 0;
443             }
444 
445             if (m_hevcSaoRowStoreCache.bSupported)
446             {
447                 m_hevcSaoRowStoreCache.bEnabled = true;
448                 m_hevcSaoRowStoreCache.dwAddress = 0;
449             }
450         }
451         else
452         {
453             m_hevcDatRowStoreCache.bEnabled = false;
454             m_hevcDfRowStoreCache.bEnabled = false;
455             m_hevcSaoRowStoreCache.bEnabled = false;
456         }
457     }
458 
459     if (rowstoreParams->Mode == CODECHAL_DECODE_MODE_VP9VLD || rowstoreParams->Mode == CODECHAL_ENCODE_MODE_VP9)
460     {
461         if (m_vp9HvdRowStoreCache.bSupported)
462         {
463             m_vp9HvdRowStoreCache.bEnabled = true;
464             m_vp9HvdRowStoreCache.dwAddress = 0;
465         }
466 
467         bool vp9420b8LessThan1920Flag = false;
468         if (rowstoreParams->ucChromaFormat == HCP_CHROMA_FORMAT_YUV420)
469         {
470             if (rowstoreParams->ucBitDepthMinus8 == 0)
471             {
472                 if (rowstoreParams->dwPicWidth <= MHW_VDBOX_PICWIDTH_1920)
473                 {
474                     vp9420b8LessThan1920Flag = true;
475                     if (m_vp9DatRowStoreCache.bSupported)
476                     {
477                         m_vp9DatRowStoreCache.bEnabled = false;
478                         m_vp9DatRowStoreCache.dwAddress = 0;
479                     }
480 
481                     if (m_vp9DfRowStoreCache.bSupported)
482                     {
483                         m_vp9DfRowStoreCache.bEnabled = true;
484                         m_vp9DfRowStoreCache.dwAddress = VP9DFROWSTORE_BASEADDRESS_PICWIDTH_LESS_THAN_OR_EQU_TO_1920;
485                     }
486                 }
487             }
488         }
489 
490         if (vp9420b8LessThan1920Flag == false)
491         {
492             if (m_vp9DatRowStoreCache.bSupported)
493             {
494                 m_vp9DatRowStoreCache.bEnabled = true;
495                 m_vp9DatRowStoreCache.dwAddress = (rowstoreParams->dwPicWidth <= MHW_VDBOX_PICWIDTH_1920) ? VP9DATROWSTORE_BASEADDRESS_PICWIDTH_LESS_THAN_OR_EQU_TO_1920 : VP9DATROWSTORE_BASEADDRESS_PICWIDTH_BETWEEN_1920_AND_3840;
496             }
497 
498             if (m_vp9DfRowStoreCache.bSupported)
499             {
500                 m_vp9DfRowStoreCache.bEnabled = false;
501                 m_vp9DfRowStoreCache.dwAddress = 0;
502             }
503         }
504 
505         if (rowstoreParams->dwPicWidth > MHW_VDBOX_PICWIDTH_3840)
506         {
507             m_vp9HvdRowStoreCache.bEnabled = false;
508             m_vp9HvdRowStoreCache.dwAddress = 0;
509             m_vp9DatRowStoreCache.bEnabled = false;
510             m_vp9DatRowStoreCache.dwAddress = 0;
511             m_vp9DfRowStoreCache.bEnabled = false;
512             m_vp9DfRowStoreCache.dwAddress = 0;
513         }
514     }
515 
516     return eStatus;
517 }
518 
GetHcpStateCommandSize(uint32_t mode,uint32_t * commandsSize,uint32_t * patchListSize,PMHW_VDBOX_STATE_CMDSIZE_PARAMS params)519 MOS_STATUS MhwVdboxHcpInterfaceG11::GetHcpStateCommandSize(
520     uint32_t                        mode,
521     uint32_t                        *commandsSize,
522     uint32_t                        *patchListSize,
523     PMHW_VDBOX_STATE_CMDSIZE_PARAMS params)
524 {
525     MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
526 
527     MHW_FUNCTION_ENTER;
528 
529     uint32_t            maxSize = 0;
530     uint32_t            patchListMaxSize = 0;
531     uint32_t            standard = CodecHal_GetStandardFromMode(mode);
532 
533     MHW_CHK_NULL_RETURN(params);
534     auto paramsG11 = dynamic_cast<PMHW_VDBOX_STATE_CMDSIZE_PARAMS_G11>(params);
535     MHW_CHK_NULL_RETURN(paramsG11);
536 
537     if (standard == CODECHAL_HEVC)
538     {
539         maxSize =
540             mhw_vdbox_vdenc_g11_X::VD_PIPELINE_FLUSH_CMD::byteSize +
541             mhw_mi_g11_X::MI_FLUSH_DW_CMD::byteSize +
542             mhw_vdbox_hcp_g11_X::HCP_PIPE_MODE_SELECT_CMD::byteSize +
543             mhw_vdbox_hcp_g11_X::HCP_SURFACE_STATE_CMD::byteSize +
544             mhw_vdbox_hcp_g11_X::HCP_PIPE_BUF_ADDR_STATE_CMD::byteSize +
545             mhw_vdbox_hcp_g11_X::HCP_IND_OBJ_BASE_ADDR_STATE_CMD::byteSize +
546             mhw_mi_g11_X::MI_LOAD_REGISTER_REG_CMD::byteSize * 8;
547 
548         patchListMaxSize =
549             PATCH_LIST_COMMAND(VD_PIPELINE_FLUSH_CMD) +
550             PATCH_LIST_COMMAND(MI_FLUSH_DW_CMD) +
551             PATCH_LIST_COMMAND(HCP_PIPE_MODE_SELECT_CMD) +
552             PATCH_LIST_COMMAND(HCP_SURFACE_STATE_CMD) +
553             PATCH_LIST_COMMAND(HCP_PIPE_BUF_ADDR_STATE_CMD) +
554             PATCH_LIST_COMMAND(HCP_IND_OBJ_BASE_ADDR_STATE_CMD);
555 
556         if (mode == CODECHAL_ENCODE_MODE_HEVC)
557         {
558             /* HCP_QM_STATE_CMD may be issued up to 20 times: 3x Colour Component plus 2x intra/inter plus 4x SizeID minus 4 for the 32x32 chroma components.
559             HCP_FQP_STATE_CMD may be issued up to 8 times: 4 scaling list per intra and inter. */
560             maxSize +=
561                 mhw_vdbox_hcp_g11_X::HCP_SURFACE_STATE_CMD::byteSize + // encoder needs two surface state commands. One is for raw and another one is for recon surfaces.
562                 20 * mhw_vdbox_hcp_g11_X::HCP_QM_STATE_CMD::byteSize +
563                 8 * mhw_vdbox_hcp_g11_X::HCP_FQM_STATE_CMD::byteSize +
564                 mhw_vdbox_hcp_g11_X::HCP_PIC_STATE_CMD::byteSize +
565                 mhw_vdbox_hcp_g11_X::HEVC_VP9_RDOQ_STATE_CMD::byteSize + // RDOQ
566                 2 * mhw_mi_g11_X::MI_STORE_DATA_IMM_CMD::byteSize + // Slice level commands
567                 2 * mhw_mi_g11_X::MI_FLUSH_DW_CMD::byteSize + // need for Status report, Mfc Status and
568                 10 * mhw_mi_g11_X::MI_STORE_REGISTER_MEM_CMD::byteSize + // 8 for BRCStatistics and 2 for RC6 WAs
569                 mhw_mi_g11_X::MI_LOAD_REGISTER_MEM_CMD::byteSize + // 1 for RC6 WA
570                 2 * mhw_vdbox_hcp_g11_X::HCP_PAK_INSERT_OBJECT_CMD::byteSize + // Two PAK insert object commands are for headers before the slice header and the header for the end of stream
571                 4 * mhw_mi_g11_X::MI_STORE_DATA_IMM_CMD::byteSize +    // two (BRC+reference frame) for clean-up HW semaphore memory and another two for signal it
572                 17 * mhw_mi_g11_X::MI_SEMAPHORE_WAIT_CMD::byteSize +// Use HW wait command for each reference and one wait for current semaphore object
573                 mhw_mi_g11_X::MI_SEMAPHORE_WAIT_CMD::byteSize +     // Use HW wait command for each BRC pass
574                 + mhw_mi_g11_X::MI_SEMAPHORE_WAIT_CMD::byteSize    // Use HW wait command for each VDBOX
575                 + 2 * mhw_mi_g11_X::MI_STORE_DATA_IMM_CMD::byteSize  // One is for reset and another one for set per VDBOX
576                 + 8 * mhw_mi_g11_X::MI_COPY_MEM_MEM_CMD::byteSize // Need to copy SSE statistics/ Slice Size overflow into memory
577                 ;
578 
579             patchListMaxSize +=
580                 20 * PATCH_LIST_COMMAND(HCP_QM_STATE_CMD) +
581                 8 * PATCH_LIST_COMMAND(HCP_FQM_STATE_CMD) +
582                 PATCH_LIST_COMMAND(HCP_PIC_STATE_CMD) +
583                 PATCH_LIST_COMMAND(MI_BATCH_BUFFER_START_CMD) + // When BRC is on, HCP_PIC_STATE_CMD command is in the BB
584                 2 * PATCH_LIST_COMMAND(MI_STORE_DATA_IMM_CMD) + // Slice level commands
585                 2 * PATCH_LIST_COMMAND(MI_FLUSH_DW_CMD) +       // need for Status report, Mfc Status and
586                 11 * PATCH_LIST_COMMAND(MI_STORE_REGISTER_MEM_CMD) + // 8 for BRCStatistics and 3 for RC6 WAs
587                 22 * PATCH_LIST_COMMAND(MI_STORE_DATA_IMM_CMD)      // Use HW wait commands plus its memory clean-up and signal (4+ 16 + 1 + 1)
588                 + 8 * PATCH_LIST_COMMAND(MI_BATCH_BUFFER_START_CMD) // At maximal, there are 8 batch buffers for 8 VDBOXes for VE. Each box has one BB.
589                 + PATCH_LIST_COMMAND(MI_FLUSH_DW_CMD)               // Need one flush before copy command
590                 + PATCH_LIST_COMMAND(MFX_WAIT_CMD)                  // Need one wait after copy command
591                 + 3 * PATCH_LIST_COMMAND(MI_STORE_DATA_IMM_CMD)     // one wait commands and two for reset and set semaphore memory
592                 + 8 * PATCH_LIST_COMMAND(MI_COPY_MEM_MEM_CMD)       // Need to copy SSE statistics/ Slice Size overflow into memory
593                 ;
594         }
595         else
596         {
597             maxSize +=
598                 20 * mhw_vdbox_hcp_g11_X::HCP_QM_STATE_CMD::byteSize +
599                 mhw_vdbox_hcp_g11_X::HCP_PIC_STATE_CMD::byteSize +
600                 mhw_vdbox_hcp_g11_X::HCP_TILE_STATE_CMD::byteSize +
601                 mhw_vdbox_hcp_g11_X::HCP_TILE_CODING_CMD::byteSize;
602 
603             patchListMaxSize +=
604                 20 * PATCH_LIST_COMMAND(HCP_QM_STATE_CMD) +
605                 PATCH_LIST_COMMAND(HCP_PIC_STATE_CMD) +
606                 PATCH_LIST_COMMAND(HCP_TILE_STATE_CMD) +
607                 PATCH_LIST_COMMAND(HCP_TILE_CODING_COMMAND);
608 
609             if (paramsG11->bScalableMode)
610             {
611                 // Due to the fact that there is no slice level command in BE status, we mainly consider commands in FE.
612                 maxSize +=
613                     4 * mhw_mi_g11_X::MI_ATOMIC_CMD::byteSize +                       // used to reset semaphore in BEs
614                     2 * mhw_mi_g11_X::MI_CONDITIONAL_BATCH_BUFFER_END_CMD::byteSize + // 1 Conditional BB END for FE hang, 1 for streamout buffer writing over allocated size
615                     3 * mhw_mi_g11_X::MI_SEMAPHORE_WAIT_CMD::byteSize +             // for FE & BE0, BEs sync
616                     15 * mhw_mi_g11_X::MI_STORE_DATA_IMM_CMD::byteSize +              // for placeholder cmds to resolve the hazard between BEs sync
617                     3 * mhw_mi_g11_X::MI_STORE_DATA_IMM_CMD::byteSize +               // for FE status set and clear
618                     3 * mhw_mi_g11_X::MI_LOAD_REGISTER_IMM_CMD::byteSize +            // for FE status set
619                     2 * mhw_mi_g11_X::MI_FLUSH_DW_CMD::byteSize +                     // 2 needed for command flush in slice level
620                     2 * mhw_mi_g11_X::MI_STORE_REGISTER_MEM_CMD::byteSize +           // store the carry flag of reported size in FE
621                     4 * sizeof(MHW_MI_ALU_PARAMS) +                                    // 4 ALU commands needed for substract opertaion in FE
622                     mhw_mi_g11_X::MI_MATH_CMD::byteSize +                             // 1 needed for FE status set
623                     mhw_mi_g11_X::MI_LOAD_REGISTER_REG_CMD::byteSize;                 // 1 needed for FE status set
624                 mhw_mi_g11_X::MI_MATH_CMD::byteSize +                             // 1 needed for FE status set
625                     mhw_mi_g11_X::MI_LOAD_REGISTER_REG_CMD::byteSize;                // 1 needed for FE status set
626 
627                 patchListMaxSize +=
628                     4 * PATCH_LIST_COMMAND(MI_ATOMIC_CMD) +
629                     2 * PATCH_LIST_COMMAND(MI_CONDITIONAL_BATCH_BUFFER_END_CMD) +
630                     3 * PATCH_LIST_COMMAND(MI_SEMAPHORE_WAIT_CMD) +
631                     3 * PATCH_LIST_COMMAND(MI_STORE_DATA_IMM_CMD) +
632                     2 * PATCH_LIST_COMMAND(MI_FLUSH_DW_CMD) +
633                     2 * PATCH_LIST_COMMAND(MI_STORE_REGISTER_MEM_CMD);
634             }
635         }
636     }
637     else if (standard == CODECHAL_VP9)     // VP9 Clear Decode
638     {
639         maxSize =
640             mhw_vdbox_vdenc_g11_X::VD_PIPELINE_FLUSH_CMD::byteSize +
641             mhw_mi_g11_X::MI_FLUSH_DW_CMD::byteSize +
642             mhw_vdbox_hcp_g11_X::HCP_PIPE_MODE_SELECT_CMD::byteSize +
643             mhw_vdbox_hcp_g11_X::HCP_SURFACE_STATE_CMD::byteSize * 4 +
644             mhw_vdbox_hcp_g11_X::HCP_PIPE_BUF_ADDR_STATE_CMD::byteSize +
645             mhw_vdbox_hcp_g11_X::HCP_IND_OBJ_BASE_ADDR_STATE_CMD::byteSize +
646             mhw_vdbox_hcp_g11_X::HCP_VP9_SEGMENT_STATE_CMD::byteSize * 8 +
647             mhw_vdbox_hcp_g11_X::HCP_BSD_OBJECT_CMD::byteSize +
648             mhw_mi_g11_X::MI_LOAD_REGISTER_REG_CMD::byteSize * 8;
649 
650         patchListMaxSize =
651             PATCH_LIST_COMMAND(VD_PIPELINE_FLUSH_CMD) +
652             PATCH_LIST_COMMAND(MI_FLUSH_DW_CMD) +
653             PATCH_LIST_COMMAND(HCP_PIPE_MODE_SELECT_CMD) +
654             PATCH_LIST_COMMAND(HCP_SURFACE_STATE_CMD) * 4 +
655             PATCH_LIST_COMMAND(HCP_PIPE_BUF_ADDR_STATE_CMD) +
656             PATCH_LIST_COMMAND(HCP_IND_OBJ_BASE_ADDR_STATE_CMD) +
657             PATCH_LIST_COMMAND(HCP_VP9_SEGMENT_STATE_CMD) * 8 +
658             PATCH_LIST_COMMAND(HCP_BSD_OBJECT_CMD);
659 
660         if (mode == CODECHAL_ENCODE_MODE_VP9)
661         {
662             maxSize +=
663                 mhw_vdbox_hcp_g11_X::HCP_VP9_PIC_STATE_CMD::byteSize +
664                 mhw_mi_g11_X::MI_FLUSH_DW_CMD::byteSize * 2 +
665                 mhw_mi_g11_X::MI_STORE_DATA_IMM_CMD::byteSize * 4 +
666                 mhw_mi_g11_X::MI_STORE_REGISTER_MEM_CMD::byteSize * 11 +
667                 mhw_mi_g11_X::MI_COPY_MEM_MEM_CMD::byteSize * 4 +
668                 mhw_mi_g11_X::MI_BATCH_BUFFER_START_CMD::byteSize * 3 +
669                 mhw_mi_g11_X::MI_STORE_DATA_IMM_CMD::byteSize * 2 +   // Slice level commands
670                 mhw_mi_g11_X::MI_LOAD_REGISTER_MEM_CMD::byteSize * 2 +
671                 mhw_vdbox_hcp_g11_X::HCP_PAK_INSERT_OBJECT_CMD::byteSize * 2 +
672                 mhw_vdbox_hcp_g11_X::HCP_TILE_CODING_CMD::byteSize +
673                 mhw_mi_g11_X::MI_BATCH_BUFFER_START_CMD::byteSize +
674                 mhw_mi_g11_X::MI_SEMAPHORE_WAIT_CMD::byteSize * 3 + // Use HW wait command for each pass(3) level barrier and after huc probability update
675                 mhw_mi_g11_X::MI_SEMAPHORE_WAIT_CMD::byteSize +     // Use HW wait command before pak integration kernel
676                 mhw_mi_g11_X::MI_STORE_DATA_IMM_CMD::byteSize * 50; // One is for reset and another one for set per VDBOX, 15 for semaphore wait in pass(3) level barrier
677 
678 
679             patchListMaxSize +=
680                 PATCH_LIST_COMMAND(HCP_VP9_PIC_STATE_CMD) +
681                 PATCH_LIST_COMMAND(MI_FLUSH_DW_CMD) * 2 +
682                 PATCH_LIST_COMMAND(MI_STORE_DATA_IMM_CMD) * 4 +
683                 PATCH_LIST_COMMAND(MI_STORE_REGISTER_MEM_CMD) * 11 +
684                 PATCH_LIST_COMMAND(MI_COPY_MEM_MEM_CMD) * 4 +
685                 PATCH_LIST_COMMAND(MI_BATCH_BUFFER_START_CMD) * 3 +
686                 PATCH_LIST_COMMAND(MI_STORE_DATA_IMM_CMD) * 2 +
687                 PATCH_LIST_COMMAND(HCP_PAK_INSERT_OBJECT_CMD) * 2 +
688                 PATCH_LIST_COMMAND(HCP_TILE_CODING_COMMAND) +
689                 PATCH_LIST_COMMAND(MI_BATCH_BUFFER_START_CMD) +
690                 PATCH_LIST_COMMAND(MI_STORE_DATA_IMM_CMD) * 50;
691         }
692         else
693         {
694             maxSize += mhw_vdbox_hcp_g11_X::HCP_VP9_PIC_STATE_CMD::byteSize;
695 
696             patchListMaxSize += PATCH_LIST_COMMAND(HCP_VP9_PIC_STATE_CMD);
697 
698             if (paramsG11->bScalableMode)
699             {
700                 maxSize +=
701                     mhw_vdbox_hcp_g11_X::HCP_TILE_CODING_CMD::byteSize +
702                     mhw_mi_g11_X::MI_ATOMIC_CMD::byteSize * 4 +   // used to reset semaphore in BEs
703                     mhw_mi_g11_X::MI_CONDITIONAL_BATCH_BUFFER_END_CMD::byteSize +   // for streamout buffer writing over allocated size
704                     mhw_mi_g11_X::MI_SEMAPHORE_WAIT_CMD::byteSize * 3 +   // for FE & BE0, BEs sync
705                     mhw_mi_g11_X::MI_STORE_DATA_IMM_CMD::byteSize * 15 +   // for placeholder cmds to resolve the hazard between BEs sync
706                     mhw_mi_g11_X::MI_STORE_DATA_IMM_CMD::byteSize +   // for FE status set
707                     mhw_mi_g11_X::MI_LOAD_REGISTER_IMM_CMD::byteSize * 3 +   // for FE status set
708                     mhw_mi_g11_X::MI_FLUSH_DW_CMD::byteSize +   // for command flush in partition level
709                     mhw_mi_g11_X::MI_STORE_REGISTER_MEM_CMD::byteSize * 2 +   // store the carry flag of reported size in FE
710                     4 * sizeof(MHW_MI_ALU_PARAMS) +                                    // 4 ALU commands needed for substract opertaion in FE
711                     mhw_mi_g11_X::MI_MATH_CMD::byteSize +                             // 1 needed for FE status set
712                     mhw_mi_g11_X::MI_LOAD_REGISTER_REG_CMD::byteSize;                 // 1 needed for FE status set
713                 mhw_mi_g11_X::MI_MATH_CMD::byteSize +   // 1 needed for FE status set
714                     mhw_mi_g11_X::MI_LOAD_REGISTER_REG_CMD::byteSize;          // 1 needed for FE status set
715 
716                 patchListMaxSize +=
717                     PATCH_LIST_COMMAND(HCP_TILE_CODING_COMMAND) +
718                     PATCH_LIST_COMMAND(MI_ATOMIC_CMD) * 4 +
719                     PATCH_LIST_COMMAND(MI_CONDITIONAL_BATCH_BUFFER_END_CMD) +
720                     PATCH_LIST_COMMAND(MI_SEMAPHORE_WAIT_CMD) * 3 +
721                     PATCH_LIST_COMMAND(MI_STORE_DATA_IMM_CMD) +
722                     PATCH_LIST_COMMAND(MI_FLUSH_DW_CMD) +
723                     PATCH_LIST_COMMAND(MI_STORE_REGISTER_MEM_CMD) * 2;
724             }
725         }
726     }
727     else
728     {
729         MHW_ASSERTMESSAGE("Unsupported standard.");
730         eStatus = MOS_STATUS_UNKNOWN;
731     }
732 
733     *commandsSize = maxSize;
734     *patchListSize = patchListMaxSize;
735 
736     return eStatus;
737 }
738 
GetHcpPrimitiveCommandSize(uint32_t mode,uint32_t * commandsSize,uint32_t * patchListSize,bool modeSpecific)739 MOS_STATUS MhwVdboxHcpInterfaceG11::GetHcpPrimitiveCommandSize(
740     uint32_t                        mode,
741     uint32_t                        *commandsSize,
742     uint32_t                        *patchListSize,
743     bool                            modeSpecific)
744 {
745     MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
746 
747     MHW_FUNCTION_ENTER;
748 
749     uint32_t            standard = CodecHal_GetStandardFromMode(mode);
750     uint32_t            maxSize = 0;
751     uint32_t            patchListMaxSize = 0;
752 
753     if (standard == CODECHAL_HEVC)
754     {
755         if (mode == CODECHAL_ENCODE_MODE_HEVC)
756         {
757             maxSize =
758                 2 * mhw_vdbox_hcp_g11_X::HCP_REF_IDX_STATE_CMD::byteSize +
759                 2 * mhw_vdbox_hcp_g11_X::HCP_WEIGHTOFFSET_STATE_CMD::byteSize +
760                 mhw_vdbox_hcp_g11_X::HCP_SLICE_STATE_CMD::byteSize +
761                 mhw_vdbox_hcp_g11_X::HCP_PAK_INSERT_OBJECT_CMD::byteSize +
762                 2 * mhw_mi_g11_X::MI_BATCH_BUFFER_START_CMD::byteSize +
763                 mhw_vdbox_hcp_g11_X::HCP_TILE_CODING_CMD::byteSize; // one slice cannot be with more than one tile
764 
765             patchListMaxSize =
766                 2 * PATCH_LIST_COMMAND(HCP_REF_IDX_STATE_CMD) +
767                 2 * PATCH_LIST_COMMAND(HCP_WEIGHTOFFSET_STATE_CMD) +
768                 PATCH_LIST_COMMAND(HCP_SLICE_STATE_CMD) +
769                 PATCH_LIST_COMMAND(HCP_PAK_INSERT_OBJECT_CMD) +
770                 2 * PATCH_LIST_COMMAND(MI_BATCH_BUFFER_START_CMD) + // One is for the PAK command and another one is for the BB when BRC and single task mode are on
771                 PATCH_LIST_COMMAND(HCP_TILE_CODING_COMMAND); // HCP_TILE_CODING_STATE command
772         }
773         else
774         {
775             maxSize =
776                 2 * mhw_vdbox_hcp_g11_X::HCP_REF_IDX_STATE_CMD::byteSize +
777                 2 * mhw_vdbox_hcp_g11_X::HCP_WEIGHTOFFSET_STATE_CMD::byteSize +
778                 mhw_vdbox_hcp_g11_X::HCP_SLICE_STATE_CMD::byteSize +
779                 mhw_vdbox_hcp_g11_X::HCP_BSD_OBJECT_CMD::byteSize +
780                 mhw_mi_g11_X::MI_BATCH_BUFFER_END_CMD::byteSize;
781 
782             patchListMaxSize =
783                 2 * PATCH_LIST_COMMAND(HCP_REF_IDX_STATE_CMD) +
784                 2 * PATCH_LIST_COMMAND(HCP_WEIGHTOFFSET_STATE_CMD) +
785                 PATCH_LIST_COMMAND(HCP_SLICE_STATE_CMD) +
786                 PATCH_LIST_COMMAND(HCP_BSD_OBJECT_CMD);
787         }
788     }
789     else if (standard == CODECHAL_VP9)      // VP9 Clear decode does not require primitive level commands. VP9 DRM does.
790     {
791         if (modeSpecific)                  // VP9 DRM
792         {
793             maxSize +=
794                 mhw_vdbox_hcp_g11_X::HCP_VP9_SEGMENT_STATE_CMD::byteSize * 8 +
795                 mhw_vdbox_hcp_g11_X::HCP_VP9_PIC_STATE_CMD::byteSize +
796                 mhw_vdbox_hcp_g11_X::HCP_BSD_OBJECT_CMD::byteSize +
797                 mhw_mi_g11_X::MI_BATCH_BUFFER_END_CMD::byteSize;
798 
799             patchListMaxSize =
800                 PATCH_LIST_COMMAND(HCP_VP9_SEGMENT_STATE_CMD) * 8 +
801                 PATCH_LIST_COMMAND(HCP_VP9_PIC_STATE_CMD) +
802                 PATCH_LIST_COMMAND(HCP_BSD_OBJECT_CMD);
803         }
804     }
805     else
806     {
807         MHW_ASSERTMESSAGE("Unsupported standard.");
808         eStatus = MOS_STATUS_UNKNOWN;
809     }
810 
811     *commandsSize = maxSize;
812     *patchListSize = patchListMaxSize;
813 
814     return eStatus;
815 }
816 
GetHevcBufferSize(MHW_VDBOX_HCP_INTERNAL_BUFFER_TYPE bufferType,PMHW_VDBOX_HCP_BUFFER_SIZE_PARAMS hcpBufSizeParam)817 MOS_STATUS MhwVdboxHcpInterfaceG11::GetHevcBufferSize(
818     MHW_VDBOX_HCP_INTERNAL_BUFFER_TYPE  bufferType,
819     PMHW_VDBOX_HCP_BUFFER_SIZE_PARAMS   hcpBufSizeParam)
820 {
821     MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
822 
823     MHW_FUNCTION_ENTER;
824 
825     MHW_MI_CHK_NULL(hcpBufSizeParam);
826 
827     uint8_t bitDepthMultFactor = 0;
828     uint32_t bufferSize = 0;
829     double  dbFormatMultFactor = 0;
830 
831     uint8_t maxBitDepth = hcpBufSizeParam->ucMaxBitDepth;
832     uint32_t ctbLog2SizeY = hcpBufSizeParam->dwCtbLog2SizeY;
833     uint32_t picWidth = hcpBufSizeParam->dwPicWidth;
834     uint32_t picHeight = hcpBufSizeParam->dwPicHeight;
835     uint32_t maxFrameSize = hcpBufSizeParam->dwMaxFrameSize;
836     uint32_t rowStoreSzLCU = 0;
837     uint32_t colStoreSzLCU = 0;
838 
839     uint32_t widthInCtb = (picWidth % 16) ? (picWidth / 16 + 1) : (picWidth / 16); //using smallest LCU to get max width
840     uint32_t heightInCtb = (picHeight % 16) ? (picHeight / 16 + 1) : (picHeight / 16);
841     uint32_t numBaseUnitsInLCU = 1 << (ctbLog2SizeY - 2);//size in number of 4x4 in the LCU per column
842     HCP_CHROMA_FORMAT_IDC chromaFormat = (HCP_CHROMA_FORMAT_IDC)hcpBufSizeParam->ucChromaFormat;
843 
844     uint32_t mvtSize = 0;
845     uint32_t mvtbSize = 0;
846 
847     switch (bufferType)
848     {
849     case MHW_VDBOX_HCP_INTERNAL_BUFFER_DBLK_LINE:
850     case MHW_VDBOX_HCP_INTERNAL_BUFFER_DBLK_TILE_LINE:
851         dbFormatMultFactor = (chromaFormat == HCP_CHROMA_FORMAT_YUV444) ? 1.5 : 1;
852         bitDepthMultFactor = (maxBitDepth > 8) ? 2 : 1;
853         rowStoreSzLCU = (uint32_t)(((2 * numBaseUnitsInLCU * dbFormatMultFactor * 128 * bitDepthMultFactor) + 511) / 512);
854         bufferSize = rowStoreSzLCU * MHW_CACHELINE_SIZE * widthInCtb;
855         break;
856     case MHW_VDBOX_HCP_INTERNAL_BUFFER_DBLK_TILE_COL:
857         dbFormatMultFactor = (chromaFormat == HCP_CHROMA_FORMAT_YUV420) ? 1 : 1.5;
858         bitDepthMultFactor = (maxBitDepth > 8) ? 2 : 1;
859         colStoreSzLCU = (uint32_t)(((2 * numBaseUnitsInLCU * dbFormatMultFactor * 128 * bitDepthMultFactor + 3 * 128 * bitDepthMultFactor) + 511) / 512);
860         bufferSize = colStoreSzLCU * MHW_CACHELINE_SIZE * heightInCtb;
861         break;
862     case MHW_VDBOX_HCP_INTERNAL_BUFFER_MV_UP_RT_COL:
863         colStoreSzLCU = (ctbLog2SizeY == 6) ? 2 : 1;
864         bufferSize = colStoreSzLCU * MHW_CACHELINE_SIZE * heightInCtb;
865         break;
866     case MHW_VDBOX_HCP_INTERNAL_BUFFER_META_LINE:
867     case MHW_VDBOX_HCP_INTERNAL_BUFFER_META_TILE_LINE:
868         rowStoreSzLCU = (ctbLog2SizeY == 6) ? 2 : 1;
869         bufferSize = rowStoreSzLCU * MHW_CACHELINE_SIZE * widthInCtb;
870         break;
871     case MHW_VDBOX_HCP_INTERNAL_BUFFER_META_TILE_COL:
872         colStoreSzLCU = (ctbLog2SizeY == 6) ? 2 : 1;
873         bufferSize = colStoreSzLCU * MHW_CACHELINE_SIZE * heightInCtb;
874         break;
875     case MHW_VDBOX_HCP_INTERNAL_BUFFER_INTRA_PRED_UP_RIGHT_COL:
876     case MHW_VDBOX_HCP_INTERNAL_BUFFER_INTRA_PRED_LFT_RECON_COL:
877     {
878         uint32_t colStoreSizeLCU[2][3]; //[bitdepth 8/10][LCU 16/32/64]
879         if (chromaFormat == HCP_CHROMA_FORMAT_YUV422 || chromaFormat == HCP_CHROMA_FORMAT_YUV444)
880         {
881             colStoreSizeLCU[0][0] = 1; colStoreSizeLCU[0][1] = 2; colStoreSizeLCU[0][2] = 3;
882             colStoreSizeLCU[1][0] = 2; colStoreSizeLCU[1][1] = 3; colStoreSizeLCU[1][2] = 6;
883         }
884         else
885         {
886             colStoreSizeLCU[0][0] = 1; colStoreSizeLCU[0][1] = 1; colStoreSizeLCU[0][2] = 2;
887             colStoreSizeLCU[1][0] = 1; colStoreSizeLCU[1][1] = 2; colStoreSizeLCU[1][2] = 4;
888         }
889         colStoreSzLCU = colStoreSizeLCU[(maxBitDepth == 8) ? 0 : 1][ctbLog2SizeY - 4];
890         bufferSize = colStoreSzLCU * MHW_CACHELINE_SIZE * heightInCtb;
891         break;
892     }
893     case MHW_VDBOX_HCP_INTERNAL_BUFFER_SAO_LINE:
894     case MHW_VDBOX_HCP_INTERNAL_BUFFER_SAO_TILE_LINE:
895     {
896         uint32_t uiRowStoreSizeLCU[2][3];//[bitdepth 8/10][LCU 16/32/64]
897         if (chromaFormat == HCP_CHROMA_FORMAT_YUV420 || chromaFormat == HCP_CHROMA_FORMAT_YUV422)
898         {
899             uiRowStoreSizeLCU[0][0] = 2; uiRowStoreSizeLCU[0][1] = 3; uiRowStoreSizeLCU[0][2] = 5;
900             uiRowStoreSizeLCU[1][0] = 2; uiRowStoreSizeLCU[1][1] = 3; uiRowStoreSizeLCU[1][2] = 5;
901         }
902         else
903         {
904             uiRowStoreSizeLCU[0][0] = 2; uiRowStoreSizeLCU[0][1] = 4; uiRowStoreSizeLCU[0][2] = 7;
905             uiRowStoreSizeLCU[1][0] = 3; uiRowStoreSizeLCU[1][1] = 4; uiRowStoreSizeLCU[1][2] = 8;
906         }
907         rowStoreSzLCU = uiRowStoreSizeLCU[(maxBitDepth == 8) ? 0 : 1][ctbLog2SizeY - 4];
908         bufferSize = rowStoreSzLCU * MHW_CACHELINE_SIZE * widthInCtb;
909         break;
910     }
911     case MHW_VDBOX_HCP_INTERNAL_BUFFER_SAO_TILE_COL:
912     {
913         // [chroma_format_idc][lcu_size] = [420/422/444][lcu16/lcu32/lcu64]
914         uint32_t formatMultFactorTab[3][3] = { { 4,5,9 },{ 5,7,12 },{ 5,7,12 } };
915         uint32_t formatMultFactor;
916 
917         if (chromaFormat == HCP_CHROMA_FORMAT_MONOCHROME)
918         {
919             eStatus = MOS_STATUS_INVALID_PARAMETER;
920             MHW_ASSERTMESSAGE("invalid input chroma format.\n");
921             return eStatus;
922         }
923         formatMultFactor = formatMultFactorTab[chromaFormat - 1][ctbLog2SizeY - 4];
924         colStoreSzLCU = formatMultFactor;
925         bufferSize = colStoreSzLCU * MHW_CACHELINE_SIZE * heightInCtb;
926         break;
927     }
928     case MHW_VDBOX_HCP_INTERNAL_BUFFER_CURR_MV_TEMPORAL:
929         mvtSize = ((((picWidth + 63) >> 6) * (((picHeight + 15) >> 4)) + 1)&(-2));
930         mvtbSize = ((((picWidth + 31) >> 5) * (((picHeight + 31) >> 5)) + 1)&(-2));
931         bufferSize = MOS_MAX(mvtSize, mvtbSize) * MHW_CACHELINE_SIZE;
932         break;
933     case MHW_VDBOX_HCP_INTERNAL_BUFFER_CABAC_STREAMOUT:
934         //From sas, cabac stream out buffer size =
935         //(#LCU) in picture * (Worst case LCU_CU_TU_info) + 1 byte aligned per LCU + Bitstream Size * 3
936         if ((chromaFormat == HCP_CHROMA_FORMAT_YUV420) && (maxBitDepth == 8))
937         {
938             bufferSize = widthInCtb * heightInCtb * MHW_HCP_WORST_CASE_CU_TU_INFO
939                 + widthInCtb * heightInCtb
940                 + maxFrameSize * 3;
941         }
942         else
943         {
944             bufferSize = widthInCtb * heightInCtb * MHW_HCP_WORST_CASE_CU_TU_INFO_REXT
945                 + widthInCtb * heightInCtb
946                 + maxFrameSize * 3;
947         }
948         bufferSize = MOS_ALIGN_CEIL(bufferSize, MHW_CACHELINE_SIZE);
949         break;
950     default:
951         eStatus = MOS_STATUS_INVALID_PARAMETER;
952         break;
953     }
954 
955     hcpBufSizeParam->dwBufferSize = bufferSize;
956 
957     return eStatus;
958 }
959 
GetVp9BufferSize(MHW_VDBOX_HCP_INTERNAL_BUFFER_TYPE bufferType,PMHW_VDBOX_HCP_BUFFER_SIZE_PARAMS hcpBufSizeParam)960 MOS_STATUS MhwVdboxHcpInterfaceG11::GetVp9BufferSize(
961     MHW_VDBOX_HCP_INTERNAL_BUFFER_TYPE  bufferType,
962     PMHW_VDBOX_HCP_BUFFER_SIZE_PARAMS   hcpBufSizeParam)
963 {
964     MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
965 
966     MHW_FUNCTION_ENTER;
967 
968     MHW_MI_CHK_NULL(hcpBufSizeParam);
969 
970     uint32_t  bufferSize = 0;
971     uint32_t  dblkRsbSizeMultiplier = 0;
972     uint32_t  dblkCsbSizeMultiplier = 0;
973     uint32_t  intraPredMultiplier = 0;
974 
975     uint8_t maxBitDepth = hcpBufSizeParam->ucMaxBitDepth;
976     uint32_t widthInSb = hcpBufSizeParam->dwPicWidth;
977     uint32_t heightInSb = hcpBufSizeParam->dwPicHeight;
978     uint32_t widthInMinCb = widthInSb * 64 / 8; //using smallest cb to get max width
979     uint32_t heightInMinCb = heightInSb * 64 / 8;
980     HCP_CHROMA_FORMAT_IDC chromaFormat = (HCP_CHROMA_FORMAT_IDC)hcpBufSizeParam->ucChromaFormat;
981     uint32_t maxFrameSize = hcpBufSizeParam->dwMaxFrameSize;
982 
983     if (chromaFormat == HCP_CHROMA_FORMAT_YUV420)
984     {
985         dblkRsbSizeMultiplier = (maxBitDepth > 8) ? 36 : 18;
986         dblkCsbSizeMultiplier = (maxBitDepth > 8) ? 34 : 17;
987         intraPredMultiplier = (maxBitDepth > 8) ? 4 : 2;
988     }
989     else if (chromaFormat == HCP_CHROMA_FORMAT_YUV444)
990     {
991         dblkRsbSizeMultiplier = (maxBitDepth > 8) ? 54 : 27;
992         dblkCsbSizeMultiplier = (maxBitDepth > 8) ? 50 : 25;
993         intraPredMultiplier = (maxBitDepth > 8) ? 6 : 3;
994     }
995     else
996     {
997         eStatus = MOS_STATUS_INVALID_PARAMETER;
998         MHW_ASSERTMESSAGE("Format not supported.");
999         return eStatus;
1000     }
1001 
1002     switch (bufferType)
1003     {
1004     case MHW_VDBOX_HCP_INTERNAL_BUFFER_DBLK_LINE:
1005     case MHW_VDBOX_HCP_INTERNAL_BUFFER_DBLK_TILE_LINE:
1006         bufferSize = widthInSb * dblkRsbSizeMultiplier * MHW_CACHELINE_SIZE;
1007         break;
1008     case MHW_VDBOX_HCP_INTERNAL_BUFFER_DBLK_TILE_COL:
1009         bufferSize = heightInSb * dblkCsbSizeMultiplier * MHW_CACHELINE_SIZE;
1010         break;
1011     case MHW_VDBOX_HCP_INTERNAL_BUFFER_META_LINE:
1012     case MHW_VDBOX_HCP_INTERNAL_BUFFER_META_TILE_LINE:
1013         bufferSize = widthInSb * 5 * MHW_CACHELINE_SIZE;
1014         break;
1015     case MHW_VDBOX_HCP_INTERNAL_BUFFER_META_TILE_COL:
1016         bufferSize = heightInSb * 5 * MHW_CACHELINE_SIZE;
1017         break;
1018     case MHW_VDBOX_HCP_INTERNAL_BUFFER_CURR_MV_TEMPORAL:
1019     case MHW_VDBOX_HCP_INTERNAL_BUFFER_COLL_MV_TEMPORAL:
1020         bufferSize = widthInSb * heightInSb * 9 * MHW_CACHELINE_SIZE;
1021         break;
1022     case MHW_VDBOX_VP9_INTERNAL_BUFFER_SEGMENT_ID:
1023         bufferSize = widthInSb * heightInSb * MHW_CACHELINE_SIZE;
1024         break;
1025     case MHW_VDBOX_VP9_INTERNAL_BUFFER_HVD_LINE:
1026     case MHW_VDBOX_VP9_INTERNAL_BUFFER_HVD_TILE:
1027         bufferSize = widthInSb * MHW_CACHELINE_SIZE;
1028         break;
1029         //scalable mode specific buffers
1030     case MHW_VDBOX_HCP_INTERNAL_BUFFER_INTRA_PRED_UP_RIGHT_COL:
1031     case MHW_VDBOX_HCP_INTERNAL_BUFFER_INTRA_PRED_LFT_RECON_COL:
1032         bufferSize = intraPredMultiplier * heightInSb * MHW_CACHELINE_SIZE;
1033         break;
1034     case MHW_VDBOX_HCP_INTERNAL_BUFFER_CABAC_STREAMOUT:
1035         //From sas, cabac stream out buffer size =
1036         //(#LCU) in picture * (Worst case LCU_CU_TU_info) + 1 byte aligned per LCU + Bitstream Size * 3
1037         if ((chromaFormat == HCP_CHROMA_FORMAT_YUV420) && (maxBitDepth == 8))
1038         {
1039             bufferSize = widthInMinCb * heightInMinCb * MHW_HCP_WORST_CASE_CU_TU_INFO
1040                 + widthInMinCb * heightInMinCb
1041                 + maxFrameSize * 3;
1042         }
1043         else
1044         {
1045             bufferSize = widthInMinCb * heightInMinCb * MHW_HCP_WORST_CASE_CU_TU_INFO_REXT
1046                 + widthInMinCb * heightInMinCb
1047                 + maxFrameSize * 3;
1048         }
1049         bufferSize = MOS_ALIGN_CEIL(bufferSize, MHW_CACHELINE_SIZE);
1050         break;
1051     default:
1052         eStatus = MOS_STATUS_INVALID_PARAMETER;
1053         break;
1054     }
1055 
1056     hcpBufSizeParam->dwBufferSize = bufferSize;
1057 
1058     return eStatus;
1059 }
1060 
IsHevcBufferReallocNeeded(MHW_VDBOX_HCP_INTERNAL_BUFFER_TYPE bufferType,PMHW_VDBOX_HCP_BUFFER_REALLOC_PARAMS reallocParam)1061 MOS_STATUS MhwVdboxHcpInterfaceG11::IsHevcBufferReallocNeeded(
1062     MHW_VDBOX_HCP_INTERNAL_BUFFER_TYPE   bufferType,
1063     PMHW_VDBOX_HCP_BUFFER_REALLOC_PARAMS reallocParam)
1064 {
1065     MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1066 
1067     MHW_FUNCTION_ENTER;
1068 
1069     MHW_MI_CHK_NULL(reallocParam);
1070 
1071     bool realloc = false;
1072     uint32_t picWidth = reallocParam->dwPicWidth;
1073     uint32_t picHeight = reallocParam->dwPicHeight;
1074     uint32_t ctbLog2SizeY = reallocParam->dwCtbLog2SizeY;
1075     uint8_t maxBitDepth = reallocParam->ucMaxBitDepth;
1076     HCP_CHROMA_FORMAT_IDC chromaFormat = (HCP_CHROMA_FORMAT_IDC)reallocParam->ucChromaFormat;
1077     uint32_t picWidthAlloced = reallocParam->dwPicWidthAlloced;
1078     uint32_t picHeightAlloced = reallocParam->dwPicHeightAlloced;
1079     uint32_t ctbLog2SizeYMax = reallocParam->dwCtbLog2SizeYMax;
1080     uint32_t frameSize = reallocParam->dwFrameSize;
1081     uint32_t frameSizeAlloced = reallocParam->dwFrameSizeAlloced;
1082 
1083     switch (bufferType)
1084     {
1085     case MHW_VDBOX_HCP_INTERNAL_BUFFER_DBLK_LINE:
1086     case MHW_VDBOX_HCP_INTERNAL_BUFFER_DBLK_TILE_LINE:
1087         realloc = (picWidth > picWidthAlloced || ctbLog2SizeY > ctbLog2SizeYMax);
1088         break;
1089     case MHW_VDBOX_HCP_INTERNAL_BUFFER_DBLK_TILE_COL:
1090         realloc = (picHeight > picHeightAlloced || ctbLog2SizeY > ctbLog2SizeYMax);
1091         break;
1092     case MHW_VDBOX_HCP_INTERNAL_BUFFER_META_LINE:
1093     case MHW_VDBOX_HCP_INTERNAL_BUFFER_META_TILE_LINE:
1094         if ((ctbLog2SizeYMax < 6 && ctbLog2SizeY == 6) || (picWidth > picWidthAlloced))
1095         {
1096             realloc = true;
1097         }
1098         break;
1099     case MHW_VDBOX_HCP_INTERNAL_BUFFER_MV_UP_RT_COL:
1100     case MHW_VDBOX_HCP_INTERNAL_BUFFER_META_TILE_COL:
1101         if ((ctbLog2SizeYMax < 6 && ctbLog2SizeY == 6) || (picHeight > picHeightAlloced))
1102         {
1103             realloc = true;
1104         }
1105         break;
1106     case MHW_VDBOX_HCP_INTERNAL_BUFFER_INTRA_PRED_UP_RIGHT_COL:
1107     case MHW_VDBOX_HCP_INTERNAL_BUFFER_INTRA_PRED_LFT_RECON_COL:
1108         if (maxBitDepth == 8 && chromaFormat == HCP_CHROMA_FORMAT_YUV420)
1109         {
1110             realloc = ((ctbLog2SizeYMax < 6 && ctbLog2SizeY == 6) || (picHeight > picHeightAlloced));
1111         }
1112         else
1113         {
1114             realloc = (picHeight > picHeightAlloced || ctbLog2SizeY > ctbLog2SizeYMax);
1115         }
1116         break;
1117     case MHW_VDBOX_HCP_INTERNAL_BUFFER_SAO_LINE:
1118     case MHW_VDBOX_HCP_INTERNAL_BUFFER_SAO_TILE_LINE:
1119         realloc = (picWidth > picWidthAlloced || ctbLog2SizeY > ctbLog2SizeYMax);
1120         break;
1121     case MHW_VDBOX_HCP_INTERNAL_BUFFER_SAO_TILE_COL:
1122         realloc = (picHeight > picHeightAlloced || ctbLog2SizeY > ctbLog2SizeYMax);
1123         break;
1124     case MHW_VDBOX_HCP_INTERNAL_BUFFER_CURR_MV_TEMPORAL:
1125         realloc = (picWidth > picWidthAlloced || picHeight > picHeightAlloced);
1126         break;
1127     case MHW_VDBOX_HCP_INTERNAL_BUFFER_CABAC_STREAMOUT:
1128         realloc = (frameSize > frameSizeAlloced);
1129         break;
1130     default:
1131         eStatus = MOS_STATUS_INVALID_PARAMETER;
1132         break;
1133     }
1134 
1135     reallocParam->bNeedBiggerSize = realloc;
1136 
1137     return eStatus;
1138 }
1139 
IsVp9BufferReallocNeeded(MHW_VDBOX_HCP_INTERNAL_BUFFER_TYPE bufferType,PMHW_VDBOX_HCP_BUFFER_REALLOC_PARAMS reallocParam)1140 MOS_STATUS MhwVdboxHcpInterfaceG11::IsVp9BufferReallocNeeded(
1141     MHW_VDBOX_HCP_INTERNAL_BUFFER_TYPE   bufferType,
1142     PMHW_VDBOX_HCP_BUFFER_REALLOC_PARAMS reallocParam)
1143 {
1144     MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1145 
1146     MHW_FUNCTION_ENTER;
1147 
1148     MHW_MI_CHK_NULL(reallocParam);
1149 
1150     bool     realloc = false;
1151     uint32_t widthInSb = reallocParam->dwPicWidth;
1152     uint32_t heightInSb = reallocParam->dwPicHeight;
1153     uint32_t picWidthInSbAlloced = reallocParam->dwPicWidthAlloced;
1154     uint32_t picHeightInSbAlloced = reallocParam->dwPicHeightAlloced;
1155     uint32_t frameSize = reallocParam->dwFrameSize;
1156     uint32_t frameSizeAlloced = reallocParam->dwFrameSizeAlloced;
1157 
1158     switch (bufferType)
1159     {
1160     case MHW_VDBOX_HCP_INTERNAL_BUFFER_META_LINE:
1161     case MHW_VDBOX_HCP_INTERNAL_BUFFER_META_TILE_LINE:
1162     case MHW_VDBOX_HCP_INTERNAL_BUFFER_DBLK_LINE:
1163     case MHW_VDBOX_HCP_INTERNAL_BUFFER_DBLK_TILE_LINE:
1164     case MHW_VDBOX_VP9_INTERNAL_BUFFER_HVD_LINE:
1165     case MHW_VDBOX_VP9_INTERNAL_BUFFER_HVD_TILE:
1166         realloc = (widthInSb > picWidthInSbAlloced);
1167         break;
1168     case MHW_VDBOX_HCP_INTERNAL_BUFFER_DBLK_TILE_COL:
1169     case MHW_VDBOX_HCP_INTERNAL_BUFFER_META_TILE_COL:
1170     case MHW_VDBOX_HCP_INTERNAL_BUFFER_INTRA_PRED_UP_RIGHT_COL:
1171     case MHW_VDBOX_HCP_INTERNAL_BUFFER_INTRA_PRED_LFT_RECON_COL:
1172         realloc = (heightInSb > picHeightInSbAlloced);
1173         break;
1174     case MHW_VDBOX_HCP_INTERNAL_BUFFER_CURR_MV_TEMPORAL:
1175     case MHW_VDBOX_HCP_INTERNAL_BUFFER_COLL_MV_TEMPORAL:
1176     case MHW_VDBOX_VP9_INTERNAL_BUFFER_SEGMENT_ID:
1177         realloc = (heightInSb > picHeightInSbAlloced || widthInSb > picWidthInSbAlloced);
1178         break;
1179     case MHW_VDBOX_HCP_INTERNAL_BUFFER_CABAC_STREAMOUT:
1180         realloc = (frameSize > frameSizeAlloced);
1181         break;
1182     default:
1183         eStatus = MOS_STATUS_INVALID_PARAMETER;
1184         break;
1185     }
1186 
1187     reallocParam->bNeedBiggerSize = realloc;
1188 
1189     return eStatus;
1190 }
1191 
AddHcpPipeModeSelectCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_PIPE_MODE_SELECT_PARAMS params)1192 MOS_STATUS MhwVdboxHcpInterfaceG11::AddHcpPipeModeSelectCmd(
1193     PMOS_COMMAND_BUFFER                  cmdBuffer,
1194     PMHW_VDBOX_PIPE_MODE_SELECT_PARAMS   params)
1195 {
1196     MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1197     bool       scalableEncode = false;
1198 
1199     MHW_FUNCTION_ENTER;
1200 
1201     MHW_MI_CHK_NULL(params);
1202     auto paramsG11 = dynamic_cast<PMHW_VDBOX_PIPE_MODE_SELECT_PARAMS_G11>(params);
1203     MHW_MI_CHK_NULL(paramsG11);
1204     mhw_vdbox_hcp_g11_X::HCP_PIPE_MODE_SELECT_CMD   cmd;
1205 
1206     //for gen 11, we need to add MFX wait for both KIN and VRT before and after HCP Pipemode select...
1207     MHW_MI_CHK_STATUS(m_miInterface->AddMfxWaitCmd(cmdBuffer, nullptr, true));
1208 
1209     // Secure scalable encode workloads requires special handling for Gen11+
1210     scalableEncode = (paramsG11->MultiEngineMode != MHW_VDBOX_HCP_MULTI_ENGINE_MODE_FE_LEGACY && !m_decodeInUse);
1211     MHW_MI_CHK_STATUS(m_cpInterface->SetProtectionSettingsForHcpPipeModeSelect((uint32_t *)&cmd, scalableEncode));
1212 
1213     cmd.DW1.AdvancedRateControlEnable    = params->bAdvancedRateControlEnable;
1214     cmd.DW1.CodecStandardSelect          = CodecHal_GetStandardFromMode(params->Mode) - CODECHAL_HCP_BASE;
1215     cmd.DW1.PakPipelineStreamoutEnable   = params->bStreamOutEnabled || params->pakPiplnStrmoutEnabled;
1216     cmd.DW1.DeblockerStreamoutEnable     = params->bDeblockerStreamOutEnable;
1217     cmd.DW1.VdencMode                    = params->bVdencEnabled;
1218     cmd.DW1.RdoqEnabledFlag              = params->bRdoqEnable;
1219     cmd.DW1.PakFrameLevelStreamoutEnable = params->bStreamOutEnabled || params->pakFrmLvlStrmoutEnable;
1220     cmd.DW1.PipeWorkingMode              = paramsG11->PipeWorkMode;
1221     cmd.DW1.MultiEngineMode              = paramsG11->MultiEngineMode;
1222 
1223     if (m_decodeInUse)
1224     {
1225         cmd.DW1.CodecSelect = cmd.CODEC_SELECT_DECODE;
1226     }
1227     else
1228     {
1229         cmd.DW1.CodecSelect = cmd.CODEC_SELECT_ENCODE;
1230     }
1231 
1232     MHW_MI_CHK_STATUS(Mhw_AddCommandCmdOrBB(m_osInterface, cmdBuffer, params->pBatchBuffer, &cmd, sizeof(cmd)));
1233 
1234     //for gen 11, we need to add MFX wait for both KIN and VRT before and after HCP Pipemode select...
1235     MHW_MI_CHK_STATUS(m_miInterface->AddMfxWaitCmd(cmdBuffer, nullptr, true));
1236 
1237     return eStatus;
1238 }
1239 
AddHcpDecodeSurfaceStateCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_SURFACE_PARAMS params)1240 MOS_STATUS MhwVdboxHcpInterfaceG11::AddHcpDecodeSurfaceStateCmd(
1241     PMOS_COMMAND_BUFFER              cmdBuffer,
1242     PMHW_VDBOX_SURFACE_PARAMS        params)
1243 {
1244     MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1245 
1246     MHW_MI_CHK_NULL(params);
1247 
1248     mhw_vdbox_hcp_g11_X::HCP_SURFACE_STATE_CMD  *cmd =
1249         (mhw_vdbox_hcp_g11_X::HCP_SURFACE_STATE_CMD*)cmdBuffer->pCmdPtr;
1250 
1251     MHW_MI_CHK_STATUS(MhwVdboxHcpInterfaceGeneric<mhw_vdbox_hcp_g11_X>::AddHcpDecodeSurfaceStateCmd(cmdBuffer, params));
1252 
1253     if (params->ucBitDepthLumaMinus8 == 0 && params->ucBitDepthChromaMinus8 == 0)
1254     {
1255         if (params->ChromaType == HCP_CHROMA_FORMAT_YUV420 && params->psSurface->Format == Format_NV12)// 4:2:0 8bit surface
1256         {
1257             cmd->DW2.SurfaceFormat = cmd->SURFACE_FORMAT_PLANAR4208;
1258         }
1259         else if (params->ChromaType == HCP_CHROMA_FORMAT_YUV420 && params->psSurface->Format == Format_P010)// 4:2:0 10bit surface
1260         {
1261             cmd->DW2.SurfaceFormat = cmd->SURFACE_FORMAT_P010;
1262         }
1263         else if (params->ChromaType == HCP_CHROMA_FORMAT_YUV422 && params->psSurface->Format == Format_YUY2) // 4:2:2 8bit surface
1264         {
1265             cmd->DW2.SurfaceFormat = cmd->SURFACE_FORMAT_YUY2FORMAT;
1266         }
1267         else if (params->ChromaType == HCP_CHROMA_FORMAT_YUV422 && params->psSurface->Format == Format_Y210) // 4:2:2 10bit surface
1268         {
1269             cmd->DW2.SurfaceFormat = cmd->SURFACE_FORMAT_Y216Y210FORMAT;
1270         }
1271         else if (params->ChromaType == HCP_CHROMA_FORMAT_YUV444 && params->psSurface->Format == Format_AYUV) // 4:4:4 8bit surface
1272         {
1273             cmd->DW2.SurfaceFormat = cmd->SURFACE_FORMAT_AYUV4444FORMAT;
1274         }
1275         else if (params->ChromaType == HCP_CHROMA_FORMAT_YUV444 && params->psSurface->Format == Format_Y410) // 4:4:4 10bit surface
1276         {
1277             cmd->DW2.SurfaceFormat = cmd->SURFACE_FORMAT_Y410FORMAT;
1278         }
1279         else
1280         {
1281             return MOS_STATUS_INVALID_PARAMETER;
1282         }
1283     }
1284     else // only support bitdepth <= 10bit
1285     {
1286         if (params->ChromaType == HCP_CHROMA_FORMAT_YUV420 && params->psSurface->Format == Format_P010)// 4:2:0
1287         {
1288             cmd->DW2.SurfaceFormat = cmd->SURFACE_FORMAT_P010;
1289         }
1290         else if (params->ChromaType == HCP_CHROMA_FORMAT_YUV422 && params->psSurface->Format == Format_Y210) // 4:2:2
1291         {
1292             cmd->DW2.SurfaceFormat = cmd->SURFACE_FORMAT_Y216Y210FORMAT;;
1293         }
1294         else if (params->ChromaType == HCP_CHROMA_FORMAT_YUV444 && params->psSurface->Format == Format_Y410) // 4:4:4
1295         {
1296             cmd->DW2.SurfaceFormat = cmd->SURFACE_FORMAT_Y410FORMAT;;
1297         }
1298         else
1299         {
1300             return MOS_STATUS_INVALID_PARAMETER;
1301         }
1302     }
1303 
1304     if ((params->ucBitDepthLumaMinus8 == 4) || (params->ucBitDepthChromaMinus8 == 4)) // 12 bit
1305         cmd->DW3.DefaultAlphaValue = 0xfff0;
1306     else
1307         cmd->DW3.DefaultAlphaValue = 0xffff;
1308 
1309     return eStatus;
1310 }
1311 
AddHcpEncodeSurfaceStateCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_SURFACE_PARAMS params)1312 MOS_STATUS MhwVdboxHcpInterfaceG11::AddHcpEncodeSurfaceStateCmd(
1313     PMOS_COMMAND_BUFFER              cmdBuffer,
1314     PMHW_VDBOX_SURFACE_PARAMS        params)
1315 {
1316     MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1317 
1318     MHW_MI_CHK_NULL(params);
1319 
1320     mhw_vdbox_hcp_g11_X::HCP_SURFACE_STATE_CMD  *cmd =
1321         (mhw_vdbox_hcp_g11_X::HCP_SURFACE_STATE_CMD*)cmdBuffer->pCmdPtr;
1322 
1323     MHW_MI_CHK_STATUS(MhwVdboxHcpInterfaceGeneric<mhw_vdbox_hcp_g11_X>::AddHcpEncodeSurfaceStateCmd(cmdBuffer, params));
1324 
1325     bool surf10bit= (params->psSurface->Format == Format_P010) ||
1326                    (params->psSurface->Format == Format_P210) ||
1327                    (params->psSurface->Format == Format_Y210) ||
1328                    (params->psSurface->Format == Format_Y410) ||
1329                    (params->psSurface->Format == Format_R10G10B10A2) ||
1330                    (params->psSurface->Format == Format_B10G10R10A2);
1331 
1332     if (params->ChromaType == HCP_CHROMA_FORMAT_YUV422)
1333     {
1334         if (params->ucBitDepthLumaMinus8 > 0)
1335         {
1336             if (params->ucSurfaceStateId == CODECHAL_HCP_SRC_SURFACE_ID)
1337             {
1338                 cmd->DW2.SurfaceFormat = surf10bit ?
1339                     cmd->SURFACE_FORMAT_Y216Y210FORMAT : cmd->SURFACE_FORMAT_YUY2FORMAT;
1340             }
1341             else
1342             {
1343                 cmd->DW2.SurfaceFormat = cmd->SURFACE_FORMAT_Y216VARIANT;
1344             }
1345         }
1346         else
1347         {
1348             cmd->DW2.SurfaceFormat = (params->ucSurfaceStateId == CODECHAL_HCP_SRC_SURFACE_ID) ?
1349                 cmd->SURFACE_FORMAT_YUY2FORMAT : cmd->SURFACE_FORMAT_YUY2VARIANT;
1350         }
1351     }
1352     else if (params->ChromaType == HCP_CHROMA_FORMAT_YUV444)
1353     {
1354         if (params->ucBitDepthLumaMinus8 == 0)
1355         {
1356             cmd->DW2.SurfaceFormat = params->ucSurfaceStateId == CODECHAL_HCP_SRC_SURFACE_ID ?
1357                 cmd->SURFACE_FORMAT_AYUV4444FORMAT : cmd->SURFACE_FORMAT_AYUV4444VARIANT;
1358         }
1359         else if (params->ucBitDepthLumaMinus8 <= 2)
1360         {
1361             if (params->ucSurfaceStateId == CODECHAL_HCP_SRC_SURFACE_ID)
1362             {
1363                 cmd->DW2.SurfaceFormat = surf10bit ?
1364                     cmd->SURFACE_FORMAT_Y410FORMAT : cmd->SURFACE_FORMAT_AYUV4444FORMAT;
1365             }
1366             else
1367             {
1368                 cmd->DW2.SurfaceFormat = cmd->SURFACE_FORMAT_Y416VARIANT;
1369             }
1370         }
1371         else
1372         {
1373             cmd->DW2.SurfaceFormat = cmd->SURFACE_FORMAT_Y416FORMAT;
1374         }
1375     }
1376     else    //params->ChromaType == HCP_CHROMA_FORMAT_YUV420
1377     {
1378         if (params->ucBitDepthLumaMinus8 > 0)
1379         {
1380             if (params->ucSurfaceStateId == CODECHAL_HCP_SRC_SURFACE_ID)
1381             {
1382                 cmd->DW2.SurfaceFormat = surf10bit ?
1383                     cmd->SURFACE_FORMAT_P010 : cmd->SURFACE_FORMAT_PLANAR4208;
1384             }
1385             else
1386             {
1387                 cmd->DW2.SurfaceFormat = cmd->SURFACE_FORMAT_P010VARIANT;
1388             }
1389         }
1390         else
1391         {
1392             cmd->DW2.SurfaceFormat = cmd->SURFACE_FORMAT_PLANAR4208;
1393         }
1394     }
1395 
1396     cmd->DW2.YOffsetForUCbInPixel  = cmd->DW3.YOffsetForVCr = params->psSurface->UPlaneOffset.iYOffset;
1397 
1398     //Set U/V offsets for Variant surfaces
1399     if (cmd->DW2.SurfaceFormat == cmd->SURFACE_FORMAT_Y416VARIANT ||
1400         cmd->DW2.SurfaceFormat == cmd->SURFACE_FORMAT_AYUV4444VARIANT)
1401     {
1402         cmd->DW2.YOffsetForUCbInPixel = params->dwReconSurfHeight;
1403         cmd->DW3.YOffsetForVCr = params->dwReconSurfHeight << 1;
1404     }
1405     else if (cmd->DW2.SurfaceFormat == cmd->SURFACE_FORMAT_Y216VARIANT ||
1406         cmd->DW2.SurfaceFormat == cmd->SURFACE_FORMAT_YUY2VARIANT)
1407     {
1408         cmd->DW2.YOffsetForUCbInPixel =
1409         cmd->DW3.YOffsetForVCr = params->dwReconSurfHeight;
1410     }
1411 
1412 
1413     return eStatus;
1414 }
1415 
AddHcpPipeBufAddrCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_PIPE_BUF_ADDR_PARAMS params)1416 MOS_STATUS MhwVdboxHcpInterfaceG11::AddHcpPipeBufAddrCmd(
1417     PMOS_COMMAND_BUFFER              cmdBuffer,
1418     PMHW_VDBOX_PIPE_BUF_ADDR_PARAMS  params)
1419 {
1420     MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1421 
1422     MHW_FUNCTION_ENTER;
1423 
1424     MHW_MI_CHK_NULL(m_osInterface);
1425     MHW_MI_CHK_NULL(cmdBuffer);
1426     MHW_MI_CHK_NULL(params);
1427 
1428     MHW_RESOURCE_PARAMS resourceParams;
1429     MOS_SURFACE details;
1430     mhw_vdbox_hcp_g11_X::HCP_PIPE_BUF_ADDR_STATE_CMD cmd;
1431 
1432 #if (_DEBUG || _RELEASE_INTERNAL)
1433     MOS_USER_FEATURE_VALUE_WRITE_DATA UserFeatureWriteData = __NULL_USER_FEATURE_VALUE_WRITE_DATA__;
1434     UserFeatureWriteData.ValueID = __MEDIA_USER_FEATURE_VALUE_IS_CODEC_ROW_STORE_CACHE_ENABLED_ID;
1435     if (m_hevcDatRowStoreCache.bEnabled ||
1436         m_hevcDfRowStoreCache.bEnabled  ||
1437         m_hevcSaoRowStoreCache.bEnabled ||
1438         m_vp9HvdRowStoreCache.bEnabled  ||
1439         m_vp9DatRowStoreCache.bEnabled  ||
1440         m_vp9DfRowStoreCache.bEnabled)
1441     {
1442         UserFeatureWriteData.Value.i32Data = 1;
1443     }
1444     MOS_UserFeature_WriteValues_ID(nullptr, &UserFeatureWriteData, 1, m_osInterface->pOsContext);
1445 #endif
1446 
1447     MOS_ZeroMemory(&resourceParams, sizeof(resourceParams));
1448 
1449     // 1. MHW_VDBOX_HCP_GENERAL_STATE_SHIFT(6) may not work with DecodedPicture
1450     // since it needs to be 4k aligned
1451     resourceParams.dwLsbNum = MHW_VDBOX_HCP_GENERAL_STATE_SHIFT;
1452     resourceParams.HwCommandType = MOS_MFX_PIPE_BUF_ADDR;
1453 
1454     //Decoded Picture
1455     cmd.DecodedPictureMemoryAddressAttributes.DW0.Value |= m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_PRE_DEBLOCKING_CODEC].Value;
1456     cmd.DecodedPictureMemoryAddressAttributes.DW0.BaseAddressMemoryCompressionEnable =
1457         (params->PreDeblockSurfMmcState != MOS_MEMCOMP_DISABLED) ? MHW_MEDIA_MEMCOMP_ENABLED : MHW_MEDIA_MEMCOMP_DISABLED;
1458     cmd.DecodedPictureMemoryAddressAttributes.DW0.BaseAddressMemoryCompressionMode =
1459         (params->PreDeblockSurfMmcState == MOS_MEMCOMP_HORIZONTAL) ? MHW_MEDIA_MEMCOMP_MODE_HORIZONTAL : MHW_MEDIA_MEMCOMP_MODE_VERTICAL;
1460 
1461     cmd.DecodedPictureMemoryAddressAttributes.DW0.BaseAddressTiledResourceMode = Mhw_ConvertToTRMode(params->psPreDeblockSurface->TileType);
1462 
1463     resourceParams.presResource = &(params->psPreDeblockSurface->OsResource);
1464     resourceParams.dwOffset = params->psPreDeblockSurface->dwOffset;
1465     resourceParams.pdwCmd = (cmd.DecodedPicture.DW0_1.Value);
1466     resourceParams.dwLocationInCmd = 1;
1467     resourceParams.bIsWritable = true;
1468 
1469     MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
1470         m_osInterface,
1471         cmdBuffer,
1472         &resourceParams));
1473 
1474     MHW_MI_CHK_STATUS(m_osInterface->pfnSetMemoryCompressionMode(m_osInterface, resourceParams.presResource, params->PreDeblockSurfMmcState));
1475     // Deblocking Filter Line Buffer
1476     if (m_hevcDfRowStoreCache.bEnabled)
1477     {
1478         cmd.DeblockingFilterLineBufferMemoryAddressAttributes.DW0.BaseAddressRowStoreScratchBufferCacheSelect = cmd.DeblockingFilterLineBufferMemoryAddressAttributes.BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT_UNNAMED1;
1479         cmd.DeblockingFilterLineBuffer.DW0_1.Graphicsaddress476 = m_hevcDfRowStoreCache.dwAddress;
1480     }
1481     else if (m_vp9DfRowStoreCache.bEnabled)
1482     {
1483         cmd.DeblockingFilterLineBufferMemoryAddressAttributes.DW0.BaseAddressRowStoreScratchBufferCacheSelect = cmd.DeblockingFilterLineBufferMemoryAddressAttributes.BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT_UNNAMED1;
1484         cmd.DeblockingFilterLineBuffer.DW0_1.Graphicsaddress476 = m_vp9DfRowStoreCache.dwAddress;
1485     }
1486     else if (params->presMfdDeblockingFilterRowStoreScratchBuffer != nullptr)
1487     {
1488         cmd.DeblockingFilterLineBufferMemoryAddressAttributes.DW0.Value |= m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_DEBLOCKINGFILTER_ROWSTORE_SCRATCH_BUFFER_CODEC].Value;
1489 
1490         resourceParams.presResource = params->presMfdDeblockingFilterRowStoreScratchBuffer;
1491         resourceParams.dwOffset = 0;
1492         resourceParams.pdwCmd = (cmd.DeblockingFilterLineBuffer.DW0_1.Value);
1493         resourceParams.dwLocationInCmd = 4;
1494         resourceParams.bIsWritable = true;
1495 
1496         MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
1497             m_osInterface,
1498             cmdBuffer,
1499             &resourceParams));
1500     }
1501 
1502     // Deblocking Filter Tile Line Buffer
1503     if (params->presDeblockingFilterTileRowStoreScratchBuffer != nullptr)
1504     {
1505         cmd.DeblockingFilterTileLineBufferMemoryAddressAttributes.DW0.Value |= m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_DEBLOCKINGFILTER_ROWSTORE_TILE_LINE_BUFFER_CODEC].Value;
1506 
1507         resourceParams.presResource = params->presDeblockingFilterTileRowStoreScratchBuffer;
1508         resourceParams.dwOffset = 0;
1509         resourceParams.pdwCmd = (cmd.DeblockingFilterTileLineBuffer.DW0_1.Value);
1510         resourceParams.dwLocationInCmd = 7;
1511         resourceParams.bIsWritable = true;
1512 
1513         MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
1514             m_osInterface,
1515             cmdBuffer,
1516             &resourceParams));
1517     }
1518 
1519     // Deblocking Filter Tile Column Buffer
1520     if (params->presDeblockingFilterColumnRowStoreScratchBuffer != nullptr)
1521     {
1522         cmd.DeblockingFilterTileColumnBufferMemoryAddressAttributes.DW0.Value |= m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_DEBLOCKINGFILTER_ROWSTORE_TILE_COLUMN_BUFFER_CODEC].Value;
1523 
1524         resourceParams.presResource = params->presDeblockingFilterColumnRowStoreScratchBuffer;
1525         resourceParams.dwOffset = 0;
1526         resourceParams.pdwCmd = (cmd.DeblockingFilterTileColumnBuffer.DW0_1.Value);
1527         resourceParams.dwLocationInCmd = 10;
1528         resourceParams.bIsWritable = true;
1529 
1530         MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
1531             m_osInterface,
1532             cmdBuffer,
1533             &resourceParams));
1534     }
1535 
1536     // Metadata Line Buffer
1537     if (m_hevcDatRowStoreCache.bEnabled)
1538     {
1539         cmd.MetadataLineBufferMemoryAddressAttributes.DW0.BaseAddressRowStoreScratchBufferCacheSelect = cmd.MetadataLineBufferMemoryAddressAttributes.BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT_UNNAMED1;
1540         cmd.MetadataLineBuffer.DW0_1.Graphicsaddress476 = m_hevcDatRowStoreCache.dwAddress;
1541     }
1542     else if (m_vp9DatRowStoreCache.bEnabled)
1543     {
1544         cmd.MetadataLineBufferMemoryAddressAttributes.DW0.BaseAddressRowStoreScratchBufferCacheSelect = cmd.MetadataLineBufferMemoryAddressAttributes.BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT_UNNAMED1;
1545         cmd.MetadataLineBuffer.DW0_1.Graphicsaddress476 = m_vp9DatRowStoreCache.dwAddress;
1546     }
1547     else if (params->presMetadataLineBuffer != nullptr)
1548     {
1549         cmd.MetadataLineBufferMemoryAddressAttributes.DW0.Value |= m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_HCP_MD_CODEC].Value;
1550 
1551         resourceParams.presResource = params->presMetadataLineBuffer;
1552         resourceParams.dwOffset = 0;
1553         resourceParams.pdwCmd = (cmd.MetadataLineBuffer.DW0_1.Value);
1554         resourceParams.dwLocationInCmd = 13;
1555         resourceParams.bIsWritable = true;
1556 
1557         MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
1558             m_osInterface,
1559             cmdBuffer,
1560             &resourceParams));
1561     }
1562 
1563     // Metadata Tile Line Buffer
1564     if (params->presMetadataTileLineBuffer != nullptr)
1565     {
1566         cmd.MetadataTileLineBufferMemoryAddressAttributes.DW0.Value |= m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_HCP_MD_TILE_LINE_CODEC].Value;
1567 
1568         resourceParams.presResource = params->presMetadataTileLineBuffer;
1569         resourceParams.dwOffset = 0;
1570         resourceParams.pdwCmd = (cmd.MetadataTileLineBuffer.DW0_1.Value);
1571         resourceParams.dwLocationInCmd = 16;
1572         resourceParams.bIsWritable = true;
1573 
1574         MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
1575             m_osInterface,
1576             cmdBuffer,
1577             &resourceParams));
1578     }
1579 
1580     // Metadata Tile Column Buffer
1581     if (params->presMetadataTileColumnBuffer != nullptr)
1582     {
1583         cmd.MetadataTileColumnBufferMemoryAddressAttributes.DW0.Value |= m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_HCP_MD_TILE_COLUMN_CODEC].Value;
1584 
1585         resourceParams.presResource = params->presMetadataTileColumnBuffer;
1586         resourceParams.dwOffset = 0;
1587         resourceParams.pdwCmd = (cmd.MetadataTileColumnBuffer.DW0_1.Value);
1588         resourceParams.dwLocationInCmd = 19;
1589         resourceParams.bIsWritable = true;
1590 
1591         MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
1592             m_osInterface,
1593             cmdBuffer,
1594             &resourceParams));
1595     }
1596 
1597     // SAO Line Buffer
1598     if (m_hevcSaoRowStoreCache.bEnabled)
1599     {
1600         cmd.SaoLineBufferMemoryAddressAttributes.DW0.BaseAddressRowStoreScratchBufferCacheSelect = cmd.SaoLineBufferMemoryAddressAttributes.BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT_UNNAMED1;
1601         cmd.SaoLineBuffer.DW0_1.Graphicsaddress476 = m_hevcSaoRowStoreCache.dwAddress;
1602     }
1603     else if (params->presSaoLineBuffer != nullptr)
1604     {
1605         cmd.SaoLineBufferMemoryAddressAttributes.DW0.Value |=
1606             m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_HCP_SAO_CODEC].Value;
1607 
1608         resourceParams.presResource = params->presSaoLineBuffer;
1609         resourceParams.dwOffset = 0;
1610         resourceParams.pdwCmd = (cmd.SaoLineBuffer.DW0_1.Value);
1611         resourceParams.dwLocationInCmd = 22;
1612         resourceParams.bIsWritable = true;
1613 
1614         MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
1615             m_osInterface,
1616             cmdBuffer,
1617             &resourceParams));
1618     }
1619 
1620     // SAO Tile Line Buffer
1621     if (params->presSaoTileLineBuffer != nullptr)
1622     {
1623         cmd.SaoTileLineBufferMemoryAddressAttributes.DW0.Value |=
1624             m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_HCP_SAO_TILE_LINE_CODEC].Value;
1625 
1626         resourceParams.presResource = params->presSaoTileLineBuffer;
1627         resourceParams.dwOffset = 0;
1628         resourceParams.pdwCmd = (cmd.SaoTileLineBuffer.DW0_1.Value);
1629         resourceParams.dwLocationInCmd = 25;
1630         resourceParams.bIsWritable = true;
1631 
1632         MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
1633             m_osInterface,
1634             cmdBuffer,
1635             &resourceParams));
1636     }
1637 
1638     // SAO Tile Column Buffer
1639     if (params->presSaoTileColumnBuffer != nullptr)
1640     {
1641         cmd.SaoTileColumnBufferMemoryAddressAttributes.DW0.Value |=
1642             m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_HCP_SAO_TILE_COLUMN_CODEC].Value;
1643 
1644         resourceParams.presResource = params->presSaoTileColumnBuffer;
1645         resourceParams.dwOffset = 0;
1646         resourceParams.pdwCmd = (cmd.SaoTileColumnBuffer.DW0_1.Value);
1647         resourceParams.dwLocationInCmd = 28;
1648         resourceParams.bIsWritable = true;
1649 
1650         MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
1651             m_osInterface,
1652             cmdBuffer,
1653             &resourceParams));
1654     }
1655 
1656     // Current Motion Vector Temporal Buffer
1657     if (params->presCurMvTempBuffer != nullptr)
1658     {
1659         cmd.CurrentMotionVectorTemporalBufferMemoryAddressAttributes.DW0.Value |=
1660             m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_HCP_MV_CODEC].Value;
1661 
1662         resourceParams.presResource = params->presCurMvTempBuffer;
1663         resourceParams.dwOffset = 0;
1664         resourceParams.pdwCmd = (cmd.CurrentMotionVectorTemporalBuffer.DW0_1.Value);
1665         resourceParams.dwLocationInCmd = 31;
1666         resourceParams.bIsWritable = true;
1667 
1668         MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
1669             m_osInterface,
1670             cmdBuffer,
1671             &resourceParams));
1672     }
1673 
1674     // Only one control DW53 for all references
1675     cmd.ReferencePictureBaseAddressMemoryAddressAttributes.DW0.Value |=
1676         m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value;
1677 
1678     bool                firstRefPic = true;
1679     MOS_MEMCOMP_STATE   mmcMode = MOS_MEMCOMP_DISABLED;
1680 
1681     // NOTE: for both HEVC and VP9, set all the 8 ref pic addresses in HCP_PIPE_BUF_ADDR_STATE command to valid addresses for error concealment purpose
1682     for (uint32_t i = 0; i < CODECHAL_MAX_CUR_NUM_REF_FRAME_HEVC; i++)
1683     {
1684         // Reference Picture Buffer
1685         if (params->presReferences[i] != nullptr)
1686         {
1687             MOS_ZeroMemory(&details, sizeof(details));
1688             details.Format = Format_Invalid;
1689             MHW_MI_CHK_STATUS(m_osInterface->pfnGetResourceInfo(m_osInterface, params->presReferences[i], &details));
1690 
1691             if (firstRefPic)
1692             {
1693                 MHW_MI_CHK_STATUS(m_osInterface->pfnGetMemoryCompressionMode(m_osInterface, params->presReferences[i], &mmcMode));
1694 
1695                 cmd.ReferencePictureBaseAddressMemoryAddressAttributes.DW0.BaseAddressTiledResourceMode = Mhw_ConvertToTRMode(details.TileType);
1696                 firstRefPic = false;
1697             }
1698 
1699             resourceParams.presResource = params->presReferences[i];
1700             resourceParams.pdwCmd = (cmd.ReferencePictureBaseAddressRefaddr07[i].DW0_1.Value);
1701             resourceParams.dwOffset = details.RenderOffset.YUV.Y.BaseOffset;
1702             resourceParams.dwLocationInCmd = (i * 2) + 37; // * 2 to account for QW rather than DW
1703             resourceParams.bIsWritable = false;
1704 
1705             resourceParams.dwSharedMocsOffset = 53 - resourceParams.dwLocationInCmd; // Common Prodected Data bit is in DW53
1706 
1707             MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
1708                 m_osInterface,
1709                 cmdBuffer,
1710                 &resourceParams));
1711         }
1712     }
1713 
1714     cmd.ReferencePictureBaseAddressMemoryAddressAttributes.DW0.BaseAddressMemoryCompressionEnable =
1715         (mmcMode != MOS_MEMCOMP_DISABLED) ? MHW_MEDIA_MEMCOMP_ENABLED : MHW_MEDIA_MEMCOMP_DISABLED;
1716     cmd.ReferencePictureBaseAddressMemoryAddressAttributes.DW0.BaseAddressMemoryCompressionMode =
1717         (mmcMode == MOS_MEMCOMP_HORIZONTAL) ? MHW_MEDIA_MEMCOMP_MODE_HORIZONTAL : MHW_MEDIA_MEMCOMP_MODE_VERTICAL;
1718 
1719     // Reset dwSharedMocsOffset
1720     resourceParams.dwSharedMocsOffset = 0;
1721 
1722     // Original Uncompressed Picture Source, Encoder only
1723     if (params->psRawSurface != nullptr)
1724     {
1725         MHW_MI_CHK_STATUS(m_osInterface->pfnGetMemoryCompressionMode(m_osInterface, &params->psRawSurface->OsResource, &mmcMode));
1726 
1727         cmd.OriginalUncompressedPictureSourceMemoryAddressAttributes.DW0.Value |=
1728             m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_ORIGINAL_UNCOMPRESSED_PICTURE_ENCODE].Value;
1729         cmd.OriginalUncompressedPictureSourceMemoryAddressAttributes.DW0.BaseAddressMemoryCompressionEnable = (mmcMode != MOS_MEMCOMP_DISABLED) ?
1730             MHW_MEDIA_MEMCOMP_ENABLED : MHW_MEDIA_MEMCOMP_DISABLED;
1731         cmd.OriginalUncompressedPictureSourceMemoryAddressAttributes.DW0.BaseAddressMemoryCompressionMode = (mmcMode == MOS_MEMCOMP_HORIZONTAL) ?
1732             MHW_MEDIA_MEMCOMP_MODE_HORIZONTAL : MHW_MEDIA_MEMCOMP_MODE_VERTICAL;
1733 
1734         cmd.OriginalUncompressedPictureSourceMemoryAddressAttributes.DW0.BaseAddressTiledResourceMode = Mhw_ConvertToTRMode(params->psRawSurface->TileType);
1735 
1736         resourceParams.presResource = &params->psRawSurface->OsResource;
1737         resourceParams.dwOffset = params->psRawSurface->dwOffset;
1738         resourceParams.pdwCmd = (cmd.OriginalUncompressedPictureSource.DW0_1.Value);
1739         resourceParams.dwLocationInCmd = 54;
1740         resourceParams.bIsWritable = false;
1741 
1742         MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
1743             m_osInterface,
1744             cmdBuffer,
1745             &resourceParams));
1746     }
1747 
1748     // StreamOut Data Destination, Decoder only
1749     if (params->presStreamOutBuffer != nullptr)
1750     {
1751         cmd.StreamoutDataDestinationMemoryAddressAttributes.DW0.Value |=
1752             m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_STREAMOUT_DATA_CODEC].Value;
1753         cmd.StreamoutDataDestinationMemoryAddressAttributes.DW0.BaseAddressMemoryCompressionEnable =
1754             (params->StreamOutBufMmcState != MOS_MEMCOMP_DISABLED) ? MHW_MEDIA_MEMCOMP_ENABLED : MHW_MEDIA_MEMCOMP_DISABLED;
1755         cmd.StreamoutDataDestinationMemoryAddressAttributes.DW0.BaseAddressMemoryCompressionMode =
1756             (params->StreamOutBufMmcState == MOS_MEMCOMP_HORIZONTAL) ? MHW_MEDIA_MEMCOMP_MODE_HORIZONTAL : MHW_MEDIA_MEMCOMP_MODE_VERTICAL;
1757 
1758         resourceParams.presResource = params->presStreamOutBuffer;
1759         resourceParams.dwOffset = 0;
1760         resourceParams.pdwCmd = (cmd.StreamoutDataDestination.DW0_1.Value);
1761         resourceParams.dwLocationInCmd = 57;
1762         resourceParams.bIsWritable = true;
1763 
1764         MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
1765             m_osInterface,
1766             cmdBuffer,
1767             &resourceParams));
1768     }
1769 
1770     // Pak Cu Level Streamout Data
1771     if (params->presPakCuLevelStreamoutBuffer != nullptr)
1772     {
1773         cmd.StreamoutDataDestinationMemoryAddressAttributes.DW0.Value |=
1774             m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_STREAMOUT_DATA_CODEC].Value;
1775         resourceParams.presResource = params->presPakCuLevelStreamoutBuffer;
1776         resourceParams.dwOffset = 0;
1777         resourceParams.pdwCmd = (cmd.StreamoutDataDestination.DW0_1.Value);
1778         resourceParams.dwLocationInCmd = 57;
1779         resourceParams.bIsWritable = true;
1780 
1781         MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
1782             m_osInterface,
1783             cmdBuffer,
1784             &resourceParams));
1785     }
1786 
1787     // Decoded Picture Status / Error Buffer Base Address
1788     if (params->presLcuBaseAddressBuffer != nullptr)
1789     {
1790         cmd.DecodedPictureStatusErrorBufferBaseAddressMemoryAddressAttributes.DW0.Value |=
1791             m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_HCP_STATUS_ERROR_CODEC].Value;
1792 
1793         resourceParams.presResource = params->presLcuBaseAddressBuffer;
1794         resourceParams.dwOffset = params->dwLcuStreamOutOffset;
1795         resourceParams.pdwCmd = (cmd.DecodedPictureStatusErrorBufferBaseAddressOrEncodedSliceSizeStreamoutBaseAddress.DW0_1.Value);
1796         resourceParams.dwLocationInCmd = 60;
1797         resourceParams.bIsWritable = true;
1798 
1799         MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
1800             m_osInterface,
1801             cmdBuffer,
1802             &resourceParams));
1803     }
1804 
1805     // LCU ILDB StreamOut Buffer
1806     if (params->presLcuILDBStreamOutBuffer != nullptr)
1807     {
1808         cmd.LcuIldbStreamoutBufferMemoryAddressAttributes.DW0.Value |=
1809             m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_HCP_LCU_ILDB_STREAMOUT_CODEC].Value;
1810 
1811         resourceParams.presResource = params->presLcuILDBStreamOutBuffer;
1812         resourceParams.dwOffset = 0;
1813         resourceParams.pdwCmd = (cmd.LcuIldbStreamoutBuffer.DW0_1.Value);
1814         resourceParams.dwLocationInCmd = 63;
1815         resourceParams.bIsWritable = true;
1816 
1817         MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
1818             m_osInterface,
1819             cmdBuffer,
1820             &resourceParams));
1821     }
1822 
1823     cmd.CollocatedMotionVectorTemporalBuffer07MemoryAddressAttributes.DW0.Value |=
1824         m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_HCP_MV_CODEC].Value;
1825 
1826     for (uint32_t i = 0; i < CODECHAL_MAX_CUR_NUM_REF_FRAME_HEVC; i++)
1827     {
1828         // Collocated Motion vector Temporal Buffer
1829         if (params->presColMvTempBuffer[i] != nullptr)
1830         {
1831             resourceParams.presResource = params->presColMvTempBuffer[i];
1832             resourceParams.dwOffset = 0;
1833             resourceParams.pdwCmd = (cmd.CollocatedMotionVectorTemporalBuffer07[i].DW0_1.Value);
1834             resourceParams.dwLocationInCmd = (i * 2) + 66;
1835             resourceParams.bIsWritable = false;
1836 
1837             resourceParams.dwSharedMocsOffset = 82 - resourceParams.dwLocationInCmd; // Common Prodected Data bit is in DW82
1838 
1839             MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
1840                 m_osInterface,
1841                 cmdBuffer,
1842                 &resourceParams));
1843         }
1844     }
1845 
1846     // Reset dwSharedMocsOffset
1847     resourceParams.dwSharedMocsOffset = 0;
1848 
1849     // VP9 Probability Buffer
1850     if (params->presVp9ProbBuffer != nullptr)
1851     {
1852         cmd.Vp9ProbabilityBufferReadWriteMemoryAddressAttributes.DW0.Value |=
1853             m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_VP9_PROBABILITY_BUFFER_CODEC].Value;
1854 
1855         resourceParams.presResource = params->presVp9ProbBuffer;
1856         resourceParams.dwOffset = 0;
1857         resourceParams.pdwCmd = (cmd.Vp9ProbabilityBufferReadWrite.DW0_1.Value);
1858         resourceParams.dwLocationInCmd = 83;
1859         resourceParams.bIsWritable = true;
1860 
1861         resourceParams.dwSharedMocsOffset = 85 - resourceParams.dwLocationInCmd; // Common Prodected Data bit is in DW88
1862 
1863         MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
1864             m_osInterface,
1865             cmdBuffer,
1866             &resourceParams));
1867     }
1868 
1869     // Reset dwSharedMocsOffset
1870     resourceParams.dwSharedMocsOffset = 0;
1871 
1872     // VP9 Segment Id Buffer
1873     if (params->presVp9SegmentIdBuffer != nullptr)
1874     {
1875         cmd.Vp9SegmentIdBufferReadWriteMemoryAddressAttributes.DW0.Value |=
1876             m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_VP9_SEGMENT_ID_BUFFER_CODEC].Value;
1877 
1878         resourceParams.presResource = params->presVp9SegmentIdBuffer;
1879         resourceParams.dwOffset = 0;
1880         resourceParams.pdwCmd = (cmd.DW86_87.Value);
1881         resourceParams.dwLocationInCmd = 86;
1882         resourceParams.bIsWritable = true;
1883 
1884         resourceParams.dwSharedMocsOffset = 88 - resourceParams.dwLocationInCmd; // Common Prodected Data bit is in DW88
1885 
1886         MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
1887             m_osInterface,
1888             cmdBuffer,
1889             &resourceParams));
1890     }
1891 
1892     // Reset dwSharedMocsOffset
1893     resourceParams.dwSharedMocsOffset = 0;
1894 
1895     // HVD Line Row Store Buffer
1896     if (m_vp9HvdRowStoreCache.bEnabled)
1897     {
1898         cmd.Vp9HvdLineRowstoreBufferReadWriteMemoryAddressAttributes.DW0.BaseAddressRowStoreScratchBufferCacheSelect = cmd.Vp9HvdLineRowstoreBufferReadWriteMemoryAddressAttributes.BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT_UNNAMED1;
1899         cmd.Vp9HvdLineRowstoreBufferReadWrite.DW0_1.Graphicsaddress476 = m_vp9HvdRowStoreCache.dwAddress;
1900     }
1901     else if (params->presHvdLineRowStoreBuffer != nullptr)
1902     {
1903         cmd.Vp9HvdLineRowstoreBufferReadWriteMemoryAddressAttributes.DW0.Value |=
1904             m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_VP9_HVD_ROWSTORE_BUFFER_CODEC].Value;
1905 
1906         resourceParams.presResource = params->presHvdLineRowStoreBuffer;
1907         resourceParams.dwOffset = 0;
1908         resourceParams.pdwCmd = (cmd.Vp9HvdLineRowstoreBufferReadWrite.DW0_1.Value);
1909         resourceParams.dwLocationInCmd = 89;
1910         resourceParams.bIsWritable = true;
1911 
1912         MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
1913             m_osInterface,
1914             cmdBuffer,
1915             &resourceParams));
1916     }
1917 
1918     // HVC Tile Row Store Buffer
1919     if (params->presHvdTileRowStoreBuffer != nullptr)
1920     {
1921         cmd.Vp9HvdTileRowstoreBufferReadWriteMemoryAddressAttributes.DW0.Value |=
1922             m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_VP9_HVD_ROWSTORE_BUFFER_CODEC].Value;
1923 
1924         resourceParams.presResource = params->presHvdTileRowStoreBuffer;
1925         resourceParams.dwOffset = 0;
1926         resourceParams.pdwCmd = (cmd.Vp9HvdTileRowstoreBufferReadWrite.DW0_1.Value);
1927         resourceParams.dwLocationInCmd = 92;
1928         resourceParams.bIsWritable = true;
1929 
1930         MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
1931             m_osInterface,
1932             cmdBuffer,
1933             &resourceParams));
1934     }
1935 
1936     // HEVC SAO streamout
1937     if (params->presSaoStreamOutBuffer != nullptr)
1938     {
1939         cmd.SaoRowstoreBufferReadWriteMemoryAddressAttributes.DW0.Value |=
1940             m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_STREAMOUT_DATA_CODEC].Value;
1941 
1942         resourceParams.presResource = params->presSaoStreamOutBuffer;
1943         resourceParams.dwOffset = 0;
1944         resourceParams.pdwCmd = (cmd.DW95_96.Value);
1945         resourceParams.dwLocationInCmd = 95;
1946         resourceParams.bIsWritable = true;
1947 
1948         MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
1949             m_osInterface,
1950             cmdBuffer,
1951             &resourceParams));
1952     }
1953 
1954     // Frame Statistics Streamout Data Destination Buffer
1955     if (params->presFrameStatStreamOutBuffer != nullptr)
1956     {
1957         cmd.FrameStatisticsStreamoutDataDestinationBufferAttributesReadWrite.DW0.Value |=
1958             m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_FRAME_STATS_STREAMOUT_DATA_CODEC].Value;
1959 
1960         resourceParams.presResource = params->presFrameStatStreamOutBuffer;
1961         resourceParams.dwOffset = params->dwFrameStatStreamOutOffset;
1962         resourceParams.pdwCmd = (cmd.FrameStatisticsStreamoutDataDestinationBufferBaseAddress.DW0_1.Value);
1963         resourceParams.dwLocationInCmd = 98;
1964         resourceParams.bIsWritable = true;
1965 
1966         MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
1967             m_osInterface,
1968             cmdBuffer,
1969             &resourceParams));
1970     }
1971 
1972     // SSE Source Pixel Row Store Buffer
1973     if (params->presSseSrcPixelRowStoreBuffer != nullptr)
1974     {
1975         cmd.SseSourcePixelRowstoreBufferAttributesReadWrite.DW0.Value |=
1976             m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_SSE_SRC_PIXEL_ROW_STORE_BUFFER_CODEC].Value;
1977 
1978         resourceParams.presResource = params->presSseSrcPixelRowStoreBuffer;
1979         resourceParams.dwOffset = 0;
1980         resourceParams.pdwCmd = (cmd.SseSourcePixelRowstoreBufferBaseAddress.DW0_1.Value);
1981         resourceParams.dwLocationInCmd = 101;
1982         resourceParams.bIsWritable = true;
1983 
1984         MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
1985             m_osInterface,
1986             cmdBuffer,
1987             &resourceParams));
1988     }
1989 
1990     //Gen11 new added buffer
1991     auto paramsG11 = dynamic_cast<PMHW_VDBOX_PIPE_BUF_ADDR_PARAMS_G11>(params);
1992     MHW_MI_CHK_NULL(paramsG11);
1993 
1994     // Slice state stream out buffer
1995     if (paramsG11->presSliceStateStreamOutBuffer != nullptr)
1996     {
1997         cmd.HcpScalabilitySliceStateBufferAttributesReadWrite.DW0.Value |=
1998             m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_SLICE_STATE_STREAM_OUT_BUFFER_CODEC].Value;
1999 
2000         resourceParams.presResource = paramsG11->presSliceStateStreamOutBuffer;
2001         resourceParams.dwOffset = 0;
2002         resourceParams.pdwCmd = (cmd.HcpScalabilitySliceStateBufferBaseAddress.DW0_1.Value);
2003         resourceParams.dwLocationInCmd = 104;
2004         resourceParams.bIsWritable = true;
2005 
2006         MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
2007             m_osInterface,
2008             cmdBuffer,
2009             &resourceParams));
2010     }
2011 
2012     // CABAC Syntax stream out buffer
2013     if (paramsG11->presCABACSyntaxStreamOutBuffer != nullptr)
2014     {
2015         cmd.HcpScalabilityCabacDecodedSyntaxElementsBufferAttributesReadWrite.DW0.Value |=
2016             m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_CABAC_SYNTAX_STREAM_OUT_BUFFER_CODEC].Value;
2017 
2018         resourceParams.presResource = paramsG11->presCABACSyntaxStreamOutBuffer;
2019         resourceParams.dwOffset = 0;
2020         resourceParams.pdwCmd = (cmd.HcpScalabilityCabacDecodedSyntaxElementsBufferBaseAddress.DW0_1.Value);
2021         resourceParams.dwLocationInCmd = 107;
2022         resourceParams.bIsWritable = true;
2023 
2024         MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
2025             m_osInterface,
2026             cmdBuffer,
2027             &resourceParams));
2028     }
2029 
2030     // MV Upper Right Col Store
2031     if (paramsG11->presMvUpRightColStoreBuffer != nullptr)
2032     {
2033         cmd.MotionVectorUpperRightColumnStoreBufferAttributesReadWrite.DW0.Value |=
2034             m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_PRED_COL_STORE_BUFFER_CODEC].Value;
2035 
2036         resourceParams.presResource = paramsG11->presMvUpRightColStoreBuffer;
2037         resourceParams.dwOffset = 0;
2038         resourceParams.pdwCmd = (cmd.MotionVectorUpperRightColumnStoreBufferBaseAddress.DW0_1.Value);
2039         resourceParams.dwLocationInCmd = 110;
2040         resourceParams.bIsWritable = true;
2041 
2042         MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
2043             m_osInterface,
2044             cmdBuffer,
2045             &resourceParams));
2046     }
2047 
2048     // IntraPred Upper Right Col Store
2049     if (paramsG11->presIntraPredUpRightColStoreBuffer != nullptr)
2050     {
2051         cmd.IntraPredictionUpperRightColumnStoreBufferAttributesReadWrite.DW0.Value |=
2052             m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_PRED_COL_STORE_BUFFER_CODEC].Value;
2053 
2054         resourceParams.presResource = paramsG11->presIntraPredUpRightColStoreBuffer;
2055         resourceParams.dwOffset = 0;
2056         resourceParams.pdwCmd = (cmd.IntraPredictionUpperRightColumnStoreBufferBaseAddress.DW0_1.Value);
2057         resourceParams.dwLocationInCmd = 113;
2058         resourceParams.bIsWritable = true;
2059 
2060         MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
2061             m_osInterface,
2062             cmdBuffer,
2063             &resourceParams));
2064     }
2065 
2066     // IntraPred Left Recon Col Store
2067     if (paramsG11->presIntraPredLeftReconColStoreBuffer != nullptr)
2068     {
2069         cmd.IntraPredictionLeftReconColumnStoreBufferAttributesReadWrite.DW0.Value |=
2070             m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_PRED_COL_STORE_BUFFER_CODEC].Value;
2071 
2072         resourceParams.presResource = paramsG11->presIntraPredLeftReconColStoreBuffer;
2073         resourceParams.dwOffset = 0;
2074         resourceParams.pdwCmd = (cmd.IntraPredictionLeftReconColumnStoreBufferBaseAddress.DW0_1.Value);
2075         resourceParams.dwLocationInCmd = 116;
2076         resourceParams.bIsWritable = true;
2077 
2078         MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
2079             m_osInterface,
2080             cmdBuffer,
2081             &resourceParams));
2082     }
2083 
2084     // CABAC Syntax Stream Out Buffer Max Address
2085     if (paramsG11->presCABACSyntaxStreamOutMaxAddr != nullptr)
2086     {
2087         resourceParams.presResource = paramsG11->presCABACSyntaxStreamOutMaxAddr;
2088         resourceParams.dwOffset = 0;
2089         resourceParams.pdwCmd = (cmd.HcpScalabilityCabacDecodedSyntaxElementsBufferMaxAddress.DW0_1.Value);
2090         resourceParams.dwLocationInCmd = 119;
2091         resourceParams.bIsWritable = true;
2092 
2093         MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
2094             m_osInterface,
2095             cmdBuffer,
2096             &resourceParams));
2097     }
2098 
2099     MHW_MI_CHK_STATUS(m_osInterface->pfnAddCommand(cmdBuffer, &cmd, sizeof(cmd)));
2100 
2101     return eStatus;
2102 }
2103 
AddHcpIndObjBaseAddrCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_IND_OBJ_BASE_ADDR_PARAMS params)2104 MOS_STATUS MhwVdboxHcpInterfaceG11::AddHcpIndObjBaseAddrCmd(
2105     PMOS_COMMAND_BUFFER                  cmdBuffer,
2106     PMHW_VDBOX_IND_OBJ_BASE_ADDR_PARAMS  params)
2107 {
2108     MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2109 
2110     MHW_FUNCTION_ENTER;
2111 
2112     MHW_MI_CHK_NULL(m_osInterface);
2113     MHW_MI_CHK_NULL(params);
2114 
2115     MHW_RESOURCE_PARAMS resourceParams;
2116     mhw_vdbox_hcp_g11_X::HCP_IND_OBJ_BASE_ADDR_STATE_CMD cmd;
2117 
2118     MOS_ZeroMemory(&resourceParams, sizeof(resourceParams));
2119     resourceParams.dwLsbNum = MHW_VDBOX_HCP_UPPER_BOUND_STATE_SHIFT;
2120     resourceParams.HwCommandType = MOS_MFX_INDIRECT_OBJ_BASE_ADDR;
2121 
2122     // mode specific settings
2123     if (CodecHalIsDecodeModeVLD(params->Mode))
2124     {
2125         MHW_MI_CHK_NULL(params->presDataBuffer);
2126 
2127         cmd.HcpIndirectBitstreamObjectMemoryAddressAttributes.DW0.Value |=
2128             m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_MFX_INDIRECT_BITSTREAM_OBJECT_DECODE].Value;
2129 
2130         resourceParams.presResource = params->presDataBuffer;
2131         resourceParams.dwOffset = params->dwDataOffset;
2132         resourceParams.pdwCmd = (cmd.HcpIndirectBitstreamObjectBaseAddress.DW0_1.Value);
2133         resourceParams.dwLocationInCmd = 1;
2134         resourceParams.dwSize = params->dwDataSize;
2135         resourceParams.bIsWritable = false;
2136 
2137         // upper bound of the allocated resource will be set at 3 DW apart from address location
2138         resourceParams.dwUpperBoundLocationOffsetFromCmd = 3;
2139 
2140         MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
2141             m_osInterface,
2142             cmdBuffer,
2143             &resourceParams));
2144 
2145         resourceParams.dwUpperBoundLocationOffsetFromCmd = 0;
2146     }
2147 
2148     // following is for encoder
2149     if (!m_decodeInUse)
2150     {
2151         if (params->presMvObjectBuffer)
2152         {
2153             cmd.HcpIndirectCuObjectObjectMemoryAddressAttributes.DW0.Value |=
2154                 m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_MFX_INDIRECT_MV_OBJECT_CODEC].Value;
2155 
2156             resourceParams.presResource = params->presMvObjectBuffer;
2157             resourceParams.dwOffset = params->dwMvObjectOffset;
2158             resourceParams.pdwCmd = (cmd.DW6_7.Value);
2159             resourceParams.dwLocationInCmd = 6;
2160             resourceParams.dwSize = MOS_ALIGN_CEIL(params->dwMvObjectSize, 0x1000);
2161             resourceParams.bIsWritable = false;
2162 
2163             // no upper bound for indirect CU object
2164             resourceParams.dwUpperBoundLocationOffsetFromCmd = 0;
2165 
2166             MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
2167                 m_osInterface,
2168                 cmdBuffer,
2169                 &resourceParams));
2170         }
2171 
2172         if (params->presPakBaseObjectBuffer)
2173         {
2174             cmd.HcpPakBseObjectAddressMemoryAddressAttributes.DW0.Value |=
2175                 m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_MFC_INDIRECT_PAKBASE_OBJECT_CODEC].Value;
2176 
2177             resourceParams.presResource = params->presPakBaseObjectBuffer;
2178             resourceParams.dwOffset = params->presPakBaseObjectBuffer->dwResourceOffset;
2179             resourceParams.pdwCmd = (cmd.DW9_10.Value);
2180             resourceParams.dwLocationInCmd = 9;
2181             resourceParams.dwSize = MOS_ALIGN_FLOOR(params->dwPakBaseObjectSize, 0x1000);
2182             resourceParams.bIsWritable = true;
2183 
2184             // upper bound of the allocated resource will be set at 3 DW apart from address location
2185             resourceParams.dwUpperBoundLocationOffsetFromCmd = 3;
2186 
2187             MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
2188                 m_osInterface,
2189                 cmdBuffer,
2190                 &resourceParams));
2191 
2192             resourceParams.dwUpperBoundLocationOffsetFromCmd = 0;
2193         }
2194 
2195         if (params->presCompressedHeaderBuffer)
2196         {
2197             cmd.HcpVp9PakCompressedHeaderSyntaxStreaminMemoryAddressAttributes.DW0.Value |=
2198                 m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_COMPRESSED_HEADER_BUFFER_CODEC].Value;
2199 
2200             resourceParams.presResource = params->presCompressedHeaderBuffer;
2201             resourceParams.dwOffset = 0;
2202             resourceParams.pdwCmd = (cmd.DW14_15.Value);
2203             resourceParams.dwLocationInCmd = 14;
2204             resourceParams.dwSize = params->dwCompressedHeaderSize;
2205             resourceParams.bIsWritable = false;
2206 
2207             MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
2208                 m_osInterface,
2209                 cmdBuffer,
2210                 &resourceParams));
2211         }
2212 
2213         if (params->presProbabilityCounterBuffer)
2214         {
2215             cmd.HcpVp9PakProbabilityCounterStreamoutMemoryAddressAttributes.DW0.Value |=
2216                 m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_VP9_PROBABILITY_COUNTER_BUFFER_CODEC].Value;
2217 
2218             resourceParams.presResource = params->presProbabilityCounterBuffer;
2219             resourceParams.dwOffset = params->dwProbabilityCounterOffset;
2220             resourceParams.pdwCmd = (cmd.DW17_18.Value);
2221             resourceParams.dwLocationInCmd = 17;
2222             resourceParams.dwSize = params->dwProbabilityCounterSize;
2223             resourceParams.bIsWritable = true;
2224 
2225             MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
2226                 m_osInterface,
2227                 cmdBuffer,
2228                 &resourceParams));
2229         }
2230 
2231         if (params->presProbabilityDeltaBuffer)
2232         {
2233             cmd.HcpVp9PakProbabilityDeltasStreaminMemoryAddressAttributes.DW0.Value |=
2234                 m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_PROBABILITY_DELTA_BUFFER_CODEC].Value;
2235 
2236             resourceParams.presResource = params->presProbabilityDeltaBuffer;
2237             resourceParams.dwOffset = 0;
2238             resourceParams.pdwCmd = (cmd.DW20_21.Value);
2239             resourceParams.dwLocationInCmd = 20;
2240             resourceParams.dwSize = params->dwProbabilityDeltaSize;
2241             resourceParams.bIsWritable = false;
2242 
2243             MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
2244                 m_osInterface,
2245                 cmdBuffer,
2246                 &resourceParams));
2247         }
2248 
2249         if (params->presTileRecordBuffer)
2250         {
2251             cmd.HcpVp9PakTileRecordStreamoutMemoryAddressAttributes.DW0.Value |=
2252                 m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_SIZE_STREAMOUT_CODEC].Value;
2253 
2254             resourceParams.presResource = params->presTileRecordBuffer;
2255             resourceParams.dwOffset = 0;
2256             resourceParams.pdwCmd = (cmd.DW23_24.Value);
2257             resourceParams.dwLocationInCmd = 23;
2258             resourceParams.dwSize = params->dwTileRecordSize;
2259             resourceParams.bIsWritable = true;
2260 
2261             MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
2262                 m_osInterface,
2263                 cmdBuffer,
2264                 &resourceParams));
2265 
2266         }
2267 
2268         if (params->presPakTileSizeStasBuffer)
2269         {
2270             cmd.HcpVp9PakTileRecordStreamoutMemoryAddressAttributes.DW0.Value |=
2271                 m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_SIZE_STREAMOUT_CODEC].Value;
2272 
2273             resourceParams.presResource = params->presPakTileSizeStasBuffer;
2274             resourceParams.dwOffset = params->dwPakTileSizeRecordOffset;
2275             resourceParams.pdwCmd = (cmd.DW23_24.Value);
2276             resourceParams.dwLocationInCmd = 23;
2277             resourceParams.dwSize = params->dwPakTileSizeStasBufferSize;
2278             resourceParams.bIsWritable = WRITE_WA;
2279 
2280             MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
2281                 m_osInterface,
2282                 cmdBuffer,
2283                 &resourceParams));
2284         }
2285 
2286     }
2287 
2288     MHW_MI_CHK_STATUS(m_osInterface->pfnAddCommand(cmdBuffer, &cmd, cmd.byteSize));
2289 
2290     return eStatus;
2291 }
2292 
AddHcpDecodePicStateCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_HEVC_PIC_STATE params)2293 MOS_STATUS MhwVdboxHcpInterfaceG11::AddHcpDecodePicStateCmd(
2294     PMOS_COMMAND_BUFFER              cmdBuffer,
2295     PMHW_VDBOX_HEVC_PIC_STATE        params)
2296 {
2297     MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2298 
2299     MHW_FUNCTION_ENTER;
2300 
2301     MHW_MI_CHK_NULL(params);
2302     MHW_MI_CHK_NULL(params->pHevcPicParams);
2303 
2304     auto paramsG11 = dynamic_cast<PMHW_VDBOX_HEVC_PIC_STATE_G11>(params);
2305     MHW_MI_CHK_NULL(paramsG11);
2306     auto hevcPicParams = paramsG11->pHevcPicParams;
2307     auto hevcExtPicParams = paramsG11->pHevcExtPicParams;
2308 
2309     if (hevcExtPicParams && hevcExtPicParams->PicRangeExtensionFlags.fields.cabac_bypass_alignment_enabled_flag == 1)
2310     {
2311         MHW_ASSERTMESSAGE("HW decoder doesn't support HEVC High Throughput profile so far.");
2312         MHW_ASSERTMESSAGE("So cabac_bypass_alignment_enabled_flag cannot equal to 1.");
2313         return MOS_STATUS_INVALID_PARAMETER;
2314     }
2315 
2316     mhw_vdbox_hcp_g11_X::HCP_PIC_STATE_CMD  *cmd =
2317         (mhw_vdbox_hcp_g11_X::HCP_PIC_STATE_CMD*)cmdBuffer->pCmdPtr;
2318 
2319     MHW_MI_CHK_STATUS(MhwVdboxHcpInterfaceGeneric<mhw_vdbox_hcp_g11_X>::AddHcpDecodePicStateCmd(cmdBuffer, params));
2320 
2321     // RExt fields
2322     cmd->DW2.ChromaSubsampling           = hevcPicParams->chroma_format_idc;
2323     cmd->DW3.Log2Maxtransformskipsize    = 0x2;
2324     if (hevcExtPicParams)
2325     {
2326         cmd->DW3.Log2Maxtransformskipsize            = hevcExtPicParams->log2_max_transform_skip_block_size_minus2 + 2;
2327         cmd->DW3.CrossComponentPredictionEnabledFlag = hevcExtPicParams->PicRangeExtensionFlags.fields.cross_component_prediction_enabled_flag;
2328         cmd->DW3.CabacBypassAlignmentEnabledFlag     = hevcExtPicParams->PicRangeExtensionFlags.fields.cabac_bypass_alignment_enabled_flag;
2329         cmd->DW3.PersistentRiceAdaptationEnabledFlag = hevcExtPicParams->PicRangeExtensionFlags.fields.persistent_rice_adaptation_enabled_flag;
2330         cmd->DW3.IntraSmoothingDisabledFlag          = hevcExtPicParams->PicRangeExtensionFlags.fields.intra_smoothing_disabled_flag;
2331         cmd->DW3.ExplicitRdpcmEnabledFlag            = hevcExtPicParams->PicRangeExtensionFlags.fields.explicit_rdpcm_enabled_flag;
2332         cmd->DW3.ImplicitRdpcmEnabledFlag            = hevcExtPicParams->PicRangeExtensionFlags.fields.implicit_rdpcm_enabled_flag;
2333         cmd->DW3.TransformSkipContextEnabledFlag     = hevcExtPicParams->PicRangeExtensionFlags.fields.transform_skip_context_enabled_flag;
2334         cmd->DW3.TransformSkipRotationEnabledFlag    = hevcExtPicParams->PicRangeExtensionFlags.fields.transform_skip_rotation_enabled_flag;
2335         cmd->DW3.HighPrecisionOffsetsEnableFlag      = hevcExtPicParams->PicRangeExtensionFlags.fields.high_precision_offsets_enabled_flag;
2336         cmd->DW2.ChromaQpOffsetListEnabledFlag       = hevcExtPicParams->PicRangeExtensionFlags.fields.chroma_qp_offset_list_enabled_flag;
2337         cmd->DW2.DiffCuChromaQpOffsetDepth           = hevcExtPicParams->diff_cu_chroma_qp_offset_depth;
2338         cmd->DW2.ChromaQpOffsetListLenMinus1         = hevcExtPicParams->chroma_qp_offset_list_len_minus1;
2339         cmd->DW2.Log2SaoOffsetScaleLuma              = hevcExtPicParams->log2_sao_offset_scale_luma;
2340         cmd->DW2.Log2SaoOffsetScaleChroma            = hevcExtPicParams->log2_sao_offset_scale_chroma;
2341 
2342         cmd->DW32.CbQpOffsetList0 = hevcExtPicParams->cb_qp_offset_list[0];
2343         cmd->DW32.CbQpOffsetList1 = hevcExtPicParams->cb_qp_offset_list[1];
2344         cmd->DW32.CbQpOffsetList2 = hevcExtPicParams->cb_qp_offset_list[2];
2345         cmd->DW32.CbQpOffsetList3 = hevcExtPicParams->cb_qp_offset_list[3];
2346         cmd->DW32.CbQpOffsetList4 = hevcExtPicParams->cb_qp_offset_list[4];
2347         cmd->DW32.CbQpOffsetList5 = hevcExtPicParams->cb_qp_offset_list[5];
2348         cmd->DW33.CrQpOffsetList0 = hevcExtPicParams->cr_qp_offset_list[0];
2349         cmd->DW33.CrQpOffsetList1 = hevcExtPicParams->cr_qp_offset_list[1];
2350         cmd->DW33.CrQpOffsetList2 = hevcExtPicParams->cr_qp_offset_list[2];
2351         cmd->DW33.CrQpOffsetList3 = hevcExtPicParams->cr_qp_offset_list[3];
2352         cmd->DW33.CrQpOffsetList4 = hevcExtPicParams->cr_qp_offset_list[4];
2353         cmd->DW33.CrQpOffsetList5 = hevcExtPicParams->cr_qp_offset_list[5];
2354 
2355         if (MEDIA_IS_WA(m_waTable, WaCheckCrossComponentPredictionEnabledFlag))
2356         {
2357             MHW_NORMALMESSAGE("cross_component_prediction_enabled_flag:%d\n",
2358                 hevcExtPicParams->PicRangeExtensionFlags.fields.cross_component_prediction_enabled_flag);
2359             printf("cross_component_prediction_enabled_flag:%d\n",
2360                 hevcExtPicParams->PicRangeExtensionFlags.fields.cross_component_prediction_enabled_flag);
2361         }
2362     }
2363 
2364     cmd->DW5.BitDepthChromaMinus8 = hevcPicParams->bit_depth_chroma_minus8;
2365     cmd->DW5.BitDepthLumaMinus8 = hevcPicParams->bit_depth_luma_minus8;
2366 
2367     return eStatus;
2368 }
2369 
AddHcpEncodePicStateCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_HEVC_PIC_STATE params)2370 MOS_STATUS MhwVdboxHcpInterfaceG11::AddHcpEncodePicStateCmd(
2371     PMOS_COMMAND_BUFFER             cmdBuffer,
2372     PMHW_VDBOX_HEVC_PIC_STATE       params)
2373 {
2374     MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2375 
2376     MHW_FUNCTION_ENTER;
2377 
2378     MHW_MI_CHK_NULL(params);
2379     MHW_MI_CHK_NULL(params->pHevcEncSeqParams);
2380     MHW_MI_CHK_NULL(params->pHevcEncPicParams);
2381 
2382     PMHW_BATCH_BUFFER                       batchBuffer = nullptr;
2383     mhw_vdbox_hcp_g11_X::HCP_PIC_STATE_CMD  cmd;
2384 
2385     auto hevcSeqParams = params->pHevcEncSeqParams;
2386     auto hevcPicParams = params->pHevcEncPicParams;
2387 
2388     if (params->bBatchBufferInUse)
2389     {
2390         MHW_MI_CHK_NULL(params->pBatchBuffer);
2391         batchBuffer = params->pBatchBuffer;
2392     }
2393 
2394     cmd.DW1.Framewidthinmincbminus1     = hevcSeqParams->wFrameWidthInMinCbMinus1;
2395     cmd.DW1.PakTransformSkipEnable      = cmd.DW4.TransformSkipEnabledFlag = hevcPicParams->transform_skip_enabled_flag;
2396     cmd.DW1.Frameheightinmincbminus1    = hevcSeqParams->wFrameHeightInMinCbMinus1;
2397 
2398     cmd.DW2.Mincusize                   = hevcSeqParams->log2_min_coding_block_size_minus3;
2399     cmd.DW2.CtbsizeLcusize              = hevcSeqParams->log2_max_coding_block_size_minus3;
2400     cmd.DW2.Maxtusize                   = hevcSeqParams->log2_max_transform_block_size_minus2;
2401     cmd.DW2.Mintusize                   = hevcSeqParams->log2_min_transform_block_size_minus2;
2402     cmd.DW2.Minpcmsize = 0; // Not supported in CNL
2403     cmd.DW2.Maxpcmsize = 0; // Not supported in CNL
2404 
2405     cmd.DW3.Colpicisi = 0;
2406     cmd.DW3.Curpicisi = 0;
2407 
2408     cmd.DW4.SampleAdaptiveOffsetEnabledFlag         = params->bSAOEnable;
2409     cmd.DW4.PcmEnabledFlag                          = 0; // Not supported in CNL
2410     cmd.DW4.CuQpDeltaEnabledFlag                    = hevcPicParams->cu_qp_delta_enabled_flag; // In VDENC mode, this field should always be set to 1.
2411     cmd.DW4.DiffCuQpDeltaDepthOrNamedAsMaxDqpDepth  = hevcPicParams->diff_cu_qp_delta_depth;
2412     cmd.DW4.PcmLoopFilterDisableFlag                = hevcSeqParams->pcm_loop_filter_disable_flag;
2413     cmd.DW4.ConstrainedIntraPredFlag                = 0;
2414     cmd.DW4.Log2ParallelMergeLevelMinus2            = 0;
2415     cmd.DW4.SignDataHidingFlag                      = 0; // currently not supported in encoder
2416     cmd.DW4.LoopFilterAcrossTilesEnabledFlag        = 0;
2417     cmd.DW4.EntropyCodingSyncEnabledFlag            = 0; // not supported as per Dimas notes. PAK restriction
2418     cmd.DW4.TilesEnabledFlag                        = 0; // not supported in encoder
2419     cmd.DW4.WeightedPredFlag                        = hevcPicParams->weighted_pred_flag;
2420     cmd.DW4.WeightedBipredFlag                      = hevcPicParams->weighted_bipred_flag;
2421     cmd.DW4.Fieldpic                                = 0;
2422     cmd.DW4.Bottomfield                             = 0;
2423     cmd.DW4.AmpEnabledFlag                          = hevcSeqParams->amp_enabled_flag;
2424     cmd.DW4.TransquantBypassEnableFlag              = hevcPicParams->transquant_bypass_enabled_flag;
2425     cmd.DW4.StrongIntraSmoothingEnableFlag          = hevcSeqParams->strong_intra_smoothing_enable_flag;
2426     cmd.DW4.CuPacketStructure                       = 0; // output from HW VME, 1/2 CL per CU
2427     cmd.DW4.ConstrainedIntraPredFlag                = hevcPicParams->constrained_intra_pred_flag;
2428 
2429     cmd.DW5.PicCbQpOffset                           = hevcPicParams->pps_cb_qp_offset & 0x1f;
2430     cmd.DW5.PicCrQpOffset                           = hevcPicParams->pps_cr_qp_offset & 0x1f;
2431     cmd.DW5.MaxTransformHierarchyDepthIntraOrNamedAsTuMaxDepthIntra = hevcSeqParams->max_transform_hierarchy_depth_intra;
2432     cmd.DW5.MaxTransformHierarchyDepthInterOrNamedAsTuMaxDepthInter = hevcSeqParams->max_transform_hierarchy_depth_inter;
2433     cmd.DW5.PcmSampleBitDepthChromaMinus1                           = hevcSeqParams->pcm_sample_bit_depth_chroma_minus1;
2434     cmd.DW5.PcmSampleBitDepthLumaMinus1                             = hevcSeqParams->pcm_sample_bit_depth_luma_minus1;
2435     cmd.DW5.BitDepthChromaMinus8                                    = hevcSeqParams->bit_depth_chroma_minus8;
2436     cmd.DW5.BitDepthLumaMinus8                                      = hevcSeqParams->bit_depth_luma_minus8;
2437 
2438     cmd.DW6.LcuMaxBitsizeAllowed                                    = hevcPicParams->LcuMaxBitsizeAllowed;
2439     cmd.DW6.Nonfirstpassflag                                        = 0;    // needs to be updated for HEVC VDEnc
2440     cmd.DW6.LcumaxbitstatusenLcumaxsizereportmask                   = 0;
2441     cmd.DW6.FrameszoverstatusenFramebitratemaxreportmask            = 0;
2442     cmd.DW6.FrameszunderstatusenFramebitrateminreportmask           = 0;
2443     cmd.DW6.LoadSlicePointerFlag                                    = 0; // must be set to 0 for encoder
2444 
2445     cmd.DW19.RdoqEnable                                             = params->bHevcRdoqEnabled;
2446     //only 420 format support SSE in DP encode
2447     cmd.DW19.SseEnable                                              = params->bUseVDEnc || params->sseEnabledInVmeEncode;
2448     // only for VDEnc
2449     cmd.DW19.RhodomainRateControlEnable                             = params->bUseVDEnc || params->rhodomainRCEnable;   // DW19[6]
2450                                                                 // RhoDomainFrameLevelQP: This QP is used for RhoDomain Frame level statistics.
2451     cmd.DW19.Rhodomainframelevelqp                                  = cmd.DW19.RhodomainRateControlEnable ? hevcPicParams->QpY : 0;  // DW19[13:8]
2452     cmd.DW19.FractionalQpAdjustmentEnable                           = params->bUseVDEnc;   // DW19[17]
2453 
2454     cmd.DW19.FirstSliceSegmentInPicFlag                             = 1;
2455     cmd.DW19.Nalunittypeflag                                        = 1;
2456 
2457     // For HEVC VDEnc Dynamic Slice Control
2458     if (hevcSeqParams->SliceSizeControl == 1)
2459     {
2460         cmd.DW19.PakDynamicSliceModeEnable      = 1;
2461         cmd.DW19.SlicePicParameterSetId         = hevcPicParams->slice_pic_parameter_set_id;
2462         cmd.DW19.Nalunittypeflag                = (hevcPicParams->nal_unit_type >= HEVC_NAL_UT_BLA_W_LP) &&
2463             (hevcPicParams->nal_unit_type <= HEVC_NAL_UT_RSV_IRAP_VCL23);
2464         cmd.DW19.FirstSliceSegmentInPicFlag     = 1;
2465         cmd.DW19.NoOutputOfPriorPicsFlag        = hevcPicParams->no_output_of_prior_pics_flag;
2466 
2467         cmd.DW21.SliceSizeThresholdInBytes      = hevcPicParams->MaxSliceSizeInBytes;  // HuC FW is expected to update this
2468         cmd.DW22.TargetSliceSizeInBytes         = hevcPicParams->MaxSliceSizeInBytes;
2469     }
2470 
2471     cmd.DW4.TilesEnabledFlag                 = hevcPicParams->tiles_enabled_flag;
2472     cmd.DW2.ChromaSubsampling                = hevcSeqParams->chroma_format_idc;
2473     cmd.DW4.LoopFilterAcrossTilesEnabledFlag = hevcPicParams->loop_filter_across_tiles_flag;
2474 
2475     // Disable HEVC RDOQ for Intra blocks
2476     cmd.DW20.Intratucountbasedrdoqdisable   = params->bRDOQIntraTUDisable;
2477     cmd.DW37.Rdoqintratuthreshold           = params->wRDOQIntraTUThreshold;
2478 
2479     MHW_MI_CHK_STATUS(Mhw_AddCommandCmdOrBB(m_osInterface, cmdBuffer, batchBuffer, &cmd, sizeof(cmd)));
2480 
2481     return eStatus;
2482 }
2483 
AddHcpTileStateCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_HEVC_TILE_STATE params)2484 MOS_STATUS MhwVdboxHcpInterfaceG11::AddHcpTileStateCmd(
2485     PMOS_COMMAND_BUFFER              cmdBuffer,
2486     PMHW_VDBOX_HEVC_TILE_STATE       params)
2487 {
2488     MOS_STATUS  eStatus = MOS_STATUS_SUCCESS;
2489 
2490     MHW_FUNCTION_ENTER;
2491 
2492     MHW_MI_CHK_NULL(m_osInterface);
2493     MHW_MI_CHK_NULL(params);
2494     MHW_MI_CHK_NULL(params->pTileColWidth);
2495     MHW_MI_CHK_NULL(params->pTileRowHeight);
2496 
2497     mhw_vdbox_hcp_g11_X::HCP_TILE_STATE_CMD     cmd;
2498 
2499     auto hevcPicParams = params->pHevcPicParams;
2500 
2501     MHW_CHK_COND(hevcPicParams->num_tile_rows_minus1 >= HEVC_NUM_MAX_TILE_ROW, "num_tile_rows_minus1 is out of range!");
2502     MHW_CHK_COND(hevcPicParams->num_tile_columns_minus1 >= HEVC_NUM_MAX_TILE_COLUMN, "num_tile_columns_minus1 is out of range!");
2503 
2504     cmd.DW1.Numtilecolumnsminus1 = hevcPicParams->num_tile_columns_minus1;
2505     cmd.DW1.Numtilerowsminus1    = hevcPicParams->num_tile_rows_minus1;
2506 
2507     uint32_t column        = hevcPicParams->num_tile_columns_minus1 + 1;
2508     uint32_t lastDwEleNum  = column % 4;
2509     uint32_t count       = column / 4;
2510 
2511     for (uint8_t i = 0; i < 5; i++)
2512     {
2513         cmd.CtbColumnPositionOfTileColumn[i].DW0.Value = 0;
2514     }
2515 
2516     for (uint8_t i = 0; i < 6; i++)
2517     {
2518         cmd.CtbRowPositionOfTileRow[i].DW0.Value = 0;
2519     }
2520 
2521     cmd.CtbColumnPositionMsb.DW0.Value = 0;
2522     cmd.CtbColumnPositionMsb.DW1.Value = 0;
2523     cmd.CtbRowPositionMsb.DW0.Value = 0;
2524     cmd.CtbRowPositionMsb.DW1.Value = 0;
2525 
2526     uint32_t colCumulativeValue = 0;
2527     uint32_t rowCumulativeValue = 0;
2528 
2529     // Column Position
2530     for (uint32_t i = 0; i < count; i++)
2531     {
2532         uint32_t &CtbColumnMsbValue = ((i << 3) >> 5) == 0 ? cmd.CtbColumnPositionMsb.DW0.Value : cmd.CtbColumnPositionMsb.DW1.Value;
2533 
2534         cmd.CtbColumnPositionOfTileColumn[i].DW0.Ctbpos0I   = colCumulativeValue & 0xFF;//lower 8bits
2535         CtbColumnMsbValue                                   = CtbColumnMsbValue |
2536                                                               (((colCumulativeValue >> 8) & 0x3) << ((i*8) + 0));//MSB 2bits
2537         colCumulativeValue                                 += params->pTileColWidth[4 * i];
2538 
2539         cmd.CtbColumnPositionOfTileColumn[i].DW0.Ctbpos1I   = colCumulativeValue & 0xFF;//lower 8bits
2540         CtbColumnMsbValue                                   = CtbColumnMsbValue |
2541                                                               (((colCumulativeValue >> 8) & 0x3) << ((i * 8) + 2));//MSB 2bits
2542         colCumulativeValue                                 += params->pTileColWidth[4 * i + 1];
2543 
2544         cmd.CtbColumnPositionOfTileColumn[i].DW0.Ctbpos2I   = colCumulativeValue & 0xFF;//lower 8bits
2545         CtbColumnMsbValue                                   = CtbColumnMsbValue |
2546                                                               (((colCumulativeValue >> 8) & 0x3) << ((i * 8) + 4));//MSB 2bits
2547         colCumulativeValue                                 += params->pTileColWidth[4 * i + 2];
2548 
2549         cmd.CtbColumnPositionOfTileColumn[i].DW0.Ctbpos3I   = colCumulativeValue & 0xFF;//lower 8bits
2550         CtbColumnMsbValue                                   = CtbColumnMsbValue |
2551                                                               (((colCumulativeValue >> 8) & 0x3) << ((i * 8) + 6));//MSB 2bits
2552         colCumulativeValue                                 += params->pTileColWidth[4 * i + 3];
2553     }
2554 
2555     if (lastDwEleNum)
2556     {
2557         uint32_t i = count;
2558         uint32_t &CtbColumnMsbValue = ((i << 3) >> 5) == 0 ? cmd.CtbColumnPositionMsb.DW0.Value : cmd.CtbColumnPositionMsb.DW1.Value;
2559 
2560         if (i < 5)
2561         {
2562             cmd.CtbColumnPositionOfTileColumn[i].DW0.Ctbpos0I   = colCumulativeValue & 0xFF;//lower 8bits
2563             CtbColumnMsbValue                                   = CtbColumnMsbValue |
2564                                                                   (((colCumulativeValue >> 8) & 0x3) << ((i * 8) + 0));//MSB 2bits
2565             if (lastDwEleNum > 1)
2566             {
2567                 colCumulativeValue += params->pTileColWidth[4 * i];
2568                 cmd.CtbColumnPositionOfTileColumn[i].DW0.Ctbpos1I   = colCumulativeValue & 0xFF;//lower 8bits
2569                 CtbColumnMsbValue                                   = CtbColumnMsbValue |
2570                                                                       (((colCumulativeValue >> 8) & 0x3) << ((i * 8) + 2));//MSB 2bits
2571 
2572                 if (lastDwEleNum > 2)
2573                 {
2574                     colCumulativeValue += params->pTileColWidth[4 * i + 1];
2575                     cmd.CtbColumnPositionOfTileColumn[i].DW0.Ctbpos2I   = colCumulativeValue & 0xFF;//lower 8bits
2576                     CtbColumnMsbValue                                   = CtbColumnMsbValue |
2577                                                                           (((colCumulativeValue >> 8) & 0x3) << ((i * 8) + 4));//MSB 2bits
2578                 }
2579             }
2580         }
2581     }
2582 
2583     // Row Postion
2584     uint32_t row = hevcPicParams->num_tile_rows_minus1 + 1;
2585     lastDwEleNum = row % 4;
2586     count = row / 4;
2587 
2588     for (uint32_t i = 0; i < count; i++)
2589     {
2590         uint32_t &CtbRowMsbValue = ((i << 3) >> 5) == 0 ? cmd.CtbRowPositionMsb.DW0.Value : cmd.CtbRowPositionMsb.DW1.Value;
2591 
2592         cmd.CtbRowPositionOfTileRow[i].DW0.Ctbpos0I = rowCumulativeValue & 0xFF;//lower 8bits
2593         CtbRowMsbValue                              = CtbRowMsbValue |
2594                                                       (((rowCumulativeValue >> 8) & 0x3) << ((i * 8) + 0));//MSB 2bits
2595         rowCumulativeValue                         += params->pTileRowHeight[4 * i];
2596 
2597         cmd.CtbRowPositionOfTileRow[i].DW0.Ctbpos1I = rowCumulativeValue & 0xFF;//lower 8bits
2598         CtbRowMsbValue                              = CtbRowMsbValue |
2599                                                       (((rowCumulativeValue >> 8) & 0x3) << ((i * 8) + 2));//MSB 2bits
2600         rowCumulativeValue                         += params->pTileRowHeight[4 * i + 1];
2601 
2602         cmd.CtbRowPositionOfTileRow[i].DW0.Ctbpos2I = rowCumulativeValue & 0xFF;//lower 8bits
2603         CtbRowMsbValue                              = CtbRowMsbValue |
2604                                                       (((rowCumulativeValue >> 8) & 0x3) << ((i * 8) + 4));//MSB 2bits
2605         rowCumulativeValue                         += params->pTileRowHeight[4 * i + 2];
2606 
2607         cmd.CtbRowPositionOfTileRow[i].DW0.Ctbpos3I = rowCumulativeValue & 0xFF;//lower 8bits
2608         CtbRowMsbValue                              = CtbRowMsbValue |
2609                                                       (((rowCumulativeValue >> 8) & 0x3) << ((i * 8) + 6));//MSB 2bits
2610         rowCumulativeValue                         += params->pTileRowHeight[4 * i + 3];
2611     }
2612 
2613     if (lastDwEleNum)
2614     {
2615         uint32_t i = count;
2616         uint32_t &CtbRowMsbValue = ((i << 3) >> 5) == 0 ? cmd.CtbRowPositionMsb.DW0.Value : cmd.CtbRowPositionMsb.DW1.Value;
2617         if(i < 6)
2618         {
2619             cmd.CtbRowPositionOfTileRow[i].DW0.Ctbpos0I = rowCumulativeValue & 0xFF;//lower 8bits
2620             CtbRowMsbValue                              = CtbRowMsbValue |
2621                                                           (((rowCumulativeValue >> 8) & 0x3) << ((i * 8) + 0));//MSB 2bits
2622 
2623             if (lastDwEleNum > 1)
2624             {
2625                 rowCumulativeValue                         += params->pTileRowHeight[4 * i];
2626                 cmd.CtbRowPositionOfTileRow[i].DW0.Ctbpos1I = rowCumulativeValue & 0xFF;//lower 8bits
2627                 CtbRowMsbValue                              = CtbRowMsbValue |
2628                                                               (((rowCumulativeValue >> 8) & 0x3) << ((i * 8) + 2));//MSB 2bits
2629 
2630                 if (lastDwEleNum > 2)
2631                 {
2632                     rowCumulativeValue                         += params->pTileRowHeight[4 * i + 1];
2633                     cmd.CtbRowPositionOfTileRow[i].DW0.Ctbpos2I = rowCumulativeValue & 0xFF;//lower 8bits
2634                     CtbRowMsbValue                              = CtbRowMsbValue |
2635                                                                   (((rowCumulativeValue >> 8) & 0x3) << ((i * 8) + 4));//MSB 2bits
2636                 }
2637             }
2638         }
2639     }
2640 
2641     MHW_MI_CHK_STATUS(m_osInterface->pfnAddCommand(cmdBuffer, &cmd, sizeof(cmd)));
2642 
2643     return eStatus;
2644 }
2645 
AddHcpWeightOffsetStateCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_BATCH_BUFFER batchBuffer,PMHW_VDBOX_HEVC_WEIGHTOFFSET_PARAMS params)2646 MOS_STATUS MhwVdboxHcpInterfaceG11::AddHcpWeightOffsetStateCmd(
2647     PMOS_COMMAND_BUFFER                  cmdBuffer,
2648     PMHW_BATCH_BUFFER                    batchBuffer,
2649     PMHW_VDBOX_HEVC_WEIGHTOFFSET_PARAMS  params)
2650 {
2651     MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2652 
2653     MHW_FUNCTION_ENTER;
2654 
2655     MHW_MI_CHK_NULL(params);
2656 
2657     mhw_vdbox_hcp_g11_X::HCP_WEIGHTOFFSET_STATE_CMD cmd;
2658 
2659     uint8_t i = 0;
2660     uint8_t refIdx = 0;
2661 
2662     cmd.DW1.Refpiclistnum = i = params->ucList;
2663 
2664     // Luma
2665     for (refIdx = 0; refIdx < CODEC_MAX_NUM_REF_FRAME_HEVC; refIdx++)
2666     {
2667         cmd.Lumaoffsets[refIdx].DW0.DeltaLumaWeightLxI  = params->LumaWeights[i][refIdx];
2668         cmd.Lumaoffsets[refIdx].DW0.LumaOffsetLxI       = (char)(params->LumaOffsets[i][refIdx] & 0xFF);//lower 8bits
2669         cmd.Lumaoffsets[refIdx].DW0.LumaOffsetLxIMsbyte = (char)((params->LumaOffsets[i][refIdx] >> 8) & 0xFF);//MSB 8bits
2670     }
2671 
2672     // Chroma
2673     for (refIdx = 0; refIdx < CODEC_MAX_NUM_REF_FRAME_HEVC; refIdx++)
2674     {
2675         //Cb
2676         cmd.Chromaoffsets[refIdx].DW0.DeltaChromaWeightLxI0 = params->ChromaWeights[i][refIdx][0];
2677         cmd.Chromaoffsets[refIdx].DW0.ChromaoffsetlxI0      = (char)(params->ChromaOffsets[i][refIdx][0] & 0xFF);//lower 8bits
2678 
2679         //Cr
2680         cmd.Chromaoffsets[refIdx].DW0.DeltaChromaWeightLxI1 = params->ChromaWeights[i][refIdx][1];
2681         cmd.Chromaoffsets[refIdx].DW0.ChromaoffsetlxI1      = (char)(params->ChromaOffsets[i][refIdx][1] & 0xFF);//lower 8bits
2682     }
2683 
2684     for (refIdx = 0; refIdx < CODEC_MAX_NUM_REF_FRAME_HEVC - 1; refIdx += 2)//MSB 8bits
2685     {
2686         cmd.Chromaoffsetsext[refIdx >> 1].DW0.ChromaoffsetlxI0Msbyte     = (char)((params->ChromaOffsets[i][refIdx][0] >> 8) & 0xFF);
2687         cmd.Chromaoffsetsext[refIdx >> 1].DW0.ChromaoffsetlxI10Msbyte    = (char)((params->ChromaOffsets[i][refIdx + 1][0] >> 8) & 0xFF);
2688         cmd.Chromaoffsetsext[refIdx >> 1].DW0.ChromaoffsetlxI1Msbyte     = (char)((params->ChromaOffsets[i][refIdx][1] >> 8) & 0xFF);
2689         cmd.Chromaoffsetsext[refIdx >> 1].DW0.ChromaoffsetlxI11Msbyte    = (char)((params->ChromaOffsets[i][refIdx + 1][1] >> 8) & 0xFF);
2690     }
2691 
2692     //last one
2693     cmd.Chromaoffsetsext[refIdx >> 1].DW0.ChromaoffsetlxI0Msbyte         = (char)((params->ChromaOffsets[i][refIdx][0] >> 8) & 0xFF);//MSB 8bits
2694     cmd.Chromaoffsetsext[refIdx >> 1].DW0.ChromaoffsetlxI1Msbyte         = (char)((params->ChromaOffsets[i][refIdx][1] >> 8) & 0xFF);//MSB 8bits
2695 
2696     if (cmdBuffer == nullptr && batchBuffer == nullptr)
2697     {
2698         MHW_ASSERTMESSAGE("There was no valid buffer to add the HW command to.");
2699     }
2700 
2701     MHW_MI_CHK_STATUS(Mhw_AddCommandCmdOrBB(m_osInterface, cmdBuffer, batchBuffer, &cmd, sizeof(cmd)));
2702 
2703     return eStatus;
2704 }
2705 
AddHcpFqmStateCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_QM_PARAMS params)2706 MOS_STATUS MhwVdboxHcpInterfaceG11::AddHcpFqmStateCmd(
2707     PMOS_COMMAND_BUFFER              cmdBuffer,
2708     PMHW_VDBOX_QM_PARAMS             params)
2709 {
2710     MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2711 
2712     MHW_FUNCTION_ENTER;
2713 
2714     MHW_MI_CHK_NULL(m_osInterface);
2715     MHW_MI_CHK_NULL(cmdBuffer);
2716     MHW_MI_CHK_NULL(params);
2717 
2718     mhw_vdbox_hcp_g11_X::HCP_FQM_STATE_CMD cmd;
2719 
2720     if (params->Standard == CODECHAL_HEVC)
2721     {
2722         MHW_MI_CHK_NULL(params->pHevcIqMatrix);
2723 
2724         auto iqMatrix = params->pHevcIqMatrix;
2725         uint16_t *fqMatrix = (uint16_t*)cmd.Quantizermatrix;
2726 
2727         /* 4x4 */
2728         for (uint8_t i = 0; i < 32; i++)
2729         {
2730             cmd.Quantizermatrix[i] = 0;
2731         }
2732         for (uint8_t intraInter = 0; intraInter <= 1; intraInter++)
2733         {
2734             cmd.DW1.IntraInter = intraInter;
2735             cmd.DW1.Sizeid = 0;
2736             cmd.DW1.ColorComponent = 0;
2737 
2738             for (uint8_t i = 0; i < 16; i++)
2739             {
2740                 fqMatrix[i] =
2741                     GetReciprocalScalingValue(iqMatrix->List4x4[3 * intraInter][i]);
2742             }
2743 
2744             MHW_MI_CHK_STATUS(m_osInterface->pfnAddCommand(cmdBuffer, &cmd, cmd.byteSize));
2745         }
2746 
2747         /* 8x8, 16x16 and 32x32 */
2748         for (uint8_t i = 0; i < 32; i++)
2749         {
2750             cmd.Quantizermatrix[i] = 0;
2751         }
2752         for (uint8_t intraInter = 0; intraInter <= 1; intraInter++)
2753         {
2754             cmd.DW1.IntraInter = intraInter;
2755             cmd.DW1.Sizeid = 1;
2756             cmd.DW1.ColorComponent = 0;
2757 
2758             for (uint8_t i = 0; i < 64; i++)
2759             {
2760                 fqMatrix[i] =
2761                     GetReciprocalScalingValue(iqMatrix->List8x8[3 * intraInter][i]);
2762             }
2763 
2764             MHW_MI_CHK_STATUS(m_osInterface->pfnAddCommand(cmdBuffer, &cmd, cmd.byteSize));
2765         }
2766 
2767         /* 16x16 DC */
2768         for (uint8_t i = 0; i < 32; i++)
2769         {
2770             cmd.Quantizermatrix[i] = 0;
2771         }
2772         for (uint8_t intraInter = 0; intraInter <= 1; intraInter++)
2773         {
2774             cmd.DW1.IntraInter = intraInter;
2775             cmd.DW1.Sizeid = 2;
2776             cmd.DW1.ColorComponent = 0;
2777             cmd.DW1.FqmDcValue1Dc = GetReciprocalScalingValue(iqMatrix->ListDC16x16[3 * intraInter]);
2778 
2779             for (uint8_t i = 0; i < 64; i++)
2780             {
2781                 fqMatrix[i] =
2782                     GetReciprocalScalingValue(iqMatrix->List16x16[3 * intraInter][i]);
2783             }
2784 
2785             MHW_MI_CHK_STATUS(m_osInterface->pfnAddCommand(cmdBuffer, &cmd, cmd.byteSize));
2786         }
2787 
2788         /* 32x32 DC */
2789         for (uint8_t i = 0; i < 32; i++)
2790         {
2791             cmd.Quantizermatrix[i] = 0;
2792         }
2793         for (uint8_t intraInter = 0; intraInter <= 1; intraInter++)
2794         {
2795             cmd.DW1.IntraInter = intraInter;
2796             cmd.DW1.Sizeid = 3;
2797             cmd.DW1.ColorComponent = 0;
2798             cmd.DW1.FqmDcValue1Dc = GetReciprocalScalingValue(iqMatrix->ListDC32x32[intraInter]);
2799 
2800             for (uint8_t i = 0; i < 64; i++)
2801             {
2802                 fqMatrix[i] =
2803                     GetReciprocalScalingValue(iqMatrix->List32x32[intraInter][i]);
2804             }
2805 
2806             MHW_MI_CHK_STATUS(m_osInterface->pfnAddCommand(cmdBuffer, &cmd, cmd.byteSize));
2807         }
2808     }
2809     else
2810     {
2811         eStatus = MOS_STATUS_INVALID_PARAMETER;
2812     }
2813 
2814     return eStatus;
2815 }
2816 
AddHcpDecodeSliceStateCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_HEVC_SLICE_STATE hevcSliceState)2817 MOS_STATUS MhwVdboxHcpInterfaceG11::AddHcpDecodeSliceStateCmd(
2818     PMOS_COMMAND_BUFFER             cmdBuffer,
2819     PMHW_VDBOX_HEVC_SLICE_STATE     hevcSliceState)
2820 {
2821     MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2822 
2823     MHW_FUNCTION_ENTER;
2824 
2825     MHW_MI_CHK_NULL(hevcSliceState);
2826     MHW_MI_CHK_NULL(hevcSliceState->pHevcPicParams);
2827     MHW_MI_CHK_NULL(hevcSliceState->pHevcSliceParams);
2828 
2829     auto hevcSliceStateG11  = dynamic_cast<PMHW_VDBOX_HEVC_SLICE_STATE_G11>(hevcSliceState);
2830     MHW_MI_CHK_NULL(hevcSliceStateG11);
2831     auto hevcSliceParams    = hevcSliceState->pHevcSliceParams;
2832     auto hevcExtSliceParams = hevcSliceStateG11->pHevcExtSliceParams;
2833     auto hevcPicParams      = hevcSliceState->pHevcPicParams;
2834     auto hevcExtPicParams   = hevcSliceStateG11->pHevcExtPicParam;
2835 
2836     uint32_t ctbSize      = 1 << (hevcPicParams->log2_diff_max_min_luma_coding_block_size +
2837                             hevcPicParams->log2_min_luma_coding_block_size_minus3 + 3);
2838     uint32_t widthInPix   = (1 << (hevcPicParams->log2_min_luma_coding_block_size_minus3 + 3)) *
2839                             (hevcPicParams->PicWidthInMinCbsY);
2840     uint32_t widthInCtb   = MOS_ROUNDUP_DIVIDE(widthInPix, ctbSize);
2841 
2842     mhw_vdbox_hcp_g11_X::HCP_SLICE_STATE_CMD  *cmd =
2843         (mhw_vdbox_hcp_g11_X::HCP_SLICE_STATE_CMD*)cmdBuffer->pCmdPtr;
2844 
2845     MHW_MI_CHK_STATUS(MhwVdboxHcpInterfaceGeneric<mhw_vdbox_hcp_g11_X>::AddHcpDecodeSliceStateCmd(cmdBuffer, hevcSliceState));
2846 
2847     int32_t sliceQP = hevcSliceParams->slice_qp_delta + hevcPicParams->init_qp_minus26 + 26;
2848     cmd->DW3.SliceqpSignFlag = (sliceQP >= 0) ? 0 : 1;
2849     cmd->DW3.Sliceqp = ABS(sliceQP);
2850 
2851     cmd->DW1.SlicestartctbxOrSliceStartLcuXEncoder = hevcSliceParams->slice_segment_address % widthInCtb;
2852     cmd->DW1.SlicestartctbyOrSliceStartLcuYEncoder = hevcSliceParams->slice_segment_address / widthInCtb;
2853 
2854     if (hevcExtPicParams && hevcExtSliceParams)
2855     {
2856         // DW3[23]
2857         if (hevcExtPicParams->PicRangeExtensionFlags.fields.chroma_qp_offset_list_enabled_flag)
2858         {
2859             cmd->DW3.CuChromaQpOffsetEnabledFlag = hevcExtSliceParams->cu_chroma_qp_offset_enabled_flag;
2860         }
2861 
2862         // DW3[24:25]
2863         cmd->DW3.Lastsliceoftile = hevcSliceState->bLastSliceInTile;
2864         cmd->DW3.Lastsliceoftilecolumn = hevcSliceState->bLastSliceInTileColumn;
2865     }
2866 
2867     return eStatus;
2868 }
2869 
AddHcpEncodeSliceStateCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_HEVC_SLICE_STATE hevcSliceState)2870 MOS_STATUS MhwVdboxHcpInterfaceG11::AddHcpEncodeSliceStateCmd(
2871     PMOS_COMMAND_BUFFER             cmdBuffer,
2872     PMHW_VDBOX_HEVC_SLICE_STATE     hevcSliceState)
2873 {
2874     MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2875 
2876     MHW_FUNCTION_ENTER;
2877 
2878     MHW_MI_CHK_NULL(hevcSliceState);
2879     MHW_MI_CHK_NULL(hevcSliceState->pEncodeHevcSliceParams);
2880     MHW_MI_CHK_NULL(hevcSliceState->pEncodeHevcPicParams);
2881     MHW_MI_CHK_NULL(hevcSliceState->pEncodeHevcSeqParams);
2882 
2883     mhw_vdbox_hcp_g11_X::HCP_SLICE_STATE_CMD    cmd;
2884     MOS_COMMAND_BUFFER                          constructedCmdBuf;
2885 
2886     auto hevcSliceParams = hevcSliceState->pEncodeHevcSliceParams;
2887     auto hevcPicParams = hevcSliceState->pEncodeHevcPicParams;
2888     auto hevcSeqParams = hevcSliceState->pEncodeHevcSeqParams;
2889 
2890     uint32_t ctbSize       = 1 << (hevcSeqParams->log2_max_coding_block_size_minus3 + 3);
2891     uint32_t widthInPix    = (1 << (hevcSeqParams->log2_min_coding_block_size_minus3 + 3)) *
2892         (hevcSeqParams->wFrameWidthInMinCbMinus1 + 1);
2893     uint32_t widthInCtb    = (widthInPix / ctbSize) +
2894         ((widthInPix % ctbSize) ? 1 : 0);  // round up
2895 
2896     uint32_t ctbAddr       = hevcSliceParams->slice_segment_address;
2897     cmd.DW1.SlicestartctbxOrSliceStartLcuXEncoder   = ctbAddr % widthInCtb;
2898     cmd.DW1.SlicestartctbyOrSliceStartLcuYEncoder   = ctbAddr / widthInCtb;
2899 
2900     if (hevcSliceState->bLastSlice)
2901     {
2902         cmd.DW2.NextslicestartctbxOrNextSliceStartLcuXEncoder         = 0;
2903         cmd.DW2.NextslicestartctbyOrNextSliceStartLcuYEncoder         = 0;
2904     }
2905     else
2906     {
2907         ctbAddr = hevcSliceParams->slice_segment_address + hevcSliceParams->NumLCUsInSlice;
2908         cmd.DW2.NextslicestartctbxOrNextSliceStartLcuXEncoder         = ctbAddr % widthInCtb;
2909         cmd.DW2.NextslicestartctbyOrNextSliceStartLcuYEncoder         = ctbAddr / widthInCtb;
2910     }
2911 
2912     cmd.DW3.SliceType                   = hevcSliceParams->slice_type;
2913     cmd.DW3.Lastsliceofpic              = hevcSliceState->bLastSlice;
2914     cmd.DW3.SliceqpSignFlag             = ((hevcSliceParams->slice_qp_delta + hevcPicParams->QpY) >= 0)
2915         ? 0 : 1; //8 bit will have 0 as sign bit adn 10 bit might have 1 as sign bit depending on Qp
2916     cmd.DW3.DependentSliceFlag          = 0; // Not supported on encoder
2917     cmd.DW3.SliceTemporalMvpEnableFlag  = hevcSliceParams->slice_temporal_mvp_enable_flag;
2918     cmd.DW3.Sliceqp                     = abs(hevcSliceParams->slice_qp_delta + hevcPicParams->QpY);
2919     cmd.DW3.SliceCbQpOffset             = hevcSliceParams->slice_cb_qp_offset;
2920     cmd.DW3.SliceCrQpOffset             = hevcSliceParams->slice_cr_qp_offset;
2921     cmd.DW3.Intrareffetchdisable        = hevcSliceState->bIntraRefFetchDisable;
2922 
2923     cmd.DW4.SliceHeaderDisableDeblockingFilterFlag          = hevcSliceParams->slice_deblocking_filter_disable_flag;
2924     cmd.DW4.SliceTcOffsetDiv2OrFinalTcOffsetDiv2Encoder     = hevcSliceParams->tc_offset_div2;
2925     cmd.DW4.SliceBetaOffsetDiv2OrFinalBetaOffsetDiv2Encoder = hevcSliceParams->beta_offset_div2;
2926     cmd.DW4.SliceLoopFilterAcrossSlicesEnabledFlag          = 0;
2927     cmd.DW4.SliceSaoChromaFlag                              = hevcSliceParams->slice_sao_chroma_flag;
2928     cmd.DW4.SliceSaoLumaFlag                                = hevcSliceParams->slice_sao_luma_flag;
2929     cmd.DW4.MvdL1ZeroFlag                                   = 0; // Decoder only - set to 0 for encoder
2930     cmd.DW4.Islowdelay                                      = hevcSliceState->bIsLowDelay;
2931     cmd.DW4.CollocatedFromL0Flag                            = hevcSliceParams->collocated_from_l0_flag;
2932     cmd.DW4.Chromalog2Weightdenom                           = (hevcPicParams->weighted_pred_flag || hevcPicParams->weighted_bipred_flag) ?
2933                                                               (hevcPicParams->bEnableGPUWeightedPrediction ? 6 : hevcSliceParams->luma_log2_weight_denom + hevcSliceParams->delta_chroma_log2_weight_denom) : 0;
2934     cmd.DW4.LumaLog2WeightDenom                             = (hevcPicParams->weighted_pred_flag || hevcPicParams->weighted_bipred_flag) ?
2935                                                               (hevcPicParams->bEnableGPUWeightedPrediction ? 6 : hevcSliceParams->luma_log2_weight_denom) : 0;
2936     cmd.DW4.CabacInitFlag                                   = hevcSliceParams->cabac_init_flag;
2937     cmd.DW4.Maxmergeidx                                     = hevcSliceParams->MaxNumMergeCand - 1;
2938 
2939     if (cmd.DW3.SliceTemporalMvpEnableFlag)
2940     {
2941         if (cmd.DW3.SliceType == cmd.SLICE_TYPE_I_SLICE)
2942         {
2943             cmd.DW4.Collocatedrefidx = 0;
2944         }
2945         else
2946         {
2947             // need to check with Ce for DDI issues
2948             uint8_t collocatedFromL0Flag      = cmd.DW4.CollocatedFromL0Flag;
2949 
2950             uint8_t collocatedRefIndex        = hevcPicParams->CollocatedRefPicIndex;
2951             MHW_ASSERT(collocatedRefIndex < CODEC_MAX_NUM_REF_FRAME_HEVC);
2952 
2953             uint8_t collocatedFrameIdx        = hevcSliceState->pRefIdxMapping[collocatedRefIndex];
2954             MHW_ASSERT(collocatedRefIndex < CODEC_MAX_NUM_REF_FRAME_HEVC);
2955 
2956             cmd.DW4.Collocatedrefidx    = collocatedFrameIdx;
2957         }
2958     }
2959     else
2960     {
2961         cmd.DW4.Collocatedrefidx    = 0;
2962     }
2963 
2964     cmd.DW5.Sliceheaderlength       = 0; // Decoder only, setting to 0 for Encoder
2965 
2966     // Currently setting to defaults used in prototype
2967     cmd.DW6.Roundinter = 4;
2968     cmd.DW6.Roundintra = 10;
2969 
2970     cmd.DW7.Cabaczerowordinsertionenable    = hevcSliceState->bVdencInUse ? 0 : 1;
2971     cmd.DW7.Emulationbytesliceinsertenable  = 1;
2972     cmd.DW7.TailInsertionEnable             = (hevcPicParams->bLastPicInSeq || hevcPicParams->bLastPicInStream) && hevcSliceState->bLastSlice;
2973     cmd.DW7.SlicedataEnable                 = 1;
2974     cmd.DW7.HeaderInsertionEnable           = 1;
2975 
2976     cmd.DW8.IndirectPakBseDataStartOffsetWrite = hevcSliceState->dwHeaderBytesInserted;
2977 
2978     // Transform skip related parameters
2979     if (hevcPicParams->transform_skip_enabled_flag)
2980     {
2981         cmd.DW9.TransformskipLambda                     = hevcSliceState->EncodeHevcTransformSkipParams.Transformskip_lambda;
2982         cmd.DW10.TransformskipNumzerocoeffsFactor0      = hevcSliceState->EncodeHevcTransformSkipParams.Transformskip_Numzerocoeffs_Factor0;
2983         cmd.DW10.TransformskipNumnonzerocoeffsFactor0   = hevcSliceState->EncodeHevcTransformSkipParams.Transformskip_Numnonzerocoeffs_Factor0;
2984         cmd.DW10.TransformskipNumzerocoeffsFactor1      = hevcSliceState->EncodeHevcTransformSkipParams.Transformskip_Numzerocoeffs_Factor1;
2985         cmd.DW10.TransformskipNumnonzerocoeffsFactor1   = hevcSliceState->EncodeHevcTransformSkipParams.Transformskip_Numnonzerocoeffs_Factor1;
2986     }
2987 
2988     if (hevcSliceState->bLastSlice)
2989     {
2990         cmd.DW2.NextslicestartctbxOrNextSliceStartLcuXEncoder         = 0;
2991         cmd.DW2.NextslicestartctbyOrNextSliceStartLcuYEncoder         = 0;
2992     }
2993     else
2994     {
2995         if(hevcPicParams->tiles_enabled_flag)
2996         {
2997             // when tile is enabled, need to consider if slice is within one tile
2998             cmd.DW2.NextslicestartctbxOrNextSliceStartLcuXEncoder         = hevcSliceParams[1].slice_segment_address % widthInCtb;
2999             cmd.DW2.NextslicestartctbyOrNextSliceStartLcuYEncoder         = hevcSliceParams[1].slice_segment_address / widthInCtb;
3000         }
3001         else
3002         {
3003             ctbAddr                                                       = hevcSliceParams->slice_segment_address + hevcSliceParams->NumLCUsInSlice;
3004             cmd.DW2.NextslicestartctbxOrNextSliceStartLcuXEncoder           = ctbAddr % widthInCtb;
3005             cmd.DW2.NextslicestartctbyOrNextSliceStartLcuYEncoder           = ctbAddr / widthInCtb;
3006         }
3007     }
3008 
3009 
3010     cmd.DW4.SliceLoopFilterAcrossSlicesEnabledFlag = hevcPicParams->loop_filter_across_slices_flag;
3011     cmd.DW3.Lastsliceoftile          = hevcSliceState->bLastSliceInTile;
3012     cmd.DW3.Lastsliceoftilecolumn    = hevcSliceState->bLastSliceInTileColumn;
3013 
3014     // Currently setting to defaults used in prototype
3015     cmd.DW6.Roundinter = 4;
3016     cmd.DW6.Roundintra = 10;
3017 
3018     MHW_MI_CHK_STATUS(Mhw_AddCommandCmdOrBB(m_osInterface, cmdBuffer, hevcSliceState->pBatchBufferForPakSlices, &cmd, sizeof(cmd)));
3019 
3020     return eStatus;
3021 }
3022 
AddHcpPakInsertObject(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_PAK_INSERT_PARAMS params)3023 MOS_STATUS MhwVdboxHcpInterfaceG11::AddHcpPakInsertObject(
3024     PMOS_COMMAND_BUFFER              cmdBuffer,
3025     PMHW_VDBOX_PAK_INSERT_PARAMS     params)
3026 {
3027     MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
3028 
3029     MHW_FUNCTION_ENTER;
3030 
3031     MHW_MI_CHK_NULL(params);
3032 
3033     mhw_vdbox_hcp_g11_X::HCP_PAK_INSERT_OBJECT_CMD  cmd;
3034 
3035     uint32_t dwordsUsed = cmd.dwSize;
3036 
3037     if (params->bLastPicInSeq && params->bLastPicInStream)
3038     {
3039         uint32_t dwPadding[3];
3040 
3041         dwordsUsed += sizeof(dwPadding) / sizeof(dwPadding[0]);
3042 
3043         cmd.DW0.DwordLength                                         = OP_LENGTH(dwordsUsed);
3044         cmd.DW1.Headerlengthexcludefrmsize                          = 0;
3045         cmd.DW1.EndofsliceflagLastdstdatainsertcommandflag          = 1;
3046         cmd.DW1.LastheaderflagLastsrcheaderdatainsertcommandflag    = 1;
3047         cmd.DW1.EmulationflagEmulationbytebitsinsertenable          = 0;
3048         cmd.DW1.SkipemulbytecntSkipEmulationByteCount               = 0;
3049         cmd.DW1.DatabitsinlastdwSrcdataendingbitinclusion50         = 16;
3050         cmd.DW1.DatabyteoffsetSrcdatastartingbyteoffset10           = 0;
3051         cmd.DW1.IndirectPayloadEnable                               = 0;
3052 
3053         MHW_MI_CHK_STATUS(Mhw_AddCommandCmdOrBB(m_osInterface, cmdBuffer,  params->pBatchBufferForPakSlices, &cmd, cmd.byteSize));
3054 
3055         dwPadding[0] = (uint32_t)((1 << 16) | ((HEVC_NAL_UT_EOS << 1) << 24));
3056         dwPadding[1] = (1L | (1L << 24));
3057         dwPadding[2] = (HEVC_NAL_UT_EOB << 1) | (1L << 8);
3058         MHW_MI_CHK_STATUS(Mhw_AddCommandCmdOrBB(m_osInterface, cmdBuffer,  params->pBatchBufferForPakSlices, &dwPadding[0], sizeof(dwPadding)));
3059     }
3060     else
3061     if (params->bLastPicInSeq || params->bLastPicInStream)
3062     {
3063         uint32_t dwLastPicInSeqData[2], dwLastPicInStreamData[2];
3064 
3065         dwordsUsed += params->bLastPicInSeq * 2 + params->bLastPicInStream * 2;
3066 
3067         cmd.DW0.DwordLength                                         = OP_LENGTH(dwordsUsed);
3068         cmd.DW1.Headerlengthexcludefrmsize                          = 0;
3069         cmd.DW1.EndofsliceflagLastdstdatainsertcommandflag          = 1;
3070         cmd.DW1.LastheaderflagLastsrcheaderdatainsertcommandflag    = 1;
3071         cmd.DW1.EmulationflagEmulationbytebitsinsertenable          = 0;
3072         cmd.DW1.SkipemulbytecntSkipEmulationByteCount               = 0;
3073         cmd.DW1.DatabitsinlastdwSrcdataendingbitinclusion50         = 8;
3074         cmd.DW1.DatabyteoffsetSrcdatastartingbyteoffset10           = 0;
3075         cmd.DW1.IndirectPayloadEnable                               = 0;
3076 
3077         MHW_MI_CHK_STATUS(Mhw_AddCommandCmdOrBB(m_osInterface, cmdBuffer,  params->pBatchBufferForPakSlices, &cmd, cmd.byteSize));
3078 
3079         if (params->bLastPicInSeq)
3080         {
3081             dwLastPicInSeqData[0] = (uint32_t)((1 << 16) | ((HEVC_NAL_UT_EOS << 1) << 24));
3082             dwLastPicInSeqData[1] = 1;  // nuh_temporal_id_plus1
3083             MHW_MI_CHK_STATUS(Mhw_AddCommandCmdOrBB(m_osInterface, cmdBuffer,   params->pBatchBufferForPakSlices, &dwLastPicInSeqData[0], sizeof(dwLastPicInSeqData)));
3084         }
3085 
3086         if (params->bLastPicInStream)
3087         {
3088             dwLastPicInStreamData[0] = (uint32_t)((1 << 16) | ((HEVC_NAL_UT_EOB << 1) << 24));
3089             dwLastPicInStreamData[1] = 1; // nuh_temporal_id_plus1
3090             MHW_MI_CHK_STATUS(Mhw_AddCommandCmdOrBB(m_osInterface, cmdBuffer,   params->pBatchBufferForPakSlices, &dwLastPicInStreamData[0], sizeof(dwLastPicInStreamData)));
3091         }
3092     }
3093     else
3094     {
3095         uint32_t byteSize = (params->dwBitSize + 7) >> 3;
3096         uint32_t dataBitsInLastDw = params->dwBitSize % 32;
3097         if (dataBitsInLastDw == 0)
3098         {
3099             dataBitsInLastDw = 32;
3100         }
3101 
3102         dwordsUsed                                                += (MOS_ALIGN_CEIL(byteSize, sizeof(uint32_t))) / sizeof(uint32_t);
3103         cmd.DW0.DwordLength                                         = OP_LENGTH(dwordsUsed);
3104         cmd.DW1.Headerlengthexcludefrmsize                          = 0;
3105         cmd.DW1.EndofsliceflagLastdstdatainsertcommandflag          = params->bEndOfSlice;
3106         cmd.DW1.LastheaderflagLastsrcheaderdatainsertcommandflag    = params->bLastHeader;
3107         cmd.DW1.EmulationflagEmulationbytebitsinsertenable          = params->bEmulationByteBitsInsert;
3108         cmd.DW1.SkipemulbytecntSkipEmulationByteCount               = params->uiSkipEmulationCheckCount;
3109         cmd.DW1.SliceHeaderIndicator                                = params->bResetBitstreamStartingPos;
3110         cmd.DW1.DatabitsinlastdwSrcdataendingbitinclusion50         = dataBitsInLastDw;
3111         cmd.DW1.DatabyteoffsetSrcdatastartingbyteoffset10           = 0;
3112         cmd.DW1.IndirectPayloadEnable                               = 0;
3113 
3114         MHW_MI_CHK_STATUS(Mhw_AddCommandCmdOrBB(m_osInterface, cmdBuffer,  params->pBatchBufferForPakSlices, &cmd, cmd.byteSize));
3115 
3116         if (byteSize)
3117         {
3118             MHW_MI_CHK_NULL(params->pBsBuffer);
3119             MHW_MI_CHK_NULL(params->pBsBuffer->pBase);
3120             uint8_t *data = (uint8_t*)(params->pBsBuffer->pBase + params->dwOffset);
3121             MHW_MI_CHK_STATUS(Mhw_AddCommandCmdOrBB(m_osInterface, cmdBuffer,  params->pBatchBufferForPakSlices, data, byteSize));
3122         }
3123     }
3124 
3125     return eStatus;
3126 }
3127 
AddHcpVp9PicStateCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_BATCH_BUFFER batchBuffer,PMHW_VDBOX_VP9_PIC_STATE params)3128 MOS_STATUS MhwVdboxHcpInterfaceG11::AddHcpVp9PicStateCmd(
3129     PMOS_COMMAND_BUFFER              cmdBuffer,
3130     PMHW_BATCH_BUFFER                batchBuffer,
3131     PMHW_VDBOX_VP9_PIC_STATE         params)
3132 {
3133     MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
3134 
3135     MHW_MI_CHK_NULL(params);
3136     MHW_MI_CHK_NULL(params->pVp9PicParams);
3137 
3138     mhw_vdbox_hcp_g11_X::HCP_VP9_PIC_STATE_CMD cmd;
3139     auto vp9PicParams = params->pVp9PicParams;
3140     auto vp9RefList = params->ppVp9RefList;
3141 
3142     cmd.DW0.DwordLength                         = mhw_vdbox_hcp_g11_X::GetOpLength(12); //VP9_PIC_STATE command is common for both Decoder and Encoder. Decoder uses only 12 DWORDS of the generated 33 DWORDS
3143 
3144     uint32_t curFrameWidth                      = vp9PicParams->FrameWidthMinus1 + 1;
3145     uint32_t curFrameHeight                     = vp9PicParams->FrameHeightMinus1 + 1;
3146     bool isScaling                              = (curFrameWidth == params->dwPrevFrmWidth) && (curFrameHeight == params->dwPrevFrmHeight) ? false : true;
3147 
3148     cmd.DW1.FrameWidthInPixelsMinus1            = MOS_ALIGN_CEIL(curFrameWidth, CODEC_VP9_MIN_BLOCK_WIDTH) - 1;
3149     cmd.DW1.FrameHeightInPixelsMinus1           = MOS_ALIGN_CEIL(curFrameHeight, CODEC_VP9_MIN_BLOCK_WIDTH) - 1;
3150 
3151     cmd.DW2.FrameType                           = vp9PicParams->PicFlags.fields.frame_type;
3152     cmd.DW2.AdaptProbabilitiesFlag              = !vp9PicParams->PicFlags.fields.error_resilient_mode && !vp9PicParams->PicFlags.fields.frame_parallel_decoding_mode;
3153     cmd.DW2.IntraonlyFlag                       = vp9PicParams->PicFlags.fields.intra_only;
3154     cmd.DW2.RefreshFrameContext                 = vp9PicParams->PicFlags.fields.refresh_frame_context;
3155     cmd.DW2.ErrorResilientMode                  = vp9PicParams->PicFlags.fields.error_resilient_mode;
3156     cmd.DW2.FrameParallelDecodingMode           = vp9PicParams->PicFlags.fields.frame_parallel_decoding_mode;
3157     cmd.DW2.FilterLevel                         = vp9PicParams->filter_level;
3158     cmd.DW2.SharpnessLevel                      = vp9PicParams->sharpness_level;
3159     cmd.DW2.SegmentationEnabled                 = vp9PicParams->PicFlags.fields.segmentation_enabled;
3160     cmd.DW2.SegmentationUpdateMap               = cmd.DW2.SegmentationEnabled && vp9PicParams->PicFlags.fields.segmentation_update_map;
3161     cmd.DW2.LosslessMode                        = vp9PicParams->PicFlags.fields.LosslessFlag;
3162     cmd.DW2.SegmentIdStreamoutEnable            = cmd.DW2.SegmentationUpdateMap;
3163 
3164     uint8_t segmentIDStreaminEnable = 0;
3165     if (vp9PicParams->PicFlags.fields.intra_only ||
3166         (vp9PicParams->PicFlags.fields.frame_type == CODEC_VP9_KEY_FRAME)) {
3167         segmentIDStreaminEnable = 1;
3168     } else if (vp9PicParams->PicFlags.fields.segmentation_enabled) {
3169         if (!vp9PicParams->PicFlags.fields.segmentation_update_map)
3170             segmentIDStreaminEnable = 1;
3171         else if (vp9PicParams->PicFlags.fields.segmentation_temporal_update)
3172             segmentIDStreaminEnable = 1;
3173     }
3174     if (vp9PicParams->PicFlags.fields.error_resilient_mode) {
3175             segmentIDStreaminEnable = 1;
3176     }
3177     // Resolution change will reset the segment ID buffer
3178     if (isScaling)
3179     {
3180         segmentIDStreaminEnable = 1;
3181     }
3182 
3183     cmd.DW2.SegmentIdStreaminEnable       = segmentIDStreaminEnable;
3184 
3185     cmd.DW3.Log2TileRow                    = vp9PicParams->log2_tile_rows;        // No need to minus 1 here.
3186     cmd.DW3.Log2TileColumn                 = vp9PicParams->log2_tile_columns;     // No need to minus 1 here.
3187     if (vp9PicParams->subsampling_x == 1 && vp9PicParams->subsampling_y == 1)
3188     {
3189         //4:2:0
3190         cmd.DW3.ChromaSamplingFormat = 0;
3191     }
3192     else if (vp9PicParams->subsampling_x == 1 && vp9PicParams->subsampling_y == 0)
3193     {
3194         //4:2:2
3195         cmd.DW3.ChromaSamplingFormat = 1;
3196     }
3197     else if (vp9PicParams->subsampling_x == 0 && vp9PicParams->subsampling_y == 0)
3198     {
3199         //4:4:4
3200         cmd.DW3.ChromaSamplingFormat = 2;
3201     }
3202     cmd.DW3.Bitdepthminus8 = vp9PicParams->BitDepthMinus8;
3203     cmd.DW3.ProfileLevel   = vp9PicParams->profile;
3204 
3205     cmd.DW10.UncompressedHeaderLengthInBytes70  = vp9PicParams->UncompressedHeaderLengthInBytes;
3206     cmd.DW10.FirstPartitionSizeInBytes150       = vp9PicParams->FirstPartitionSize;
3207 
3208     if (vp9PicParams->PicFlags.fields.frame_type && !vp9PicParams->PicFlags.fields.intra_only)
3209     {
3210         PCODEC_PICTURE refFrameList   = &(vp9PicParams->RefFrameList[0]);
3211 
3212         uint8_t lastRefPicIndex       = refFrameList[vp9PicParams->PicFlags.fields.LastRefIdx].FrameIdx;
3213         uint32_t lastRefFrameWidth    = vp9RefList[lastRefPicIndex]->dwFrameWidth;
3214         uint32_t lastRefFrameHeight   = vp9RefList[lastRefPicIndex]->dwFrameHeight;
3215 
3216         uint8_t goldenRefPicIndex     = refFrameList[vp9PicParams->PicFlags.fields.GoldenRefIdx].FrameIdx;
3217         uint32_t goldenRefFrameWidth  = vp9RefList[goldenRefPicIndex]->dwFrameWidth;
3218         uint32_t goldenRefFrameHeight = vp9RefList[goldenRefPicIndex]->dwFrameHeight;
3219 
3220         uint8_t altRefPicIndex        = refFrameList[vp9PicParams->PicFlags.fields.AltRefIdx].FrameIdx;
3221         uint32_t altRefFrameWidth     = vp9RefList[altRefPicIndex]->dwFrameWidth;
3222         uint32_t altRefFrameHeight    = vp9RefList[altRefPicIndex]->dwFrameHeight;
3223 
3224         cmd.DW2.AllowHiPrecisionMv              = vp9PicParams->PicFlags.fields.allow_high_precision_mv;
3225         cmd.DW2.McompFilterType                 = vp9PicParams->PicFlags.fields.mcomp_filter_type;
3226         cmd.DW2.SegmentationTemporalUpdate      = cmd.DW2.SegmentationUpdateMap && vp9PicParams->PicFlags.fields.segmentation_temporal_update;
3227 
3228         cmd.DW2.RefFrameSignBias02              = vp9PicParams->PicFlags.fields.LastRefSignBias |
3229                                                   (vp9PicParams->PicFlags.fields.GoldenRefSignBias << 1) |
3230                                                   (vp9PicParams->PicFlags.fields.AltRefSignBias << 2);
3231 
3232         cmd.DW2.LastFrameType                   = !params->PrevFrameParams.fields.KeyFrame;
3233 
3234         // Reset UsePrevInFindMvReferences to zero if last picture has a different size,
3235         // Current picture is error-resilient mode, Last picture was intra_only or keyframe,
3236         // Last picture was not a displayed picture.
3237         cmd.DW2.UsePrevInFindMvReferences       =
3238                  !(vp9PicParams->PicFlags.fields.error_resilient_mode ||
3239                  params->PrevFrameParams.fields.KeyFrame ||
3240                  params->PrevFrameParams.fields.IntraOnly ||
3241                  !params->PrevFrameParams.fields.Display);
3242         // Reset UsePrevInFindMvReferences in case of resolution change on inter frames
3243         if (isScaling) {
3244             cmd.DW2.UsePrevInFindMvReferences   = 0;
3245         }
3246 
3247         cmd.DW4.HorizontalScaleFactorForLast    = (lastRefFrameWidth * m_vp9ScalingFactor) / curFrameWidth;
3248         cmd.DW4.VerticalScaleFactorForLast      = (lastRefFrameHeight * m_vp9ScalingFactor) / curFrameHeight;
3249 
3250         cmd.DW5.HorizontalScaleFactorForGolden  = (goldenRefFrameWidth * m_vp9ScalingFactor) / curFrameWidth;
3251         cmd.DW5.VerticalScaleFactorForGolden    = (goldenRefFrameHeight * m_vp9ScalingFactor) / curFrameHeight;
3252 
3253         cmd.DW6.HorizontalScaleFactorForAltref  = (altRefFrameWidth * m_vp9ScalingFactor) / curFrameWidth;
3254         cmd.DW6.VerticalScaleFactorForAltref    = (altRefFrameHeight * m_vp9ScalingFactor) / curFrameHeight;
3255 
3256         cmd.DW7.LastFrameWidthInPixelsMinus1    = lastRefFrameWidth - 1;
3257         cmd.DW7.LastFrameHieghtInPixelsMinus1   = lastRefFrameHeight - 1;
3258 
3259         cmd.DW8.GoldenFrameWidthInPixelsMinus1  = goldenRefFrameWidth - 1;
3260         cmd.DW8.GoldenFrameHieghtInPixelsMinus1 = goldenRefFrameHeight - 1;
3261 
3262         cmd.DW9.AltrefFrameWidthInPixelsMinus1  = altRefFrameWidth - 1;
3263         cmd.DW9.AltrefFrameHieghtInPixelsMinus1 = altRefFrameHeight - 1;
3264     }
3265 
3266     MHW_MI_CHK_STATUS(Mhw_AddCommandCmdOrBB(m_osInterface, cmdBuffer, batchBuffer, &cmd, cmd.byteSize));
3267 
3268     return eStatus;
3269 }
3270 
AddHcpVp9PicStateEncCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_BATCH_BUFFER batchBuffer,PMHW_VDBOX_VP9_ENCODE_PIC_STATE params)3271 MOS_STATUS MhwVdboxHcpInterfaceG11::AddHcpVp9PicStateEncCmd(
3272     PMOS_COMMAND_BUFFER             cmdBuffer,
3273     PMHW_BATCH_BUFFER               batchBuffer,
3274     PMHW_VDBOX_VP9_ENCODE_PIC_STATE params)
3275 {
3276     MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
3277 
3278     MHW_FUNCTION_ENTER;
3279 
3280     MHW_MI_CHK_NULL(params);
3281     MHW_MI_CHK_NULL(params->pVp9PicParams);
3282     MHW_MI_CHK_NULL(params->pVp9SeqParams);
3283     MHW_MI_CHK_NULL(params->ppVp9RefList);
3284 
3285     mhw_vdbox_hcp_g11_X::HCP_VP9_PIC_STATE_CMD cmd;
3286 
3287     auto vp9PicParams = params->pVp9PicParams;
3288     auto vp9RefList = params->ppVp9RefList;
3289     auto vp9SeqParams = params->pVp9SeqParams;
3290 
3291     cmd.DW1.FrameWidthInPixelsMinus1    = MOS_ALIGN_CEIL(vp9PicParams->SrcFrameWidthMinus1 + 1, CODEC_VP9_MIN_BLOCK_WIDTH) - 1;
3292     cmd.DW1.FrameHeightInPixelsMinus1   = MOS_ALIGN_CEIL(vp9PicParams->SrcFrameHeightMinus1 + 1, CODEC_VP9_MIN_BLOCK_WIDTH) - 1;
3293 
3294     cmd.DW2.FrameType                   = vp9PicParams->PicFlags.fields.frame_type;
3295     cmd.DW2.AdaptProbabilitiesFlag      = !vp9PicParams->PicFlags.fields.error_resilient_mode && !vp9PicParams->PicFlags.fields.frame_parallel_decoding_mode;
3296     cmd.DW2.IntraonlyFlag               = vp9PicParams->PicFlags.fields.intra_only;
3297     cmd.DW2.AllowHiPrecisionMv          = vp9PicParams->PicFlags.fields.allow_high_precision_mv;
3298     cmd.DW2.McompFilterType             = vp9PicParams->PicFlags.fields.mcomp_filter_type;
3299 
3300     cmd.DW2.RefFrameSignBias02          = vp9PicParams->RefFlags.fields.LastRefSignBias |
3301                                           (vp9PicParams->RefFlags.fields.GoldenRefSignBias << 1) |
3302                                           (vp9PicParams->RefFlags.fields.AltRefSignBias << 2);
3303 
3304     cmd.DW2.HybridPredictionMode        = vp9PicParams->PicFlags.fields.comp_prediction_mode == 2;
3305     cmd.DW2.SelectableTxMode            = params->ucTxMode == 4;
3306     cmd.DW2.RefreshFrameContext         = vp9PicParams->PicFlags.fields.refresh_frame_context;
3307     cmd.DW2.ErrorResilientMode          = vp9PicParams->PicFlags.fields.error_resilient_mode;
3308     cmd.DW2.FrameParallelDecodingMode   = vp9PicParams->PicFlags.fields.frame_parallel_decoding_mode;
3309     cmd.DW2.FilterLevel                 = vp9PicParams->filter_level;
3310     cmd.DW2.SharpnessLevel              = vp9PicParams->sharpness_level;
3311     cmd.DW2.SegmentationEnabled         = vp9PicParams->PicFlags.fields.segmentation_enabled;
3312     cmd.DW2.SegmentationUpdateMap       = vp9PicParams->PicFlags.fields.segmentation_update_map;
3313     cmd.DW2.SegmentationTemporalUpdate  = vp9PicParams->PicFlags.fields.segmentation_temporal_update;
3314     cmd.DW2.LosslessMode                = vp9PicParams->PicFlags.fields.LosslessFlag;
3315 
3316     cmd.DW3.Log2TileColumn              = vp9PicParams->log2_tile_columns;
3317     cmd.DW3.Log2TileRow                 = vp9PicParams->log2_tile_rows;
3318     cmd.DW3.SseEnable                   = params->bSSEEnable;
3319     // Gen 11 REXT inputs for chroma formats and bit depth
3320     cmd.DW3.ChromaSamplingFormat        = vp9SeqParams->SeqFlags.fields.EncodedFormat;
3321     switch (vp9SeqParams->SeqFlags.fields.EncodedBitDepth)
3322     {
3323         case VP9_ENCODED_BIT_DEPTH_8:
3324             cmd.DW3.Bitdepthminus8 = 0;
3325             break;
3326         case VP9_ENCODED_BIT_DEPTH_10:
3327             cmd.DW3.Bitdepthminus8 = 2;
3328             break;
3329         default:
3330             cmd.DW3.Bitdepthminus8 = 0;
3331             break;
3332     }
3333 
3334     if (vp9PicParams->PicFlags.fields.frame_type && !vp9PicParams->PicFlags.fields.intra_only)
3335     {
3336         uint32_t curFrameWidth              = vp9PicParams->SrcFrameWidthMinus1 + 1;
3337         uint32_t curFrameHeight             = vp9PicParams->SrcFrameHeightMinus1 + 1;
3338 
3339         PCODEC_PICTURE refFrameList         = &(vp9PicParams->RefFrameList[0]);
3340 
3341         cmd.DW2.LastFrameType               = !params->PrevFrameParams.fields.KeyFrame;
3342 
3343         cmd.DW2.UsePrevInFindMvReferences   = vp9PicParams->PicFlags.fields.error_resilient_mode ||
3344             params->PrevFrameParams.fields.KeyFrame ||
3345             params->PrevFrameParams.fields.IntraOnly ||
3346             !params->PrevFrameParams.fields.Display ||
3347             (curFrameWidth != params->dwPrevFrmWidth) ||
3348             (curFrameHeight != params->dwPrevFrmHeight) ? 0 : 1;
3349 
3350         if ((vp9PicParams->RefFlags.fields.ref_frame_ctrl_l0 & 0x01) || (vp9PicParams->RefFlags.fields.ref_frame_ctrl_l1 & 0x01))
3351         {
3352             MHW_ASSERT(!CodecHal_PictureIsInvalid(refFrameList[vp9PicParams->RefFlags.fields.LastRefIdx]));
3353 
3354             uint8_t lastRefPicIndex = refFrameList[vp9PicParams->RefFlags.fields.LastRefIdx].FrameIdx;
3355             uint32_t lastRefFrameWidth = 0;
3356             uint32_t lastRefFrameHeight = 0;
3357             if (!params->bUseDysRefSurface)
3358             {
3359                 lastRefFrameWidth = vp9RefList[lastRefPicIndex]->dwFrameWidth;
3360                 lastRefFrameHeight = vp9RefList[lastRefPicIndex]->dwFrameHeight;
3361             }
3362             else
3363             {
3364                 lastRefFrameWidth = curFrameWidth;
3365                 lastRefFrameHeight = curFrameHeight;
3366             }
3367 
3368             cmd.DW4.HorizontalScaleFactorForLast    = (lastRefFrameWidth * m_vp9ScalingFactor) / curFrameWidth;
3369             cmd.DW4.VerticalScaleFactorForLast      = (lastRefFrameHeight * m_vp9ScalingFactor) / curFrameHeight;
3370 
3371             cmd.DW7.LastFrameWidthInPixelsMinus1    = lastRefFrameWidth - 1;
3372             cmd.DW7.LastFrameHieghtInPixelsMinus1   = lastRefFrameHeight - 1;
3373         }
3374 
3375         if ((vp9PicParams->RefFlags.fields.ref_frame_ctrl_l0 & 0x02) || (vp9PicParams->RefFlags.fields.ref_frame_ctrl_l1 & 0x02))
3376         {
3377             MHW_ASSERT(!CodecHal_PictureIsInvalid(refFrameList[vp9PicParams->RefFlags.fields.GoldenRefIdx]));
3378 
3379             uint8_t goldenRefPicIndex = refFrameList[vp9PicParams->RefFlags.fields.GoldenRefIdx].FrameIdx;
3380             uint32_t goldenRefFrameWidth = 0;
3381             uint32_t goldenRefFrameHeight = 0;
3382             if (!params->bUseDysRefSurface)
3383             {
3384                 goldenRefFrameWidth = vp9RefList[goldenRefPicIndex]->dwFrameWidth;
3385                 goldenRefFrameHeight = vp9RefList[goldenRefPicIndex]->dwFrameHeight;
3386             }
3387             else
3388             {
3389                 goldenRefFrameWidth = curFrameWidth;
3390                 goldenRefFrameHeight = curFrameHeight;
3391             }
3392 
3393             cmd.DW5.HorizontalScaleFactorForGolden      = (goldenRefFrameWidth * m_vp9ScalingFactor) / curFrameWidth;
3394             cmd.DW5.VerticalScaleFactorForGolden        = (goldenRefFrameHeight * m_vp9ScalingFactor) / curFrameHeight;
3395 
3396             cmd.DW8.GoldenFrameWidthInPixelsMinus1      = goldenRefFrameWidth - 1;
3397             cmd.DW8.GoldenFrameHieghtInPixelsMinus1     = goldenRefFrameHeight - 1;
3398         }
3399 
3400         if ((vp9PicParams->RefFlags.fields.ref_frame_ctrl_l0 & 0x04) || (vp9PicParams->RefFlags.fields.ref_frame_ctrl_l1 & 0x04))
3401         {
3402             MHW_ASSERT(!CodecHal_PictureIsInvalid(refFrameList[vp9PicParams->RefFlags.fields.AltRefIdx]));
3403 
3404             uint8_t altRefPicIndex = refFrameList[vp9PicParams->RefFlags.fields.AltRefIdx].FrameIdx;
3405             uint32_t altRefFrameWidth = 0;
3406             uint32_t altRefFrameHeight = 0;
3407             if (!params->bUseDysRefSurface)
3408             {
3409                 altRefFrameWidth = vp9RefList[altRefPicIndex]->dwFrameWidth;
3410                 altRefFrameHeight = vp9RefList[altRefPicIndex]->dwFrameHeight;
3411             }
3412             else
3413             {
3414                 altRefFrameWidth = curFrameWidth;
3415                 altRefFrameHeight = curFrameHeight;
3416             }
3417 
3418             cmd.DW6.HorizontalScaleFactorForAltref      = (altRefFrameWidth * m_vp9ScalingFactor) / curFrameWidth;
3419             cmd.DW6.VerticalScaleFactorForAltref        = (altRefFrameHeight * m_vp9ScalingFactor) / curFrameHeight;
3420 
3421             cmd.DW9.AltrefFrameWidthInPixelsMinus1      = altRefFrameWidth - 1;
3422             cmd.DW9.AltrefFrameHieghtInPixelsMinus1     = altRefFrameHeight - 1;
3423         }
3424     }
3425 
3426     cmd.DW13.BaseQIndexSameAsLumaAc = vp9PicParams->LumaACQIndex;
3427     cmd.DW13.HeaderInsertionEnable  = 1;
3428 
3429     cmd.DW14.ChromaacQindexdelta = Convert2SignMagnitude(vp9PicParams->ChromaACQIndexDelta, 5);
3430     cmd.DW14.ChromadcQindexdelta = Convert2SignMagnitude(vp9PicParams->ChromaDCQIndexDelta, 5);
3431     cmd.DW14.LumaDcQIndexDelta   = Convert2SignMagnitude(vp9PicParams->LumaDCQIndexDelta, 5);
3432 
3433     cmd.DW15.LfRefDelta0 = Convert2SignMagnitude(vp9PicParams->LFRefDelta[0], 7);
3434     cmd.DW15.LfRefDelta1 = Convert2SignMagnitude(vp9PicParams->LFRefDelta[1], 7);
3435     cmd.DW15.LfRefDelta2 = Convert2SignMagnitude(vp9PicParams->LFRefDelta[2], 7);
3436     cmd.DW15.LfRefDelta3 = Convert2SignMagnitude(vp9PicParams->LFRefDelta[3], 7);
3437 
3438     cmd.DW16.LfModeDelta0 = Convert2SignMagnitude(vp9PicParams->LFModeDelta[0], 7);
3439     cmd.DW16.LfModeDelta1 = Convert2SignMagnitude(vp9PicParams->LFModeDelta[1], 7);
3440 
3441     cmd.DW17.Bitoffsetforlfrefdelta         = vp9PicParams->BitOffsetForLFRefDelta;
3442     cmd.DW17.Bitoffsetforlfmodedelta        = vp9PicParams->BitOffsetForLFModeDelta;
3443     cmd.DW18.Bitoffsetforlflevel            = vp9PicParams->BitOffsetForLFLevel;
3444     cmd.DW18.Bitoffsetforqindex             = vp9PicParams->BitOffsetForQIndex;
3445     cmd.DW32.Bitoffsetforfirstpartitionsize = vp9PicParams->BitOffsetForFirstPartitionSize;
3446 
3447     cmd.DW19.VdencPakOnlyPass               = params->bVdencPakOnlyPassFlag;
3448 
3449     MHW_MI_CHK_STATUS(Mhw_AddCommandCmdOrBB(m_osInterface, cmdBuffer, batchBuffer, &cmd, sizeof(cmd)));
3450 
3451     return eStatus;
3452 }
3453 
AddHcpVp9SegmentStateCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_BATCH_BUFFER batchBuffer,PMHW_VDBOX_VP9_SEGMENT_STATE params)3454 MOS_STATUS MhwVdboxHcpInterfaceG11::AddHcpVp9SegmentStateCmd(
3455     PMOS_COMMAND_BUFFER              cmdBuffer,
3456     PMHW_BATCH_BUFFER                batchBuffer,
3457     PMHW_VDBOX_VP9_SEGMENT_STATE     params)
3458 {
3459     MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
3460 
3461     MHW_MI_CHK_NULL(params);
3462 
3463     mhw_vdbox_hcp_g11_X::HCP_VP9_SEGMENT_STATE_CMD cmd;
3464 
3465     cmd.DW1.SegmentId = params->ucCurrentSegmentId;
3466 
3467     if (!m_decodeInUse)
3468     {
3469         CODEC_VP9_ENCODE_SEG_PARAMS             vp9SegData;
3470 
3471         vp9SegData = params->pVp9EncodeSegmentParams->SegData[params->ucCurrentSegmentId];
3472 
3473         cmd.DW2.SegmentSkipped                      = vp9SegData.SegmentFlags.fields.SegmentSkipped;
3474         cmd.DW2.SegmentReference                    = vp9SegData.SegmentFlags.fields.SegmentReference;
3475         cmd.DW2.SegmentReferenceEnabled             = vp9SegData.SegmentFlags.fields.SegmentReferenceEnabled;
3476 
3477         cmd.DW7.SegmentLfLevelDeltaEncodeModeOnly   = Convert2SignMagnitude(vp9SegData.SegmentLFLevelDelta, 7);
3478         cmd.DW7.SegmentQindexDeltaEncodeModeOnly    = Convert2SignMagnitude(vp9SegData.SegmentQIndexDelta, 9);
3479     }
3480     else
3481     {
3482         CODEC_VP9_SEG_PARAMS                    vp9SegData;
3483 
3484         vp9SegData = params->pVp9SegmentParams->SegData[params->ucCurrentSegmentId];
3485 
3486         cmd.DW2.SegmentSkipped          = vp9SegData.SegmentFlags.fields.SegmentReferenceSkipped;
3487         cmd.DW2.SegmentReference        = vp9SegData.SegmentFlags.fields.SegmentReference;
3488         cmd.DW2.SegmentReferenceEnabled = vp9SegData.SegmentFlags.fields.SegmentReferenceEnabled;
3489 
3490         cmd.DW3.Filterlevelref0Mode0    = vp9SegData.FilterLevel[0][0];
3491         cmd.DW3.Filterlevelref0Mode1    = vp9SegData.FilterLevel[0][1];
3492         cmd.DW3.Filterlevelref1Mode0    = vp9SegData.FilterLevel[1][0];
3493         cmd.DW3.Filterlevelref1Mode1    = vp9SegData.FilterLevel[1][1];
3494 
3495         cmd.DW4.Filterlevelref2Mode0    = vp9SegData.FilterLevel[2][0];
3496         cmd.DW4.Filterlevelref2Mode1    = vp9SegData.FilterLevel[2][1];
3497         cmd.DW4.Filterlevelref3Mode0    = vp9SegData.FilterLevel[3][0];
3498         cmd.DW4.Filterlevelref3Mode1    = vp9SegData.FilterLevel[3][1];
3499 
3500         cmd.DW5.LumaDcQuantScaleDecodeModeOnly      = vp9SegData.LumaDCQuantScale;
3501         cmd.DW5.LumaAcQuantScaleDecodeModeOnly      = vp9SegData.LumaACQuantScale;
3502 
3503         cmd.DW6.ChromaDcQuantScaleDecodeModeOnly    = vp9SegData.ChromaDCQuantScale;
3504         cmd.DW6.ChromaAcQuantScaleDecodeModeOnly    = vp9SegData.ChromaACQuantScale;
3505     }
3506 
3507     MHW_MI_CHK_STATUS(Mhw_AddCommandCmdOrBB(m_osInterface, cmdBuffer, batchBuffer, &cmd, cmd.byteSize));
3508 
3509     return eStatus;
3510 }
3511 
AddHcpHevcVp9RdoqStateCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_HEVC_PIC_STATE params)3512 MOS_STATUS MhwVdboxHcpInterfaceG11::AddHcpHevcVp9RdoqStateCmd(
3513     PMOS_COMMAND_BUFFER              cmdBuffer,
3514     PMHW_VDBOX_HEVC_PIC_STATE        params)
3515 {
3516     MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
3517 
3518     MHW_MI_CHK_NULL(m_osInterface);
3519     MHW_MI_CHK_NULL(params);
3520     MHW_MI_CHK_NULL(params->pHevcEncSeqParams);
3521 
3522     mhw_vdbox_hcp_g11_X::HEVC_VP9_RDOQ_STATE_CMD    cmd;
3523     uint16_t                                        lambdaTab[2][2][64];
3524 
3525     MHW_MI_CHK_NULL(params->pHevcEncPicParams);
3526 
3527     uint32_t sliceTypeIdx = (params->pHevcEncPicParams->CodingType == I_TYPE) ? 0 : 1;
3528 
3529     //Intra lambda
3530     MOS_ZeroMemory(lambdaTab, sizeof(lambdaTab));
3531     if (params->pHevcEncSeqParams->bit_depth_luma_minus8 == 0)
3532     {
3533         MHW_MI_CHK_STATUS(MOS_SecureMemcpy(
3534             lambdaTab[0][0],
3535             sizeof(RDOQLamdas8bits[sliceTypeIdx][0][0]),
3536             RDOQLamdas8bits[sliceTypeIdx][0][0],
3537             sizeof(RDOQLamdas8bits[sliceTypeIdx][0][0])));
3538         MHW_MI_CHK_STATUS(MOS_SecureMemcpy(
3539             lambdaTab[0][1],
3540             sizeof(RDOQLamdas8bits[sliceTypeIdx][0][1]),
3541             RDOQLamdas8bits[sliceTypeIdx][0][1],
3542             sizeof(RDOQLamdas8bits[sliceTypeIdx][0][1])));
3543         MHW_MI_CHK_STATUS(MOS_SecureMemcpy(
3544             lambdaTab[1][0],
3545             sizeof(RDOQLamdas8bits[sliceTypeIdx][1][0]),
3546             RDOQLamdas8bits[sliceTypeIdx][1][0],
3547             sizeof(RDOQLamdas8bits[sliceTypeIdx][1][0])));
3548         MHW_MI_CHK_STATUS(MOS_SecureMemcpy(
3549             lambdaTab[1][1],
3550             sizeof(RDOQLamdas8bits[sliceTypeIdx][1][1]),
3551             RDOQLamdas8bits[sliceTypeIdx][1][1],
3552             sizeof(RDOQLamdas8bits[sliceTypeIdx][1][1])));
3553     }
3554     else if (params->pHevcEncSeqParams->bit_depth_luma_minus8 == 2)
3555     {
3556         MHW_MI_CHK_STATUS(MOS_SecureMemcpy(
3557             lambdaTab[0][0],
3558             sizeof(RDOQLamdas10bits[sliceTypeIdx][0][0]),
3559             RDOQLamdas10bits[sliceTypeIdx][0][0],
3560             sizeof(RDOQLamdas10bits[sliceTypeIdx][0][0])));
3561         MHW_MI_CHK_STATUS(MOS_SecureMemcpy(
3562             lambdaTab[0][1],
3563             sizeof(RDOQLamdas10bits[sliceTypeIdx][0][1]),
3564             RDOQLamdas10bits[sliceTypeIdx][0][1],
3565             sizeof(RDOQLamdas10bits[sliceTypeIdx][0][1])));
3566         MHW_MI_CHK_STATUS(MOS_SecureMemcpy(
3567             lambdaTab[1][0],
3568             sizeof(RDOQLamdas10bits[sliceTypeIdx][1][0]),
3569             RDOQLamdas10bits[sliceTypeIdx][1][0],
3570             sizeof(RDOQLamdas10bits[sliceTypeIdx][1][0])));
3571         MHW_MI_CHK_STATUS(MOS_SecureMemcpy(
3572             lambdaTab[1][1],
3573             sizeof(RDOQLamdas10bits[sliceTypeIdx][1][1]),
3574             RDOQLamdas10bits[sliceTypeIdx][1][1],
3575             sizeof(RDOQLamdas10bits[sliceTypeIdx][1][1])));
3576     }
3577 
3578     for (uint8_t i = 0; i < 32; i++)
3579     {
3580         cmd.Intralumalambda[i].DW0.Lambdavalue0     = lambdaTab[0][0][i * 2];
3581         cmd.Intralumalambda[i].DW0.Lambdavalue1     = lambdaTab[0][0][i * 2 + 1];
3582 
3583         cmd.Intrachromalambda[i].DW0.Lambdavalue0   = lambdaTab[0][1][i * 2];
3584         cmd.Intrachromalambda[i].DW0.Lambdavalue1   = lambdaTab[0][1][i * 2 + 1];
3585 
3586         cmd.Interlumalambda[i].DW0.Lambdavalue0     = lambdaTab[1][0][i * 2];
3587         cmd.Interlumalambda[i].DW0.Lambdavalue1     = lambdaTab[1][0][i * 2 + 1];
3588 
3589         cmd.Interchromalambda[i].DW0.Lambdavalue0   = lambdaTab[1][1][i * 2];
3590         cmd.Interchromalambda[i].DW0.Lambdavalue1   = lambdaTab[1][1][i * 2 + 1];
3591     }
3592 
3593     if (m_hevcRDOQPerfDisabled)
3594     {
3595         cmd.DW1.DisableHtqPerformanceFix1 = true;
3596         cmd.DW1.DisableHtqPerformanceFix0 = true;
3597     }
3598 
3599     MHW_MI_CHK_STATUS(m_osInterface->pfnAddCommand(cmdBuffer, &cmd, sizeof(cmd)));
3600 
3601     return eStatus;
3602 }
3603 
AddHcpDecodeTileCodingCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_HCP_TILE_CODING_PARAMS_G11 params)3604 MOS_STATUS  MhwVdboxHcpInterfaceG11::AddHcpDecodeTileCodingCmd(
3605     PMOS_COMMAND_BUFFER                   cmdBuffer,
3606     PMHW_VDBOX_HCP_TILE_CODING_PARAMS_G11 params)
3607 {
3608     MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
3609 
3610     MHW_FUNCTION_ENTER;
3611 
3612     MHW_MI_CHK_NULL(m_osInterface);
3613     MHW_MI_CHK_NULL(params);
3614 
3615     mhw_vdbox_hcp_g11_X::HCP_TILE_CODING_CMD cmd;
3616     MHW_RESOURCE_PARAMS                      resourceParams;
3617     MEDIA_SYSTEM_INFO  *gtSystemInfo = m_osInterface->pfnGetGtSystemInfo(m_osInterface);
3618     uint8_t          numVdbox = (uint8_t)gtSystemInfo->VDBoxInfo.NumberOfVDBoxEnabled;
3619 
3620     MHW_ASSERT(params->ucNumDecodePipes <= numVdbox);
3621     MHW_ASSERT(params->ucPipeIdx < params->ucNumDecodePipes);
3622 
3623     cmd.DW1.NumberOfActiveBePipes    = params->ucNumDecodePipes;
3624     cmd.DW1.NumOfTileColumnsInAFrame = params->ucNumDecodePipes;
3625     cmd.DW2.TileRowPosition          = 0;
3626     cmd.DW2.TileColumnPosition       = params->TileStartLCUX;
3627     cmd.DW3.Tileheightinmincbminus1  = params->TileHeightInMinCbMinus1;
3628     cmd.DW3.Tilewidthinmincbminus1   = params->TileWidthInMinCbMinus1;
3629 
3630     MHW_MI_CHK_STATUS(m_osInterface->pfnAddCommand(cmdBuffer, &cmd, sizeof(cmd)));
3631 
3632     return eStatus;
3633 }
3634 
AddHcpEncodeTileCodingCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_HCP_TILE_CODING_PARAMS_G11 params)3635 MOS_STATUS  MhwVdboxHcpInterfaceG11::AddHcpEncodeTileCodingCmd(
3636     PMOS_COMMAND_BUFFER                   cmdBuffer,
3637     PMHW_VDBOX_HCP_TILE_CODING_PARAMS_G11 params)
3638 {
3639     MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
3640 
3641     MHW_FUNCTION_ENTER;
3642 
3643     MHW_MI_CHK_NULL(m_osInterface);
3644     MHW_MI_CHK_NULL(params);
3645 
3646     mhw_vdbox_hcp_g11_X::HCP_TILE_CODING_CMD cmd;
3647 
3648     cmd.DW1.NumberOfActiveBePipes    = params->NumberOfActiveBePipes;
3649     cmd.DW1.NumOfTileColumnsInAFrame = params->NumOfTileColumnsInFrame; //This field is not used by HW. This field should be same as "Number of Active BE Pipes".
3650     cmd.DW2.TileColumnPosition       = params->TileStartLCUX;
3651     cmd.DW2.TileRowPosition          = params->TileStartLCUY;
3652     cmd.DW2.Islasttileofcolumn       = params->IsLastTileofColumn;
3653     cmd.DW3.Tileheightinmincbminus1  = params->TileHeightInMinCbMinus1;
3654     cmd.DW3.Tilewidthinmincbminus1   = params->TileWidthInMinCbMinus1;
3655 
3656     cmd.DW8.CuRecordOffset           = params->CuRecordOffset;
3657     cmd.DW4.BitstreamByteOffset      = params->BitstreamByteOffset;
3658     cmd.DW5.PakFrameStatisticsOffset = params->PakTileStatisticsOffset;
3659     cmd.DW6.CuLevelStreamoutOffset   = params->CuLevelStreamoutOffset;
3660     cmd.DW7.SliceSizeStreamoutOffset = params->SliceSizeStreamoutOffset;
3661     cmd.DW9.SseRowstoreOffset        = params->SseRowstoreOffset;
3662     cmd.DW10.SaoRowstoreOffset       = params->SaoRowstoreOffset;
3663     cmd.DW11.TileSizeStreamoutOffset = params->TileSizeStreamoutOffset;
3664     cmd.DW12.Vp9ProbabilityCounterStreamoutOffset = params->Vp9ProbabilityCounterStreamoutOffset;
3665 
3666     if (params->presHcpSyncBuffer) // this buffer is not used in HEVC/VP9 decode or encode
3667     {
3668         MHW_RESOURCE_PARAMS                 resourceParams;
3669 
3670         cmd.HcpScalabilitySynchronizeBufferAttributes.DW0.Value   |=
3671             m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_HCP_SAO_CODEC].Value;
3672 
3673         MOS_ZeroMemory(&resourceParams, sizeof(resourceParams));
3674         resourceParams.dwLsbNum         = MHW_VDBOX_HCP_GENERAL_STATE_SHIFT;
3675         resourceParams.HwCommandType    = MOS_MFX_PIPE_BUF_ADDR;
3676         resourceParams.presResource     = params->presHcpSyncBuffer;
3677         resourceParams.dwOffset         = 0;
3678         resourceParams.pdwCmd           = (cmd.HcpScalabilitySynchronizeBufferBaseAddress.DW0_1.Value);
3679         resourceParams.dwLocationInCmd  = 13;
3680         resourceParams.bIsWritable      = true;
3681 
3682         MHW_MI_CHK_STATUS(pfnAddResourceToCmd(
3683             m_osInterface,
3684             cmdBuffer,
3685             &resourceParams));
3686     }
3687 
3688     MHW_MI_CHK_STATUS(m_osInterface->pfnAddCommand(cmdBuffer, &cmd, sizeof(cmd)));
3689 
3690     return eStatus;
3691 }
3692 
AddHcpHevcPicBrcBuffer(PMOS_RESOURCE hcpImgStates,PMHW_VDBOX_HEVC_PIC_STATE hevcPicState)3693 MOS_STATUS MhwVdboxHcpInterfaceG11::AddHcpHevcPicBrcBuffer(
3694     PMOS_RESOURCE                   hcpImgStates,
3695     PMHW_VDBOX_HEVC_PIC_STATE        hevcPicState)
3696 {
3697     MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
3698 
3699     MHW_FUNCTION_ENTER;
3700 
3701     MHW_MI_CHK_NULL(hcpImgStates);
3702 
3703     MOS_COMMAND_BUFFER                      constructedCmdBuf;
3704     mhw_vdbox_hcp_g11_X::HCP_PIC_STATE_CMD  cmd;
3705     uint32_t*                               insertion = nullptr;
3706     MOS_LOCK_PARAMS                         lockFlags;
3707     m_brcNumPakPasses = hevcPicState->brcNumPakPasses;
3708 
3709     MOS_ZeroMemory(&lockFlags, sizeof(MOS_LOCK_PARAMS));
3710     lockFlags.WriteOnly = 1;
3711     uint8_t *data = (uint8_t*)m_osInterface->pfnLockResource(m_osInterface, hcpImgStates, &lockFlags);
3712     MHW_MI_CHK_NULL(data);
3713 
3714     constructedCmdBuf.pCmdBase      = (uint32_t *)data;
3715     constructedCmdBuf.pCmdPtr       = (uint32_t *)data;
3716     constructedCmdBuf.iOffset       = 0;
3717     constructedCmdBuf.iRemaining    = BRC_IMG_STATE_SIZE_PER_PASS_G11 * (m_brcNumPakPasses);
3718 
3719     MHW_MI_CHK_STATUS(AddHcpPicStateCmd(&constructedCmdBuf, hevcPicState));
3720 
3721     cmd = *(mhw_vdbox_hcp_g11_X::HCP_PIC_STATE_CMD *)data;
3722 
3723     for (uint32_t i = 0; i < m_brcNumPakPasses; i++)
3724     {
3725         if (i == 0)
3726         {
3727             cmd.DW6.Nonfirstpassflag = false;
3728         }
3729         else
3730         {
3731             cmd.DW6.Nonfirstpassflag = true;
3732         }
3733 
3734         cmd.DW6.FrameszoverstatusenFramebitratemaxreportmask  = true;
3735         cmd.DW6.FrameszunderstatusenFramebitrateminreportmask = true;
3736         cmd.DW6.LcumaxbitstatusenLcumaxsizereportmask         = false; // BRC update kernel does not consider if there is any LCU whose size is too big
3737 
3738         *(mhw_vdbox_hcp_g11_X::HCP_PIC_STATE_CMD *)data     = cmd;
3739 
3740         /* add batch buffer end insertion flag */
3741         insertion = (uint32_t*)(data + mhw_vdbox_hcp_g11_X::HCP_PIC_STATE_CMD::byteSize);
3742         *insertion = 0x05000000;
3743 
3744         data += BRC_IMG_STATE_SIZE_PER_PASS_G11;
3745     }
3746 
3747     MHW_MI_CHK_STATUS(m_osInterface->pfnUnlockResource(m_osInterface, hcpImgStates));
3748 
3749     return eStatus;
3750 }
3751 
GetOsResLaceOrAceOrRgbHistogramBufferSize(uint32_t width,uint32_t height,uint32_t * size)3752 MOS_STATUS MhwVdboxHcpInterfaceG11::GetOsResLaceOrAceOrRgbHistogramBufferSize(
3753     uint32_t                        width,
3754     uint32_t                        height,
3755     uint32_t                       *size)
3756 {
3757     MOS_STATUS                      eStatus = MOS_STATUS_SUCCESS;
3758 
3759     *size  = m_veboxRgbHistogramSize;
3760     *size += m_veboxRgbAceHistogramSizeReserved;
3761 
3762     uint32_t sizeLace = MOS_ROUNDUP_DIVIDE(height, 64) *
3763         MOS_ROUNDUP_DIVIDE(width, 64)  *
3764         m_veboxLaceHistogram256BinPerBlock;
3765 
3766     uint32_t sizeNoLace = m_veboxAceHistogramSizePerFramePerSlice *
3767         m_veboxNumFramePreviousCurrent                   *
3768         m_veboxMaxSlices;
3769 
3770     *size += MOS_MAX(sizeLace, sizeNoLace);
3771 
3772     return eStatus;
3773 }
3774 
GetOsResStatisticsOutputBufferSize(uint32_t width,uint32_t height,uint32_t * size)3775 MOS_STATUS MhwVdboxHcpInterfaceG11::GetOsResStatisticsOutputBufferSize(
3776     uint32_t                        width,
3777     uint32_t                        height,
3778     uint32_t                       *size)
3779 {
3780     MOS_STATUS                      eStatus = MOS_STATUS_SUCCESS;
3781 
3782     width  = MOS_ALIGN_CEIL(width, 64);
3783     height = MOS_ROUNDUP_DIVIDE(height, 4) + MOS_ROUNDUP_DIVIDE(m_veboxStatisticsSize * sizeof(uint32_t), width);
3784     *size   = width * height;
3785 
3786     return eStatus;
3787 }
3788 
AddHcpTileCodingCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_HCP_TILE_CODING_PARAMS_G11 params)3789 MOS_STATUS MhwVdboxHcpInterfaceG11::AddHcpTileCodingCmd(
3790     PMOS_COMMAND_BUFFER                   cmdBuffer,
3791     PMHW_VDBOX_HCP_TILE_CODING_PARAMS_G11 params)
3792 {
3793     MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
3794 
3795     MHW_FUNCTION_ENTER;
3796 
3797     if (m_decodeInUse)
3798     {
3799         MHW_MI_CHK_STATUS(AddHcpDecodeTileCodingCmd(cmdBuffer, params));
3800     }
3801     else
3802     {
3803         MHW_MI_CHK_STATUS(AddHcpEncodeTileCodingCmd(cmdBuffer, params));
3804     }
3805 
3806     return eStatus;
3807 }
3808