1// Code generated from _gen/PPC64.rules using 'go generate'; DO NOT EDIT.
2
3package ssa
4
5import "internal/buildcfg"
6import "math"
7import "cmd/compile/internal/types"
8
9func rewriteValuePPC64(v *Value) bool {
10	switch v.Op {
11	case OpAbs:
12		v.Op = OpPPC64FABS
13		return true
14	case OpAdd16:
15		v.Op = OpPPC64ADD
16		return true
17	case OpAdd32:
18		v.Op = OpPPC64ADD
19		return true
20	case OpAdd32F:
21		v.Op = OpPPC64FADDS
22		return true
23	case OpAdd64:
24		v.Op = OpPPC64ADD
25		return true
26	case OpAdd64F:
27		v.Op = OpPPC64FADD
28		return true
29	case OpAdd8:
30		v.Op = OpPPC64ADD
31		return true
32	case OpAddPtr:
33		v.Op = OpPPC64ADD
34		return true
35	case OpAddr:
36		return rewriteValuePPC64_OpAddr(v)
37	case OpAnd16:
38		v.Op = OpPPC64AND
39		return true
40	case OpAnd32:
41		v.Op = OpPPC64AND
42		return true
43	case OpAnd64:
44		v.Op = OpPPC64AND
45		return true
46	case OpAnd8:
47		v.Op = OpPPC64AND
48		return true
49	case OpAndB:
50		v.Op = OpPPC64AND
51		return true
52	case OpAtomicAdd32:
53		v.Op = OpPPC64LoweredAtomicAdd32
54		return true
55	case OpAtomicAdd64:
56		v.Op = OpPPC64LoweredAtomicAdd64
57		return true
58	case OpAtomicAnd32:
59		v.Op = OpPPC64LoweredAtomicAnd32
60		return true
61	case OpAtomicAnd8:
62		v.Op = OpPPC64LoweredAtomicAnd8
63		return true
64	case OpAtomicCompareAndSwap32:
65		return rewriteValuePPC64_OpAtomicCompareAndSwap32(v)
66	case OpAtomicCompareAndSwap64:
67		return rewriteValuePPC64_OpAtomicCompareAndSwap64(v)
68	case OpAtomicCompareAndSwapRel32:
69		return rewriteValuePPC64_OpAtomicCompareAndSwapRel32(v)
70	case OpAtomicExchange32:
71		v.Op = OpPPC64LoweredAtomicExchange32
72		return true
73	case OpAtomicExchange64:
74		v.Op = OpPPC64LoweredAtomicExchange64
75		return true
76	case OpAtomicLoad32:
77		return rewriteValuePPC64_OpAtomicLoad32(v)
78	case OpAtomicLoad64:
79		return rewriteValuePPC64_OpAtomicLoad64(v)
80	case OpAtomicLoad8:
81		return rewriteValuePPC64_OpAtomicLoad8(v)
82	case OpAtomicLoadAcq32:
83		return rewriteValuePPC64_OpAtomicLoadAcq32(v)
84	case OpAtomicLoadAcq64:
85		return rewriteValuePPC64_OpAtomicLoadAcq64(v)
86	case OpAtomicLoadPtr:
87		return rewriteValuePPC64_OpAtomicLoadPtr(v)
88	case OpAtomicOr32:
89		v.Op = OpPPC64LoweredAtomicOr32
90		return true
91	case OpAtomicOr8:
92		v.Op = OpPPC64LoweredAtomicOr8
93		return true
94	case OpAtomicStore32:
95		return rewriteValuePPC64_OpAtomicStore32(v)
96	case OpAtomicStore64:
97		return rewriteValuePPC64_OpAtomicStore64(v)
98	case OpAtomicStore8:
99		return rewriteValuePPC64_OpAtomicStore8(v)
100	case OpAtomicStoreRel32:
101		return rewriteValuePPC64_OpAtomicStoreRel32(v)
102	case OpAtomicStoreRel64:
103		return rewriteValuePPC64_OpAtomicStoreRel64(v)
104	case OpAvg64u:
105		return rewriteValuePPC64_OpAvg64u(v)
106	case OpBitLen32:
107		return rewriteValuePPC64_OpBitLen32(v)
108	case OpBitLen64:
109		return rewriteValuePPC64_OpBitLen64(v)
110	case OpBswap16:
111		return rewriteValuePPC64_OpBswap16(v)
112	case OpBswap32:
113		return rewriteValuePPC64_OpBswap32(v)
114	case OpBswap64:
115		return rewriteValuePPC64_OpBswap64(v)
116	case OpCeil:
117		v.Op = OpPPC64FCEIL
118		return true
119	case OpClosureCall:
120		v.Op = OpPPC64CALLclosure
121		return true
122	case OpCom16:
123		return rewriteValuePPC64_OpCom16(v)
124	case OpCom32:
125		return rewriteValuePPC64_OpCom32(v)
126	case OpCom64:
127		return rewriteValuePPC64_OpCom64(v)
128	case OpCom8:
129		return rewriteValuePPC64_OpCom8(v)
130	case OpCondSelect:
131		return rewriteValuePPC64_OpCondSelect(v)
132	case OpConst16:
133		return rewriteValuePPC64_OpConst16(v)
134	case OpConst32:
135		return rewriteValuePPC64_OpConst32(v)
136	case OpConst32F:
137		v.Op = OpPPC64FMOVSconst
138		return true
139	case OpConst64:
140		return rewriteValuePPC64_OpConst64(v)
141	case OpConst64F:
142		v.Op = OpPPC64FMOVDconst
143		return true
144	case OpConst8:
145		return rewriteValuePPC64_OpConst8(v)
146	case OpConstBool:
147		return rewriteValuePPC64_OpConstBool(v)
148	case OpConstNil:
149		return rewriteValuePPC64_OpConstNil(v)
150	case OpCopysign:
151		return rewriteValuePPC64_OpCopysign(v)
152	case OpCtz16:
153		return rewriteValuePPC64_OpCtz16(v)
154	case OpCtz32:
155		return rewriteValuePPC64_OpCtz32(v)
156	case OpCtz32NonZero:
157		v.Op = OpCtz32
158		return true
159	case OpCtz64:
160		return rewriteValuePPC64_OpCtz64(v)
161	case OpCtz64NonZero:
162		v.Op = OpCtz64
163		return true
164	case OpCtz8:
165		return rewriteValuePPC64_OpCtz8(v)
166	case OpCvt32Fto32:
167		return rewriteValuePPC64_OpCvt32Fto32(v)
168	case OpCvt32Fto64:
169		return rewriteValuePPC64_OpCvt32Fto64(v)
170	case OpCvt32Fto64F:
171		v.Op = OpCopy
172		return true
173	case OpCvt32to32F:
174		return rewriteValuePPC64_OpCvt32to32F(v)
175	case OpCvt32to64F:
176		return rewriteValuePPC64_OpCvt32to64F(v)
177	case OpCvt64Fto32:
178		return rewriteValuePPC64_OpCvt64Fto32(v)
179	case OpCvt64Fto32F:
180		v.Op = OpPPC64FRSP
181		return true
182	case OpCvt64Fto64:
183		return rewriteValuePPC64_OpCvt64Fto64(v)
184	case OpCvt64to32F:
185		return rewriteValuePPC64_OpCvt64to32F(v)
186	case OpCvt64to64F:
187		return rewriteValuePPC64_OpCvt64to64F(v)
188	case OpCvtBoolToUint8:
189		v.Op = OpCopy
190		return true
191	case OpDiv16:
192		return rewriteValuePPC64_OpDiv16(v)
193	case OpDiv16u:
194		return rewriteValuePPC64_OpDiv16u(v)
195	case OpDiv32:
196		return rewriteValuePPC64_OpDiv32(v)
197	case OpDiv32F:
198		v.Op = OpPPC64FDIVS
199		return true
200	case OpDiv32u:
201		v.Op = OpPPC64DIVWU
202		return true
203	case OpDiv64:
204		return rewriteValuePPC64_OpDiv64(v)
205	case OpDiv64F:
206		v.Op = OpPPC64FDIV
207		return true
208	case OpDiv64u:
209		v.Op = OpPPC64DIVDU
210		return true
211	case OpDiv8:
212		return rewriteValuePPC64_OpDiv8(v)
213	case OpDiv8u:
214		return rewriteValuePPC64_OpDiv8u(v)
215	case OpEq16:
216		return rewriteValuePPC64_OpEq16(v)
217	case OpEq32:
218		return rewriteValuePPC64_OpEq32(v)
219	case OpEq32F:
220		return rewriteValuePPC64_OpEq32F(v)
221	case OpEq64:
222		return rewriteValuePPC64_OpEq64(v)
223	case OpEq64F:
224		return rewriteValuePPC64_OpEq64F(v)
225	case OpEq8:
226		return rewriteValuePPC64_OpEq8(v)
227	case OpEqB:
228		return rewriteValuePPC64_OpEqB(v)
229	case OpEqPtr:
230		return rewriteValuePPC64_OpEqPtr(v)
231	case OpFMA:
232		v.Op = OpPPC64FMADD
233		return true
234	case OpFloor:
235		v.Op = OpPPC64FFLOOR
236		return true
237	case OpGetCallerPC:
238		v.Op = OpPPC64LoweredGetCallerPC
239		return true
240	case OpGetCallerSP:
241		v.Op = OpPPC64LoweredGetCallerSP
242		return true
243	case OpGetClosurePtr:
244		v.Op = OpPPC64LoweredGetClosurePtr
245		return true
246	case OpHmul32:
247		v.Op = OpPPC64MULHW
248		return true
249	case OpHmul32u:
250		v.Op = OpPPC64MULHWU
251		return true
252	case OpHmul64:
253		v.Op = OpPPC64MULHD
254		return true
255	case OpHmul64u:
256		v.Op = OpPPC64MULHDU
257		return true
258	case OpInterCall:
259		v.Op = OpPPC64CALLinter
260		return true
261	case OpIsInBounds:
262		return rewriteValuePPC64_OpIsInBounds(v)
263	case OpIsNonNil:
264		return rewriteValuePPC64_OpIsNonNil(v)
265	case OpIsSliceInBounds:
266		return rewriteValuePPC64_OpIsSliceInBounds(v)
267	case OpLeq16:
268		return rewriteValuePPC64_OpLeq16(v)
269	case OpLeq16U:
270		return rewriteValuePPC64_OpLeq16U(v)
271	case OpLeq32:
272		return rewriteValuePPC64_OpLeq32(v)
273	case OpLeq32F:
274		return rewriteValuePPC64_OpLeq32F(v)
275	case OpLeq32U:
276		return rewriteValuePPC64_OpLeq32U(v)
277	case OpLeq64:
278		return rewriteValuePPC64_OpLeq64(v)
279	case OpLeq64F:
280		return rewriteValuePPC64_OpLeq64F(v)
281	case OpLeq64U:
282		return rewriteValuePPC64_OpLeq64U(v)
283	case OpLeq8:
284		return rewriteValuePPC64_OpLeq8(v)
285	case OpLeq8U:
286		return rewriteValuePPC64_OpLeq8U(v)
287	case OpLess16:
288		return rewriteValuePPC64_OpLess16(v)
289	case OpLess16U:
290		return rewriteValuePPC64_OpLess16U(v)
291	case OpLess32:
292		return rewriteValuePPC64_OpLess32(v)
293	case OpLess32F:
294		return rewriteValuePPC64_OpLess32F(v)
295	case OpLess32U:
296		return rewriteValuePPC64_OpLess32U(v)
297	case OpLess64:
298		return rewriteValuePPC64_OpLess64(v)
299	case OpLess64F:
300		return rewriteValuePPC64_OpLess64F(v)
301	case OpLess64U:
302		return rewriteValuePPC64_OpLess64U(v)
303	case OpLess8:
304		return rewriteValuePPC64_OpLess8(v)
305	case OpLess8U:
306		return rewriteValuePPC64_OpLess8U(v)
307	case OpLoad:
308		return rewriteValuePPC64_OpLoad(v)
309	case OpLocalAddr:
310		return rewriteValuePPC64_OpLocalAddr(v)
311	case OpLsh16x16:
312		return rewriteValuePPC64_OpLsh16x16(v)
313	case OpLsh16x32:
314		return rewriteValuePPC64_OpLsh16x32(v)
315	case OpLsh16x64:
316		return rewriteValuePPC64_OpLsh16x64(v)
317	case OpLsh16x8:
318		return rewriteValuePPC64_OpLsh16x8(v)
319	case OpLsh32x16:
320		return rewriteValuePPC64_OpLsh32x16(v)
321	case OpLsh32x32:
322		return rewriteValuePPC64_OpLsh32x32(v)
323	case OpLsh32x64:
324		return rewriteValuePPC64_OpLsh32x64(v)
325	case OpLsh32x8:
326		return rewriteValuePPC64_OpLsh32x8(v)
327	case OpLsh64x16:
328		return rewriteValuePPC64_OpLsh64x16(v)
329	case OpLsh64x32:
330		return rewriteValuePPC64_OpLsh64x32(v)
331	case OpLsh64x64:
332		return rewriteValuePPC64_OpLsh64x64(v)
333	case OpLsh64x8:
334		return rewriteValuePPC64_OpLsh64x8(v)
335	case OpLsh8x16:
336		return rewriteValuePPC64_OpLsh8x16(v)
337	case OpLsh8x32:
338		return rewriteValuePPC64_OpLsh8x32(v)
339	case OpLsh8x64:
340		return rewriteValuePPC64_OpLsh8x64(v)
341	case OpLsh8x8:
342		return rewriteValuePPC64_OpLsh8x8(v)
343	case OpMax32F:
344		return rewriteValuePPC64_OpMax32F(v)
345	case OpMax64F:
346		return rewriteValuePPC64_OpMax64F(v)
347	case OpMin32F:
348		return rewriteValuePPC64_OpMin32F(v)
349	case OpMin64F:
350		return rewriteValuePPC64_OpMin64F(v)
351	case OpMod16:
352		return rewriteValuePPC64_OpMod16(v)
353	case OpMod16u:
354		return rewriteValuePPC64_OpMod16u(v)
355	case OpMod32:
356		return rewriteValuePPC64_OpMod32(v)
357	case OpMod32u:
358		return rewriteValuePPC64_OpMod32u(v)
359	case OpMod64:
360		return rewriteValuePPC64_OpMod64(v)
361	case OpMod64u:
362		return rewriteValuePPC64_OpMod64u(v)
363	case OpMod8:
364		return rewriteValuePPC64_OpMod8(v)
365	case OpMod8u:
366		return rewriteValuePPC64_OpMod8u(v)
367	case OpMove:
368		return rewriteValuePPC64_OpMove(v)
369	case OpMul16:
370		v.Op = OpPPC64MULLW
371		return true
372	case OpMul32:
373		v.Op = OpPPC64MULLW
374		return true
375	case OpMul32F:
376		v.Op = OpPPC64FMULS
377		return true
378	case OpMul64:
379		v.Op = OpPPC64MULLD
380		return true
381	case OpMul64F:
382		v.Op = OpPPC64FMUL
383		return true
384	case OpMul8:
385		v.Op = OpPPC64MULLW
386		return true
387	case OpNeg16:
388		v.Op = OpPPC64NEG
389		return true
390	case OpNeg32:
391		v.Op = OpPPC64NEG
392		return true
393	case OpNeg32F:
394		v.Op = OpPPC64FNEG
395		return true
396	case OpNeg64:
397		v.Op = OpPPC64NEG
398		return true
399	case OpNeg64F:
400		v.Op = OpPPC64FNEG
401		return true
402	case OpNeg8:
403		v.Op = OpPPC64NEG
404		return true
405	case OpNeq16:
406		return rewriteValuePPC64_OpNeq16(v)
407	case OpNeq32:
408		return rewriteValuePPC64_OpNeq32(v)
409	case OpNeq32F:
410		return rewriteValuePPC64_OpNeq32F(v)
411	case OpNeq64:
412		return rewriteValuePPC64_OpNeq64(v)
413	case OpNeq64F:
414		return rewriteValuePPC64_OpNeq64F(v)
415	case OpNeq8:
416		return rewriteValuePPC64_OpNeq8(v)
417	case OpNeqB:
418		v.Op = OpPPC64XOR
419		return true
420	case OpNeqPtr:
421		return rewriteValuePPC64_OpNeqPtr(v)
422	case OpNilCheck:
423		v.Op = OpPPC64LoweredNilCheck
424		return true
425	case OpNot:
426		return rewriteValuePPC64_OpNot(v)
427	case OpOffPtr:
428		return rewriteValuePPC64_OpOffPtr(v)
429	case OpOr16:
430		v.Op = OpPPC64OR
431		return true
432	case OpOr32:
433		v.Op = OpPPC64OR
434		return true
435	case OpOr64:
436		v.Op = OpPPC64OR
437		return true
438	case OpOr8:
439		v.Op = OpPPC64OR
440		return true
441	case OpOrB:
442		v.Op = OpPPC64OR
443		return true
444	case OpPPC64ADD:
445		return rewriteValuePPC64_OpPPC64ADD(v)
446	case OpPPC64ADDE:
447		return rewriteValuePPC64_OpPPC64ADDE(v)
448	case OpPPC64ADDconst:
449		return rewriteValuePPC64_OpPPC64ADDconst(v)
450	case OpPPC64AND:
451		return rewriteValuePPC64_OpPPC64AND(v)
452	case OpPPC64ANDN:
453		return rewriteValuePPC64_OpPPC64ANDN(v)
454	case OpPPC64ANDconst:
455		return rewriteValuePPC64_OpPPC64ANDconst(v)
456	case OpPPC64BRD:
457		return rewriteValuePPC64_OpPPC64BRD(v)
458	case OpPPC64BRH:
459		return rewriteValuePPC64_OpPPC64BRH(v)
460	case OpPPC64BRW:
461		return rewriteValuePPC64_OpPPC64BRW(v)
462	case OpPPC64CLRLSLDI:
463		return rewriteValuePPC64_OpPPC64CLRLSLDI(v)
464	case OpPPC64CMP:
465		return rewriteValuePPC64_OpPPC64CMP(v)
466	case OpPPC64CMPU:
467		return rewriteValuePPC64_OpPPC64CMPU(v)
468	case OpPPC64CMPUconst:
469		return rewriteValuePPC64_OpPPC64CMPUconst(v)
470	case OpPPC64CMPW:
471		return rewriteValuePPC64_OpPPC64CMPW(v)
472	case OpPPC64CMPWU:
473		return rewriteValuePPC64_OpPPC64CMPWU(v)
474	case OpPPC64CMPWUconst:
475		return rewriteValuePPC64_OpPPC64CMPWUconst(v)
476	case OpPPC64CMPWconst:
477		return rewriteValuePPC64_OpPPC64CMPWconst(v)
478	case OpPPC64CMPconst:
479		return rewriteValuePPC64_OpPPC64CMPconst(v)
480	case OpPPC64Equal:
481		return rewriteValuePPC64_OpPPC64Equal(v)
482	case OpPPC64FABS:
483		return rewriteValuePPC64_OpPPC64FABS(v)
484	case OpPPC64FADD:
485		return rewriteValuePPC64_OpPPC64FADD(v)
486	case OpPPC64FADDS:
487		return rewriteValuePPC64_OpPPC64FADDS(v)
488	case OpPPC64FCEIL:
489		return rewriteValuePPC64_OpPPC64FCEIL(v)
490	case OpPPC64FFLOOR:
491		return rewriteValuePPC64_OpPPC64FFLOOR(v)
492	case OpPPC64FGreaterEqual:
493		return rewriteValuePPC64_OpPPC64FGreaterEqual(v)
494	case OpPPC64FGreaterThan:
495		return rewriteValuePPC64_OpPPC64FGreaterThan(v)
496	case OpPPC64FLessEqual:
497		return rewriteValuePPC64_OpPPC64FLessEqual(v)
498	case OpPPC64FLessThan:
499		return rewriteValuePPC64_OpPPC64FLessThan(v)
500	case OpPPC64FMOVDload:
501		return rewriteValuePPC64_OpPPC64FMOVDload(v)
502	case OpPPC64FMOVDstore:
503		return rewriteValuePPC64_OpPPC64FMOVDstore(v)
504	case OpPPC64FMOVSload:
505		return rewriteValuePPC64_OpPPC64FMOVSload(v)
506	case OpPPC64FMOVSstore:
507		return rewriteValuePPC64_OpPPC64FMOVSstore(v)
508	case OpPPC64FNEG:
509		return rewriteValuePPC64_OpPPC64FNEG(v)
510	case OpPPC64FSQRT:
511		return rewriteValuePPC64_OpPPC64FSQRT(v)
512	case OpPPC64FSUB:
513		return rewriteValuePPC64_OpPPC64FSUB(v)
514	case OpPPC64FSUBS:
515		return rewriteValuePPC64_OpPPC64FSUBS(v)
516	case OpPPC64FTRUNC:
517		return rewriteValuePPC64_OpPPC64FTRUNC(v)
518	case OpPPC64GreaterEqual:
519		return rewriteValuePPC64_OpPPC64GreaterEqual(v)
520	case OpPPC64GreaterThan:
521		return rewriteValuePPC64_OpPPC64GreaterThan(v)
522	case OpPPC64ISEL:
523		return rewriteValuePPC64_OpPPC64ISEL(v)
524	case OpPPC64LessEqual:
525		return rewriteValuePPC64_OpPPC64LessEqual(v)
526	case OpPPC64LessThan:
527		return rewriteValuePPC64_OpPPC64LessThan(v)
528	case OpPPC64MFVSRD:
529		return rewriteValuePPC64_OpPPC64MFVSRD(v)
530	case OpPPC64MOVBZload:
531		return rewriteValuePPC64_OpPPC64MOVBZload(v)
532	case OpPPC64MOVBZloadidx:
533		return rewriteValuePPC64_OpPPC64MOVBZloadidx(v)
534	case OpPPC64MOVBZreg:
535		return rewriteValuePPC64_OpPPC64MOVBZreg(v)
536	case OpPPC64MOVBreg:
537		return rewriteValuePPC64_OpPPC64MOVBreg(v)
538	case OpPPC64MOVBstore:
539		return rewriteValuePPC64_OpPPC64MOVBstore(v)
540	case OpPPC64MOVBstoreidx:
541		return rewriteValuePPC64_OpPPC64MOVBstoreidx(v)
542	case OpPPC64MOVBstorezero:
543		return rewriteValuePPC64_OpPPC64MOVBstorezero(v)
544	case OpPPC64MOVDaddr:
545		return rewriteValuePPC64_OpPPC64MOVDaddr(v)
546	case OpPPC64MOVDload:
547		return rewriteValuePPC64_OpPPC64MOVDload(v)
548	case OpPPC64MOVDloadidx:
549		return rewriteValuePPC64_OpPPC64MOVDloadidx(v)
550	case OpPPC64MOVDstore:
551		return rewriteValuePPC64_OpPPC64MOVDstore(v)
552	case OpPPC64MOVDstoreidx:
553		return rewriteValuePPC64_OpPPC64MOVDstoreidx(v)
554	case OpPPC64MOVDstorezero:
555		return rewriteValuePPC64_OpPPC64MOVDstorezero(v)
556	case OpPPC64MOVHBRstore:
557		return rewriteValuePPC64_OpPPC64MOVHBRstore(v)
558	case OpPPC64MOVHZload:
559		return rewriteValuePPC64_OpPPC64MOVHZload(v)
560	case OpPPC64MOVHZloadidx:
561		return rewriteValuePPC64_OpPPC64MOVHZloadidx(v)
562	case OpPPC64MOVHZreg:
563		return rewriteValuePPC64_OpPPC64MOVHZreg(v)
564	case OpPPC64MOVHload:
565		return rewriteValuePPC64_OpPPC64MOVHload(v)
566	case OpPPC64MOVHloadidx:
567		return rewriteValuePPC64_OpPPC64MOVHloadidx(v)
568	case OpPPC64MOVHreg:
569		return rewriteValuePPC64_OpPPC64MOVHreg(v)
570	case OpPPC64MOVHstore:
571		return rewriteValuePPC64_OpPPC64MOVHstore(v)
572	case OpPPC64MOVHstoreidx:
573		return rewriteValuePPC64_OpPPC64MOVHstoreidx(v)
574	case OpPPC64MOVHstorezero:
575		return rewriteValuePPC64_OpPPC64MOVHstorezero(v)
576	case OpPPC64MOVWBRstore:
577		return rewriteValuePPC64_OpPPC64MOVWBRstore(v)
578	case OpPPC64MOVWZload:
579		return rewriteValuePPC64_OpPPC64MOVWZload(v)
580	case OpPPC64MOVWZloadidx:
581		return rewriteValuePPC64_OpPPC64MOVWZloadidx(v)
582	case OpPPC64MOVWZreg:
583		return rewriteValuePPC64_OpPPC64MOVWZreg(v)
584	case OpPPC64MOVWload:
585		return rewriteValuePPC64_OpPPC64MOVWload(v)
586	case OpPPC64MOVWloadidx:
587		return rewriteValuePPC64_OpPPC64MOVWloadidx(v)
588	case OpPPC64MOVWreg:
589		return rewriteValuePPC64_OpPPC64MOVWreg(v)
590	case OpPPC64MOVWstore:
591		return rewriteValuePPC64_OpPPC64MOVWstore(v)
592	case OpPPC64MOVWstoreidx:
593		return rewriteValuePPC64_OpPPC64MOVWstoreidx(v)
594	case OpPPC64MOVWstorezero:
595		return rewriteValuePPC64_OpPPC64MOVWstorezero(v)
596	case OpPPC64MTVSRD:
597		return rewriteValuePPC64_OpPPC64MTVSRD(v)
598	case OpPPC64MULLD:
599		return rewriteValuePPC64_OpPPC64MULLD(v)
600	case OpPPC64MULLW:
601		return rewriteValuePPC64_OpPPC64MULLW(v)
602	case OpPPC64NEG:
603		return rewriteValuePPC64_OpPPC64NEG(v)
604	case OpPPC64NOR:
605		return rewriteValuePPC64_OpPPC64NOR(v)
606	case OpPPC64NotEqual:
607		return rewriteValuePPC64_OpPPC64NotEqual(v)
608	case OpPPC64OR:
609		return rewriteValuePPC64_OpPPC64OR(v)
610	case OpPPC64ORN:
611		return rewriteValuePPC64_OpPPC64ORN(v)
612	case OpPPC64ORconst:
613		return rewriteValuePPC64_OpPPC64ORconst(v)
614	case OpPPC64RLWINM:
615		return rewriteValuePPC64_OpPPC64RLWINM(v)
616	case OpPPC64ROTL:
617		return rewriteValuePPC64_OpPPC64ROTL(v)
618	case OpPPC64ROTLW:
619		return rewriteValuePPC64_OpPPC64ROTLW(v)
620	case OpPPC64ROTLWconst:
621		return rewriteValuePPC64_OpPPC64ROTLWconst(v)
622	case OpPPC64SETBC:
623		return rewriteValuePPC64_OpPPC64SETBC(v)
624	case OpPPC64SETBCR:
625		return rewriteValuePPC64_OpPPC64SETBCR(v)
626	case OpPPC64SLD:
627		return rewriteValuePPC64_OpPPC64SLD(v)
628	case OpPPC64SLDconst:
629		return rewriteValuePPC64_OpPPC64SLDconst(v)
630	case OpPPC64SLW:
631		return rewriteValuePPC64_OpPPC64SLW(v)
632	case OpPPC64SLWconst:
633		return rewriteValuePPC64_OpPPC64SLWconst(v)
634	case OpPPC64SRAD:
635		return rewriteValuePPC64_OpPPC64SRAD(v)
636	case OpPPC64SRAW:
637		return rewriteValuePPC64_OpPPC64SRAW(v)
638	case OpPPC64SRD:
639		return rewriteValuePPC64_OpPPC64SRD(v)
640	case OpPPC64SRW:
641		return rewriteValuePPC64_OpPPC64SRW(v)
642	case OpPPC64SRWconst:
643		return rewriteValuePPC64_OpPPC64SRWconst(v)
644	case OpPPC64SUB:
645		return rewriteValuePPC64_OpPPC64SUB(v)
646	case OpPPC64SUBE:
647		return rewriteValuePPC64_OpPPC64SUBE(v)
648	case OpPPC64SUBFCconst:
649		return rewriteValuePPC64_OpPPC64SUBFCconst(v)
650	case OpPPC64XOR:
651		return rewriteValuePPC64_OpPPC64XOR(v)
652	case OpPPC64XORconst:
653		return rewriteValuePPC64_OpPPC64XORconst(v)
654	case OpPanicBounds:
655		return rewriteValuePPC64_OpPanicBounds(v)
656	case OpPopCount16:
657		return rewriteValuePPC64_OpPopCount16(v)
658	case OpPopCount32:
659		return rewriteValuePPC64_OpPopCount32(v)
660	case OpPopCount64:
661		v.Op = OpPPC64POPCNTD
662		return true
663	case OpPopCount8:
664		return rewriteValuePPC64_OpPopCount8(v)
665	case OpPrefetchCache:
666		return rewriteValuePPC64_OpPrefetchCache(v)
667	case OpPrefetchCacheStreamed:
668		return rewriteValuePPC64_OpPrefetchCacheStreamed(v)
669	case OpPubBarrier:
670		v.Op = OpPPC64LoweredPubBarrier
671		return true
672	case OpRotateLeft16:
673		return rewriteValuePPC64_OpRotateLeft16(v)
674	case OpRotateLeft32:
675		v.Op = OpPPC64ROTLW
676		return true
677	case OpRotateLeft64:
678		v.Op = OpPPC64ROTL
679		return true
680	case OpRotateLeft8:
681		return rewriteValuePPC64_OpRotateLeft8(v)
682	case OpRound:
683		v.Op = OpPPC64FROUND
684		return true
685	case OpRound32F:
686		v.Op = OpPPC64LoweredRound32F
687		return true
688	case OpRound64F:
689		v.Op = OpPPC64LoweredRound64F
690		return true
691	case OpRsh16Ux16:
692		return rewriteValuePPC64_OpRsh16Ux16(v)
693	case OpRsh16Ux32:
694		return rewriteValuePPC64_OpRsh16Ux32(v)
695	case OpRsh16Ux64:
696		return rewriteValuePPC64_OpRsh16Ux64(v)
697	case OpRsh16Ux8:
698		return rewriteValuePPC64_OpRsh16Ux8(v)
699	case OpRsh16x16:
700		return rewriteValuePPC64_OpRsh16x16(v)
701	case OpRsh16x32:
702		return rewriteValuePPC64_OpRsh16x32(v)
703	case OpRsh16x64:
704		return rewriteValuePPC64_OpRsh16x64(v)
705	case OpRsh16x8:
706		return rewriteValuePPC64_OpRsh16x8(v)
707	case OpRsh32Ux16:
708		return rewriteValuePPC64_OpRsh32Ux16(v)
709	case OpRsh32Ux32:
710		return rewriteValuePPC64_OpRsh32Ux32(v)
711	case OpRsh32Ux64:
712		return rewriteValuePPC64_OpRsh32Ux64(v)
713	case OpRsh32Ux8:
714		return rewriteValuePPC64_OpRsh32Ux8(v)
715	case OpRsh32x16:
716		return rewriteValuePPC64_OpRsh32x16(v)
717	case OpRsh32x32:
718		return rewriteValuePPC64_OpRsh32x32(v)
719	case OpRsh32x64:
720		return rewriteValuePPC64_OpRsh32x64(v)
721	case OpRsh32x8:
722		return rewriteValuePPC64_OpRsh32x8(v)
723	case OpRsh64Ux16:
724		return rewriteValuePPC64_OpRsh64Ux16(v)
725	case OpRsh64Ux32:
726		return rewriteValuePPC64_OpRsh64Ux32(v)
727	case OpRsh64Ux64:
728		return rewriteValuePPC64_OpRsh64Ux64(v)
729	case OpRsh64Ux8:
730		return rewriteValuePPC64_OpRsh64Ux8(v)
731	case OpRsh64x16:
732		return rewriteValuePPC64_OpRsh64x16(v)
733	case OpRsh64x32:
734		return rewriteValuePPC64_OpRsh64x32(v)
735	case OpRsh64x64:
736		return rewriteValuePPC64_OpRsh64x64(v)
737	case OpRsh64x8:
738		return rewriteValuePPC64_OpRsh64x8(v)
739	case OpRsh8Ux16:
740		return rewriteValuePPC64_OpRsh8Ux16(v)
741	case OpRsh8Ux32:
742		return rewriteValuePPC64_OpRsh8Ux32(v)
743	case OpRsh8Ux64:
744		return rewriteValuePPC64_OpRsh8Ux64(v)
745	case OpRsh8Ux8:
746		return rewriteValuePPC64_OpRsh8Ux8(v)
747	case OpRsh8x16:
748		return rewriteValuePPC64_OpRsh8x16(v)
749	case OpRsh8x32:
750		return rewriteValuePPC64_OpRsh8x32(v)
751	case OpRsh8x64:
752		return rewriteValuePPC64_OpRsh8x64(v)
753	case OpRsh8x8:
754		return rewriteValuePPC64_OpRsh8x8(v)
755	case OpSelect0:
756		return rewriteValuePPC64_OpSelect0(v)
757	case OpSelect1:
758		return rewriteValuePPC64_OpSelect1(v)
759	case OpSelectN:
760		return rewriteValuePPC64_OpSelectN(v)
761	case OpSignExt16to32:
762		v.Op = OpPPC64MOVHreg
763		return true
764	case OpSignExt16to64:
765		v.Op = OpPPC64MOVHreg
766		return true
767	case OpSignExt32to64:
768		v.Op = OpPPC64MOVWreg
769		return true
770	case OpSignExt8to16:
771		v.Op = OpPPC64MOVBreg
772		return true
773	case OpSignExt8to32:
774		v.Op = OpPPC64MOVBreg
775		return true
776	case OpSignExt8to64:
777		v.Op = OpPPC64MOVBreg
778		return true
779	case OpSlicemask:
780		return rewriteValuePPC64_OpSlicemask(v)
781	case OpSqrt:
782		v.Op = OpPPC64FSQRT
783		return true
784	case OpSqrt32:
785		v.Op = OpPPC64FSQRTS
786		return true
787	case OpStaticCall:
788		v.Op = OpPPC64CALLstatic
789		return true
790	case OpStore:
791		return rewriteValuePPC64_OpStore(v)
792	case OpSub16:
793		v.Op = OpPPC64SUB
794		return true
795	case OpSub32:
796		v.Op = OpPPC64SUB
797		return true
798	case OpSub32F:
799		v.Op = OpPPC64FSUBS
800		return true
801	case OpSub64:
802		v.Op = OpPPC64SUB
803		return true
804	case OpSub64F:
805		v.Op = OpPPC64FSUB
806		return true
807	case OpSub8:
808		v.Op = OpPPC64SUB
809		return true
810	case OpSubPtr:
811		v.Op = OpPPC64SUB
812		return true
813	case OpTailCall:
814		v.Op = OpPPC64CALLtail
815		return true
816	case OpTrunc:
817		v.Op = OpPPC64FTRUNC
818		return true
819	case OpTrunc16to8:
820		return rewriteValuePPC64_OpTrunc16to8(v)
821	case OpTrunc32to16:
822		return rewriteValuePPC64_OpTrunc32to16(v)
823	case OpTrunc32to8:
824		return rewriteValuePPC64_OpTrunc32to8(v)
825	case OpTrunc64to16:
826		return rewriteValuePPC64_OpTrunc64to16(v)
827	case OpTrunc64to32:
828		return rewriteValuePPC64_OpTrunc64to32(v)
829	case OpTrunc64to8:
830		return rewriteValuePPC64_OpTrunc64to8(v)
831	case OpWB:
832		v.Op = OpPPC64LoweredWB
833		return true
834	case OpXor16:
835		v.Op = OpPPC64XOR
836		return true
837	case OpXor32:
838		v.Op = OpPPC64XOR
839		return true
840	case OpXor64:
841		v.Op = OpPPC64XOR
842		return true
843	case OpXor8:
844		v.Op = OpPPC64XOR
845		return true
846	case OpZero:
847		return rewriteValuePPC64_OpZero(v)
848	case OpZeroExt16to32:
849		v.Op = OpPPC64MOVHZreg
850		return true
851	case OpZeroExt16to64:
852		v.Op = OpPPC64MOVHZreg
853		return true
854	case OpZeroExt32to64:
855		v.Op = OpPPC64MOVWZreg
856		return true
857	case OpZeroExt8to16:
858		v.Op = OpPPC64MOVBZreg
859		return true
860	case OpZeroExt8to32:
861		v.Op = OpPPC64MOVBZreg
862		return true
863	case OpZeroExt8to64:
864		v.Op = OpPPC64MOVBZreg
865		return true
866	}
867	return false
868}
869func rewriteValuePPC64_OpAddr(v *Value) bool {
870	v_0 := v.Args[0]
871	// match: (Addr {sym} base)
872	// result: (MOVDaddr {sym} [0] base)
873	for {
874		sym := auxToSym(v.Aux)
875		base := v_0
876		v.reset(OpPPC64MOVDaddr)
877		v.AuxInt = int32ToAuxInt(0)
878		v.Aux = symToAux(sym)
879		v.AddArg(base)
880		return true
881	}
882}
883func rewriteValuePPC64_OpAtomicCompareAndSwap32(v *Value) bool {
884	v_3 := v.Args[3]
885	v_2 := v.Args[2]
886	v_1 := v.Args[1]
887	v_0 := v.Args[0]
888	// match: (AtomicCompareAndSwap32 ptr old new_ mem)
889	// result: (LoweredAtomicCas32 [1] ptr old new_ mem)
890	for {
891		ptr := v_0
892		old := v_1
893		new_ := v_2
894		mem := v_3
895		v.reset(OpPPC64LoweredAtomicCas32)
896		v.AuxInt = int64ToAuxInt(1)
897		v.AddArg4(ptr, old, new_, mem)
898		return true
899	}
900}
901func rewriteValuePPC64_OpAtomicCompareAndSwap64(v *Value) bool {
902	v_3 := v.Args[3]
903	v_2 := v.Args[2]
904	v_1 := v.Args[1]
905	v_0 := v.Args[0]
906	// match: (AtomicCompareAndSwap64 ptr old new_ mem)
907	// result: (LoweredAtomicCas64 [1] ptr old new_ mem)
908	for {
909		ptr := v_0
910		old := v_1
911		new_ := v_2
912		mem := v_3
913		v.reset(OpPPC64LoweredAtomicCas64)
914		v.AuxInt = int64ToAuxInt(1)
915		v.AddArg4(ptr, old, new_, mem)
916		return true
917	}
918}
919func rewriteValuePPC64_OpAtomicCompareAndSwapRel32(v *Value) bool {
920	v_3 := v.Args[3]
921	v_2 := v.Args[2]
922	v_1 := v.Args[1]
923	v_0 := v.Args[0]
924	// match: (AtomicCompareAndSwapRel32 ptr old new_ mem)
925	// result: (LoweredAtomicCas32 [0] ptr old new_ mem)
926	for {
927		ptr := v_0
928		old := v_1
929		new_ := v_2
930		mem := v_3
931		v.reset(OpPPC64LoweredAtomicCas32)
932		v.AuxInt = int64ToAuxInt(0)
933		v.AddArg4(ptr, old, new_, mem)
934		return true
935	}
936}
937func rewriteValuePPC64_OpAtomicLoad32(v *Value) bool {
938	v_1 := v.Args[1]
939	v_0 := v.Args[0]
940	// match: (AtomicLoad32 ptr mem)
941	// result: (LoweredAtomicLoad32 [1] ptr mem)
942	for {
943		ptr := v_0
944		mem := v_1
945		v.reset(OpPPC64LoweredAtomicLoad32)
946		v.AuxInt = int64ToAuxInt(1)
947		v.AddArg2(ptr, mem)
948		return true
949	}
950}
951func rewriteValuePPC64_OpAtomicLoad64(v *Value) bool {
952	v_1 := v.Args[1]
953	v_0 := v.Args[0]
954	// match: (AtomicLoad64 ptr mem)
955	// result: (LoweredAtomicLoad64 [1] ptr mem)
956	for {
957		ptr := v_0
958		mem := v_1
959		v.reset(OpPPC64LoweredAtomicLoad64)
960		v.AuxInt = int64ToAuxInt(1)
961		v.AddArg2(ptr, mem)
962		return true
963	}
964}
965func rewriteValuePPC64_OpAtomicLoad8(v *Value) bool {
966	v_1 := v.Args[1]
967	v_0 := v.Args[0]
968	// match: (AtomicLoad8 ptr mem)
969	// result: (LoweredAtomicLoad8 [1] ptr mem)
970	for {
971		ptr := v_0
972		mem := v_1
973		v.reset(OpPPC64LoweredAtomicLoad8)
974		v.AuxInt = int64ToAuxInt(1)
975		v.AddArg2(ptr, mem)
976		return true
977	}
978}
979func rewriteValuePPC64_OpAtomicLoadAcq32(v *Value) bool {
980	v_1 := v.Args[1]
981	v_0 := v.Args[0]
982	// match: (AtomicLoadAcq32 ptr mem)
983	// result: (LoweredAtomicLoad32 [0] ptr mem)
984	for {
985		ptr := v_0
986		mem := v_1
987		v.reset(OpPPC64LoweredAtomicLoad32)
988		v.AuxInt = int64ToAuxInt(0)
989		v.AddArg2(ptr, mem)
990		return true
991	}
992}
993func rewriteValuePPC64_OpAtomicLoadAcq64(v *Value) bool {
994	v_1 := v.Args[1]
995	v_0 := v.Args[0]
996	// match: (AtomicLoadAcq64 ptr mem)
997	// result: (LoweredAtomicLoad64 [0] ptr mem)
998	for {
999		ptr := v_0
1000		mem := v_1
1001		v.reset(OpPPC64LoweredAtomicLoad64)
1002		v.AuxInt = int64ToAuxInt(0)
1003		v.AddArg2(ptr, mem)
1004		return true
1005	}
1006}
1007func rewriteValuePPC64_OpAtomicLoadPtr(v *Value) bool {
1008	v_1 := v.Args[1]
1009	v_0 := v.Args[0]
1010	// match: (AtomicLoadPtr ptr mem)
1011	// result: (LoweredAtomicLoadPtr [1] ptr mem)
1012	for {
1013		ptr := v_0
1014		mem := v_1
1015		v.reset(OpPPC64LoweredAtomicLoadPtr)
1016		v.AuxInt = int64ToAuxInt(1)
1017		v.AddArg2(ptr, mem)
1018		return true
1019	}
1020}
1021func rewriteValuePPC64_OpAtomicStore32(v *Value) bool {
1022	v_2 := v.Args[2]
1023	v_1 := v.Args[1]
1024	v_0 := v.Args[0]
1025	// match: (AtomicStore32 ptr val mem)
1026	// result: (LoweredAtomicStore32 [1] ptr val mem)
1027	for {
1028		ptr := v_0
1029		val := v_1
1030		mem := v_2
1031		v.reset(OpPPC64LoweredAtomicStore32)
1032		v.AuxInt = int64ToAuxInt(1)
1033		v.AddArg3(ptr, val, mem)
1034		return true
1035	}
1036}
1037func rewriteValuePPC64_OpAtomicStore64(v *Value) bool {
1038	v_2 := v.Args[2]
1039	v_1 := v.Args[1]
1040	v_0 := v.Args[0]
1041	// match: (AtomicStore64 ptr val mem)
1042	// result: (LoweredAtomicStore64 [1] ptr val mem)
1043	for {
1044		ptr := v_0
1045		val := v_1
1046		mem := v_2
1047		v.reset(OpPPC64LoweredAtomicStore64)
1048		v.AuxInt = int64ToAuxInt(1)
1049		v.AddArg3(ptr, val, mem)
1050		return true
1051	}
1052}
1053func rewriteValuePPC64_OpAtomicStore8(v *Value) bool {
1054	v_2 := v.Args[2]
1055	v_1 := v.Args[1]
1056	v_0 := v.Args[0]
1057	// match: (AtomicStore8 ptr val mem)
1058	// result: (LoweredAtomicStore8 [1] ptr val mem)
1059	for {
1060		ptr := v_0
1061		val := v_1
1062		mem := v_2
1063		v.reset(OpPPC64LoweredAtomicStore8)
1064		v.AuxInt = int64ToAuxInt(1)
1065		v.AddArg3(ptr, val, mem)
1066		return true
1067	}
1068}
1069func rewriteValuePPC64_OpAtomicStoreRel32(v *Value) bool {
1070	v_2 := v.Args[2]
1071	v_1 := v.Args[1]
1072	v_0 := v.Args[0]
1073	// match: (AtomicStoreRel32 ptr val mem)
1074	// result: (LoweredAtomicStore32 [0] ptr val mem)
1075	for {
1076		ptr := v_0
1077		val := v_1
1078		mem := v_2
1079		v.reset(OpPPC64LoweredAtomicStore32)
1080		v.AuxInt = int64ToAuxInt(0)
1081		v.AddArg3(ptr, val, mem)
1082		return true
1083	}
1084}
1085func rewriteValuePPC64_OpAtomicStoreRel64(v *Value) bool {
1086	v_2 := v.Args[2]
1087	v_1 := v.Args[1]
1088	v_0 := v.Args[0]
1089	// match: (AtomicStoreRel64 ptr val mem)
1090	// result: (LoweredAtomicStore64 [0] ptr val mem)
1091	for {
1092		ptr := v_0
1093		val := v_1
1094		mem := v_2
1095		v.reset(OpPPC64LoweredAtomicStore64)
1096		v.AuxInt = int64ToAuxInt(0)
1097		v.AddArg3(ptr, val, mem)
1098		return true
1099	}
1100}
1101func rewriteValuePPC64_OpAvg64u(v *Value) bool {
1102	v_1 := v.Args[1]
1103	v_0 := v.Args[0]
1104	b := v.Block
1105	// match: (Avg64u <t> x y)
1106	// result: (ADD (SRDconst <t> (SUB <t> x y) [1]) y)
1107	for {
1108		t := v.Type
1109		x := v_0
1110		y := v_1
1111		v.reset(OpPPC64ADD)
1112		v0 := b.NewValue0(v.Pos, OpPPC64SRDconst, t)
1113		v0.AuxInt = int64ToAuxInt(1)
1114		v1 := b.NewValue0(v.Pos, OpPPC64SUB, t)
1115		v1.AddArg2(x, y)
1116		v0.AddArg(v1)
1117		v.AddArg2(v0, y)
1118		return true
1119	}
1120}
1121func rewriteValuePPC64_OpBitLen32(v *Value) bool {
1122	v_0 := v.Args[0]
1123	b := v.Block
1124	typ := &b.Func.Config.Types
1125	// match: (BitLen32 x)
1126	// result: (SUBFCconst [32] (CNTLZW <typ.Int> x))
1127	for {
1128		x := v_0
1129		v.reset(OpPPC64SUBFCconst)
1130		v.AuxInt = int64ToAuxInt(32)
1131		v0 := b.NewValue0(v.Pos, OpPPC64CNTLZW, typ.Int)
1132		v0.AddArg(x)
1133		v.AddArg(v0)
1134		return true
1135	}
1136}
1137func rewriteValuePPC64_OpBitLen64(v *Value) bool {
1138	v_0 := v.Args[0]
1139	b := v.Block
1140	typ := &b.Func.Config.Types
1141	// match: (BitLen64 x)
1142	// result: (SUBFCconst [64] (CNTLZD <typ.Int> x))
1143	for {
1144		x := v_0
1145		v.reset(OpPPC64SUBFCconst)
1146		v.AuxInt = int64ToAuxInt(64)
1147		v0 := b.NewValue0(v.Pos, OpPPC64CNTLZD, typ.Int)
1148		v0.AddArg(x)
1149		v.AddArg(v0)
1150		return true
1151	}
1152}
1153func rewriteValuePPC64_OpBswap16(v *Value) bool {
1154	v_0 := v.Args[0]
1155	b := v.Block
1156	typ := &b.Func.Config.Types
1157	// match: (Bswap16 x)
1158	// cond: buildcfg.GOPPC64>=10
1159	// result: (BRH x)
1160	for {
1161		x := v_0
1162		if !(buildcfg.GOPPC64 >= 10) {
1163			break
1164		}
1165		v.reset(OpPPC64BRH)
1166		v.AddArg(x)
1167		return true
1168	}
1169	// match: (Bswap16 x:(MOVHZload [off] {sym} ptr mem))
1170	// result: @x.Block (MOVHBRload (MOVDaddr <ptr.Type> [off] {sym} ptr) mem)
1171	for {
1172		x := v_0
1173		if x.Op != OpPPC64MOVHZload {
1174			break
1175		}
1176		off := auxIntToInt32(x.AuxInt)
1177		sym := auxToSym(x.Aux)
1178		mem := x.Args[1]
1179		ptr := x.Args[0]
1180		b = x.Block
1181		v0 := b.NewValue0(x.Pos, OpPPC64MOVHBRload, typ.UInt16)
1182		v.copyOf(v0)
1183		v1 := b.NewValue0(x.Pos, OpPPC64MOVDaddr, ptr.Type)
1184		v1.AuxInt = int32ToAuxInt(off)
1185		v1.Aux = symToAux(sym)
1186		v1.AddArg(ptr)
1187		v0.AddArg2(v1, mem)
1188		return true
1189	}
1190	// match: (Bswap16 x:(MOVHZloadidx ptr idx mem))
1191	// result: @x.Block (MOVHBRloadidx ptr idx mem)
1192	for {
1193		x := v_0
1194		if x.Op != OpPPC64MOVHZloadidx {
1195			break
1196		}
1197		mem := x.Args[2]
1198		ptr := x.Args[0]
1199		idx := x.Args[1]
1200		b = x.Block
1201		v0 := b.NewValue0(v.Pos, OpPPC64MOVHBRloadidx, typ.Int16)
1202		v.copyOf(v0)
1203		v0.AddArg3(ptr, idx, mem)
1204		return true
1205	}
1206	return false
1207}
1208func rewriteValuePPC64_OpBswap32(v *Value) bool {
1209	v_0 := v.Args[0]
1210	b := v.Block
1211	typ := &b.Func.Config.Types
1212	// match: (Bswap32 x)
1213	// cond: buildcfg.GOPPC64>=10
1214	// result: (BRW x)
1215	for {
1216		x := v_0
1217		if !(buildcfg.GOPPC64 >= 10) {
1218			break
1219		}
1220		v.reset(OpPPC64BRW)
1221		v.AddArg(x)
1222		return true
1223	}
1224	// match: (Bswap32 x:(MOVWZload [off] {sym} ptr mem))
1225	// result: @x.Block (MOVWBRload (MOVDaddr <ptr.Type> [off] {sym} ptr) mem)
1226	for {
1227		x := v_0
1228		if x.Op != OpPPC64MOVWZload {
1229			break
1230		}
1231		off := auxIntToInt32(x.AuxInt)
1232		sym := auxToSym(x.Aux)
1233		mem := x.Args[1]
1234		ptr := x.Args[0]
1235		b = x.Block
1236		v0 := b.NewValue0(x.Pos, OpPPC64MOVWBRload, typ.UInt32)
1237		v.copyOf(v0)
1238		v1 := b.NewValue0(x.Pos, OpPPC64MOVDaddr, ptr.Type)
1239		v1.AuxInt = int32ToAuxInt(off)
1240		v1.Aux = symToAux(sym)
1241		v1.AddArg(ptr)
1242		v0.AddArg2(v1, mem)
1243		return true
1244	}
1245	// match: (Bswap32 x:(MOVWZloadidx ptr idx mem))
1246	// result: @x.Block (MOVWBRloadidx ptr idx mem)
1247	for {
1248		x := v_0
1249		if x.Op != OpPPC64MOVWZloadidx {
1250			break
1251		}
1252		mem := x.Args[2]
1253		ptr := x.Args[0]
1254		idx := x.Args[1]
1255		b = x.Block
1256		v0 := b.NewValue0(v.Pos, OpPPC64MOVWBRloadidx, typ.Int32)
1257		v.copyOf(v0)
1258		v0.AddArg3(ptr, idx, mem)
1259		return true
1260	}
1261	return false
1262}
1263func rewriteValuePPC64_OpBswap64(v *Value) bool {
1264	v_0 := v.Args[0]
1265	b := v.Block
1266	typ := &b.Func.Config.Types
1267	// match: (Bswap64 x)
1268	// cond: buildcfg.GOPPC64>=10
1269	// result: (BRD x)
1270	for {
1271		x := v_0
1272		if !(buildcfg.GOPPC64 >= 10) {
1273			break
1274		}
1275		v.reset(OpPPC64BRD)
1276		v.AddArg(x)
1277		return true
1278	}
1279	// match: (Bswap64 x:(MOVDload [off] {sym} ptr mem))
1280	// result: @x.Block (MOVDBRload (MOVDaddr <ptr.Type> [off] {sym} ptr) mem)
1281	for {
1282		x := v_0
1283		if x.Op != OpPPC64MOVDload {
1284			break
1285		}
1286		off := auxIntToInt32(x.AuxInt)
1287		sym := auxToSym(x.Aux)
1288		mem := x.Args[1]
1289		ptr := x.Args[0]
1290		b = x.Block
1291		v0 := b.NewValue0(x.Pos, OpPPC64MOVDBRload, typ.UInt64)
1292		v.copyOf(v0)
1293		v1 := b.NewValue0(x.Pos, OpPPC64MOVDaddr, ptr.Type)
1294		v1.AuxInt = int32ToAuxInt(off)
1295		v1.Aux = symToAux(sym)
1296		v1.AddArg(ptr)
1297		v0.AddArg2(v1, mem)
1298		return true
1299	}
1300	// match: (Bswap64 x:(MOVDloadidx ptr idx mem))
1301	// result: @x.Block (MOVDBRloadidx ptr idx mem)
1302	for {
1303		x := v_0
1304		if x.Op != OpPPC64MOVDloadidx {
1305			break
1306		}
1307		mem := x.Args[2]
1308		ptr := x.Args[0]
1309		idx := x.Args[1]
1310		b = x.Block
1311		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRloadidx, typ.Int64)
1312		v.copyOf(v0)
1313		v0.AddArg3(ptr, idx, mem)
1314		return true
1315	}
1316	return false
1317}
1318func rewriteValuePPC64_OpCom16(v *Value) bool {
1319	v_0 := v.Args[0]
1320	// match: (Com16 x)
1321	// result: (NOR x x)
1322	for {
1323		x := v_0
1324		v.reset(OpPPC64NOR)
1325		v.AddArg2(x, x)
1326		return true
1327	}
1328}
1329func rewriteValuePPC64_OpCom32(v *Value) bool {
1330	v_0 := v.Args[0]
1331	// match: (Com32 x)
1332	// result: (NOR x x)
1333	for {
1334		x := v_0
1335		v.reset(OpPPC64NOR)
1336		v.AddArg2(x, x)
1337		return true
1338	}
1339}
1340func rewriteValuePPC64_OpCom64(v *Value) bool {
1341	v_0 := v.Args[0]
1342	// match: (Com64 x)
1343	// result: (NOR x x)
1344	for {
1345		x := v_0
1346		v.reset(OpPPC64NOR)
1347		v.AddArg2(x, x)
1348		return true
1349	}
1350}
1351func rewriteValuePPC64_OpCom8(v *Value) bool {
1352	v_0 := v.Args[0]
1353	// match: (Com8 x)
1354	// result: (NOR x x)
1355	for {
1356		x := v_0
1357		v.reset(OpPPC64NOR)
1358		v.AddArg2(x, x)
1359		return true
1360	}
1361}
1362func rewriteValuePPC64_OpCondSelect(v *Value) bool {
1363	v_2 := v.Args[2]
1364	v_1 := v.Args[1]
1365	v_0 := v.Args[0]
1366	b := v.Block
1367	typ := &b.Func.Config.Types
1368	// match: (CondSelect x y (SETBC [a] cmp))
1369	// result: (ISEL [a] x y cmp)
1370	for {
1371		x := v_0
1372		y := v_1
1373		if v_2.Op != OpPPC64SETBC {
1374			break
1375		}
1376		a := auxIntToInt32(v_2.AuxInt)
1377		cmp := v_2.Args[0]
1378		v.reset(OpPPC64ISEL)
1379		v.AuxInt = int32ToAuxInt(a)
1380		v.AddArg3(x, y, cmp)
1381		return true
1382	}
1383	// match: (CondSelect x y (SETBCR [a] cmp))
1384	// result: (ISEL [a+4] x y cmp)
1385	for {
1386		x := v_0
1387		y := v_1
1388		if v_2.Op != OpPPC64SETBCR {
1389			break
1390		}
1391		a := auxIntToInt32(v_2.AuxInt)
1392		cmp := v_2.Args[0]
1393		v.reset(OpPPC64ISEL)
1394		v.AuxInt = int32ToAuxInt(a + 4)
1395		v.AddArg3(x, y, cmp)
1396		return true
1397	}
1398	// match: (CondSelect x y bool)
1399	// cond: flagArg(bool) == nil
1400	// result: (ISEL [6] x y (CMPconst [0] (ANDconst [1] bool)))
1401	for {
1402		x := v_0
1403		y := v_1
1404		bool := v_2
1405		if !(flagArg(bool) == nil) {
1406			break
1407		}
1408		v.reset(OpPPC64ISEL)
1409		v.AuxInt = int32ToAuxInt(6)
1410		v0 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
1411		v0.AuxInt = int64ToAuxInt(0)
1412		v1 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int)
1413		v1.AuxInt = int64ToAuxInt(1)
1414		v1.AddArg(bool)
1415		v0.AddArg(v1)
1416		v.AddArg3(x, y, v0)
1417		return true
1418	}
1419	return false
1420}
1421func rewriteValuePPC64_OpConst16(v *Value) bool {
1422	// match: (Const16 [val])
1423	// result: (MOVDconst [int64(val)])
1424	for {
1425		val := auxIntToInt16(v.AuxInt)
1426		v.reset(OpPPC64MOVDconst)
1427		v.AuxInt = int64ToAuxInt(int64(val))
1428		return true
1429	}
1430}
1431func rewriteValuePPC64_OpConst32(v *Value) bool {
1432	// match: (Const32 [val])
1433	// result: (MOVDconst [int64(val)])
1434	for {
1435		val := auxIntToInt32(v.AuxInt)
1436		v.reset(OpPPC64MOVDconst)
1437		v.AuxInt = int64ToAuxInt(int64(val))
1438		return true
1439	}
1440}
1441func rewriteValuePPC64_OpConst64(v *Value) bool {
1442	// match: (Const64 [val])
1443	// result: (MOVDconst [int64(val)])
1444	for {
1445		val := auxIntToInt64(v.AuxInt)
1446		v.reset(OpPPC64MOVDconst)
1447		v.AuxInt = int64ToAuxInt(int64(val))
1448		return true
1449	}
1450}
1451func rewriteValuePPC64_OpConst8(v *Value) bool {
1452	// match: (Const8 [val])
1453	// result: (MOVDconst [int64(val)])
1454	for {
1455		val := auxIntToInt8(v.AuxInt)
1456		v.reset(OpPPC64MOVDconst)
1457		v.AuxInt = int64ToAuxInt(int64(val))
1458		return true
1459	}
1460}
1461func rewriteValuePPC64_OpConstBool(v *Value) bool {
1462	// match: (ConstBool [t])
1463	// result: (MOVDconst [b2i(t)])
1464	for {
1465		t := auxIntToBool(v.AuxInt)
1466		v.reset(OpPPC64MOVDconst)
1467		v.AuxInt = int64ToAuxInt(b2i(t))
1468		return true
1469	}
1470}
1471func rewriteValuePPC64_OpConstNil(v *Value) bool {
1472	// match: (ConstNil)
1473	// result: (MOVDconst [0])
1474	for {
1475		v.reset(OpPPC64MOVDconst)
1476		v.AuxInt = int64ToAuxInt(0)
1477		return true
1478	}
1479}
1480func rewriteValuePPC64_OpCopysign(v *Value) bool {
1481	v_1 := v.Args[1]
1482	v_0 := v.Args[0]
1483	// match: (Copysign x y)
1484	// result: (FCPSGN y x)
1485	for {
1486		x := v_0
1487		y := v_1
1488		v.reset(OpPPC64FCPSGN)
1489		v.AddArg2(y, x)
1490		return true
1491	}
1492}
1493func rewriteValuePPC64_OpCtz16(v *Value) bool {
1494	v_0 := v.Args[0]
1495	b := v.Block
1496	typ := &b.Func.Config.Types
1497	// match: (Ctz16 x)
1498	// result: (POPCNTW (MOVHZreg (ANDN <typ.Int16> (ADDconst <typ.Int16> [-1] x) x)))
1499	for {
1500		x := v_0
1501		v.reset(OpPPC64POPCNTW)
1502		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
1503		v1 := b.NewValue0(v.Pos, OpPPC64ANDN, typ.Int16)
1504		v2 := b.NewValue0(v.Pos, OpPPC64ADDconst, typ.Int16)
1505		v2.AuxInt = int64ToAuxInt(-1)
1506		v2.AddArg(x)
1507		v1.AddArg2(v2, x)
1508		v0.AddArg(v1)
1509		v.AddArg(v0)
1510		return true
1511	}
1512}
1513func rewriteValuePPC64_OpCtz32(v *Value) bool {
1514	v_0 := v.Args[0]
1515	b := v.Block
1516	typ := &b.Func.Config.Types
1517	// match: (Ctz32 x)
1518	// cond: buildcfg.GOPPC64<=8
1519	// result: (POPCNTW (MOVWZreg (ANDN <typ.Int> (ADDconst <typ.Int> [-1] x) x)))
1520	for {
1521		x := v_0
1522		if !(buildcfg.GOPPC64 <= 8) {
1523			break
1524		}
1525		v.reset(OpPPC64POPCNTW)
1526		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZreg, typ.Int64)
1527		v1 := b.NewValue0(v.Pos, OpPPC64ANDN, typ.Int)
1528		v2 := b.NewValue0(v.Pos, OpPPC64ADDconst, typ.Int)
1529		v2.AuxInt = int64ToAuxInt(-1)
1530		v2.AddArg(x)
1531		v1.AddArg2(v2, x)
1532		v0.AddArg(v1)
1533		v.AddArg(v0)
1534		return true
1535	}
1536	// match: (Ctz32 x)
1537	// result: (CNTTZW (MOVWZreg x))
1538	for {
1539		x := v_0
1540		v.reset(OpPPC64CNTTZW)
1541		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZreg, typ.Int64)
1542		v0.AddArg(x)
1543		v.AddArg(v0)
1544		return true
1545	}
1546}
1547func rewriteValuePPC64_OpCtz64(v *Value) bool {
1548	v_0 := v.Args[0]
1549	b := v.Block
1550	typ := &b.Func.Config.Types
1551	// match: (Ctz64 x)
1552	// cond: buildcfg.GOPPC64<=8
1553	// result: (POPCNTD (ANDN <typ.Int64> (ADDconst <typ.Int64> [-1] x) x))
1554	for {
1555		x := v_0
1556		if !(buildcfg.GOPPC64 <= 8) {
1557			break
1558		}
1559		v.reset(OpPPC64POPCNTD)
1560		v0 := b.NewValue0(v.Pos, OpPPC64ANDN, typ.Int64)
1561		v1 := b.NewValue0(v.Pos, OpPPC64ADDconst, typ.Int64)
1562		v1.AuxInt = int64ToAuxInt(-1)
1563		v1.AddArg(x)
1564		v0.AddArg2(v1, x)
1565		v.AddArg(v0)
1566		return true
1567	}
1568	// match: (Ctz64 x)
1569	// result: (CNTTZD x)
1570	for {
1571		x := v_0
1572		v.reset(OpPPC64CNTTZD)
1573		v.AddArg(x)
1574		return true
1575	}
1576}
1577func rewriteValuePPC64_OpCtz8(v *Value) bool {
1578	v_0 := v.Args[0]
1579	b := v.Block
1580	typ := &b.Func.Config.Types
1581	// match: (Ctz8 x)
1582	// result: (POPCNTB (MOVBZreg (ANDN <typ.UInt8> (ADDconst <typ.UInt8> [-1] x) x)))
1583	for {
1584		x := v_0
1585		v.reset(OpPPC64POPCNTB)
1586		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
1587		v1 := b.NewValue0(v.Pos, OpPPC64ANDN, typ.UInt8)
1588		v2 := b.NewValue0(v.Pos, OpPPC64ADDconst, typ.UInt8)
1589		v2.AuxInt = int64ToAuxInt(-1)
1590		v2.AddArg(x)
1591		v1.AddArg2(v2, x)
1592		v0.AddArg(v1)
1593		v.AddArg(v0)
1594		return true
1595	}
1596}
1597func rewriteValuePPC64_OpCvt32Fto32(v *Value) bool {
1598	v_0 := v.Args[0]
1599	b := v.Block
1600	typ := &b.Func.Config.Types
1601	// match: (Cvt32Fto32 x)
1602	// result: (MFVSRD (FCTIWZ x))
1603	for {
1604		x := v_0
1605		v.reset(OpPPC64MFVSRD)
1606		v0 := b.NewValue0(v.Pos, OpPPC64FCTIWZ, typ.Float64)
1607		v0.AddArg(x)
1608		v.AddArg(v0)
1609		return true
1610	}
1611}
1612func rewriteValuePPC64_OpCvt32Fto64(v *Value) bool {
1613	v_0 := v.Args[0]
1614	b := v.Block
1615	typ := &b.Func.Config.Types
1616	// match: (Cvt32Fto64 x)
1617	// result: (MFVSRD (FCTIDZ x))
1618	for {
1619		x := v_0
1620		v.reset(OpPPC64MFVSRD)
1621		v0 := b.NewValue0(v.Pos, OpPPC64FCTIDZ, typ.Float64)
1622		v0.AddArg(x)
1623		v.AddArg(v0)
1624		return true
1625	}
1626}
1627func rewriteValuePPC64_OpCvt32to32F(v *Value) bool {
1628	v_0 := v.Args[0]
1629	b := v.Block
1630	typ := &b.Func.Config.Types
1631	// match: (Cvt32to32F x)
1632	// result: (FCFIDS (MTVSRD (SignExt32to64 x)))
1633	for {
1634		x := v_0
1635		v.reset(OpPPC64FCFIDS)
1636		v0 := b.NewValue0(v.Pos, OpPPC64MTVSRD, typ.Float64)
1637		v1 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
1638		v1.AddArg(x)
1639		v0.AddArg(v1)
1640		v.AddArg(v0)
1641		return true
1642	}
1643}
1644func rewriteValuePPC64_OpCvt32to64F(v *Value) bool {
1645	v_0 := v.Args[0]
1646	b := v.Block
1647	typ := &b.Func.Config.Types
1648	// match: (Cvt32to64F x)
1649	// result: (FCFID (MTVSRD (SignExt32to64 x)))
1650	for {
1651		x := v_0
1652		v.reset(OpPPC64FCFID)
1653		v0 := b.NewValue0(v.Pos, OpPPC64MTVSRD, typ.Float64)
1654		v1 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
1655		v1.AddArg(x)
1656		v0.AddArg(v1)
1657		v.AddArg(v0)
1658		return true
1659	}
1660}
1661func rewriteValuePPC64_OpCvt64Fto32(v *Value) bool {
1662	v_0 := v.Args[0]
1663	b := v.Block
1664	typ := &b.Func.Config.Types
1665	// match: (Cvt64Fto32 x)
1666	// result: (MFVSRD (FCTIWZ x))
1667	for {
1668		x := v_0
1669		v.reset(OpPPC64MFVSRD)
1670		v0 := b.NewValue0(v.Pos, OpPPC64FCTIWZ, typ.Float64)
1671		v0.AddArg(x)
1672		v.AddArg(v0)
1673		return true
1674	}
1675}
1676func rewriteValuePPC64_OpCvt64Fto64(v *Value) bool {
1677	v_0 := v.Args[0]
1678	b := v.Block
1679	typ := &b.Func.Config.Types
1680	// match: (Cvt64Fto64 x)
1681	// result: (MFVSRD (FCTIDZ x))
1682	for {
1683		x := v_0
1684		v.reset(OpPPC64MFVSRD)
1685		v0 := b.NewValue0(v.Pos, OpPPC64FCTIDZ, typ.Float64)
1686		v0.AddArg(x)
1687		v.AddArg(v0)
1688		return true
1689	}
1690}
1691func rewriteValuePPC64_OpCvt64to32F(v *Value) bool {
1692	v_0 := v.Args[0]
1693	b := v.Block
1694	typ := &b.Func.Config.Types
1695	// match: (Cvt64to32F x)
1696	// result: (FCFIDS (MTVSRD x))
1697	for {
1698		x := v_0
1699		v.reset(OpPPC64FCFIDS)
1700		v0 := b.NewValue0(v.Pos, OpPPC64MTVSRD, typ.Float64)
1701		v0.AddArg(x)
1702		v.AddArg(v0)
1703		return true
1704	}
1705}
1706func rewriteValuePPC64_OpCvt64to64F(v *Value) bool {
1707	v_0 := v.Args[0]
1708	b := v.Block
1709	typ := &b.Func.Config.Types
1710	// match: (Cvt64to64F x)
1711	// result: (FCFID (MTVSRD x))
1712	for {
1713		x := v_0
1714		v.reset(OpPPC64FCFID)
1715		v0 := b.NewValue0(v.Pos, OpPPC64MTVSRD, typ.Float64)
1716		v0.AddArg(x)
1717		v.AddArg(v0)
1718		return true
1719	}
1720}
1721func rewriteValuePPC64_OpDiv16(v *Value) bool {
1722	v_1 := v.Args[1]
1723	v_0 := v.Args[0]
1724	b := v.Block
1725	typ := &b.Func.Config.Types
1726	// match: (Div16 [false] x y)
1727	// result: (DIVW (SignExt16to32 x) (SignExt16to32 y))
1728	for {
1729		if auxIntToBool(v.AuxInt) != false {
1730			break
1731		}
1732		x := v_0
1733		y := v_1
1734		v.reset(OpPPC64DIVW)
1735		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
1736		v0.AddArg(x)
1737		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
1738		v1.AddArg(y)
1739		v.AddArg2(v0, v1)
1740		return true
1741	}
1742	return false
1743}
1744func rewriteValuePPC64_OpDiv16u(v *Value) bool {
1745	v_1 := v.Args[1]
1746	v_0 := v.Args[0]
1747	b := v.Block
1748	typ := &b.Func.Config.Types
1749	// match: (Div16u x y)
1750	// result: (DIVWU (ZeroExt16to32 x) (ZeroExt16to32 y))
1751	for {
1752		x := v_0
1753		y := v_1
1754		v.reset(OpPPC64DIVWU)
1755		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
1756		v0.AddArg(x)
1757		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
1758		v1.AddArg(y)
1759		v.AddArg2(v0, v1)
1760		return true
1761	}
1762}
1763func rewriteValuePPC64_OpDiv32(v *Value) bool {
1764	v_1 := v.Args[1]
1765	v_0 := v.Args[0]
1766	// match: (Div32 [false] x y)
1767	// result: (DIVW x y)
1768	for {
1769		if auxIntToBool(v.AuxInt) != false {
1770			break
1771		}
1772		x := v_0
1773		y := v_1
1774		v.reset(OpPPC64DIVW)
1775		v.AddArg2(x, y)
1776		return true
1777	}
1778	return false
1779}
1780func rewriteValuePPC64_OpDiv64(v *Value) bool {
1781	v_1 := v.Args[1]
1782	v_0 := v.Args[0]
1783	// match: (Div64 [false] x y)
1784	// result: (DIVD x y)
1785	for {
1786		if auxIntToBool(v.AuxInt) != false {
1787			break
1788		}
1789		x := v_0
1790		y := v_1
1791		v.reset(OpPPC64DIVD)
1792		v.AddArg2(x, y)
1793		return true
1794	}
1795	return false
1796}
1797func rewriteValuePPC64_OpDiv8(v *Value) bool {
1798	v_1 := v.Args[1]
1799	v_0 := v.Args[0]
1800	b := v.Block
1801	typ := &b.Func.Config.Types
1802	// match: (Div8 x y)
1803	// result: (DIVW (SignExt8to32 x) (SignExt8to32 y))
1804	for {
1805		x := v_0
1806		y := v_1
1807		v.reset(OpPPC64DIVW)
1808		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
1809		v0.AddArg(x)
1810		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
1811		v1.AddArg(y)
1812		v.AddArg2(v0, v1)
1813		return true
1814	}
1815}
1816func rewriteValuePPC64_OpDiv8u(v *Value) bool {
1817	v_1 := v.Args[1]
1818	v_0 := v.Args[0]
1819	b := v.Block
1820	typ := &b.Func.Config.Types
1821	// match: (Div8u x y)
1822	// result: (DIVWU (ZeroExt8to32 x) (ZeroExt8to32 y))
1823	for {
1824		x := v_0
1825		y := v_1
1826		v.reset(OpPPC64DIVWU)
1827		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
1828		v0.AddArg(x)
1829		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
1830		v1.AddArg(y)
1831		v.AddArg2(v0, v1)
1832		return true
1833	}
1834}
1835func rewriteValuePPC64_OpEq16(v *Value) bool {
1836	v_1 := v.Args[1]
1837	v_0 := v.Args[0]
1838	b := v.Block
1839	typ := &b.Func.Config.Types
1840	// match: (Eq16 x y)
1841	// cond: x.Type.IsSigned() && y.Type.IsSigned()
1842	// result: (Equal (CMPW (SignExt16to32 x) (SignExt16to32 y)))
1843	for {
1844		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
1845			x := v_0
1846			y := v_1
1847			if !(x.Type.IsSigned() && y.Type.IsSigned()) {
1848				continue
1849			}
1850			v.reset(OpPPC64Equal)
1851			v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
1852			v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
1853			v1.AddArg(x)
1854			v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
1855			v2.AddArg(y)
1856			v0.AddArg2(v1, v2)
1857			v.AddArg(v0)
1858			return true
1859		}
1860		break
1861	}
1862	// match: (Eq16 x y)
1863	// result: (Equal (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
1864	for {
1865		x := v_0
1866		y := v_1
1867		v.reset(OpPPC64Equal)
1868		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
1869		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
1870		v1.AddArg(x)
1871		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
1872		v2.AddArg(y)
1873		v0.AddArg2(v1, v2)
1874		v.AddArg(v0)
1875		return true
1876	}
1877}
1878func rewriteValuePPC64_OpEq32(v *Value) bool {
1879	v_1 := v.Args[1]
1880	v_0 := v.Args[0]
1881	b := v.Block
1882	// match: (Eq32 x y)
1883	// result: (Equal (CMPW x y))
1884	for {
1885		x := v_0
1886		y := v_1
1887		v.reset(OpPPC64Equal)
1888		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
1889		v0.AddArg2(x, y)
1890		v.AddArg(v0)
1891		return true
1892	}
1893}
1894func rewriteValuePPC64_OpEq32F(v *Value) bool {
1895	v_1 := v.Args[1]
1896	v_0 := v.Args[0]
1897	b := v.Block
1898	// match: (Eq32F x y)
1899	// result: (Equal (FCMPU x y))
1900	for {
1901		x := v_0
1902		y := v_1
1903		v.reset(OpPPC64Equal)
1904		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
1905		v0.AddArg2(x, y)
1906		v.AddArg(v0)
1907		return true
1908	}
1909}
1910func rewriteValuePPC64_OpEq64(v *Value) bool {
1911	v_1 := v.Args[1]
1912	v_0 := v.Args[0]
1913	b := v.Block
1914	// match: (Eq64 x y)
1915	// result: (Equal (CMP x y))
1916	for {
1917		x := v_0
1918		y := v_1
1919		v.reset(OpPPC64Equal)
1920		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
1921		v0.AddArg2(x, y)
1922		v.AddArg(v0)
1923		return true
1924	}
1925}
1926func rewriteValuePPC64_OpEq64F(v *Value) bool {
1927	v_1 := v.Args[1]
1928	v_0 := v.Args[0]
1929	b := v.Block
1930	// match: (Eq64F x y)
1931	// result: (Equal (FCMPU x y))
1932	for {
1933		x := v_0
1934		y := v_1
1935		v.reset(OpPPC64Equal)
1936		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
1937		v0.AddArg2(x, y)
1938		v.AddArg(v0)
1939		return true
1940	}
1941}
1942func rewriteValuePPC64_OpEq8(v *Value) bool {
1943	v_1 := v.Args[1]
1944	v_0 := v.Args[0]
1945	b := v.Block
1946	typ := &b.Func.Config.Types
1947	// match: (Eq8 x y)
1948	// cond: x.Type.IsSigned() && y.Type.IsSigned()
1949	// result: (Equal (CMPW (SignExt8to32 x) (SignExt8to32 y)))
1950	for {
1951		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
1952			x := v_0
1953			y := v_1
1954			if !(x.Type.IsSigned() && y.Type.IsSigned()) {
1955				continue
1956			}
1957			v.reset(OpPPC64Equal)
1958			v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
1959			v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
1960			v1.AddArg(x)
1961			v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
1962			v2.AddArg(y)
1963			v0.AddArg2(v1, v2)
1964			v.AddArg(v0)
1965			return true
1966		}
1967		break
1968	}
1969	// match: (Eq8 x y)
1970	// result: (Equal (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
1971	for {
1972		x := v_0
1973		y := v_1
1974		v.reset(OpPPC64Equal)
1975		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
1976		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
1977		v1.AddArg(x)
1978		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
1979		v2.AddArg(y)
1980		v0.AddArg2(v1, v2)
1981		v.AddArg(v0)
1982		return true
1983	}
1984}
1985func rewriteValuePPC64_OpEqB(v *Value) bool {
1986	v_1 := v.Args[1]
1987	v_0 := v.Args[0]
1988	b := v.Block
1989	typ := &b.Func.Config.Types
1990	// match: (EqB x y)
1991	// result: (ANDconst [1] (EQV x y))
1992	for {
1993		x := v_0
1994		y := v_1
1995		v.reset(OpPPC64ANDconst)
1996		v.AuxInt = int64ToAuxInt(1)
1997		v0 := b.NewValue0(v.Pos, OpPPC64EQV, typ.Int64)
1998		v0.AddArg2(x, y)
1999		v.AddArg(v0)
2000		return true
2001	}
2002}
2003func rewriteValuePPC64_OpEqPtr(v *Value) bool {
2004	v_1 := v.Args[1]
2005	v_0 := v.Args[0]
2006	b := v.Block
2007	// match: (EqPtr x y)
2008	// result: (Equal (CMP x y))
2009	for {
2010		x := v_0
2011		y := v_1
2012		v.reset(OpPPC64Equal)
2013		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
2014		v0.AddArg2(x, y)
2015		v.AddArg(v0)
2016		return true
2017	}
2018}
2019func rewriteValuePPC64_OpIsInBounds(v *Value) bool {
2020	v_1 := v.Args[1]
2021	v_0 := v.Args[0]
2022	b := v.Block
2023	// match: (IsInBounds idx len)
2024	// result: (LessThan (CMPU idx len))
2025	for {
2026		idx := v_0
2027		len := v_1
2028		v.reset(OpPPC64LessThan)
2029		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
2030		v0.AddArg2(idx, len)
2031		v.AddArg(v0)
2032		return true
2033	}
2034}
2035func rewriteValuePPC64_OpIsNonNil(v *Value) bool {
2036	v_0 := v.Args[0]
2037	b := v.Block
2038	// match: (IsNonNil ptr)
2039	// result: (NotEqual (CMPconst [0] ptr))
2040	for {
2041		ptr := v_0
2042		v.reset(OpPPC64NotEqual)
2043		v0 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
2044		v0.AuxInt = int64ToAuxInt(0)
2045		v0.AddArg(ptr)
2046		v.AddArg(v0)
2047		return true
2048	}
2049}
2050func rewriteValuePPC64_OpIsSliceInBounds(v *Value) bool {
2051	v_1 := v.Args[1]
2052	v_0 := v.Args[0]
2053	b := v.Block
2054	// match: (IsSliceInBounds idx len)
2055	// result: (LessEqual (CMPU idx len))
2056	for {
2057		idx := v_0
2058		len := v_1
2059		v.reset(OpPPC64LessEqual)
2060		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
2061		v0.AddArg2(idx, len)
2062		v.AddArg(v0)
2063		return true
2064	}
2065}
2066func rewriteValuePPC64_OpLeq16(v *Value) bool {
2067	v_1 := v.Args[1]
2068	v_0 := v.Args[0]
2069	b := v.Block
2070	typ := &b.Func.Config.Types
2071	// match: (Leq16 x y)
2072	// result: (LessEqual (CMPW (SignExt16to32 x) (SignExt16to32 y)))
2073	for {
2074		x := v_0
2075		y := v_1
2076		v.reset(OpPPC64LessEqual)
2077		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
2078		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
2079		v1.AddArg(x)
2080		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
2081		v2.AddArg(y)
2082		v0.AddArg2(v1, v2)
2083		v.AddArg(v0)
2084		return true
2085	}
2086}
2087func rewriteValuePPC64_OpLeq16U(v *Value) bool {
2088	v_1 := v.Args[1]
2089	v_0 := v.Args[0]
2090	b := v.Block
2091	typ := &b.Func.Config.Types
2092	// match: (Leq16U x y)
2093	// result: (LessEqual (CMPWU (ZeroExt16to32 x) (ZeroExt16to32 y)))
2094	for {
2095		x := v_0
2096		y := v_1
2097		v.reset(OpPPC64LessEqual)
2098		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
2099		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
2100		v1.AddArg(x)
2101		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
2102		v2.AddArg(y)
2103		v0.AddArg2(v1, v2)
2104		v.AddArg(v0)
2105		return true
2106	}
2107}
2108func rewriteValuePPC64_OpLeq32(v *Value) bool {
2109	v_1 := v.Args[1]
2110	v_0 := v.Args[0]
2111	b := v.Block
2112	// match: (Leq32 x y)
2113	// result: (LessEqual (CMPW x y))
2114	for {
2115		x := v_0
2116		y := v_1
2117		v.reset(OpPPC64LessEqual)
2118		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
2119		v0.AddArg2(x, y)
2120		v.AddArg(v0)
2121		return true
2122	}
2123}
2124func rewriteValuePPC64_OpLeq32F(v *Value) bool {
2125	v_1 := v.Args[1]
2126	v_0 := v.Args[0]
2127	b := v.Block
2128	// match: (Leq32F x y)
2129	// result: (FLessEqual (FCMPU x y))
2130	for {
2131		x := v_0
2132		y := v_1
2133		v.reset(OpPPC64FLessEqual)
2134		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
2135		v0.AddArg2(x, y)
2136		v.AddArg(v0)
2137		return true
2138	}
2139}
2140func rewriteValuePPC64_OpLeq32U(v *Value) bool {
2141	v_1 := v.Args[1]
2142	v_0 := v.Args[0]
2143	b := v.Block
2144	// match: (Leq32U x y)
2145	// result: (LessEqual (CMPWU x y))
2146	for {
2147		x := v_0
2148		y := v_1
2149		v.reset(OpPPC64LessEqual)
2150		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
2151		v0.AddArg2(x, y)
2152		v.AddArg(v0)
2153		return true
2154	}
2155}
2156func rewriteValuePPC64_OpLeq64(v *Value) bool {
2157	v_1 := v.Args[1]
2158	v_0 := v.Args[0]
2159	b := v.Block
2160	// match: (Leq64 x y)
2161	// result: (LessEqual (CMP x y))
2162	for {
2163		x := v_0
2164		y := v_1
2165		v.reset(OpPPC64LessEqual)
2166		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
2167		v0.AddArg2(x, y)
2168		v.AddArg(v0)
2169		return true
2170	}
2171}
2172func rewriteValuePPC64_OpLeq64F(v *Value) bool {
2173	v_1 := v.Args[1]
2174	v_0 := v.Args[0]
2175	b := v.Block
2176	// match: (Leq64F x y)
2177	// result: (FLessEqual (FCMPU x y))
2178	for {
2179		x := v_0
2180		y := v_1
2181		v.reset(OpPPC64FLessEqual)
2182		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
2183		v0.AddArg2(x, y)
2184		v.AddArg(v0)
2185		return true
2186	}
2187}
2188func rewriteValuePPC64_OpLeq64U(v *Value) bool {
2189	v_1 := v.Args[1]
2190	v_0 := v.Args[0]
2191	b := v.Block
2192	// match: (Leq64U x y)
2193	// result: (LessEqual (CMPU x y))
2194	for {
2195		x := v_0
2196		y := v_1
2197		v.reset(OpPPC64LessEqual)
2198		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
2199		v0.AddArg2(x, y)
2200		v.AddArg(v0)
2201		return true
2202	}
2203}
2204func rewriteValuePPC64_OpLeq8(v *Value) bool {
2205	v_1 := v.Args[1]
2206	v_0 := v.Args[0]
2207	b := v.Block
2208	typ := &b.Func.Config.Types
2209	// match: (Leq8 x y)
2210	// result: (LessEqual (CMPW (SignExt8to32 x) (SignExt8to32 y)))
2211	for {
2212		x := v_0
2213		y := v_1
2214		v.reset(OpPPC64LessEqual)
2215		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
2216		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
2217		v1.AddArg(x)
2218		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
2219		v2.AddArg(y)
2220		v0.AddArg2(v1, v2)
2221		v.AddArg(v0)
2222		return true
2223	}
2224}
2225func rewriteValuePPC64_OpLeq8U(v *Value) bool {
2226	v_1 := v.Args[1]
2227	v_0 := v.Args[0]
2228	b := v.Block
2229	typ := &b.Func.Config.Types
2230	// match: (Leq8U x y)
2231	// result: (LessEqual (CMPWU (ZeroExt8to32 x) (ZeroExt8to32 y)))
2232	for {
2233		x := v_0
2234		y := v_1
2235		v.reset(OpPPC64LessEqual)
2236		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
2237		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
2238		v1.AddArg(x)
2239		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
2240		v2.AddArg(y)
2241		v0.AddArg2(v1, v2)
2242		v.AddArg(v0)
2243		return true
2244	}
2245}
2246func rewriteValuePPC64_OpLess16(v *Value) bool {
2247	v_1 := v.Args[1]
2248	v_0 := v.Args[0]
2249	b := v.Block
2250	typ := &b.Func.Config.Types
2251	// match: (Less16 x y)
2252	// result: (LessThan (CMPW (SignExt16to32 x) (SignExt16to32 y)))
2253	for {
2254		x := v_0
2255		y := v_1
2256		v.reset(OpPPC64LessThan)
2257		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
2258		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
2259		v1.AddArg(x)
2260		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
2261		v2.AddArg(y)
2262		v0.AddArg2(v1, v2)
2263		v.AddArg(v0)
2264		return true
2265	}
2266}
2267func rewriteValuePPC64_OpLess16U(v *Value) bool {
2268	v_1 := v.Args[1]
2269	v_0 := v.Args[0]
2270	b := v.Block
2271	typ := &b.Func.Config.Types
2272	// match: (Less16U x y)
2273	// result: (LessThan (CMPWU (ZeroExt16to32 x) (ZeroExt16to32 y)))
2274	for {
2275		x := v_0
2276		y := v_1
2277		v.reset(OpPPC64LessThan)
2278		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
2279		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
2280		v1.AddArg(x)
2281		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
2282		v2.AddArg(y)
2283		v0.AddArg2(v1, v2)
2284		v.AddArg(v0)
2285		return true
2286	}
2287}
2288func rewriteValuePPC64_OpLess32(v *Value) bool {
2289	v_1 := v.Args[1]
2290	v_0 := v.Args[0]
2291	b := v.Block
2292	// match: (Less32 x y)
2293	// result: (LessThan (CMPW x y))
2294	for {
2295		x := v_0
2296		y := v_1
2297		v.reset(OpPPC64LessThan)
2298		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
2299		v0.AddArg2(x, y)
2300		v.AddArg(v0)
2301		return true
2302	}
2303}
2304func rewriteValuePPC64_OpLess32F(v *Value) bool {
2305	v_1 := v.Args[1]
2306	v_0 := v.Args[0]
2307	b := v.Block
2308	// match: (Less32F x y)
2309	// result: (FLessThan (FCMPU x y))
2310	for {
2311		x := v_0
2312		y := v_1
2313		v.reset(OpPPC64FLessThan)
2314		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
2315		v0.AddArg2(x, y)
2316		v.AddArg(v0)
2317		return true
2318	}
2319}
2320func rewriteValuePPC64_OpLess32U(v *Value) bool {
2321	v_1 := v.Args[1]
2322	v_0 := v.Args[0]
2323	b := v.Block
2324	// match: (Less32U x y)
2325	// result: (LessThan (CMPWU x y))
2326	for {
2327		x := v_0
2328		y := v_1
2329		v.reset(OpPPC64LessThan)
2330		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
2331		v0.AddArg2(x, y)
2332		v.AddArg(v0)
2333		return true
2334	}
2335}
2336func rewriteValuePPC64_OpLess64(v *Value) bool {
2337	v_1 := v.Args[1]
2338	v_0 := v.Args[0]
2339	b := v.Block
2340	// match: (Less64 x y)
2341	// result: (LessThan (CMP x y))
2342	for {
2343		x := v_0
2344		y := v_1
2345		v.reset(OpPPC64LessThan)
2346		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
2347		v0.AddArg2(x, y)
2348		v.AddArg(v0)
2349		return true
2350	}
2351}
2352func rewriteValuePPC64_OpLess64F(v *Value) bool {
2353	v_1 := v.Args[1]
2354	v_0 := v.Args[0]
2355	b := v.Block
2356	// match: (Less64F x y)
2357	// result: (FLessThan (FCMPU x y))
2358	for {
2359		x := v_0
2360		y := v_1
2361		v.reset(OpPPC64FLessThan)
2362		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
2363		v0.AddArg2(x, y)
2364		v.AddArg(v0)
2365		return true
2366	}
2367}
2368func rewriteValuePPC64_OpLess64U(v *Value) bool {
2369	v_1 := v.Args[1]
2370	v_0 := v.Args[0]
2371	b := v.Block
2372	// match: (Less64U x y)
2373	// result: (LessThan (CMPU x y))
2374	for {
2375		x := v_0
2376		y := v_1
2377		v.reset(OpPPC64LessThan)
2378		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
2379		v0.AddArg2(x, y)
2380		v.AddArg(v0)
2381		return true
2382	}
2383}
2384func rewriteValuePPC64_OpLess8(v *Value) bool {
2385	v_1 := v.Args[1]
2386	v_0 := v.Args[0]
2387	b := v.Block
2388	typ := &b.Func.Config.Types
2389	// match: (Less8 x y)
2390	// result: (LessThan (CMPW (SignExt8to32 x) (SignExt8to32 y)))
2391	for {
2392		x := v_0
2393		y := v_1
2394		v.reset(OpPPC64LessThan)
2395		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
2396		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
2397		v1.AddArg(x)
2398		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
2399		v2.AddArg(y)
2400		v0.AddArg2(v1, v2)
2401		v.AddArg(v0)
2402		return true
2403	}
2404}
2405func rewriteValuePPC64_OpLess8U(v *Value) bool {
2406	v_1 := v.Args[1]
2407	v_0 := v.Args[0]
2408	b := v.Block
2409	typ := &b.Func.Config.Types
2410	// match: (Less8U x y)
2411	// result: (LessThan (CMPWU (ZeroExt8to32 x) (ZeroExt8to32 y)))
2412	for {
2413		x := v_0
2414		y := v_1
2415		v.reset(OpPPC64LessThan)
2416		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
2417		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
2418		v1.AddArg(x)
2419		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
2420		v2.AddArg(y)
2421		v0.AddArg2(v1, v2)
2422		v.AddArg(v0)
2423		return true
2424	}
2425}
2426func rewriteValuePPC64_OpLoad(v *Value) bool {
2427	v_1 := v.Args[1]
2428	v_0 := v.Args[0]
2429	b := v.Block
2430	typ := &b.Func.Config.Types
2431	// match: (Load <t> ptr mem)
2432	// cond: (is64BitInt(t) || isPtr(t))
2433	// result: (MOVDload ptr mem)
2434	for {
2435		t := v.Type
2436		ptr := v_0
2437		mem := v_1
2438		if !(is64BitInt(t) || isPtr(t)) {
2439			break
2440		}
2441		v.reset(OpPPC64MOVDload)
2442		v.AddArg2(ptr, mem)
2443		return true
2444	}
2445	// match: (Load <t> ptr mem)
2446	// cond: is32BitInt(t) && t.IsSigned()
2447	// result: (MOVWload ptr mem)
2448	for {
2449		t := v.Type
2450		ptr := v_0
2451		mem := v_1
2452		if !(is32BitInt(t) && t.IsSigned()) {
2453			break
2454		}
2455		v.reset(OpPPC64MOVWload)
2456		v.AddArg2(ptr, mem)
2457		return true
2458	}
2459	// match: (Load <t> ptr mem)
2460	// cond: is32BitInt(t) && !t.IsSigned()
2461	// result: (MOVWZload ptr mem)
2462	for {
2463		t := v.Type
2464		ptr := v_0
2465		mem := v_1
2466		if !(is32BitInt(t) && !t.IsSigned()) {
2467			break
2468		}
2469		v.reset(OpPPC64MOVWZload)
2470		v.AddArg2(ptr, mem)
2471		return true
2472	}
2473	// match: (Load <t> ptr mem)
2474	// cond: is16BitInt(t) && t.IsSigned()
2475	// result: (MOVHload ptr mem)
2476	for {
2477		t := v.Type
2478		ptr := v_0
2479		mem := v_1
2480		if !(is16BitInt(t) && t.IsSigned()) {
2481			break
2482		}
2483		v.reset(OpPPC64MOVHload)
2484		v.AddArg2(ptr, mem)
2485		return true
2486	}
2487	// match: (Load <t> ptr mem)
2488	// cond: is16BitInt(t) && !t.IsSigned()
2489	// result: (MOVHZload ptr mem)
2490	for {
2491		t := v.Type
2492		ptr := v_0
2493		mem := v_1
2494		if !(is16BitInt(t) && !t.IsSigned()) {
2495			break
2496		}
2497		v.reset(OpPPC64MOVHZload)
2498		v.AddArg2(ptr, mem)
2499		return true
2500	}
2501	// match: (Load <t> ptr mem)
2502	// cond: t.IsBoolean()
2503	// result: (MOVBZload ptr mem)
2504	for {
2505		t := v.Type
2506		ptr := v_0
2507		mem := v_1
2508		if !(t.IsBoolean()) {
2509			break
2510		}
2511		v.reset(OpPPC64MOVBZload)
2512		v.AddArg2(ptr, mem)
2513		return true
2514	}
2515	// match: (Load <t> ptr mem)
2516	// cond: is8BitInt(t) && t.IsSigned()
2517	// result: (MOVBreg (MOVBZload ptr mem))
2518	for {
2519		t := v.Type
2520		ptr := v_0
2521		mem := v_1
2522		if !(is8BitInt(t) && t.IsSigned()) {
2523			break
2524		}
2525		v.reset(OpPPC64MOVBreg)
2526		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
2527		v0.AddArg2(ptr, mem)
2528		v.AddArg(v0)
2529		return true
2530	}
2531	// match: (Load <t> ptr mem)
2532	// cond: is8BitInt(t) && !t.IsSigned()
2533	// result: (MOVBZload ptr mem)
2534	for {
2535		t := v.Type
2536		ptr := v_0
2537		mem := v_1
2538		if !(is8BitInt(t) && !t.IsSigned()) {
2539			break
2540		}
2541		v.reset(OpPPC64MOVBZload)
2542		v.AddArg2(ptr, mem)
2543		return true
2544	}
2545	// match: (Load <t> ptr mem)
2546	// cond: is32BitFloat(t)
2547	// result: (FMOVSload ptr mem)
2548	for {
2549		t := v.Type
2550		ptr := v_0
2551		mem := v_1
2552		if !(is32BitFloat(t)) {
2553			break
2554		}
2555		v.reset(OpPPC64FMOVSload)
2556		v.AddArg2(ptr, mem)
2557		return true
2558	}
2559	// match: (Load <t> ptr mem)
2560	// cond: is64BitFloat(t)
2561	// result: (FMOVDload ptr mem)
2562	for {
2563		t := v.Type
2564		ptr := v_0
2565		mem := v_1
2566		if !(is64BitFloat(t)) {
2567			break
2568		}
2569		v.reset(OpPPC64FMOVDload)
2570		v.AddArg2(ptr, mem)
2571		return true
2572	}
2573	return false
2574}
2575func rewriteValuePPC64_OpLocalAddr(v *Value) bool {
2576	v_1 := v.Args[1]
2577	v_0 := v.Args[0]
2578	b := v.Block
2579	typ := &b.Func.Config.Types
2580	// match: (LocalAddr <t> {sym} base mem)
2581	// cond: t.Elem().HasPointers()
2582	// result: (MOVDaddr {sym} (SPanchored base mem))
2583	for {
2584		t := v.Type
2585		sym := auxToSym(v.Aux)
2586		base := v_0
2587		mem := v_1
2588		if !(t.Elem().HasPointers()) {
2589			break
2590		}
2591		v.reset(OpPPC64MOVDaddr)
2592		v.Aux = symToAux(sym)
2593		v0 := b.NewValue0(v.Pos, OpSPanchored, typ.Uintptr)
2594		v0.AddArg2(base, mem)
2595		v.AddArg(v0)
2596		return true
2597	}
2598	// match: (LocalAddr <t> {sym} base _)
2599	// cond: !t.Elem().HasPointers()
2600	// result: (MOVDaddr {sym} base)
2601	for {
2602		t := v.Type
2603		sym := auxToSym(v.Aux)
2604		base := v_0
2605		if !(!t.Elem().HasPointers()) {
2606			break
2607		}
2608		v.reset(OpPPC64MOVDaddr)
2609		v.Aux = symToAux(sym)
2610		v.AddArg(base)
2611		return true
2612	}
2613	return false
2614}
2615func rewriteValuePPC64_OpLsh16x16(v *Value) bool {
2616	v_1 := v.Args[1]
2617	v_0 := v.Args[0]
2618	b := v.Block
2619	typ := &b.Func.Config.Types
2620	// match: (Lsh16x16 x y)
2621	// cond: shiftIsBounded(v)
2622	// result: (SLD x y)
2623	for {
2624		x := v_0
2625		y := v_1
2626		if !(shiftIsBounded(v)) {
2627			break
2628		}
2629		v.reset(OpPPC64SLD)
2630		v.AddArg2(x, y)
2631		return true
2632	}
2633	// match: (Lsh16x16 <t> x y)
2634	// result: (ISEL [2] (SLD <t> (MOVHZreg x) y) (MOVDconst [0]) (CMPconst [0] (ANDconst [0xFFF0] y)))
2635	for {
2636		t := v.Type
2637		x := v_0
2638		y := v_1
2639		v.reset(OpPPC64ISEL)
2640		v.AuxInt = int32ToAuxInt(2)
2641		v0 := b.NewValue0(v.Pos, OpPPC64SLD, t)
2642		v1 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
2643		v1.AddArg(x)
2644		v0.AddArg2(v1, y)
2645		v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
2646		v2.AuxInt = int64ToAuxInt(0)
2647		v3 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
2648		v3.AuxInt = int64ToAuxInt(0)
2649		v4 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int)
2650		v4.AuxInt = int64ToAuxInt(0xFFF0)
2651		v4.AddArg(y)
2652		v3.AddArg(v4)
2653		v.AddArg3(v0, v2, v3)
2654		return true
2655	}
2656}
2657func rewriteValuePPC64_OpLsh16x32(v *Value) bool {
2658	v_1 := v.Args[1]
2659	v_0 := v.Args[0]
2660	b := v.Block
2661	typ := &b.Func.Config.Types
2662	// match: (Lsh16x32 x y)
2663	// cond: shiftIsBounded(v)
2664	// result: (SLD x y)
2665	for {
2666		x := v_0
2667		y := v_1
2668		if !(shiftIsBounded(v)) {
2669			break
2670		}
2671		v.reset(OpPPC64SLD)
2672		v.AddArg2(x, y)
2673		return true
2674	}
2675	// match: (Lsh16x32 <t> x y)
2676	// result: (ISEL [0] (SLD <t> (MOVHZreg x) y) (MOVDconst [0]) (CMPWUconst y [16]))
2677	for {
2678		t := v.Type
2679		x := v_0
2680		y := v_1
2681		v.reset(OpPPC64ISEL)
2682		v.AuxInt = int32ToAuxInt(0)
2683		v0 := b.NewValue0(v.Pos, OpPPC64SLD, t)
2684		v1 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
2685		v1.AddArg(x)
2686		v0.AddArg2(v1, y)
2687		v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
2688		v2.AuxInt = int64ToAuxInt(0)
2689		v3 := b.NewValue0(v.Pos, OpPPC64CMPWUconst, types.TypeFlags)
2690		v3.AuxInt = int32ToAuxInt(16)
2691		v3.AddArg(y)
2692		v.AddArg3(v0, v2, v3)
2693		return true
2694	}
2695}
2696func rewriteValuePPC64_OpLsh16x64(v *Value) bool {
2697	v_1 := v.Args[1]
2698	v_0 := v.Args[0]
2699	b := v.Block
2700	typ := &b.Func.Config.Types
2701	// match: (Lsh16x64 x (MOVDconst [c]))
2702	// cond: uint64(c) < 16
2703	// result: (SLWconst x [c])
2704	for {
2705		x := v_0
2706		if v_1.Op != OpPPC64MOVDconst {
2707			break
2708		}
2709		c := auxIntToInt64(v_1.AuxInt)
2710		if !(uint64(c) < 16) {
2711			break
2712		}
2713		v.reset(OpPPC64SLWconst)
2714		v.AuxInt = int64ToAuxInt(c)
2715		v.AddArg(x)
2716		return true
2717	}
2718	// match: (Lsh16x64 x y)
2719	// cond: shiftIsBounded(v)
2720	// result: (SLD x y)
2721	for {
2722		x := v_0
2723		y := v_1
2724		if !(shiftIsBounded(v)) {
2725			break
2726		}
2727		v.reset(OpPPC64SLD)
2728		v.AddArg2(x, y)
2729		return true
2730	}
2731	// match: (Lsh16x64 <t> x y)
2732	// result: (ISEL [0] (SLD <t> (MOVHZreg x) y) (MOVDconst [0]) (CMPUconst y [16]))
2733	for {
2734		t := v.Type
2735		x := v_0
2736		y := v_1
2737		v.reset(OpPPC64ISEL)
2738		v.AuxInt = int32ToAuxInt(0)
2739		v0 := b.NewValue0(v.Pos, OpPPC64SLD, t)
2740		v1 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
2741		v1.AddArg(x)
2742		v0.AddArg2(v1, y)
2743		v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
2744		v2.AuxInt = int64ToAuxInt(0)
2745		v3 := b.NewValue0(v.Pos, OpPPC64CMPUconst, types.TypeFlags)
2746		v3.AuxInt = int64ToAuxInt(16)
2747		v3.AddArg(y)
2748		v.AddArg3(v0, v2, v3)
2749		return true
2750	}
2751}
2752func rewriteValuePPC64_OpLsh16x8(v *Value) bool {
2753	v_1 := v.Args[1]
2754	v_0 := v.Args[0]
2755	b := v.Block
2756	typ := &b.Func.Config.Types
2757	// match: (Lsh16x8 x y)
2758	// cond: shiftIsBounded(v)
2759	// result: (SLD x y)
2760	for {
2761		x := v_0
2762		y := v_1
2763		if !(shiftIsBounded(v)) {
2764			break
2765		}
2766		v.reset(OpPPC64SLD)
2767		v.AddArg2(x, y)
2768		return true
2769	}
2770	// match: (Lsh16x8 <t> x y)
2771	// result: (ISEL [2] (SLD <t> (MOVHZreg x) y) (MOVDconst [0]) (CMPconst [0] (ANDconst [0x00F0] y)))
2772	for {
2773		t := v.Type
2774		x := v_0
2775		y := v_1
2776		v.reset(OpPPC64ISEL)
2777		v.AuxInt = int32ToAuxInt(2)
2778		v0 := b.NewValue0(v.Pos, OpPPC64SLD, t)
2779		v1 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
2780		v1.AddArg(x)
2781		v0.AddArg2(v1, y)
2782		v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
2783		v2.AuxInt = int64ToAuxInt(0)
2784		v3 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
2785		v3.AuxInt = int64ToAuxInt(0)
2786		v4 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int)
2787		v4.AuxInt = int64ToAuxInt(0x00F0)
2788		v4.AddArg(y)
2789		v3.AddArg(v4)
2790		v.AddArg3(v0, v2, v3)
2791		return true
2792	}
2793}
2794func rewriteValuePPC64_OpLsh32x16(v *Value) bool {
2795	v_1 := v.Args[1]
2796	v_0 := v.Args[0]
2797	b := v.Block
2798	typ := &b.Func.Config.Types
2799	// match: (Lsh32x16 x y)
2800	// cond: shiftIsBounded(v)
2801	// result: (SLW x y)
2802	for {
2803		x := v_0
2804		y := v_1
2805		if !(shiftIsBounded(v)) {
2806			break
2807		}
2808		v.reset(OpPPC64SLW)
2809		v.AddArg2(x, y)
2810		return true
2811	}
2812	// match: (Lsh32x16 <t> x y)
2813	// result: (ISEL [2] (SLW <t> x y) (MOVDconst [0]) (CMPconst [0] (ANDconst [0xFFE0] y)))
2814	for {
2815		t := v.Type
2816		x := v_0
2817		y := v_1
2818		v.reset(OpPPC64ISEL)
2819		v.AuxInt = int32ToAuxInt(2)
2820		v0 := b.NewValue0(v.Pos, OpPPC64SLW, t)
2821		v0.AddArg2(x, y)
2822		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
2823		v1.AuxInt = int64ToAuxInt(0)
2824		v2 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
2825		v2.AuxInt = int64ToAuxInt(0)
2826		v3 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int)
2827		v3.AuxInt = int64ToAuxInt(0xFFE0)
2828		v3.AddArg(y)
2829		v2.AddArg(v3)
2830		v.AddArg3(v0, v1, v2)
2831		return true
2832	}
2833}
2834func rewriteValuePPC64_OpLsh32x32(v *Value) bool {
2835	v_1 := v.Args[1]
2836	v_0 := v.Args[0]
2837	b := v.Block
2838	typ := &b.Func.Config.Types
2839	// match: (Lsh32x32 x y)
2840	// cond: shiftIsBounded(v)
2841	// result: (SLW x y)
2842	for {
2843		x := v_0
2844		y := v_1
2845		if !(shiftIsBounded(v)) {
2846			break
2847		}
2848		v.reset(OpPPC64SLW)
2849		v.AddArg2(x, y)
2850		return true
2851	}
2852	// match: (Lsh32x32 <t> x y)
2853	// result: (ISEL [0] (SLW <t> x y) (MOVDconst [0]) (CMPWUconst y [32]))
2854	for {
2855		t := v.Type
2856		x := v_0
2857		y := v_1
2858		v.reset(OpPPC64ISEL)
2859		v.AuxInt = int32ToAuxInt(0)
2860		v0 := b.NewValue0(v.Pos, OpPPC64SLW, t)
2861		v0.AddArg2(x, y)
2862		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
2863		v1.AuxInt = int64ToAuxInt(0)
2864		v2 := b.NewValue0(v.Pos, OpPPC64CMPWUconst, types.TypeFlags)
2865		v2.AuxInt = int32ToAuxInt(32)
2866		v2.AddArg(y)
2867		v.AddArg3(v0, v1, v2)
2868		return true
2869	}
2870}
2871func rewriteValuePPC64_OpLsh32x64(v *Value) bool {
2872	v_1 := v.Args[1]
2873	v_0 := v.Args[0]
2874	b := v.Block
2875	typ := &b.Func.Config.Types
2876	// match: (Lsh32x64 x (MOVDconst [c]))
2877	// cond: uint64(c) < 32
2878	// result: (SLWconst x [c])
2879	for {
2880		x := v_0
2881		if v_1.Op != OpPPC64MOVDconst {
2882			break
2883		}
2884		c := auxIntToInt64(v_1.AuxInt)
2885		if !(uint64(c) < 32) {
2886			break
2887		}
2888		v.reset(OpPPC64SLWconst)
2889		v.AuxInt = int64ToAuxInt(c)
2890		v.AddArg(x)
2891		return true
2892	}
2893	// match: (Lsh32x64 x y)
2894	// cond: shiftIsBounded(v)
2895	// result: (SLW x y)
2896	for {
2897		x := v_0
2898		y := v_1
2899		if !(shiftIsBounded(v)) {
2900			break
2901		}
2902		v.reset(OpPPC64SLW)
2903		v.AddArg2(x, y)
2904		return true
2905	}
2906	// match: (Lsh32x64 <t> x y)
2907	// result: (ISEL [0] (SLW <t> x y) (MOVDconst [0]) (CMPUconst y [32]))
2908	for {
2909		t := v.Type
2910		x := v_0
2911		y := v_1
2912		v.reset(OpPPC64ISEL)
2913		v.AuxInt = int32ToAuxInt(0)
2914		v0 := b.NewValue0(v.Pos, OpPPC64SLW, t)
2915		v0.AddArg2(x, y)
2916		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
2917		v1.AuxInt = int64ToAuxInt(0)
2918		v2 := b.NewValue0(v.Pos, OpPPC64CMPUconst, types.TypeFlags)
2919		v2.AuxInt = int64ToAuxInt(32)
2920		v2.AddArg(y)
2921		v.AddArg3(v0, v1, v2)
2922		return true
2923	}
2924}
2925func rewriteValuePPC64_OpLsh32x8(v *Value) bool {
2926	v_1 := v.Args[1]
2927	v_0 := v.Args[0]
2928	b := v.Block
2929	typ := &b.Func.Config.Types
2930	// match: (Lsh32x8 x y)
2931	// cond: shiftIsBounded(v)
2932	// result: (SLW x y)
2933	for {
2934		x := v_0
2935		y := v_1
2936		if !(shiftIsBounded(v)) {
2937			break
2938		}
2939		v.reset(OpPPC64SLW)
2940		v.AddArg2(x, y)
2941		return true
2942	}
2943	// match: (Lsh32x8 <t> x y)
2944	// result: (ISEL [2] (SLW <t> x y) (MOVDconst [0]) (CMPconst [0] (ANDconst [0x00E0] y)))
2945	for {
2946		t := v.Type
2947		x := v_0
2948		y := v_1
2949		v.reset(OpPPC64ISEL)
2950		v.AuxInt = int32ToAuxInt(2)
2951		v0 := b.NewValue0(v.Pos, OpPPC64SLW, t)
2952		v0.AddArg2(x, y)
2953		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
2954		v1.AuxInt = int64ToAuxInt(0)
2955		v2 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
2956		v2.AuxInt = int64ToAuxInt(0)
2957		v3 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int)
2958		v3.AuxInt = int64ToAuxInt(0x00E0)
2959		v3.AddArg(y)
2960		v2.AddArg(v3)
2961		v.AddArg3(v0, v1, v2)
2962		return true
2963	}
2964}
2965func rewriteValuePPC64_OpLsh64x16(v *Value) bool {
2966	v_1 := v.Args[1]
2967	v_0 := v.Args[0]
2968	b := v.Block
2969	typ := &b.Func.Config.Types
2970	// match: (Lsh64x16 x y)
2971	// cond: shiftIsBounded(v)
2972	// result: (SLD x y)
2973	for {
2974		x := v_0
2975		y := v_1
2976		if !(shiftIsBounded(v)) {
2977			break
2978		}
2979		v.reset(OpPPC64SLD)
2980		v.AddArg2(x, y)
2981		return true
2982	}
2983	// match: (Lsh64x16 <t> x y)
2984	// result: (ISEL [2] (SLD <t> x y) (MOVDconst [0]) (CMPconst [0] (ANDconst [0xFFC0] y)))
2985	for {
2986		t := v.Type
2987		x := v_0
2988		y := v_1
2989		v.reset(OpPPC64ISEL)
2990		v.AuxInt = int32ToAuxInt(2)
2991		v0 := b.NewValue0(v.Pos, OpPPC64SLD, t)
2992		v0.AddArg2(x, y)
2993		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
2994		v1.AuxInt = int64ToAuxInt(0)
2995		v2 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
2996		v2.AuxInt = int64ToAuxInt(0)
2997		v3 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int)
2998		v3.AuxInt = int64ToAuxInt(0xFFC0)
2999		v3.AddArg(y)
3000		v2.AddArg(v3)
3001		v.AddArg3(v0, v1, v2)
3002		return true
3003	}
3004}
3005func rewriteValuePPC64_OpLsh64x32(v *Value) bool {
3006	v_1 := v.Args[1]
3007	v_0 := v.Args[0]
3008	b := v.Block
3009	typ := &b.Func.Config.Types
3010	// match: (Lsh64x32 x y)
3011	// cond: shiftIsBounded(v)
3012	// result: (SLD x y)
3013	for {
3014		x := v_0
3015		y := v_1
3016		if !(shiftIsBounded(v)) {
3017			break
3018		}
3019		v.reset(OpPPC64SLD)
3020		v.AddArg2(x, y)
3021		return true
3022	}
3023	// match: (Lsh64x32 <t> x y)
3024	// result: (ISEL [0] (SLD <t> x y) (MOVDconst [0]) (CMPWUconst y [64]))
3025	for {
3026		t := v.Type
3027		x := v_0
3028		y := v_1
3029		v.reset(OpPPC64ISEL)
3030		v.AuxInt = int32ToAuxInt(0)
3031		v0 := b.NewValue0(v.Pos, OpPPC64SLD, t)
3032		v0.AddArg2(x, y)
3033		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
3034		v1.AuxInt = int64ToAuxInt(0)
3035		v2 := b.NewValue0(v.Pos, OpPPC64CMPWUconst, types.TypeFlags)
3036		v2.AuxInt = int32ToAuxInt(64)
3037		v2.AddArg(y)
3038		v.AddArg3(v0, v1, v2)
3039		return true
3040	}
3041}
3042func rewriteValuePPC64_OpLsh64x64(v *Value) bool {
3043	v_1 := v.Args[1]
3044	v_0 := v.Args[0]
3045	b := v.Block
3046	typ := &b.Func.Config.Types
3047	// match: (Lsh64x64 x (MOVDconst [c]))
3048	// cond: uint64(c) < 64
3049	// result: (SLDconst x [c])
3050	for {
3051		x := v_0
3052		if v_1.Op != OpPPC64MOVDconst {
3053			break
3054		}
3055		c := auxIntToInt64(v_1.AuxInt)
3056		if !(uint64(c) < 64) {
3057			break
3058		}
3059		v.reset(OpPPC64SLDconst)
3060		v.AuxInt = int64ToAuxInt(c)
3061		v.AddArg(x)
3062		return true
3063	}
3064	// match: (Lsh64x64 x y)
3065	// cond: shiftIsBounded(v)
3066	// result: (SLD x y)
3067	for {
3068		x := v_0
3069		y := v_1
3070		if !(shiftIsBounded(v)) {
3071			break
3072		}
3073		v.reset(OpPPC64SLD)
3074		v.AddArg2(x, y)
3075		return true
3076	}
3077	// match: (Lsh64x64 <t> x y)
3078	// result: (ISEL [0] (SLD <t> x y) (MOVDconst [0]) (CMPUconst y [64]))
3079	for {
3080		t := v.Type
3081		x := v_0
3082		y := v_1
3083		v.reset(OpPPC64ISEL)
3084		v.AuxInt = int32ToAuxInt(0)
3085		v0 := b.NewValue0(v.Pos, OpPPC64SLD, t)
3086		v0.AddArg2(x, y)
3087		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
3088		v1.AuxInt = int64ToAuxInt(0)
3089		v2 := b.NewValue0(v.Pos, OpPPC64CMPUconst, types.TypeFlags)
3090		v2.AuxInt = int64ToAuxInt(64)
3091		v2.AddArg(y)
3092		v.AddArg3(v0, v1, v2)
3093		return true
3094	}
3095}
3096func rewriteValuePPC64_OpLsh64x8(v *Value) bool {
3097	v_1 := v.Args[1]
3098	v_0 := v.Args[0]
3099	b := v.Block
3100	typ := &b.Func.Config.Types
3101	// match: (Lsh64x8 x y)
3102	// cond: shiftIsBounded(v)
3103	// result: (SLD x y)
3104	for {
3105		x := v_0
3106		y := v_1
3107		if !(shiftIsBounded(v)) {
3108			break
3109		}
3110		v.reset(OpPPC64SLD)
3111		v.AddArg2(x, y)
3112		return true
3113	}
3114	// match: (Lsh64x8 <t> x y)
3115	// result: (ISEL [2] (SLD <t> x y) (MOVDconst [0]) (CMPconst [0] (ANDconst [0x00C0] y)))
3116	for {
3117		t := v.Type
3118		x := v_0
3119		y := v_1
3120		v.reset(OpPPC64ISEL)
3121		v.AuxInt = int32ToAuxInt(2)
3122		v0 := b.NewValue0(v.Pos, OpPPC64SLD, t)
3123		v0.AddArg2(x, y)
3124		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
3125		v1.AuxInt = int64ToAuxInt(0)
3126		v2 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
3127		v2.AuxInt = int64ToAuxInt(0)
3128		v3 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int)
3129		v3.AuxInt = int64ToAuxInt(0x00C0)
3130		v3.AddArg(y)
3131		v2.AddArg(v3)
3132		v.AddArg3(v0, v1, v2)
3133		return true
3134	}
3135}
3136func rewriteValuePPC64_OpLsh8x16(v *Value) bool {
3137	v_1 := v.Args[1]
3138	v_0 := v.Args[0]
3139	b := v.Block
3140	typ := &b.Func.Config.Types
3141	// match: (Lsh8x16 x y)
3142	// cond: shiftIsBounded(v)
3143	// result: (SLD x y)
3144	for {
3145		x := v_0
3146		y := v_1
3147		if !(shiftIsBounded(v)) {
3148			break
3149		}
3150		v.reset(OpPPC64SLD)
3151		v.AddArg2(x, y)
3152		return true
3153	}
3154	// match: (Lsh8x16 <t> x y)
3155	// result: (ISEL [2] (SLD <t> (MOVBZreg x) y) (MOVDconst [0]) (CMPconst [0] (ANDconst [0xFFF8] y)))
3156	for {
3157		t := v.Type
3158		x := v_0
3159		y := v_1
3160		v.reset(OpPPC64ISEL)
3161		v.AuxInt = int32ToAuxInt(2)
3162		v0 := b.NewValue0(v.Pos, OpPPC64SLD, t)
3163		v1 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
3164		v1.AddArg(x)
3165		v0.AddArg2(v1, y)
3166		v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
3167		v2.AuxInt = int64ToAuxInt(0)
3168		v3 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
3169		v3.AuxInt = int64ToAuxInt(0)
3170		v4 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int)
3171		v4.AuxInt = int64ToAuxInt(0xFFF8)
3172		v4.AddArg(y)
3173		v3.AddArg(v4)
3174		v.AddArg3(v0, v2, v3)
3175		return true
3176	}
3177}
3178func rewriteValuePPC64_OpLsh8x32(v *Value) bool {
3179	v_1 := v.Args[1]
3180	v_0 := v.Args[0]
3181	b := v.Block
3182	typ := &b.Func.Config.Types
3183	// match: (Lsh8x32 x y)
3184	// cond: shiftIsBounded(v)
3185	// result: (SLD x y)
3186	for {
3187		x := v_0
3188		y := v_1
3189		if !(shiftIsBounded(v)) {
3190			break
3191		}
3192		v.reset(OpPPC64SLD)
3193		v.AddArg2(x, y)
3194		return true
3195	}
3196	// match: (Lsh8x32 <t> x y)
3197	// result: (ISEL [0] (SLD <t> (MOVBZreg x) y) (MOVDconst [0]) (CMPWUconst y [8]))
3198	for {
3199		t := v.Type
3200		x := v_0
3201		y := v_1
3202		v.reset(OpPPC64ISEL)
3203		v.AuxInt = int32ToAuxInt(0)
3204		v0 := b.NewValue0(v.Pos, OpPPC64SLD, t)
3205		v1 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
3206		v1.AddArg(x)
3207		v0.AddArg2(v1, y)
3208		v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
3209		v2.AuxInt = int64ToAuxInt(0)
3210		v3 := b.NewValue0(v.Pos, OpPPC64CMPWUconst, types.TypeFlags)
3211		v3.AuxInt = int32ToAuxInt(8)
3212		v3.AddArg(y)
3213		v.AddArg3(v0, v2, v3)
3214		return true
3215	}
3216}
3217func rewriteValuePPC64_OpLsh8x64(v *Value) bool {
3218	v_1 := v.Args[1]
3219	v_0 := v.Args[0]
3220	b := v.Block
3221	typ := &b.Func.Config.Types
3222	// match: (Lsh8x64 x (MOVDconst [c]))
3223	// cond: uint64(c) < 8
3224	// result: (SLWconst x [c])
3225	for {
3226		x := v_0
3227		if v_1.Op != OpPPC64MOVDconst {
3228			break
3229		}
3230		c := auxIntToInt64(v_1.AuxInt)
3231		if !(uint64(c) < 8) {
3232			break
3233		}
3234		v.reset(OpPPC64SLWconst)
3235		v.AuxInt = int64ToAuxInt(c)
3236		v.AddArg(x)
3237		return true
3238	}
3239	// match: (Lsh8x64 x y)
3240	// cond: shiftIsBounded(v)
3241	// result: (SLD x y)
3242	for {
3243		x := v_0
3244		y := v_1
3245		if !(shiftIsBounded(v)) {
3246			break
3247		}
3248		v.reset(OpPPC64SLD)
3249		v.AddArg2(x, y)
3250		return true
3251	}
3252	// match: (Lsh8x64 <t> x y)
3253	// result: (ISEL [0] (SLD <t> (MOVBZreg x) y) (MOVDconst [0]) (CMPUconst y [8]))
3254	for {
3255		t := v.Type
3256		x := v_0
3257		y := v_1
3258		v.reset(OpPPC64ISEL)
3259		v.AuxInt = int32ToAuxInt(0)
3260		v0 := b.NewValue0(v.Pos, OpPPC64SLD, t)
3261		v1 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
3262		v1.AddArg(x)
3263		v0.AddArg2(v1, y)
3264		v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
3265		v2.AuxInt = int64ToAuxInt(0)
3266		v3 := b.NewValue0(v.Pos, OpPPC64CMPUconst, types.TypeFlags)
3267		v3.AuxInt = int64ToAuxInt(8)
3268		v3.AddArg(y)
3269		v.AddArg3(v0, v2, v3)
3270		return true
3271	}
3272}
3273func rewriteValuePPC64_OpLsh8x8(v *Value) bool {
3274	v_1 := v.Args[1]
3275	v_0 := v.Args[0]
3276	b := v.Block
3277	typ := &b.Func.Config.Types
3278	// match: (Lsh8x8 x y)
3279	// cond: shiftIsBounded(v)
3280	// result: (SLD x y)
3281	for {
3282		x := v_0
3283		y := v_1
3284		if !(shiftIsBounded(v)) {
3285			break
3286		}
3287		v.reset(OpPPC64SLD)
3288		v.AddArg2(x, y)
3289		return true
3290	}
3291	// match: (Lsh8x8 <t> x y)
3292	// result: (ISEL [2] (SLD <t> (MOVBZreg x) y) (MOVDconst [0]) (CMPconst [0] (ANDconst [0x00F8] y)))
3293	for {
3294		t := v.Type
3295		x := v_0
3296		y := v_1
3297		v.reset(OpPPC64ISEL)
3298		v.AuxInt = int32ToAuxInt(2)
3299		v0 := b.NewValue0(v.Pos, OpPPC64SLD, t)
3300		v1 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
3301		v1.AddArg(x)
3302		v0.AddArg2(v1, y)
3303		v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
3304		v2.AuxInt = int64ToAuxInt(0)
3305		v3 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
3306		v3.AuxInt = int64ToAuxInt(0)
3307		v4 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int)
3308		v4.AuxInt = int64ToAuxInt(0x00F8)
3309		v4.AddArg(y)
3310		v3.AddArg(v4)
3311		v.AddArg3(v0, v2, v3)
3312		return true
3313	}
3314}
3315func rewriteValuePPC64_OpMax32F(v *Value) bool {
3316	v_1 := v.Args[1]
3317	v_0 := v.Args[0]
3318	// match: (Max32F x y)
3319	// cond: buildcfg.GOPPC64 >= 9
3320	// result: (XSMAXJDP x y)
3321	for {
3322		x := v_0
3323		y := v_1
3324		if !(buildcfg.GOPPC64 >= 9) {
3325			break
3326		}
3327		v.reset(OpPPC64XSMAXJDP)
3328		v.AddArg2(x, y)
3329		return true
3330	}
3331	return false
3332}
3333func rewriteValuePPC64_OpMax64F(v *Value) bool {
3334	v_1 := v.Args[1]
3335	v_0 := v.Args[0]
3336	// match: (Max64F x y)
3337	// cond: buildcfg.GOPPC64 >= 9
3338	// result: (XSMAXJDP x y)
3339	for {
3340		x := v_0
3341		y := v_1
3342		if !(buildcfg.GOPPC64 >= 9) {
3343			break
3344		}
3345		v.reset(OpPPC64XSMAXJDP)
3346		v.AddArg2(x, y)
3347		return true
3348	}
3349	return false
3350}
3351func rewriteValuePPC64_OpMin32F(v *Value) bool {
3352	v_1 := v.Args[1]
3353	v_0 := v.Args[0]
3354	// match: (Min32F x y)
3355	// cond: buildcfg.GOPPC64 >= 9
3356	// result: (XSMINJDP x y)
3357	for {
3358		x := v_0
3359		y := v_1
3360		if !(buildcfg.GOPPC64 >= 9) {
3361			break
3362		}
3363		v.reset(OpPPC64XSMINJDP)
3364		v.AddArg2(x, y)
3365		return true
3366	}
3367	return false
3368}
3369func rewriteValuePPC64_OpMin64F(v *Value) bool {
3370	v_1 := v.Args[1]
3371	v_0 := v.Args[0]
3372	// match: (Min64F x y)
3373	// cond: buildcfg.GOPPC64 >= 9
3374	// result: (XSMINJDP x y)
3375	for {
3376		x := v_0
3377		y := v_1
3378		if !(buildcfg.GOPPC64 >= 9) {
3379			break
3380		}
3381		v.reset(OpPPC64XSMINJDP)
3382		v.AddArg2(x, y)
3383		return true
3384	}
3385	return false
3386}
3387func rewriteValuePPC64_OpMod16(v *Value) bool {
3388	v_1 := v.Args[1]
3389	v_0 := v.Args[0]
3390	b := v.Block
3391	typ := &b.Func.Config.Types
3392	// match: (Mod16 x y)
3393	// result: (Mod32 (SignExt16to32 x) (SignExt16to32 y))
3394	for {
3395		x := v_0
3396		y := v_1
3397		v.reset(OpMod32)
3398		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
3399		v0.AddArg(x)
3400		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
3401		v1.AddArg(y)
3402		v.AddArg2(v0, v1)
3403		return true
3404	}
3405}
3406func rewriteValuePPC64_OpMod16u(v *Value) bool {
3407	v_1 := v.Args[1]
3408	v_0 := v.Args[0]
3409	b := v.Block
3410	typ := &b.Func.Config.Types
3411	// match: (Mod16u x y)
3412	// result: (Mod32u (ZeroExt16to32 x) (ZeroExt16to32 y))
3413	for {
3414		x := v_0
3415		y := v_1
3416		v.reset(OpMod32u)
3417		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
3418		v0.AddArg(x)
3419		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
3420		v1.AddArg(y)
3421		v.AddArg2(v0, v1)
3422		return true
3423	}
3424}
3425func rewriteValuePPC64_OpMod32(v *Value) bool {
3426	v_1 := v.Args[1]
3427	v_0 := v.Args[0]
3428	b := v.Block
3429	typ := &b.Func.Config.Types
3430	// match: (Mod32 x y)
3431	// cond: buildcfg.GOPPC64 >= 9
3432	// result: (MODSW x y)
3433	for {
3434		x := v_0
3435		y := v_1
3436		if !(buildcfg.GOPPC64 >= 9) {
3437			break
3438		}
3439		v.reset(OpPPC64MODSW)
3440		v.AddArg2(x, y)
3441		return true
3442	}
3443	// match: (Mod32 x y)
3444	// cond: buildcfg.GOPPC64 <= 8
3445	// result: (SUB x (MULLW y (DIVW x y)))
3446	for {
3447		x := v_0
3448		y := v_1
3449		if !(buildcfg.GOPPC64 <= 8) {
3450			break
3451		}
3452		v.reset(OpPPC64SUB)
3453		v0 := b.NewValue0(v.Pos, OpPPC64MULLW, typ.Int32)
3454		v1 := b.NewValue0(v.Pos, OpPPC64DIVW, typ.Int32)
3455		v1.AddArg2(x, y)
3456		v0.AddArg2(y, v1)
3457		v.AddArg2(x, v0)
3458		return true
3459	}
3460	return false
3461}
3462func rewriteValuePPC64_OpMod32u(v *Value) bool {
3463	v_1 := v.Args[1]
3464	v_0 := v.Args[0]
3465	b := v.Block
3466	typ := &b.Func.Config.Types
3467	// match: (Mod32u x y)
3468	// cond: buildcfg.GOPPC64 >= 9
3469	// result: (MODUW x y)
3470	for {
3471		x := v_0
3472		y := v_1
3473		if !(buildcfg.GOPPC64 >= 9) {
3474			break
3475		}
3476		v.reset(OpPPC64MODUW)
3477		v.AddArg2(x, y)
3478		return true
3479	}
3480	// match: (Mod32u x y)
3481	// cond: buildcfg.GOPPC64 <= 8
3482	// result: (SUB x (MULLW y (DIVWU x y)))
3483	for {
3484		x := v_0
3485		y := v_1
3486		if !(buildcfg.GOPPC64 <= 8) {
3487			break
3488		}
3489		v.reset(OpPPC64SUB)
3490		v0 := b.NewValue0(v.Pos, OpPPC64MULLW, typ.Int32)
3491		v1 := b.NewValue0(v.Pos, OpPPC64DIVWU, typ.Int32)
3492		v1.AddArg2(x, y)
3493		v0.AddArg2(y, v1)
3494		v.AddArg2(x, v0)
3495		return true
3496	}
3497	return false
3498}
3499func rewriteValuePPC64_OpMod64(v *Value) bool {
3500	v_1 := v.Args[1]
3501	v_0 := v.Args[0]
3502	b := v.Block
3503	typ := &b.Func.Config.Types
3504	// match: (Mod64 x y)
3505	// cond: buildcfg.GOPPC64 >=9
3506	// result: (MODSD x y)
3507	for {
3508		x := v_0
3509		y := v_1
3510		if !(buildcfg.GOPPC64 >= 9) {
3511			break
3512		}
3513		v.reset(OpPPC64MODSD)
3514		v.AddArg2(x, y)
3515		return true
3516	}
3517	// match: (Mod64 x y)
3518	// cond: buildcfg.GOPPC64 <=8
3519	// result: (SUB x (MULLD y (DIVD x y)))
3520	for {
3521		x := v_0
3522		y := v_1
3523		if !(buildcfg.GOPPC64 <= 8) {
3524			break
3525		}
3526		v.reset(OpPPC64SUB)
3527		v0 := b.NewValue0(v.Pos, OpPPC64MULLD, typ.Int64)
3528		v1 := b.NewValue0(v.Pos, OpPPC64DIVD, typ.Int64)
3529		v1.AddArg2(x, y)
3530		v0.AddArg2(y, v1)
3531		v.AddArg2(x, v0)
3532		return true
3533	}
3534	return false
3535}
3536func rewriteValuePPC64_OpMod64u(v *Value) bool {
3537	v_1 := v.Args[1]
3538	v_0 := v.Args[0]
3539	b := v.Block
3540	typ := &b.Func.Config.Types
3541	// match: (Mod64u x y)
3542	// cond: buildcfg.GOPPC64 >= 9
3543	// result: (MODUD x y)
3544	for {
3545		x := v_0
3546		y := v_1
3547		if !(buildcfg.GOPPC64 >= 9) {
3548			break
3549		}
3550		v.reset(OpPPC64MODUD)
3551		v.AddArg2(x, y)
3552		return true
3553	}
3554	// match: (Mod64u x y)
3555	// cond: buildcfg.GOPPC64 <= 8
3556	// result: (SUB x (MULLD y (DIVDU x y)))
3557	for {
3558		x := v_0
3559		y := v_1
3560		if !(buildcfg.GOPPC64 <= 8) {
3561			break
3562		}
3563		v.reset(OpPPC64SUB)
3564		v0 := b.NewValue0(v.Pos, OpPPC64MULLD, typ.Int64)
3565		v1 := b.NewValue0(v.Pos, OpPPC64DIVDU, typ.Int64)
3566		v1.AddArg2(x, y)
3567		v0.AddArg2(y, v1)
3568		v.AddArg2(x, v0)
3569		return true
3570	}
3571	return false
3572}
3573func rewriteValuePPC64_OpMod8(v *Value) bool {
3574	v_1 := v.Args[1]
3575	v_0 := v.Args[0]
3576	b := v.Block
3577	typ := &b.Func.Config.Types
3578	// match: (Mod8 x y)
3579	// result: (Mod32 (SignExt8to32 x) (SignExt8to32 y))
3580	for {
3581		x := v_0
3582		y := v_1
3583		v.reset(OpMod32)
3584		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
3585		v0.AddArg(x)
3586		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
3587		v1.AddArg(y)
3588		v.AddArg2(v0, v1)
3589		return true
3590	}
3591}
3592func rewriteValuePPC64_OpMod8u(v *Value) bool {
3593	v_1 := v.Args[1]
3594	v_0 := v.Args[0]
3595	b := v.Block
3596	typ := &b.Func.Config.Types
3597	// match: (Mod8u x y)
3598	// result: (Mod32u (ZeroExt8to32 x) (ZeroExt8to32 y))
3599	for {
3600		x := v_0
3601		y := v_1
3602		v.reset(OpMod32u)
3603		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
3604		v0.AddArg(x)
3605		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
3606		v1.AddArg(y)
3607		v.AddArg2(v0, v1)
3608		return true
3609	}
3610}
3611func rewriteValuePPC64_OpMove(v *Value) bool {
3612	v_2 := v.Args[2]
3613	v_1 := v.Args[1]
3614	v_0 := v.Args[0]
3615	b := v.Block
3616	typ := &b.Func.Config.Types
3617	// match: (Move [0] _ _ mem)
3618	// result: mem
3619	for {
3620		if auxIntToInt64(v.AuxInt) != 0 {
3621			break
3622		}
3623		mem := v_2
3624		v.copyOf(mem)
3625		return true
3626	}
3627	// match: (Move [1] dst src mem)
3628	// result: (MOVBstore dst (MOVBZload src mem) mem)
3629	for {
3630		if auxIntToInt64(v.AuxInt) != 1 {
3631			break
3632		}
3633		dst := v_0
3634		src := v_1
3635		mem := v_2
3636		v.reset(OpPPC64MOVBstore)
3637		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
3638		v0.AddArg2(src, mem)
3639		v.AddArg3(dst, v0, mem)
3640		return true
3641	}
3642	// match: (Move [2] dst src mem)
3643	// result: (MOVHstore dst (MOVHZload src mem) mem)
3644	for {
3645		if auxIntToInt64(v.AuxInt) != 2 {
3646			break
3647		}
3648		dst := v_0
3649		src := v_1
3650		mem := v_2
3651		v.reset(OpPPC64MOVHstore)
3652		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZload, typ.UInt16)
3653		v0.AddArg2(src, mem)
3654		v.AddArg3(dst, v0, mem)
3655		return true
3656	}
3657	// match: (Move [4] dst src mem)
3658	// result: (MOVWstore dst (MOVWZload src mem) mem)
3659	for {
3660		if auxIntToInt64(v.AuxInt) != 4 {
3661			break
3662		}
3663		dst := v_0
3664		src := v_1
3665		mem := v_2
3666		v.reset(OpPPC64MOVWstore)
3667		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
3668		v0.AddArg2(src, mem)
3669		v.AddArg3(dst, v0, mem)
3670		return true
3671	}
3672	// match: (Move [8] {t} dst src mem)
3673	// result: (MOVDstore dst (MOVDload src mem) mem)
3674	for {
3675		if auxIntToInt64(v.AuxInt) != 8 {
3676			break
3677		}
3678		dst := v_0
3679		src := v_1
3680		mem := v_2
3681		v.reset(OpPPC64MOVDstore)
3682		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, typ.Int64)
3683		v0.AddArg2(src, mem)
3684		v.AddArg3(dst, v0, mem)
3685		return true
3686	}
3687	// match: (Move [3] dst src mem)
3688	// result: (MOVBstore [2] dst (MOVBZload [2] src mem) (MOVHstore dst (MOVHload src mem) mem))
3689	for {
3690		if auxIntToInt64(v.AuxInt) != 3 {
3691			break
3692		}
3693		dst := v_0
3694		src := v_1
3695		mem := v_2
3696		v.reset(OpPPC64MOVBstore)
3697		v.AuxInt = int32ToAuxInt(2)
3698		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
3699		v0.AuxInt = int32ToAuxInt(2)
3700		v0.AddArg2(src, mem)
3701		v1 := b.NewValue0(v.Pos, OpPPC64MOVHstore, types.TypeMem)
3702		v2 := b.NewValue0(v.Pos, OpPPC64MOVHload, typ.Int16)
3703		v2.AddArg2(src, mem)
3704		v1.AddArg3(dst, v2, mem)
3705		v.AddArg3(dst, v0, v1)
3706		return true
3707	}
3708	// match: (Move [5] dst src mem)
3709	// result: (MOVBstore [4] dst (MOVBZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem))
3710	for {
3711		if auxIntToInt64(v.AuxInt) != 5 {
3712			break
3713		}
3714		dst := v_0
3715		src := v_1
3716		mem := v_2
3717		v.reset(OpPPC64MOVBstore)
3718		v.AuxInt = int32ToAuxInt(4)
3719		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
3720		v0.AuxInt = int32ToAuxInt(4)
3721		v0.AddArg2(src, mem)
3722		v1 := b.NewValue0(v.Pos, OpPPC64MOVWstore, types.TypeMem)
3723		v2 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
3724		v2.AddArg2(src, mem)
3725		v1.AddArg3(dst, v2, mem)
3726		v.AddArg3(dst, v0, v1)
3727		return true
3728	}
3729	// match: (Move [6] dst src mem)
3730	// result: (MOVHstore [4] dst (MOVHZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem))
3731	for {
3732		if auxIntToInt64(v.AuxInt) != 6 {
3733			break
3734		}
3735		dst := v_0
3736		src := v_1
3737		mem := v_2
3738		v.reset(OpPPC64MOVHstore)
3739		v.AuxInt = int32ToAuxInt(4)
3740		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZload, typ.UInt16)
3741		v0.AuxInt = int32ToAuxInt(4)
3742		v0.AddArg2(src, mem)
3743		v1 := b.NewValue0(v.Pos, OpPPC64MOVWstore, types.TypeMem)
3744		v2 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
3745		v2.AddArg2(src, mem)
3746		v1.AddArg3(dst, v2, mem)
3747		v.AddArg3(dst, v0, v1)
3748		return true
3749	}
3750	// match: (Move [7] dst src mem)
3751	// result: (MOVBstore [6] dst (MOVBZload [6] src mem) (MOVHstore [4] dst (MOVHZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem)))
3752	for {
3753		if auxIntToInt64(v.AuxInt) != 7 {
3754			break
3755		}
3756		dst := v_0
3757		src := v_1
3758		mem := v_2
3759		v.reset(OpPPC64MOVBstore)
3760		v.AuxInt = int32ToAuxInt(6)
3761		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
3762		v0.AuxInt = int32ToAuxInt(6)
3763		v0.AddArg2(src, mem)
3764		v1 := b.NewValue0(v.Pos, OpPPC64MOVHstore, types.TypeMem)
3765		v1.AuxInt = int32ToAuxInt(4)
3766		v2 := b.NewValue0(v.Pos, OpPPC64MOVHZload, typ.UInt16)
3767		v2.AuxInt = int32ToAuxInt(4)
3768		v2.AddArg2(src, mem)
3769		v3 := b.NewValue0(v.Pos, OpPPC64MOVWstore, types.TypeMem)
3770		v4 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
3771		v4.AddArg2(src, mem)
3772		v3.AddArg3(dst, v4, mem)
3773		v1.AddArg3(dst, v2, v3)
3774		v.AddArg3(dst, v0, v1)
3775		return true
3776	}
3777	// match: (Move [s] dst src mem)
3778	// cond: s > 8 && buildcfg.GOPPC64 <= 8 && logLargeCopy(v, s)
3779	// result: (LoweredMove [s] dst src mem)
3780	for {
3781		s := auxIntToInt64(v.AuxInt)
3782		dst := v_0
3783		src := v_1
3784		mem := v_2
3785		if !(s > 8 && buildcfg.GOPPC64 <= 8 && logLargeCopy(v, s)) {
3786			break
3787		}
3788		v.reset(OpPPC64LoweredMove)
3789		v.AuxInt = int64ToAuxInt(s)
3790		v.AddArg3(dst, src, mem)
3791		return true
3792	}
3793	// match: (Move [s] dst src mem)
3794	// cond: s > 8 && s <= 64 && buildcfg.GOPPC64 >= 9
3795	// result: (LoweredQuadMoveShort [s] dst src mem)
3796	for {
3797		s := auxIntToInt64(v.AuxInt)
3798		dst := v_0
3799		src := v_1
3800		mem := v_2
3801		if !(s > 8 && s <= 64 && buildcfg.GOPPC64 >= 9) {
3802			break
3803		}
3804		v.reset(OpPPC64LoweredQuadMoveShort)
3805		v.AuxInt = int64ToAuxInt(s)
3806		v.AddArg3(dst, src, mem)
3807		return true
3808	}
3809	// match: (Move [s] dst src mem)
3810	// cond: s > 8 && buildcfg.GOPPC64 >= 9 && logLargeCopy(v, s)
3811	// result: (LoweredQuadMove [s] dst src mem)
3812	for {
3813		s := auxIntToInt64(v.AuxInt)
3814		dst := v_0
3815		src := v_1
3816		mem := v_2
3817		if !(s > 8 && buildcfg.GOPPC64 >= 9 && logLargeCopy(v, s)) {
3818			break
3819		}
3820		v.reset(OpPPC64LoweredQuadMove)
3821		v.AuxInt = int64ToAuxInt(s)
3822		v.AddArg3(dst, src, mem)
3823		return true
3824	}
3825	return false
3826}
3827func rewriteValuePPC64_OpNeq16(v *Value) bool {
3828	v_1 := v.Args[1]
3829	v_0 := v.Args[0]
3830	b := v.Block
3831	typ := &b.Func.Config.Types
3832	// match: (Neq16 x y)
3833	// cond: x.Type.IsSigned() && y.Type.IsSigned()
3834	// result: (NotEqual (CMPW (SignExt16to32 x) (SignExt16to32 y)))
3835	for {
3836		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
3837			x := v_0
3838			y := v_1
3839			if !(x.Type.IsSigned() && y.Type.IsSigned()) {
3840				continue
3841			}
3842			v.reset(OpPPC64NotEqual)
3843			v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
3844			v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
3845			v1.AddArg(x)
3846			v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
3847			v2.AddArg(y)
3848			v0.AddArg2(v1, v2)
3849			v.AddArg(v0)
3850			return true
3851		}
3852		break
3853	}
3854	// match: (Neq16 x y)
3855	// result: (NotEqual (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
3856	for {
3857		x := v_0
3858		y := v_1
3859		v.reset(OpPPC64NotEqual)
3860		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
3861		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
3862		v1.AddArg(x)
3863		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
3864		v2.AddArg(y)
3865		v0.AddArg2(v1, v2)
3866		v.AddArg(v0)
3867		return true
3868	}
3869}
3870func rewriteValuePPC64_OpNeq32(v *Value) bool {
3871	v_1 := v.Args[1]
3872	v_0 := v.Args[0]
3873	b := v.Block
3874	// match: (Neq32 x y)
3875	// result: (NotEqual (CMPW x y))
3876	for {
3877		x := v_0
3878		y := v_1
3879		v.reset(OpPPC64NotEqual)
3880		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
3881		v0.AddArg2(x, y)
3882		v.AddArg(v0)
3883		return true
3884	}
3885}
3886func rewriteValuePPC64_OpNeq32F(v *Value) bool {
3887	v_1 := v.Args[1]
3888	v_0 := v.Args[0]
3889	b := v.Block
3890	// match: (Neq32F x y)
3891	// result: (NotEqual (FCMPU x y))
3892	for {
3893		x := v_0
3894		y := v_1
3895		v.reset(OpPPC64NotEqual)
3896		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
3897		v0.AddArg2(x, y)
3898		v.AddArg(v0)
3899		return true
3900	}
3901}
3902func rewriteValuePPC64_OpNeq64(v *Value) bool {
3903	v_1 := v.Args[1]
3904	v_0 := v.Args[0]
3905	b := v.Block
3906	// match: (Neq64 x y)
3907	// result: (NotEqual (CMP x y))
3908	for {
3909		x := v_0
3910		y := v_1
3911		v.reset(OpPPC64NotEqual)
3912		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
3913		v0.AddArg2(x, y)
3914		v.AddArg(v0)
3915		return true
3916	}
3917}
3918func rewriteValuePPC64_OpNeq64F(v *Value) bool {
3919	v_1 := v.Args[1]
3920	v_0 := v.Args[0]
3921	b := v.Block
3922	// match: (Neq64F x y)
3923	// result: (NotEqual (FCMPU x y))
3924	for {
3925		x := v_0
3926		y := v_1
3927		v.reset(OpPPC64NotEqual)
3928		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
3929		v0.AddArg2(x, y)
3930		v.AddArg(v0)
3931		return true
3932	}
3933}
3934func rewriteValuePPC64_OpNeq8(v *Value) bool {
3935	v_1 := v.Args[1]
3936	v_0 := v.Args[0]
3937	b := v.Block
3938	typ := &b.Func.Config.Types
3939	// match: (Neq8 x y)
3940	// cond: x.Type.IsSigned() && y.Type.IsSigned()
3941	// result: (NotEqual (CMPW (SignExt8to32 x) (SignExt8to32 y)))
3942	for {
3943		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
3944			x := v_0
3945			y := v_1
3946			if !(x.Type.IsSigned() && y.Type.IsSigned()) {
3947				continue
3948			}
3949			v.reset(OpPPC64NotEqual)
3950			v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
3951			v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
3952			v1.AddArg(x)
3953			v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
3954			v2.AddArg(y)
3955			v0.AddArg2(v1, v2)
3956			v.AddArg(v0)
3957			return true
3958		}
3959		break
3960	}
3961	// match: (Neq8 x y)
3962	// result: (NotEqual (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
3963	for {
3964		x := v_0
3965		y := v_1
3966		v.reset(OpPPC64NotEqual)
3967		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
3968		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
3969		v1.AddArg(x)
3970		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
3971		v2.AddArg(y)
3972		v0.AddArg2(v1, v2)
3973		v.AddArg(v0)
3974		return true
3975	}
3976}
3977func rewriteValuePPC64_OpNeqPtr(v *Value) bool {
3978	v_1 := v.Args[1]
3979	v_0 := v.Args[0]
3980	b := v.Block
3981	// match: (NeqPtr x y)
3982	// result: (NotEqual (CMP x y))
3983	for {
3984		x := v_0
3985		y := v_1
3986		v.reset(OpPPC64NotEqual)
3987		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
3988		v0.AddArg2(x, y)
3989		v.AddArg(v0)
3990		return true
3991	}
3992}
3993func rewriteValuePPC64_OpNot(v *Value) bool {
3994	v_0 := v.Args[0]
3995	// match: (Not x)
3996	// result: (XORconst [1] x)
3997	for {
3998		x := v_0
3999		v.reset(OpPPC64XORconst)
4000		v.AuxInt = int64ToAuxInt(1)
4001		v.AddArg(x)
4002		return true
4003	}
4004}
4005func rewriteValuePPC64_OpOffPtr(v *Value) bool {
4006	v_0 := v.Args[0]
4007	b := v.Block
4008	typ := &b.Func.Config.Types
4009	// match: (OffPtr [off] ptr)
4010	// result: (ADD (MOVDconst <typ.Int64> [off]) ptr)
4011	for {
4012		off := auxIntToInt64(v.AuxInt)
4013		ptr := v_0
4014		v.reset(OpPPC64ADD)
4015		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
4016		v0.AuxInt = int64ToAuxInt(off)
4017		v.AddArg2(v0, ptr)
4018		return true
4019	}
4020}
4021func rewriteValuePPC64_OpPPC64ADD(v *Value) bool {
4022	v_1 := v.Args[1]
4023	v_0 := v.Args[0]
4024	// match: (ADD l:(MULLD x y) z)
4025	// cond: buildcfg.GOPPC64 >= 9 && l.Uses == 1 && clobber(l)
4026	// result: (MADDLD x y z)
4027	for {
4028		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
4029			l := v_0
4030			if l.Op != OpPPC64MULLD {
4031				continue
4032			}
4033			y := l.Args[1]
4034			x := l.Args[0]
4035			z := v_1
4036			if !(buildcfg.GOPPC64 >= 9 && l.Uses == 1 && clobber(l)) {
4037				continue
4038			}
4039			v.reset(OpPPC64MADDLD)
4040			v.AddArg3(x, y, z)
4041			return true
4042		}
4043		break
4044	}
4045	// match: (ADD x (MOVDconst <t> [c]))
4046	// cond: is32Bit(c) && !t.IsPtr()
4047	// result: (ADDconst [c] x)
4048	for {
4049		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
4050			x := v_0
4051			if v_1.Op != OpPPC64MOVDconst {
4052				continue
4053			}
4054			t := v_1.Type
4055			c := auxIntToInt64(v_1.AuxInt)
4056			if !(is32Bit(c) && !t.IsPtr()) {
4057				continue
4058			}
4059			v.reset(OpPPC64ADDconst)
4060			v.AuxInt = int64ToAuxInt(c)
4061			v.AddArg(x)
4062			return true
4063		}
4064		break
4065	}
4066	return false
4067}
4068func rewriteValuePPC64_OpPPC64ADDE(v *Value) bool {
4069	v_2 := v.Args[2]
4070	v_1 := v.Args[1]
4071	v_0 := v.Args[0]
4072	b := v.Block
4073	typ := &b.Func.Config.Types
4074	// match: (ADDE x y (Select1 <typ.UInt64> (ADDCconst (MOVDconst [0]) [-1])))
4075	// result: (ADDC x y)
4076	for {
4077		x := v_0
4078		y := v_1
4079		if v_2.Op != OpSelect1 || v_2.Type != typ.UInt64 {
4080			break
4081		}
4082		v_2_0 := v_2.Args[0]
4083		if v_2_0.Op != OpPPC64ADDCconst || auxIntToInt64(v_2_0.AuxInt) != -1 {
4084			break
4085		}
4086		v_2_0_0 := v_2_0.Args[0]
4087		if v_2_0_0.Op != OpPPC64MOVDconst || auxIntToInt64(v_2_0_0.AuxInt) != 0 {
4088			break
4089		}
4090		v.reset(OpPPC64ADDC)
4091		v.AddArg2(x, y)
4092		return true
4093	}
4094	// match: (ADDE (MOVDconst [0]) y c)
4095	// result: (ADDZE y c)
4096	for {
4097		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
4098			if v_0.Op != OpPPC64MOVDconst || auxIntToInt64(v_0.AuxInt) != 0 {
4099				continue
4100			}
4101			y := v_1
4102			c := v_2
4103			v.reset(OpPPC64ADDZE)
4104			v.AddArg2(y, c)
4105			return true
4106		}
4107		break
4108	}
4109	return false
4110}
4111func rewriteValuePPC64_OpPPC64ADDconst(v *Value) bool {
4112	v_0 := v.Args[0]
4113	// match: (ADDconst [c] (ADDconst [d] x))
4114	// cond: is32Bit(c+d)
4115	// result: (ADDconst [c+d] x)
4116	for {
4117		c := auxIntToInt64(v.AuxInt)
4118		if v_0.Op != OpPPC64ADDconst {
4119			break
4120		}
4121		d := auxIntToInt64(v_0.AuxInt)
4122		x := v_0.Args[0]
4123		if !(is32Bit(c + d)) {
4124			break
4125		}
4126		v.reset(OpPPC64ADDconst)
4127		v.AuxInt = int64ToAuxInt(c + d)
4128		v.AddArg(x)
4129		return true
4130	}
4131	// match: (ADDconst [0] x)
4132	// result: x
4133	for {
4134		if auxIntToInt64(v.AuxInt) != 0 {
4135			break
4136		}
4137		x := v_0
4138		v.copyOf(x)
4139		return true
4140	}
4141	// match: (ADDconst [c] (MOVDaddr [d] {sym} x))
4142	// cond: is32Bit(c+int64(d))
4143	// result: (MOVDaddr [int32(c+int64(d))] {sym} x)
4144	for {
4145		c := auxIntToInt64(v.AuxInt)
4146		if v_0.Op != OpPPC64MOVDaddr {
4147			break
4148		}
4149		d := auxIntToInt32(v_0.AuxInt)
4150		sym := auxToSym(v_0.Aux)
4151		x := v_0.Args[0]
4152		if !(is32Bit(c + int64(d))) {
4153			break
4154		}
4155		v.reset(OpPPC64MOVDaddr)
4156		v.AuxInt = int32ToAuxInt(int32(c + int64(d)))
4157		v.Aux = symToAux(sym)
4158		v.AddArg(x)
4159		return true
4160	}
4161	// match: (ADDconst [c] x:(SP))
4162	// cond: is32Bit(c)
4163	// result: (MOVDaddr [int32(c)] x)
4164	for {
4165		c := auxIntToInt64(v.AuxInt)
4166		x := v_0
4167		if x.Op != OpSP || !(is32Bit(c)) {
4168			break
4169		}
4170		v.reset(OpPPC64MOVDaddr)
4171		v.AuxInt = int32ToAuxInt(int32(c))
4172		v.AddArg(x)
4173		return true
4174	}
4175	// match: (ADDconst [c] (SUBFCconst [d] x))
4176	// cond: is32Bit(c+d)
4177	// result: (SUBFCconst [c+d] x)
4178	for {
4179		c := auxIntToInt64(v.AuxInt)
4180		if v_0.Op != OpPPC64SUBFCconst {
4181			break
4182		}
4183		d := auxIntToInt64(v_0.AuxInt)
4184		x := v_0.Args[0]
4185		if !(is32Bit(c + d)) {
4186			break
4187		}
4188		v.reset(OpPPC64SUBFCconst)
4189		v.AuxInt = int64ToAuxInt(c + d)
4190		v.AddArg(x)
4191		return true
4192	}
4193	return false
4194}
4195func rewriteValuePPC64_OpPPC64AND(v *Value) bool {
4196	v_1 := v.Args[1]
4197	v_0 := v.Args[0]
4198	// match: (AND (MOVDconst [m]) (ROTLWconst [r] x))
4199	// cond: isPPC64WordRotateMask(m)
4200	// result: (RLWINM [encodePPC64RotateMask(r,m,32)] x)
4201	for {
4202		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
4203			if v_0.Op != OpPPC64MOVDconst {
4204				continue
4205			}
4206			m := auxIntToInt64(v_0.AuxInt)
4207			if v_1.Op != OpPPC64ROTLWconst {
4208				continue
4209			}
4210			r := auxIntToInt64(v_1.AuxInt)
4211			x := v_1.Args[0]
4212			if !(isPPC64WordRotateMask(m)) {
4213				continue
4214			}
4215			v.reset(OpPPC64RLWINM)
4216			v.AuxInt = int64ToAuxInt(encodePPC64RotateMask(r, m, 32))
4217			v.AddArg(x)
4218			return true
4219		}
4220		break
4221	}
4222	// match: (AND (MOVDconst [m]) (ROTLW x r))
4223	// cond: isPPC64WordRotateMask(m)
4224	// result: (RLWNM [encodePPC64RotateMask(0,m,32)] x r)
4225	for {
4226		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
4227			if v_0.Op != OpPPC64MOVDconst {
4228				continue
4229			}
4230			m := auxIntToInt64(v_0.AuxInt)
4231			if v_1.Op != OpPPC64ROTLW {
4232				continue
4233			}
4234			r := v_1.Args[1]
4235			x := v_1.Args[0]
4236			if !(isPPC64WordRotateMask(m)) {
4237				continue
4238			}
4239			v.reset(OpPPC64RLWNM)
4240			v.AuxInt = int64ToAuxInt(encodePPC64RotateMask(0, m, 32))
4241			v.AddArg2(x, r)
4242			return true
4243		}
4244		break
4245	}
4246	// match: (AND (MOVDconst [m]) (SRWconst x [s]))
4247	// cond: mergePPC64RShiftMask(m,s,32) == 0
4248	// result: (MOVDconst [0])
4249	for {
4250		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
4251			if v_0.Op != OpPPC64MOVDconst {
4252				continue
4253			}
4254			m := auxIntToInt64(v_0.AuxInt)
4255			if v_1.Op != OpPPC64SRWconst {
4256				continue
4257			}
4258			s := auxIntToInt64(v_1.AuxInt)
4259			if !(mergePPC64RShiftMask(m, s, 32) == 0) {
4260				continue
4261			}
4262			v.reset(OpPPC64MOVDconst)
4263			v.AuxInt = int64ToAuxInt(0)
4264			return true
4265		}
4266		break
4267	}
4268	// match: (AND (MOVDconst [m]) (SRWconst x [s]))
4269	// cond: mergePPC64AndSrwi(m,s) != 0
4270	// result: (RLWINM [mergePPC64AndSrwi(m,s)] x)
4271	for {
4272		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
4273			if v_0.Op != OpPPC64MOVDconst {
4274				continue
4275			}
4276			m := auxIntToInt64(v_0.AuxInt)
4277			if v_1.Op != OpPPC64SRWconst {
4278				continue
4279			}
4280			s := auxIntToInt64(v_1.AuxInt)
4281			x := v_1.Args[0]
4282			if !(mergePPC64AndSrwi(m, s) != 0) {
4283				continue
4284			}
4285			v.reset(OpPPC64RLWINM)
4286			v.AuxInt = int64ToAuxInt(mergePPC64AndSrwi(m, s))
4287			v.AddArg(x)
4288			return true
4289		}
4290		break
4291	}
4292	// match: (AND x (NOR y y))
4293	// result: (ANDN x y)
4294	for {
4295		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
4296			x := v_0
4297			if v_1.Op != OpPPC64NOR {
4298				continue
4299			}
4300			y := v_1.Args[1]
4301			if y != v_1.Args[0] {
4302				continue
4303			}
4304			v.reset(OpPPC64ANDN)
4305			v.AddArg2(x, y)
4306			return true
4307		}
4308		break
4309	}
4310	// match: (AND (MOVDconst [c]) (MOVDconst [d]))
4311	// result: (MOVDconst [c&d])
4312	for {
4313		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
4314			if v_0.Op != OpPPC64MOVDconst {
4315				continue
4316			}
4317			c := auxIntToInt64(v_0.AuxInt)
4318			if v_1.Op != OpPPC64MOVDconst {
4319				continue
4320			}
4321			d := auxIntToInt64(v_1.AuxInt)
4322			v.reset(OpPPC64MOVDconst)
4323			v.AuxInt = int64ToAuxInt(c & d)
4324			return true
4325		}
4326		break
4327	}
4328	// match: (AND x (MOVDconst [-1]))
4329	// result: x
4330	for {
4331		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
4332			x := v_0
4333			if v_1.Op != OpPPC64MOVDconst || auxIntToInt64(v_1.AuxInt) != -1 {
4334				continue
4335			}
4336			v.copyOf(x)
4337			return true
4338		}
4339		break
4340	}
4341	// match: (AND x (MOVDconst [c]))
4342	// cond: isU16Bit(c)
4343	// result: (ANDconst [c] x)
4344	for {
4345		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
4346			x := v_0
4347			if v_1.Op != OpPPC64MOVDconst {
4348				continue
4349			}
4350			c := auxIntToInt64(v_1.AuxInt)
4351			if !(isU16Bit(c)) {
4352				continue
4353			}
4354			v.reset(OpPPC64ANDconst)
4355			v.AuxInt = int64ToAuxInt(c)
4356			v.AddArg(x)
4357			return true
4358		}
4359		break
4360	}
4361	// match: (AND (MOVDconst [c]) y:(MOVWZreg _))
4362	// cond: c&0xFFFFFFFF == 0xFFFFFFFF
4363	// result: y
4364	for {
4365		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
4366			if v_0.Op != OpPPC64MOVDconst {
4367				continue
4368			}
4369			c := auxIntToInt64(v_0.AuxInt)
4370			y := v_1
4371			if y.Op != OpPPC64MOVWZreg || !(c&0xFFFFFFFF == 0xFFFFFFFF) {
4372				continue
4373			}
4374			v.copyOf(y)
4375			return true
4376		}
4377		break
4378	}
4379	// match: (AND (MOVDconst [0xFFFFFFFF]) y:(MOVWreg x))
4380	// result: (MOVWZreg x)
4381	for {
4382		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
4383			if v_0.Op != OpPPC64MOVDconst || auxIntToInt64(v_0.AuxInt) != 0xFFFFFFFF {
4384				continue
4385			}
4386			y := v_1
4387			if y.Op != OpPPC64MOVWreg {
4388				continue
4389			}
4390			x := y.Args[0]
4391			v.reset(OpPPC64MOVWZreg)
4392			v.AddArg(x)
4393			return true
4394		}
4395		break
4396	}
4397	// match: (AND (MOVDconst [c]) x:(MOVBZload _ _))
4398	// result: (ANDconst [c&0xFF] x)
4399	for {
4400		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
4401			if v_0.Op != OpPPC64MOVDconst {
4402				continue
4403			}
4404			c := auxIntToInt64(v_0.AuxInt)
4405			x := v_1
4406			if x.Op != OpPPC64MOVBZload {
4407				continue
4408			}
4409			v.reset(OpPPC64ANDconst)
4410			v.AuxInt = int64ToAuxInt(c & 0xFF)
4411			v.AddArg(x)
4412			return true
4413		}
4414		break
4415	}
4416	return false
4417}
4418func rewriteValuePPC64_OpPPC64ANDN(v *Value) bool {
4419	v_1 := v.Args[1]
4420	v_0 := v.Args[0]
4421	// match: (ANDN (MOVDconst [c]) (MOVDconst [d]))
4422	// result: (MOVDconst [c&^d])
4423	for {
4424		if v_0.Op != OpPPC64MOVDconst {
4425			break
4426		}
4427		c := auxIntToInt64(v_0.AuxInt)
4428		if v_1.Op != OpPPC64MOVDconst {
4429			break
4430		}
4431		d := auxIntToInt64(v_1.AuxInt)
4432		v.reset(OpPPC64MOVDconst)
4433		v.AuxInt = int64ToAuxInt(c &^ d)
4434		return true
4435	}
4436	return false
4437}
4438func rewriteValuePPC64_OpPPC64ANDconst(v *Value) bool {
4439	v_0 := v.Args[0]
4440	// match: (ANDconst [m] (ROTLWconst [r] x))
4441	// cond: isPPC64WordRotateMask(m)
4442	// result: (RLWINM [encodePPC64RotateMask(r,m,32)] x)
4443	for {
4444		m := auxIntToInt64(v.AuxInt)
4445		if v_0.Op != OpPPC64ROTLWconst {
4446			break
4447		}
4448		r := auxIntToInt64(v_0.AuxInt)
4449		x := v_0.Args[0]
4450		if !(isPPC64WordRotateMask(m)) {
4451			break
4452		}
4453		v.reset(OpPPC64RLWINM)
4454		v.AuxInt = int64ToAuxInt(encodePPC64RotateMask(r, m, 32))
4455		v.AddArg(x)
4456		return true
4457	}
4458	// match: (ANDconst [m] (ROTLW x r))
4459	// cond: isPPC64WordRotateMask(m)
4460	// result: (RLWNM [encodePPC64RotateMask(0,m,32)] x r)
4461	for {
4462		m := auxIntToInt64(v.AuxInt)
4463		if v_0.Op != OpPPC64ROTLW {
4464			break
4465		}
4466		r := v_0.Args[1]
4467		x := v_0.Args[0]
4468		if !(isPPC64WordRotateMask(m)) {
4469			break
4470		}
4471		v.reset(OpPPC64RLWNM)
4472		v.AuxInt = int64ToAuxInt(encodePPC64RotateMask(0, m, 32))
4473		v.AddArg2(x, r)
4474		return true
4475	}
4476	// match: (ANDconst [m] (SRWconst x [s]))
4477	// cond: mergePPC64RShiftMask(m,s,32) == 0
4478	// result: (MOVDconst [0])
4479	for {
4480		m := auxIntToInt64(v.AuxInt)
4481		if v_0.Op != OpPPC64SRWconst {
4482			break
4483		}
4484		s := auxIntToInt64(v_0.AuxInt)
4485		if !(mergePPC64RShiftMask(m, s, 32) == 0) {
4486			break
4487		}
4488		v.reset(OpPPC64MOVDconst)
4489		v.AuxInt = int64ToAuxInt(0)
4490		return true
4491	}
4492	// match: (ANDconst [m] (SRWconst x [s]))
4493	// cond: mergePPC64AndSrwi(m,s) != 0
4494	// result: (RLWINM [mergePPC64AndSrwi(m,s)] x)
4495	for {
4496		m := auxIntToInt64(v.AuxInt)
4497		if v_0.Op != OpPPC64SRWconst {
4498			break
4499		}
4500		s := auxIntToInt64(v_0.AuxInt)
4501		x := v_0.Args[0]
4502		if !(mergePPC64AndSrwi(m, s) != 0) {
4503			break
4504		}
4505		v.reset(OpPPC64RLWINM)
4506		v.AuxInt = int64ToAuxInt(mergePPC64AndSrwi(m, s))
4507		v.AddArg(x)
4508		return true
4509	}
4510	// match: (ANDconst [c] (ANDconst [d] x))
4511	// result: (ANDconst [c&d] x)
4512	for {
4513		c := auxIntToInt64(v.AuxInt)
4514		if v_0.Op != OpPPC64ANDconst {
4515			break
4516		}
4517		d := auxIntToInt64(v_0.AuxInt)
4518		x := v_0.Args[0]
4519		v.reset(OpPPC64ANDconst)
4520		v.AuxInt = int64ToAuxInt(c & d)
4521		v.AddArg(x)
4522		return true
4523	}
4524	// match: (ANDconst [-1] x)
4525	// result: x
4526	for {
4527		if auxIntToInt64(v.AuxInt) != -1 {
4528			break
4529		}
4530		x := v_0
4531		v.copyOf(x)
4532		return true
4533	}
4534	// match: (ANDconst [0] _)
4535	// result: (MOVDconst [0])
4536	for {
4537		if auxIntToInt64(v.AuxInt) != 0 {
4538			break
4539		}
4540		v.reset(OpPPC64MOVDconst)
4541		v.AuxInt = int64ToAuxInt(0)
4542		return true
4543	}
4544	// match: (ANDconst [c] y:(MOVBZreg _))
4545	// cond: c&0xFF == 0xFF
4546	// result: y
4547	for {
4548		c := auxIntToInt64(v.AuxInt)
4549		y := v_0
4550		if y.Op != OpPPC64MOVBZreg || !(c&0xFF == 0xFF) {
4551			break
4552		}
4553		v.copyOf(y)
4554		return true
4555	}
4556	// match: (ANDconst [0xFF] (MOVBreg x))
4557	// result: (MOVBZreg x)
4558	for {
4559		if auxIntToInt64(v.AuxInt) != 0xFF || v_0.Op != OpPPC64MOVBreg {
4560			break
4561		}
4562		x := v_0.Args[0]
4563		v.reset(OpPPC64MOVBZreg)
4564		v.AddArg(x)
4565		return true
4566	}
4567	// match: (ANDconst [c] y:(MOVHZreg _))
4568	// cond: c&0xFFFF == 0xFFFF
4569	// result: y
4570	for {
4571		c := auxIntToInt64(v.AuxInt)
4572		y := v_0
4573		if y.Op != OpPPC64MOVHZreg || !(c&0xFFFF == 0xFFFF) {
4574			break
4575		}
4576		v.copyOf(y)
4577		return true
4578	}
4579	// match: (ANDconst [0xFFFF] (MOVHreg x))
4580	// result: (MOVHZreg x)
4581	for {
4582		if auxIntToInt64(v.AuxInt) != 0xFFFF || v_0.Op != OpPPC64MOVHreg {
4583			break
4584		}
4585		x := v_0.Args[0]
4586		v.reset(OpPPC64MOVHZreg)
4587		v.AddArg(x)
4588		return true
4589	}
4590	// match: (ANDconst [c] (MOVBZreg x))
4591	// result: (ANDconst [c&0xFF] x)
4592	for {
4593		c := auxIntToInt64(v.AuxInt)
4594		if v_0.Op != OpPPC64MOVBZreg {
4595			break
4596		}
4597		x := v_0.Args[0]
4598		v.reset(OpPPC64ANDconst)
4599		v.AuxInt = int64ToAuxInt(c & 0xFF)
4600		v.AddArg(x)
4601		return true
4602	}
4603	// match: (ANDconst [c] (MOVHZreg x))
4604	// result: (ANDconst [c&0xFFFF] x)
4605	for {
4606		c := auxIntToInt64(v.AuxInt)
4607		if v_0.Op != OpPPC64MOVHZreg {
4608			break
4609		}
4610		x := v_0.Args[0]
4611		v.reset(OpPPC64ANDconst)
4612		v.AuxInt = int64ToAuxInt(c & 0xFFFF)
4613		v.AddArg(x)
4614		return true
4615	}
4616	// match: (ANDconst [c] (MOVWZreg x))
4617	// result: (ANDconst [c&0xFFFFFFFF] x)
4618	for {
4619		c := auxIntToInt64(v.AuxInt)
4620		if v_0.Op != OpPPC64MOVWZreg {
4621			break
4622		}
4623		x := v_0.Args[0]
4624		v.reset(OpPPC64ANDconst)
4625		v.AuxInt = int64ToAuxInt(c & 0xFFFFFFFF)
4626		v.AddArg(x)
4627		return true
4628	}
4629	// match: (ANDconst [m] (RLWINM [r] y))
4630	// cond: mergePPC64AndRlwinm(uint32(m),r) != 0
4631	// result: (RLWINM [mergePPC64AndRlwinm(uint32(m),r)] y)
4632	for {
4633		m := auxIntToInt64(v.AuxInt)
4634		if v_0.Op != OpPPC64RLWINM {
4635			break
4636		}
4637		r := auxIntToInt64(v_0.AuxInt)
4638		y := v_0.Args[0]
4639		if !(mergePPC64AndRlwinm(uint32(m), r) != 0) {
4640			break
4641		}
4642		v.reset(OpPPC64RLWINM)
4643		v.AuxInt = int64ToAuxInt(mergePPC64AndRlwinm(uint32(m), r))
4644		v.AddArg(y)
4645		return true
4646	}
4647	// match: (ANDconst [1] z:(SRADconst [63] x))
4648	// cond: z.Uses == 1
4649	// result: (SRDconst [63] x)
4650	for {
4651		if auxIntToInt64(v.AuxInt) != 1 {
4652			break
4653		}
4654		z := v_0
4655		if z.Op != OpPPC64SRADconst || auxIntToInt64(z.AuxInt) != 63 {
4656			break
4657		}
4658		x := z.Args[0]
4659		if !(z.Uses == 1) {
4660			break
4661		}
4662		v.reset(OpPPC64SRDconst)
4663		v.AuxInt = int64ToAuxInt(63)
4664		v.AddArg(x)
4665		return true
4666	}
4667	return false
4668}
4669func rewriteValuePPC64_OpPPC64BRD(v *Value) bool {
4670	v_0 := v.Args[0]
4671	b := v.Block
4672	typ := &b.Func.Config.Types
4673	// match: (BRD x:(MOVDload [off] {sym} ptr mem))
4674	// cond: x.Uses == 1
4675	// result: @x.Block (MOVDBRload (MOVDaddr <ptr.Type> [off] {sym} ptr) mem)
4676	for {
4677		x := v_0
4678		if x.Op != OpPPC64MOVDload {
4679			break
4680		}
4681		off := auxIntToInt32(x.AuxInt)
4682		sym := auxToSym(x.Aux)
4683		mem := x.Args[1]
4684		ptr := x.Args[0]
4685		if !(x.Uses == 1) {
4686			break
4687		}
4688		b = x.Block
4689		v0 := b.NewValue0(x.Pos, OpPPC64MOVDBRload, typ.UInt64)
4690		v.copyOf(v0)
4691		v1 := b.NewValue0(x.Pos, OpPPC64MOVDaddr, ptr.Type)
4692		v1.AuxInt = int32ToAuxInt(off)
4693		v1.Aux = symToAux(sym)
4694		v1.AddArg(ptr)
4695		v0.AddArg2(v1, mem)
4696		return true
4697	}
4698	// match: (BRD x:(MOVDloadidx ptr idx mem))
4699	// cond: x.Uses == 1
4700	// result: @x.Block (MOVDBRloadidx ptr idx mem)
4701	for {
4702		x := v_0
4703		if x.Op != OpPPC64MOVDloadidx {
4704			break
4705		}
4706		mem := x.Args[2]
4707		ptr := x.Args[0]
4708		idx := x.Args[1]
4709		if !(x.Uses == 1) {
4710			break
4711		}
4712		b = x.Block
4713		v0 := b.NewValue0(v.Pos, OpPPC64MOVDBRloadidx, typ.Int64)
4714		v.copyOf(v0)
4715		v0.AddArg3(ptr, idx, mem)
4716		return true
4717	}
4718	return false
4719}
4720func rewriteValuePPC64_OpPPC64BRH(v *Value) bool {
4721	v_0 := v.Args[0]
4722	b := v.Block
4723	typ := &b.Func.Config.Types
4724	// match: (BRH x:(MOVHZload [off] {sym} ptr mem))
4725	// cond: x.Uses == 1
4726	// result: @x.Block (MOVHBRload (MOVDaddr <ptr.Type> [off] {sym} ptr) mem)
4727	for {
4728		x := v_0
4729		if x.Op != OpPPC64MOVHZload {
4730			break
4731		}
4732		off := auxIntToInt32(x.AuxInt)
4733		sym := auxToSym(x.Aux)
4734		mem := x.Args[1]
4735		ptr := x.Args[0]
4736		if !(x.Uses == 1) {
4737			break
4738		}
4739		b = x.Block
4740		v0 := b.NewValue0(x.Pos, OpPPC64MOVHBRload, typ.UInt16)
4741		v.copyOf(v0)
4742		v1 := b.NewValue0(x.Pos, OpPPC64MOVDaddr, ptr.Type)
4743		v1.AuxInt = int32ToAuxInt(off)
4744		v1.Aux = symToAux(sym)
4745		v1.AddArg(ptr)
4746		v0.AddArg2(v1, mem)
4747		return true
4748	}
4749	// match: (BRH x:(MOVHZloadidx ptr idx mem))
4750	// cond: x.Uses == 1
4751	// result: @x.Block (MOVHBRloadidx ptr idx mem)
4752	for {
4753		x := v_0
4754		if x.Op != OpPPC64MOVHZloadidx {
4755			break
4756		}
4757		mem := x.Args[2]
4758		ptr := x.Args[0]
4759		idx := x.Args[1]
4760		if !(x.Uses == 1) {
4761			break
4762		}
4763		b = x.Block
4764		v0 := b.NewValue0(v.Pos, OpPPC64MOVHBRloadidx, typ.Int16)
4765		v.copyOf(v0)
4766		v0.AddArg3(ptr, idx, mem)
4767		return true
4768	}
4769	return false
4770}
4771func rewriteValuePPC64_OpPPC64BRW(v *Value) bool {
4772	v_0 := v.Args[0]
4773	b := v.Block
4774	typ := &b.Func.Config.Types
4775	// match: (BRW x:(MOVWZload [off] {sym} ptr mem))
4776	// cond: x.Uses == 1
4777	// result: @x.Block (MOVWBRload (MOVDaddr <ptr.Type> [off] {sym} ptr) mem)
4778	for {
4779		x := v_0
4780		if x.Op != OpPPC64MOVWZload {
4781			break
4782		}
4783		off := auxIntToInt32(x.AuxInt)
4784		sym := auxToSym(x.Aux)
4785		mem := x.Args[1]
4786		ptr := x.Args[0]
4787		if !(x.Uses == 1) {
4788			break
4789		}
4790		b = x.Block
4791		v0 := b.NewValue0(x.Pos, OpPPC64MOVWBRload, typ.UInt32)
4792		v.copyOf(v0)
4793		v1 := b.NewValue0(x.Pos, OpPPC64MOVDaddr, ptr.Type)
4794		v1.AuxInt = int32ToAuxInt(off)
4795		v1.Aux = symToAux(sym)
4796		v1.AddArg(ptr)
4797		v0.AddArg2(v1, mem)
4798		return true
4799	}
4800	// match: (BRW x:(MOVWZloadidx ptr idx mem))
4801	// cond: x.Uses == 1
4802	// result: @x.Block (MOVWBRloadidx ptr idx mem)
4803	for {
4804		x := v_0
4805		if x.Op != OpPPC64MOVWZloadidx {
4806			break
4807		}
4808		mem := x.Args[2]
4809		ptr := x.Args[0]
4810		idx := x.Args[1]
4811		if !(x.Uses == 1) {
4812			break
4813		}
4814		b = x.Block
4815		v0 := b.NewValue0(v.Pos, OpPPC64MOVWBRloadidx, typ.Int32)
4816		v.copyOf(v0)
4817		v0.AddArg3(ptr, idx, mem)
4818		return true
4819	}
4820	return false
4821}
4822func rewriteValuePPC64_OpPPC64CLRLSLDI(v *Value) bool {
4823	v_0 := v.Args[0]
4824	// match: (CLRLSLDI [c] (SRWconst [s] x))
4825	// cond: mergePPC64ClrlsldiSrw(int64(c),s) != 0
4826	// result: (RLWINM [mergePPC64ClrlsldiSrw(int64(c),s)] x)
4827	for {
4828		c := auxIntToInt32(v.AuxInt)
4829		if v_0.Op != OpPPC64SRWconst {
4830			break
4831		}
4832		s := auxIntToInt64(v_0.AuxInt)
4833		x := v_0.Args[0]
4834		if !(mergePPC64ClrlsldiSrw(int64(c), s) != 0) {
4835			break
4836		}
4837		v.reset(OpPPC64RLWINM)
4838		v.AuxInt = int64ToAuxInt(mergePPC64ClrlsldiSrw(int64(c), s))
4839		v.AddArg(x)
4840		return true
4841	}
4842	// match: (CLRLSLDI [c] (SRDconst [s] x))
4843	// cond: mergePPC64ClrlsldiSrd(int64(c),s) != 0
4844	// result: (RLWINM [mergePPC64ClrlsldiSrd(int64(c),s)] x)
4845	for {
4846		c := auxIntToInt32(v.AuxInt)
4847		if v_0.Op != OpPPC64SRDconst {
4848			break
4849		}
4850		s := auxIntToInt64(v_0.AuxInt)
4851		x := v_0.Args[0]
4852		if !(mergePPC64ClrlsldiSrd(int64(c), s) != 0) {
4853			break
4854		}
4855		v.reset(OpPPC64RLWINM)
4856		v.AuxInt = int64ToAuxInt(mergePPC64ClrlsldiSrd(int64(c), s))
4857		v.AddArg(x)
4858		return true
4859	}
4860	// match: (CLRLSLDI [c] i:(RLWINM [s] x))
4861	// cond: mergePPC64ClrlsldiRlwinm(c,s) != 0
4862	// result: (RLWINM [mergePPC64ClrlsldiRlwinm(c,s)] x)
4863	for {
4864		c := auxIntToInt32(v.AuxInt)
4865		i := v_0
4866		if i.Op != OpPPC64RLWINM {
4867			break
4868		}
4869		s := auxIntToInt64(i.AuxInt)
4870		x := i.Args[0]
4871		if !(mergePPC64ClrlsldiRlwinm(c, s) != 0) {
4872			break
4873		}
4874		v.reset(OpPPC64RLWINM)
4875		v.AuxInt = int64ToAuxInt(mergePPC64ClrlsldiRlwinm(c, s))
4876		v.AddArg(x)
4877		return true
4878	}
4879	return false
4880}
4881func rewriteValuePPC64_OpPPC64CMP(v *Value) bool {
4882	v_1 := v.Args[1]
4883	v_0 := v.Args[0]
4884	b := v.Block
4885	// match: (CMP x (MOVDconst [c]))
4886	// cond: is16Bit(c)
4887	// result: (CMPconst x [c])
4888	for {
4889		x := v_0
4890		if v_1.Op != OpPPC64MOVDconst {
4891			break
4892		}
4893		c := auxIntToInt64(v_1.AuxInt)
4894		if !(is16Bit(c)) {
4895			break
4896		}
4897		v.reset(OpPPC64CMPconst)
4898		v.AuxInt = int64ToAuxInt(c)
4899		v.AddArg(x)
4900		return true
4901	}
4902	// match: (CMP (MOVDconst [c]) y)
4903	// cond: is16Bit(c)
4904	// result: (InvertFlags (CMPconst y [c]))
4905	for {
4906		if v_0.Op != OpPPC64MOVDconst {
4907			break
4908		}
4909		c := auxIntToInt64(v_0.AuxInt)
4910		y := v_1
4911		if !(is16Bit(c)) {
4912			break
4913		}
4914		v.reset(OpPPC64InvertFlags)
4915		v0 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
4916		v0.AuxInt = int64ToAuxInt(c)
4917		v0.AddArg(y)
4918		v.AddArg(v0)
4919		return true
4920	}
4921	// match: (CMP x y)
4922	// cond: canonLessThan(x,y)
4923	// result: (InvertFlags (CMP y x))
4924	for {
4925		x := v_0
4926		y := v_1
4927		if !(canonLessThan(x, y)) {
4928			break
4929		}
4930		v.reset(OpPPC64InvertFlags)
4931		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
4932		v0.AddArg2(y, x)
4933		v.AddArg(v0)
4934		return true
4935	}
4936	return false
4937}
4938func rewriteValuePPC64_OpPPC64CMPU(v *Value) bool {
4939	v_1 := v.Args[1]
4940	v_0 := v.Args[0]
4941	b := v.Block
4942	// match: (CMPU x (MOVDconst [c]))
4943	// cond: isU16Bit(c)
4944	// result: (CMPUconst x [c])
4945	for {
4946		x := v_0
4947		if v_1.Op != OpPPC64MOVDconst {
4948			break
4949		}
4950		c := auxIntToInt64(v_1.AuxInt)
4951		if !(isU16Bit(c)) {
4952			break
4953		}
4954		v.reset(OpPPC64CMPUconst)
4955		v.AuxInt = int64ToAuxInt(c)
4956		v.AddArg(x)
4957		return true
4958	}
4959	// match: (CMPU (MOVDconst [c]) y)
4960	// cond: isU16Bit(c)
4961	// result: (InvertFlags (CMPUconst y [c]))
4962	for {
4963		if v_0.Op != OpPPC64MOVDconst {
4964			break
4965		}
4966		c := auxIntToInt64(v_0.AuxInt)
4967		y := v_1
4968		if !(isU16Bit(c)) {
4969			break
4970		}
4971		v.reset(OpPPC64InvertFlags)
4972		v0 := b.NewValue0(v.Pos, OpPPC64CMPUconst, types.TypeFlags)
4973		v0.AuxInt = int64ToAuxInt(c)
4974		v0.AddArg(y)
4975		v.AddArg(v0)
4976		return true
4977	}
4978	// match: (CMPU x y)
4979	// cond: canonLessThan(x,y)
4980	// result: (InvertFlags (CMPU y x))
4981	for {
4982		x := v_0
4983		y := v_1
4984		if !(canonLessThan(x, y)) {
4985			break
4986		}
4987		v.reset(OpPPC64InvertFlags)
4988		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
4989		v0.AddArg2(y, x)
4990		v.AddArg(v0)
4991		return true
4992	}
4993	return false
4994}
4995func rewriteValuePPC64_OpPPC64CMPUconst(v *Value) bool {
4996	v_0 := v.Args[0]
4997	// match: (CMPUconst [d] (ANDconst z [c]))
4998	// cond: uint64(d) > uint64(c)
4999	// result: (FlagLT)
5000	for {
5001		d := auxIntToInt64(v.AuxInt)
5002		if v_0.Op != OpPPC64ANDconst {
5003			break
5004		}
5005		c := auxIntToInt64(v_0.AuxInt)
5006		if !(uint64(d) > uint64(c)) {
5007			break
5008		}
5009		v.reset(OpPPC64FlagLT)
5010		return true
5011	}
5012	// match: (CMPUconst (MOVDconst [x]) [y])
5013	// cond: x==y
5014	// result: (FlagEQ)
5015	for {
5016		y := auxIntToInt64(v.AuxInt)
5017		if v_0.Op != OpPPC64MOVDconst {
5018			break
5019		}
5020		x := auxIntToInt64(v_0.AuxInt)
5021		if !(x == y) {
5022			break
5023		}
5024		v.reset(OpPPC64FlagEQ)
5025		return true
5026	}
5027	// match: (CMPUconst (MOVDconst [x]) [y])
5028	// cond: uint64(x)<uint64(y)
5029	// result: (FlagLT)
5030	for {
5031		y := auxIntToInt64(v.AuxInt)
5032		if v_0.Op != OpPPC64MOVDconst {
5033			break
5034		}
5035		x := auxIntToInt64(v_0.AuxInt)
5036		if !(uint64(x) < uint64(y)) {
5037			break
5038		}
5039		v.reset(OpPPC64FlagLT)
5040		return true
5041	}
5042	// match: (CMPUconst (MOVDconst [x]) [y])
5043	// cond: uint64(x)>uint64(y)
5044	// result: (FlagGT)
5045	for {
5046		y := auxIntToInt64(v.AuxInt)
5047		if v_0.Op != OpPPC64MOVDconst {
5048			break
5049		}
5050		x := auxIntToInt64(v_0.AuxInt)
5051		if !(uint64(x) > uint64(y)) {
5052			break
5053		}
5054		v.reset(OpPPC64FlagGT)
5055		return true
5056	}
5057	// match: (CMPUconst [0] a:(ANDconst [n] z))
5058	// result: (CMPconst [0] a)
5059	for {
5060		if auxIntToInt64(v.AuxInt) != 0 {
5061			break
5062		}
5063		a := v_0
5064		if a.Op != OpPPC64ANDconst {
5065			break
5066		}
5067		v.reset(OpPPC64CMPconst)
5068		v.AuxInt = int64ToAuxInt(0)
5069		v.AddArg(a)
5070		return true
5071	}
5072	return false
5073}
5074func rewriteValuePPC64_OpPPC64CMPW(v *Value) bool {
5075	v_1 := v.Args[1]
5076	v_0 := v.Args[0]
5077	b := v.Block
5078	// match: (CMPW x (MOVWreg y))
5079	// result: (CMPW x y)
5080	for {
5081		x := v_0
5082		if v_1.Op != OpPPC64MOVWreg {
5083			break
5084		}
5085		y := v_1.Args[0]
5086		v.reset(OpPPC64CMPW)
5087		v.AddArg2(x, y)
5088		return true
5089	}
5090	// match: (CMPW (MOVWreg x) y)
5091	// result: (CMPW x y)
5092	for {
5093		if v_0.Op != OpPPC64MOVWreg {
5094			break
5095		}
5096		x := v_0.Args[0]
5097		y := v_1
5098		v.reset(OpPPC64CMPW)
5099		v.AddArg2(x, y)
5100		return true
5101	}
5102	// match: (CMPW x (MOVDconst [c]))
5103	// cond: is16Bit(c)
5104	// result: (CMPWconst x [int32(c)])
5105	for {
5106		x := v_0
5107		if v_1.Op != OpPPC64MOVDconst {
5108			break
5109		}
5110		c := auxIntToInt64(v_1.AuxInt)
5111		if !(is16Bit(c)) {
5112			break
5113		}
5114		v.reset(OpPPC64CMPWconst)
5115		v.AuxInt = int32ToAuxInt(int32(c))
5116		v.AddArg(x)
5117		return true
5118	}
5119	// match: (CMPW (MOVDconst [c]) y)
5120	// cond: is16Bit(c)
5121	// result: (InvertFlags (CMPWconst y [int32(c)]))
5122	for {
5123		if v_0.Op != OpPPC64MOVDconst {
5124			break
5125		}
5126		c := auxIntToInt64(v_0.AuxInt)
5127		y := v_1
5128		if !(is16Bit(c)) {
5129			break
5130		}
5131		v.reset(OpPPC64InvertFlags)
5132		v0 := b.NewValue0(v.Pos, OpPPC64CMPWconst, types.TypeFlags)
5133		v0.AuxInt = int32ToAuxInt(int32(c))
5134		v0.AddArg(y)
5135		v.AddArg(v0)
5136		return true
5137	}
5138	// match: (CMPW x y)
5139	// cond: canonLessThan(x,y)
5140	// result: (InvertFlags (CMPW y x))
5141	for {
5142		x := v_0
5143		y := v_1
5144		if !(canonLessThan(x, y)) {
5145			break
5146		}
5147		v.reset(OpPPC64InvertFlags)
5148		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
5149		v0.AddArg2(y, x)
5150		v.AddArg(v0)
5151		return true
5152	}
5153	return false
5154}
5155func rewriteValuePPC64_OpPPC64CMPWU(v *Value) bool {
5156	v_1 := v.Args[1]
5157	v_0 := v.Args[0]
5158	b := v.Block
5159	// match: (CMPWU x (MOVWZreg y))
5160	// result: (CMPWU x y)
5161	for {
5162		x := v_0
5163		if v_1.Op != OpPPC64MOVWZreg {
5164			break
5165		}
5166		y := v_1.Args[0]
5167		v.reset(OpPPC64CMPWU)
5168		v.AddArg2(x, y)
5169		return true
5170	}
5171	// match: (CMPWU (MOVWZreg x) y)
5172	// result: (CMPWU x y)
5173	for {
5174		if v_0.Op != OpPPC64MOVWZreg {
5175			break
5176		}
5177		x := v_0.Args[0]
5178		y := v_1
5179		v.reset(OpPPC64CMPWU)
5180		v.AddArg2(x, y)
5181		return true
5182	}
5183	// match: (CMPWU x (MOVDconst [c]))
5184	// cond: isU16Bit(c)
5185	// result: (CMPWUconst x [int32(c)])
5186	for {
5187		x := v_0
5188		if v_1.Op != OpPPC64MOVDconst {
5189			break
5190		}
5191		c := auxIntToInt64(v_1.AuxInt)
5192		if !(isU16Bit(c)) {
5193			break
5194		}
5195		v.reset(OpPPC64CMPWUconst)
5196		v.AuxInt = int32ToAuxInt(int32(c))
5197		v.AddArg(x)
5198		return true
5199	}
5200	// match: (CMPWU (MOVDconst [c]) y)
5201	// cond: isU16Bit(c)
5202	// result: (InvertFlags (CMPWUconst y [int32(c)]))
5203	for {
5204		if v_0.Op != OpPPC64MOVDconst {
5205			break
5206		}
5207		c := auxIntToInt64(v_0.AuxInt)
5208		y := v_1
5209		if !(isU16Bit(c)) {
5210			break
5211		}
5212		v.reset(OpPPC64InvertFlags)
5213		v0 := b.NewValue0(v.Pos, OpPPC64CMPWUconst, types.TypeFlags)
5214		v0.AuxInt = int32ToAuxInt(int32(c))
5215		v0.AddArg(y)
5216		v.AddArg(v0)
5217		return true
5218	}
5219	// match: (CMPWU x y)
5220	// cond: canonLessThan(x,y)
5221	// result: (InvertFlags (CMPWU y x))
5222	for {
5223		x := v_0
5224		y := v_1
5225		if !(canonLessThan(x, y)) {
5226			break
5227		}
5228		v.reset(OpPPC64InvertFlags)
5229		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
5230		v0.AddArg2(y, x)
5231		v.AddArg(v0)
5232		return true
5233	}
5234	return false
5235}
5236func rewriteValuePPC64_OpPPC64CMPWUconst(v *Value) bool {
5237	v_0 := v.Args[0]
5238	// match: (CMPWUconst [d] (ANDconst z [c]))
5239	// cond: uint64(d) > uint64(c)
5240	// result: (FlagLT)
5241	for {
5242		d := auxIntToInt32(v.AuxInt)
5243		if v_0.Op != OpPPC64ANDconst {
5244			break
5245		}
5246		c := auxIntToInt64(v_0.AuxInt)
5247		if !(uint64(d) > uint64(c)) {
5248			break
5249		}
5250		v.reset(OpPPC64FlagLT)
5251		return true
5252	}
5253	// match: (CMPWUconst (MOVDconst [x]) [y])
5254	// cond: int32(x)==int32(y)
5255	// result: (FlagEQ)
5256	for {
5257		y := auxIntToInt32(v.AuxInt)
5258		if v_0.Op != OpPPC64MOVDconst {
5259			break
5260		}
5261		x := auxIntToInt64(v_0.AuxInt)
5262		if !(int32(x) == int32(y)) {
5263			break
5264		}
5265		v.reset(OpPPC64FlagEQ)
5266		return true
5267	}
5268	// match: (CMPWUconst (MOVDconst [x]) [y])
5269	// cond: uint32(x)<uint32(y)
5270	// result: (FlagLT)
5271	for {
5272		y := auxIntToInt32(v.AuxInt)
5273		if v_0.Op != OpPPC64MOVDconst {
5274			break
5275		}
5276		x := auxIntToInt64(v_0.AuxInt)
5277		if !(uint32(x) < uint32(y)) {
5278			break
5279		}
5280		v.reset(OpPPC64FlagLT)
5281		return true
5282	}
5283	// match: (CMPWUconst (MOVDconst [x]) [y])
5284	// cond: uint32(x)>uint32(y)
5285	// result: (FlagGT)
5286	for {
5287		y := auxIntToInt32(v.AuxInt)
5288		if v_0.Op != OpPPC64MOVDconst {
5289			break
5290		}
5291		x := auxIntToInt64(v_0.AuxInt)
5292		if !(uint32(x) > uint32(y)) {
5293			break
5294		}
5295		v.reset(OpPPC64FlagGT)
5296		return true
5297	}
5298	// match: (CMPWUconst [0] a:(ANDconst [n] z))
5299	// result: (CMPconst [0] a)
5300	for {
5301		if auxIntToInt32(v.AuxInt) != 0 {
5302			break
5303		}
5304		a := v_0
5305		if a.Op != OpPPC64ANDconst {
5306			break
5307		}
5308		v.reset(OpPPC64CMPconst)
5309		v.AuxInt = int64ToAuxInt(0)
5310		v.AddArg(a)
5311		return true
5312	}
5313	return false
5314}
5315func rewriteValuePPC64_OpPPC64CMPWconst(v *Value) bool {
5316	v_0 := v.Args[0]
5317	// match: (CMPWconst (MOVDconst [x]) [y])
5318	// cond: int32(x)==int32(y)
5319	// result: (FlagEQ)
5320	for {
5321		y := auxIntToInt32(v.AuxInt)
5322		if v_0.Op != OpPPC64MOVDconst {
5323			break
5324		}
5325		x := auxIntToInt64(v_0.AuxInt)
5326		if !(int32(x) == int32(y)) {
5327			break
5328		}
5329		v.reset(OpPPC64FlagEQ)
5330		return true
5331	}
5332	// match: (CMPWconst (MOVDconst [x]) [y])
5333	// cond: int32(x)<int32(y)
5334	// result: (FlagLT)
5335	for {
5336		y := auxIntToInt32(v.AuxInt)
5337		if v_0.Op != OpPPC64MOVDconst {
5338			break
5339		}
5340		x := auxIntToInt64(v_0.AuxInt)
5341		if !(int32(x) < int32(y)) {
5342			break
5343		}
5344		v.reset(OpPPC64FlagLT)
5345		return true
5346	}
5347	// match: (CMPWconst (MOVDconst [x]) [y])
5348	// cond: int32(x)>int32(y)
5349	// result: (FlagGT)
5350	for {
5351		y := auxIntToInt32(v.AuxInt)
5352		if v_0.Op != OpPPC64MOVDconst {
5353			break
5354		}
5355		x := auxIntToInt64(v_0.AuxInt)
5356		if !(int32(x) > int32(y)) {
5357			break
5358		}
5359		v.reset(OpPPC64FlagGT)
5360		return true
5361	}
5362	// match: (CMPWconst [0] a:(ANDconst [n] z))
5363	// result: (CMPconst [0] a)
5364	for {
5365		if auxIntToInt32(v.AuxInt) != 0 {
5366			break
5367		}
5368		a := v_0
5369		if a.Op != OpPPC64ANDconst {
5370			break
5371		}
5372		v.reset(OpPPC64CMPconst)
5373		v.AuxInt = int64ToAuxInt(0)
5374		v.AddArg(a)
5375		return true
5376	}
5377	return false
5378}
5379func rewriteValuePPC64_OpPPC64CMPconst(v *Value) bool {
5380	v_0 := v.Args[0]
5381	// match: (CMPconst (MOVDconst [x]) [y])
5382	// cond: x==y
5383	// result: (FlagEQ)
5384	for {
5385		y := auxIntToInt64(v.AuxInt)
5386		if v_0.Op != OpPPC64MOVDconst {
5387			break
5388		}
5389		x := auxIntToInt64(v_0.AuxInt)
5390		if !(x == y) {
5391			break
5392		}
5393		v.reset(OpPPC64FlagEQ)
5394		return true
5395	}
5396	// match: (CMPconst (MOVDconst [x]) [y])
5397	// cond: x<y
5398	// result: (FlagLT)
5399	for {
5400		y := auxIntToInt64(v.AuxInt)
5401		if v_0.Op != OpPPC64MOVDconst {
5402			break
5403		}
5404		x := auxIntToInt64(v_0.AuxInt)
5405		if !(x < y) {
5406			break
5407		}
5408		v.reset(OpPPC64FlagLT)
5409		return true
5410	}
5411	// match: (CMPconst (MOVDconst [x]) [y])
5412	// cond: x>y
5413	// result: (FlagGT)
5414	for {
5415		y := auxIntToInt64(v.AuxInt)
5416		if v_0.Op != OpPPC64MOVDconst {
5417			break
5418		}
5419		x := auxIntToInt64(v_0.AuxInt)
5420		if !(x > y) {
5421			break
5422		}
5423		v.reset(OpPPC64FlagGT)
5424		return true
5425	}
5426	return false
5427}
5428func rewriteValuePPC64_OpPPC64Equal(v *Value) bool {
5429	v_0 := v.Args[0]
5430	// match: (Equal (FlagEQ))
5431	// result: (MOVDconst [1])
5432	for {
5433		if v_0.Op != OpPPC64FlagEQ {
5434			break
5435		}
5436		v.reset(OpPPC64MOVDconst)
5437		v.AuxInt = int64ToAuxInt(1)
5438		return true
5439	}
5440	// match: (Equal (FlagLT))
5441	// result: (MOVDconst [0])
5442	for {
5443		if v_0.Op != OpPPC64FlagLT {
5444			break
5445		}
5446		v.reset(OpPPC64MOVDconst)
5447		v.AuxInt = int64ToAuxInt(0)
5448		return true
5449	}
5450	// match: (Equal (FlagGT))
5451	// result: (MOVDconst [0])
5452	for {
5453		if v_0.Op != OpPPC64FlagGT {
5454			break
5455		}
5456		v.reset(OpPPC64MOVDconst)
5457		v.AuxInt = int64ToAuxInt(0)
5458		return true
5459	}
5460	// match: (Equal (InvertFlags x))
5461	// result: (Equal x)
5462	for {
5463		if v_0.Op != OpPPC64InvertFlags {
5464			break
5465		}
5466		x := v_0.Args[0]
5467		v.reset(OpPPC64Equal)
5468		v.AddArg(x)
5469		return true
5470	}
5471	// match: (Equal cmp)
5472	// result: (SETBC [2] cmp)
5473	for {
5474		cmp := v_0
5475		v.reset(OpPPC64SETBC)
5476		v.AuxInt = int32ToAuxInt(2)
5477		v.AddArg(cmp)
5478		return true
5479	}
5480}
5481func rewriteValuePPC64_OpPPC64FABS(v *Value) bool {
5482	v_0 := v.Args[0]
5483	// match: (FABS (FMOVDconst [x]))
5484	// result: (FMOVDconst [math.Abs(x)])
5485	for {
5486		if v_0.Op != OpPPC64FMOVDconst {
5487			break
5488		}
5489		x := auxIntToFloat64(v_0.AuxInt)
5490		v.reset(OpPPC64FMOVDconst)
5491		v.AuxInt = float64ToAuxInt(math.Abs(x))
5492		return true
5493	}
5494	return false
5495}
5496func rewriteValuePPC64_OpPPC64FADD(v *Value) bool {
5497	v_1 := v.Args[1]
5498	v_0 := v.Args[0]
5499	// match: (FADD (FMUL x y) z)
5500	// cond: x.Block.Func.useFMA(v)
5501	// result: (FMADD x y z)
5502	for {
5503		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
5504			if v_0.Op != OpPPC64FMUL {
5505				continue
5506			}
5507			_ = v_0.Args[1]
5508			v_0_0 := v_0.Args[0]
5509			v_0_1 := v_0.Args[1]
5510			for _i1 := 0; _i1 <= 1; _i1, v_0_0, v_0_1 = _i1+1, v_0_1, v_0_0 {
5511				x := v_0_0
5512				y := v_0_1
5513				z := v_1
5514				if !(x.Block.Func.useFMA(v)) {
5515					continue
5516				}
5517				v.reset(OpPPC64FMADD)
5518				v.AddArg3(x, y, z)
5519				return true
5520			}
5521		}
5522		break
5523	}
5524	return false
5525}
5526func rewriteValuePPC64_OpPPC64FADDS(v *Value) bool {
5527	v_1 := v.Args[1]
5528	v_0 := v.Args[0]
5529	// match: (FADDS (FMULS x y) z)
5530	// cond: x.Block.Func.useFMA(v)
5531	// result: (FMADDS x y z)
5532	for {
5533		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
5534			if v_0.Op != OpPPC64FMULS {
5535				continue
5536			}
5537			_ = v_0.Args[1]
5538			v_0_0 := v_0.Args[0]
5539			v_0_1 := v_0.Args[1]
5540			for _i1 := 0; _i1 <= 1; _i1, v_0_0, v_0_1 = _i1+1, v_0_1, v_0_0 {
5541				x := v_0_0
5542				y := v_0_1
5543				z := v_1
5544				if !(x.Block.Func.useFMA(v)) {
5545					continue
5546				}
5547				v.reset(OpPPC64FMADDS)
5548				v.AddArg3(x, y, z)
5549				return true
5550			}
5551		}
5552		break
5553	}
5554	return false
5555}
5556func rewriteValuePPC64_OpPPC64FCEIL(v *Value) bool {
5557	v_0 := v.Args[0]
5558	// match: (FCEIL (FMOVDconst [x]))
5559	// result: (FMOVDconst [math.Ceil(x)])
5560	for {
5561		if v_0.Op != OpPPC64FMOVDconst {
5562			break
5563		}
5564		x := auxIntToFloat64(v_0.AuxInt)
5565		v.reset(OpPPC64FMOVDconst)
5566		v.AuxInt = float64ToAuxInt(math.Ceil(x))
5567		return true
5568	}
5569	return false
5570}
5571func rewriteValuePPC64_OpPPC64FFLOOR(v *Value) bool {
5572	v_0 := v.Args[0]
5573	// match: (FFLOOR (FMOVDconst [x]))
5574	// result: (FMOVDconst [math.Floor(x)])
5575	for {
5576		if v_0.Op != OpPPC64FMOVDconst {
5577			break
5578		}
5579		x := auxIntToFloat64(v_0.AuxInt)
5580		v.reset(OpPPC64FMOVDconst)
5581		v.AuxInt = float64ToAuxInt(math.Floor(x))
5582		return true
5583	}
5584	return false
5585}
5586func rewriteValuePPC64_OpPPC64FGreaterEqual(v *Value) bool {
5587	v_0 := v.Args[0]
5588	b := v.Block
5589	typ := &b.Func.Config.Types
5590	// match: (FGreaterEqual cmp)
5591	// result: (OR (SETBC [2] cmp) (SETBC [1] cmp))
5592	for {
5593		cmp := v_0
5594		v.reset(OpPPC64OR)
5595		v0 := b.NewValue0(v.Pos, OpPPC64SETBC, typ.Int32)
5596		v0.AuxInt = int32ToAuxInt(2)
5597		v0.AddArg(cmp)
5598		v1 := b.NewValue0(v.Pos, OpPPC64SETBC, typ.Int32)
5599		v1.AuxInt = int32ToAuxInt(1)
5600		v1.AddArg(cmp)
5601		v.AddArg2(v0, v1)
5602		return true
5603	}
5604}
5605func rewriteValuePPC64_OpPPC64FGreaterThan(v *Value) bool {
5606	v_0 := v.Args[0]
5607	// match: (FGreaterThan cmp)
5608	// result: (SETBC [1] cmp)
5609	for {
5610		cmp := v_0
5611		v.reset(OpPPC64SETBC)
5612		v.AuxInt = int32ToAuxInt(1)
5613		v.AddArg(cmp)
5614		return true
5615	}
5616}
5617func rewriteValuePPC64_OpPPC64FLessEqual(v *Value) bool {
5618	v_0 := v.Args[0]
5619	b := v.Block
5620	typ := &b.Func.Config.Types
5621	// match: (FLessEqual cmp)
5622	// result: (OR (SETBC [2] cmp) (SETBC [0] cmp))
5623	for {
5624		cmp := v_0
5625		v.reset(OpPPC64OR)
5626		v0 := b.NewValue0(v.Pos, OpPPC64SETBC, typ.Int32)
5627		v0.AuxInt = int32ToAuxInt(2)
5628		v0.AddArg(cmp)
5629		v1 := b.NewValue0(v.Pos, OpPPC64SETBC, typ.Int32)
5630		v1.AuxInt = int32ToAuxInt(0)
5631		v1.AddArg(cmp)
5632		v.AddArg2(v0, v1)
5633		return true
5634	}
5635}
5636func rewriteValuePPC64_OpPPC64FLessThan(v *Value) bool {
5637	v_0 := v.Args[0]
5638	// match: (FLessThan cmp)
5639	// result: (SETBC [0] cmp)
5640	for {
5641		cmp := v_0
5642		v.reset(OpPPC64SETBC)
5643		v.AuxInt = int32ToAuxInt(0)
5644		v.AddArg(cmp)
5645		return true
5646	}
5647}
5648func rewriteValuePPC64_OpPPC64FMOVDload(v *Value) bool {
5649	v_1 := v.Args[1]
5650	v_0 := v.Args[0]
5651	// match: (FMOVDload [off] {sym} ptr (MOVDstore [off] {sym} ptr x _))
5652	// result: (MTVSRD x)
5653	for {
5654		off := auxIntToInt32(v.AuxInt)
5655		sym := auxToSym(v.Aux)
5656		ptr := v_0
5657		if v_1.Op != OpPPC64MOVDstore || auxIntToInt32(v_1.AuxInt) != off || auxToSym(v_1.Aux) != sym {
5658			break
5659		}
5660		x := v_1.Args[1]
5661		if ptr != v_1.Args[0] {
5662			break
5663		}
5664		v.reset(OpPPC64MTVSRD)
5665		v.AddArg(x)
5666		return true
5667	}
5668	// match: (FMOVDload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
5669	// cond: canMergeSym(sym1,sym2) && ((is16Bit(int64(off1+off2)) && (ptr.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))
5670	// result: (FMOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
5671	for {
5672		off1 := auxIntToInt32(v.AuxInt)
5673		sym1 := auxToSym(v.Aux)
5674		p := v_0
5675		if p.Op != OpPPC64MOVDaddr {
5676			break
5677		}
5678		off2 := auxIntToInt32(p.AuxInt)
5679		sym2 := auxToSym(p.Aux)
5680		ptr := p.Args[0]
5681		mem := v_1
5682		if !(canMergeSym(sym1, sym2) && ((is16Bit(int64(off1+off2)) && (ptr.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))) {
5683			break
5684		}
5685		v.reset(OpPPC64FMOVDload)
5686		v.AuxInt = int32ToAuxInt(off1 + off2)
5687		v.Aux = symToAux(mergeSym(sym1, sym2))
5688		v.AddArg2(ptr, mem)
5689		return true
5690	}
5691	// match: (FMOVDload [off1] {sym} (ADDconst [off2] ptr) mem)
5692	// cond: (is16Bit(int64(off1)+off2) || (supportsPPC64PCRel() && is32Bit(int64(off1)+off2)))
5693	// result: (FMOVDload [off1+int32(off2)] {sym} ptr mem)
5694	for {
5695		off1 := auxIntToInt32(v.AuxInt)
5696		sym := auxToSym(v.Aux)
5697		if v_0.Op != OpPPC64ADDconst {
5698			break
5699		}
5700		off2 := auxIntToInt64(v_0.AuxInt)
5701		ptr := v_0.Args[0]
5702		mem := v_1
5703		if !(is16Bit(int64(off1)+off2) || (supportsPPC64PCRel() && is32Bit(int64(off1)+off2))) {
5704			break
5705		}
5706		v.reset(OpPPC64FMOVDload)
5707		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
5708		v.Aux = symToAux(sym)
5709		v.AddArg2(ptr, mem)
5710		return true
5711	}
5712	return false
5713}
5714func rewriteValuePPC64_OpPPC64FMOVDstore(v *Value) bool {
5715	v_2 := v.Args[2]
5716	v_1 := v.Args[1]
5717	v_0 := v.Args[0]
5718	// match: (FMOVDstore [off] {sym} ptr (MTVSRD x) mem)
5719	// result: (MOVDstore [off] {sym} ptr x mem)
5720	for {
5721		off := auxIntToInt32(v.AuxInt)
5722		sym := auxToSym(v.Aux)
5723		ptr := v_0
5724		if v_1.Op != OpPPC64MTVSRD {
5725			break
5726		}
5727		x := v_1.Args[0]
5728		mem := v_2
5729		v.reset(OpPPC64MOVDstore)
5730		v.AuxInt = int32ToAuxInt(off)
5731		v.Aux = symToAux(sym)
5732		v.AddArg3(ptr, x, mem)
5733		return true
5734	}
5735	// match: (FMOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem)
5736	// cond: (is16Bit(int64(off1)+off2) || (supportsPPC64PCRel() && is32Bit(int64(off1)+off2)))
5737	// result: (FMOVDstore [off1+int32(off2)] {sym} ptr val mem)
5738	for {
5739		off1 := auxIntToInt32(v.AuxInt)
5740		sym := auxToSym(v.Aux)
5741		if v_0.Op != OpPPC64ADDconst {
5742			break
5743		}
5744		off2 := auxIntToInt64(v_0.AuxInt)
5745		ptr := v_0.Args[0]
5746		val := v_1
5747		mem := v_2
5748		if !(is16Bit(int64(off1)+off2) || (supportsPPC64PCRel() && is32Bit(int64(off1)+off2))) {
5749			break
5750		}
5751		v.reset(OpPPC64FMOVDstore)
5752		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
5753		v.Aux = symToAux(sym)
5754		v.AddArg3(ptr, val, mem)
5755		return true
5756	}
5757	// match: (FMOVDstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
5758	// cond: canMergeSym(sym1,sym2) && ((is16Bit(int64(off1+off2)) && (ptr.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))
5759	// result: (FMOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
5760	for {
5761		off1 := auxIntToInt32(v.AuxInt)
5762		sym1 := auxToSym(v.Aux)
5763		p := v_0
5764		if p.Op != OpPPC64MOVDaddr {
5765			break
5766		}
5767		off2 := auxIntToInt32(p.AuxInt)
5768		sym2 := auxToSym(p.Aux)
5769		ptr := p.Args[0]
5770		val := v_1
5771		mem := v_2
5772		if !(canMergeSym(sym1, sym2) && ((is16Bit(int64(off1+off2)) && (ptr.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))) {
5773			break
5774		}
5775		v.reset(OpPPC64FMOVDstore)
5776		v.AuxInt = int32ToAuxInt(off1 + off2)
5777		v.Aux = symToAux(mergeSym(sym1, sym2))
5778		v.AddArg3(ptr, val, mem)
5779		return true
5780	}
5781	return false
5782}
5783func rewriteValuePPC64_OpPPC64FMOVSload(v *Value) bool {
5784	v_1 := v.Args[1]
5785	v_0 := v.Args[0]
5786	// match: (FMOVSload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
5787	// cond: canMergeSym(sym1,sym2) && ((is16Bit(int64(off1+off2)) && (ptr.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))
5788	// result: (FMOVSload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
5789	for {
5790		off1 := auxIntToInt32(v.AuxInt)
5791		sym1 := auxToSym(v.Aux)
5792		p := v_0
5793		if p.Op != OpPPC64MOVDaddr {
5794			break
5795		}
5796		off2 := auxIntToInt32(p.AuxInt)
5797		sym2 := auxToSym(p.Aux)
5798		ptr := p.Args[0]
5799		mem := v_1
5800		if !(canMergeSym(sym1, sym2) && ((is16Bit(int64(off1+off2)) && (ptr.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))) {
5801			break
5802		}
5803		v.reset(OpPPC64FMOVSload)
5804		v.AuxInt = int32ToAuxInt(off1 + off2)
5805		v.Aux = symToAux(mergeSym(sym1, sym2))
5806		v.AddArg2(ptr, mem)
5807		return true
5808	}
5809	// match: (FMOVSload [off1] {sym} (ADDconst [off2] ptr) mem)
5810	// cond: (is16Bit(int64(off1)+off2) || (supportsPPC64PCRel() && is32Bit(int64(off1)+off2)))
5811	// result: (FMOVSload [off1+int32(off2)] {sym} ptr mem)
5812	for {
5813		off1 := auxIntToInt32(v.AuxInt)
5814		sym := auxToSym(v.Aux)
5815		if v_0.Op != OpPPC64ADDconst {
5816			break
5817		}
5818		off2 := auxIntToInt64(v_0.AuxInt)
5819		ptr := v_0.Args[0]
5820		mem := v_1
5821		if !(is16Bit(int64(off1)+off2) || (supportsPPC64PCRel() && is32Bit(int64(off1)+off2))) {
5822			break
5823		}
5824		v.reset(OpPPC64FMOVSload)
5825		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
5826		v.Aux = symToAux(sym)
5827		v.AddArg2(ptr, mem)
5828		return true
5829	}
5830	return false
5831}
5832func rewriteValuePPC64_OpPPC64FMOVSstore(v *Value) bool {
5833	v_2 := v.Args[2]
5834	v_1 := v.Args[1]
5835	v_0 := v.Args[0]
5836	// match: (FMOVSstore [off1] {sym} (ADDconst [off2] ptr) val mem)
5837	// cond: (is16Bit(int64(off1)+off2) || (supportsPPC64PCRel() && is32Bit(int64(off1)+off2)))
5838	// result: (FMOVSstore [off1+int32(off2)] {sym} ptr val mem)
5839	for {
5840		off1 := auxIntToInt32(v.AuxInt)
5841		sym := auxToSym(v.Aux)
5842		if v_0.Op != OpPPC64ADDconst {
5843			break
5844		}
5845		off2 := auxIntToInt64(v_0.AuxInt)
5846		ptr := v_0.Args[0]
5847		val := v_1
5848		mem := v_2
5849		if !(is16Bit(int64(off1)+off2) || (supportsPPC64PCRel() && is32Bit(int64(off1)+off2))) {
5850			break
5851		}
5852		v.reset(OpPPC64FMOVSstore)
5853		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
5854		v.Aux = symToAux(sym)
5855		v.AddArg3(ptr, val, mem)
5856		return true
5857	}
5858	// match: (FMOVSstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
5859	// cond: canMergeSym(sym1,sym2) && ((is16Bit(int64(off1+off2)) && (ptr.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))
5860	// result: (FMOVSstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
5861	for {
5862		off1 := auxIntToInt32(v.AuxInt)
5863		sym1 := auxToSym(v.Aux)
5864		p := v_0
5865		if p.Op != OpPPC64MOVDaddr {
5866			break
5867		}
5868		off2 := auxIntToInt32(p.AuxInt)
5869		sym2 := auxToSym(p.Aux)
5870		ptr := p.Args[0]
5871		val := v_1
5872		mem := v_2
5873		if !(canMergeSym(sym1, sym2) && ((is16Bit(int64(off1+off2)) && (ptr.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))) {
5874			break
5875		}
5876		v.reset(OpPPC64FMOVSstore)
5877		v.AuxInt = int32ToAuxInt(off1 + off2)
5878		v.Aux = symToAux(mergeSym(sym1, sym2))
5879		v.AddArg3(ptr, val, mem)
5880		return true
5881	}
5882	return false
5883}
5884func rewriteValuePPC64_OpPPC64FNEG(v *Value) bool {
5885	v_0 := v.Args[0]
5886	// match: (FNEG (FABS x))
5887	// result: (FNABS x)
5888	for {
5889		if v_0.Op != OpPPC64FABS {
5890			break
5891		}
5892		x := v_0.Args[0]
5893		v.reset(OpPPC64FNABS)
5894		v.AddArg(x)
5895		return true
5896	}
5897	// match: (FNEG (FNABS x))
5898	// result: (FABS x)
5899	for {
5900		if v_0.Op != OpPPC64FNABS {
5901			break
5902		}
5903		x := v_0.Args[0]
5904		v.reset(OpPPC64FABS)
5905		v.AddArg(x)
5906		return true
5907	}
5908	return false
5909}
5910func rewriteValuePPC64_OpPPC64FSQRT(v *Value) bool {
5911	v_0 := v.Args[0]
5912	// match: (FSQRT (FMOVDconst [x]))
5913	// cond: x >= 0
5914	// result: (FMOVDconst [math.Sqrt(x)])
5915	for {
5916		if v_0.Op != OpPPC64FMOVDconst {
5917			break
5918		}
5919		x := auxIntToFloat64(v_0.AuxInt)
5920		if !(x >= 0) {
5921			break
5922		}
5923		v.reset(OpPPC64FMOVDconst)
5924		v.AuxInt = float64ToAuxInt(math.Sqrt(x))
5925		return true
5926	}
5927	return false
5928}
5929func rewriteValuePPC64_OpPPC64FSUB(v *Value) bool {
5930	v_1 := v.Args[1]
5931	v_0 := v.Args[0]
5932	// match: (FSUB (FMUL x y) z)
5933	// cond: x.Block.Func.useFMA(v)
5934	// result: (FMSUB x y z)
5935	for {
5936		if v_0.Op != OpPPC64FMUL {
5937			break
5938		}
5939		_ = v_0.Args[1]
5940		v_0_0 := v_0.Args[0]
5941		v_0_1 := v_0.Args[1]
5942		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
5943			x := v_0_0
5944			y := v_0_1
5945			z := v_1
5946			if !(x.Block.Func.useFMA(v)) {
5947				continue
5948			}
5949			v.reset(OpPPC64FMSUB)
5950			v.AddArg3(x, y, z)
5951			return true
5952		}
5953		break
5954	}
5955	return false
5956}
5957func rewriteValuePPC64_OpPPC64FSUBS(v *Value) bool {
5958	v_1 := v.Args[1]
5959	v_0 := v.Args[0]
5960	// match: (FSUBS (FMULS x y) z)
5961	// cond: x.Block.Func.useFMA(v)
5962	// result: (FMSUBS x y z)
5963	for {
5964		if v_0.Op != OpPPC64FMULS {
5965			break
5966		}
5967		_ = v_0.Args[1]
5968		v_0_0 := v_0.Args[0]
5969		v_0_1 := v_0.Args[1]
5970		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
5971			x := v_0_0
5972			y := v_0_1
5973			z := v_1
5974			if !(x.Block.Func.useFMA(v)) {
5975				continue
5976			}
5977			v.reset(OpPPC64FMSUBS)
5978			v.AddArg3(x, y, z)
5979			return true
5980		}
5981		break
5982	}
5983	return false
5984}
5985func rewriteValuePPC64_OpPPC64FTRUNC(v *Value) bool {
5986	v_0 := v.Args[0]
5987	// match: (FTRUNC (FMOVDconst [x]))
5988	// result: (FMOVDconst [math.Trunc(x)])
5989	for {
5990		if v_0.Op != OpPPC64FMOVDconst {
5991			break
5992		}
5993		x := auxIntToFloat64(v_0.AuxInt)
5994		v.reset(OpPPC64FMOVDconst)
5995		v.AuxInt = float64ToAuxInt(math.Trunc(x))
5996		return true
5997	}
5998	return false
5999}
6000func rewriteValuePPC64_OpPPC64GreaterEqual(v *Value) bool {
6001	v_0 := v.Args[0]
6002	// match: (GreaterEqual (FlagEQ))
6003	// result: (MOVDconst [1])
6004	for {
6005		if v_0.Op != OpPPC64FlagEQ {
6006			break
6007		}
6008		v.reset(OpPPC64MOVDconst)
6009		v.AuxInt = int64ToAuxInt(1)
6010		return true
6011	}
6012	// match: (GreaterEqual (FlagLT))
6013	// result: (MOVDconst [0])
6014	for {
6015		if v_0.Op != OpPPC64FlagLT {
6016			break
6017		}
6018		v.reset(OpPPC64MOVDconst)
6019		v.AuxInt = int64ToAuxInt(0)
6020		return true
6021	}
6022	// match: (GreaterEqual (FlagGT))
6023	// result: (MOVDconst [1])
6024	for {
6025		if v_0.Op != OpPPC64FlagGT {
6026			break
6027		}
6028		v.reset(OpPPC64MOVDconst)
6029		v.AuxInt = int64ToAuxInt(1)
6030		return true
6031	}
6032	// match: (GreaterEqual (InvertFlags x))
6033	// result: (LessEqual x)
6034	for {
6035		if v_0.Op != OpPPC64InvertFlags {
6036			break
6037		}
6038		x := v_0.Args[0]
6039		v.reset(OpPPC64LessEqual)
6040		v.AddArg(x)
6041		return true
6042	}
6043	// match: (GreaterEqual cmp)
6044	// result: (SETBCR [0] cmp)
6045	for {
6046		cmp := v_0
6047		v.reset(OpPPC64SETBCR)
6048		v.AuxInt = int32ToAuxInt(0)
6049		v.AddArg(cmp)
6050		return true
6051	}
6052}
6053func rewriteValuePPC64_OpPPC64GreaterThan(v *Value) bool {
6054	v_0 := v.Args[0]
6055	// match: (GreaterThan (FlagEQ))
6056	// result: (MOVDconst [0])
6057	for {
6058		if v_0.Op != OpPPC64FlagEQ {
6059			break
6060		}
6061		v.reset(OpPPC64MOVDconst)
6062		v.AuxInt = int64ToAuxInt(0)
6063		return true
6064	}
6065	// match: (GreaterThan (FlagLT))
6066	// result: (MOVDconst [0])
6067	for {
6068		if v_0.Op != OpPPC64FlagLT {
6069			break
6070		}
6071		v.reset(OpPPC64MOVDconst)
6072		v.AuxInt = int64ToAuxInt(0)
6073		return true
6074	}
6075	// match: (GreaterThan (FlagGT))
6076	// result: (MOVDconst [1])
6077	for {
6078		if v_0.Op != OpPPC64FlagGT {
6079			break
6080		}
6081		v.reset(OpPPC64MOVDconst)
6082		v.AuxInt = int64ToAuxInt(1)
6083		return true
6084	}
6085	// match: (GreaterThan (InvertFlags x))
6086	// result: (LessThan x)
6087	for {
6088		if v_0.Op != OpPPC64InvertFlags {
6089			break
6090		}
6091		x := v_0.Args[0]
6092		v.reset(OpPPC64LessThan)
6093		v.AddArg(x)
6094		return true
6095	}
6096	// match: (GreaterThan cmp)
6097	// result: (SETBC [1] cmp)
6098	for {
6099		cmp := v_0
6100		v.reset(OpPPC64SETBC)
6101		v.AuxInt = int32ToAuxInt(1)
6102		v.AddArg(cmp)
6103		return true
6104	}
6105}
6106func rewriteValuePPC64_OpPPC64ISEL(v *Value) bool {
6107	v_2 := v.Args[2]
6108	v_1 := v.Args[1]
6109	v_0 := v.Args[0]
6110	// match: (ISEL [6] x y (CMPconst [0] (ANDconst [1] (SETBC [c] cmp))))
6111	// result: (ISEL [c] x y cmp)
6112	for {
6113		if auxIntToInt32(v.AuxInt) != 6 {
6114			break
6115		}
6116		x := v_0
6117		y := v_1
6118		if v_2.Op != OpPPC64CMPconst || auxIntToInt64(v_2.AuxInt) != 0 {
6119			break
6120		}
6121		v_2_0 := v_2.Args[0]
6122		if v_2_0.Op != OpPPC64ANDconst || auxIntToInt64(v_2_0.AuxInt) != 1 {
6123			break
6124		}
6125		v_2_0_0 := v_2_0.Args[0]
6126		if v_2_0_0.Op != OpPPC64SETBC {
6127			break
6128		}
6129		c := auxIntToInt32(v_2_0_0.AuxInt)
6130		cmp := v_2_0_0.Args[0]
6131		v.reset(OpPPC64ISEL)
6132		v.AuxInt = int32ToAuxInt(c)
6133		v.AddArg3(x, y, cmp)
6134		return true
6135	}
6136	// match: (ISEL [6] x y (CMPconst [0] (SETBC [c] cmp)))
6137	// result: (ISEL [c] x y cmp)
6138	for {
6139		if auxIntToInt32(v.AuxInt) != 6 {
6140			break
6141		}
6142		x := v_0
6143		y := v_1
6144		if v_2.Op != OpPPC64CMPconst || auxIntToInt64(v_2.AuxInt) != 0 {
6145			break
6146		}
6147		v_2_0 := v_2.Args[0]
6148		if v_2_0.Op != OpPPC64SETBC {
6149			break
6150		}
6151		c := auxIntToInt32(v_2_0.AuxInt)
6152		cmp := v_2_0.Args[0]
6153		v.reset(OpPPC64ISEL)
6154		v.AuxInt = int32ToAuxInt(c)
6155		v.AddArg3(x, y, cmp)
6156		return true
6157	}
6158	// match: (ISEL [6] x y (CMPWconst [0] (SETBC [c] cmp)))
6159	// result: (ISEL [c] x y cmp)
6160	for {
6161		if auxIntToInt32(v.AuxInt) != 6 {
6162			break
6163		}
6164		x := v_0
6165		y := v_1
6166		if v_2.Op != OpPPC64CMPWconst || auxIntToInt32(v_2.AuxInt) != 0 {
6167			break
6168		}
6169		v_2_0 := v_2.Args[0]
6170		if v_2_0.Op != OpPPC64SETBC {
6171			break
6172		}
6173		c := auxIntToInt32(v_2_0.AuxInt)
6174		cmp := v_2_0.Args[0]
6175		v.reset(OpPPC64ISEL)
6176		v.AuxInt = int32ToAuxInt(c)
6177		v.AddArg3(x, y, cmp)
6178		return true
6179	}
6180	// match: (ISEL [6] x y (CMPconst [0] (SETBCR [c] cmp)))
6181	// result: (ISEL [c+4] x y cmp)
6182	for {
6183		if auxIntToInt32(v.AuxInt) != 6 {
6184			break
6185		}
6186		x := v_0
6187		y := v_1
6188		if v_2.Op != OpPPC64CMPconst || auxIntToInt64(v_2.AuxInt) != 0 {
6189			break
6190		}
6191		v_2_0 := v_2.Args[0]
6192		if v_2_0.Op != OpPPC64SETBCR {
6193			break
6194		}
6195		c := auxIntToInt32(v_2_0.AuxInt)
6196		cmp := v_2_0.Args[0]
6197		v.reset(OpPPC64ISEL)
6198		v.AuxInt = int32ToAuxInt(c + 4)
6199		v.AddArg3(x, y, cmp)
6200		return true
6201	}
6202	// match: (ISEL [6] x y (CMPWconst [0] (SETBCR [c] cmp)))
6203	// result: (ISEL [c+4] x y cmp)
6204	for {
6205		if auxIntToInt32(v.AuxInt) != 6 {
6206			break
6207		}
6208		x := v_0
6209		y := v_1
6210		if v_2.Op != OpPPC64CMPWconst || auxIntToInt32(v_2.AuxInt) != 0 {
6211			break
6212		}
6213		v_2_0 := v_2.Args[0]
6214		if v_2_0.Op != OpPPC64SETBCR {
6215			break
6216		}
6217		c := auxIntToInt32(v_2_0.AuxInt)
6218		cmp := v_2_0.Args[0]
6219		v.reset(OpPPC64ISEL)
6220		v.AuxInt = int32ToAuxInt(c + 4)
6221		v.AddArg3(x, y, cmp)
6222		return true
6223	}
6224	// match: (ISEL [2] x _ (FlagEQ))
6225	// result: x
6226	for {
6227		if auxIntToInt32(v.AuxInt) != 2 {
6228			break
6229		}
6230		x := v_0
6231		if v_2.Op != OpPPC64FlagEQ {
6232			break
6233		}
6234		v.copyOf(x)
6235		return true
6236	}
6237	// match: (ISEL [2] _ y (FlagLT))
6238	// result: y
6239	for {
6240		if auxIntToInt32(v.AuxInt) != 2 {
6241			break
6242		}
6243		y := v_1
6244		if v_2.Op != OpPPC64FlagLT {
6245			break
6246		}
6247		v.copyOf(y)
6248		return true
6249	}
6250	// match: (ISEL [2] _ y (FlagGT))
6251	// result: y
6252	for {
6253		if auxIntToInt32(v.AuxInt) != 2 {
6254			break
6255		}
6256		y := v_1
6257		if v_2.Op != OpPPC64FlagGT {
6258			break
6259		}
6260		v.copyOf(y)
6261		return true
6262	}
6263	// match: (ISEL [6] _ y (FlagEQ))
6264	// result: y
6265	for {
6266		if auxIntToInt32(v.AuxInt) != 6 {
6267			break
6268		}
6269		y := v_1
6270		if v_2.Op != OpPPC64FlagEQ {
6271			break
6272		}
6273		v.copyOf(y)
6274		return true
6275	}
6276	// match: (ISEL [6] x _ (FlagLT))
6277	// result: x
6278	for {
6279		if auxIntToInt32(v.AuxInt) != 6 {
6280			break
6281		}
6282		x := v_0
6283		if v_2.Op != OpPPC64FlagLT {
6284			break
6285		}
6286		v.copyOf(x)
6287		return true
6288	}
6289	// match: (ISEL [6] x _ (FlagGT))
6290	// result: x
6291	for {
6292		if auxIntToInt32(v.AuxInt) != 6 {
6293			break
6294		}
6295		x := v_0
6296		if v_2.Op != OpPPC64FlagGT {
6297			break
6298		}
6299		v.copyOf(x)
6300		return true
6301	}
6302	// match: (ISEL [0] _ y (FlagEQ))
6303	// result: y
6304	for {
6305		if auxIntToInt32(v.AuxInt) != 0 {
6306			break
6307		}
6308		y := v_1
6309		if v_2.Op != OpPPC64FlagEQ {
6310			break
6311		}
6312		v.copyOf(y)
6313		return true
6314	}
6315	// match: (ISEL [0] _ y (FlagGT))
6316	// result: y
6317	for {
6318		if auxIntToInt32(v.AuxInt) != 0 {
6319			break
6320		}
6321		y := v_1
6322		if v_2.Op != OpPPC64FlagGT {
6323			break
6324		}
6325		v.copyOf(y)
6326		return true
6327	}
6328	// match: (ISEL [0] x _ (FlagLT))
6329	// result: x
6330	for {
6331		if auxIntToInt32(v.AuxInt) != 0 {
6332			break
6333		}
6334		x := v_0
6335		if v_2.Op != OpPPC64FlagLT {
6336			break
6337		}
6338		v.copyOf(x)
6339		return true
6340	}
6341	// match: (ISEL [5] _ x (FlagEQ))
6342	// result: x
6343	for {
6344		if auxIntToInt32(v.AuxInt) != 5 {
6345			break
6346		}
6347		x := v_1
6348		if v_2.Op != OpPPC64FlagEQ {
6349			break
6350		}
6351		v.copyOf(x)
6352		return true
6353	}
6354	// match: (ISEL [5] _ x (FlagLT))
6355	// result: x
6356	for {
6357		if auxIntToInt32(v.AuxInt) != 5 {
6358			break
6359		}
6360		x := v_1
6361		if v_2.Op != OpPPC64FlagLT {
6362			break
6363		}
6364		v.copyOf(x)
6365		return true
6366	}
6367	// match: (ISEL [5] y _ (FlagGT))
6368	// result: y
6369	for {
6370		if auxIntToInt32(v.AuxInt) != 5 {
6371			break
6372		}
6373		y := v_0
6374		if v_2.Op != OpPPC64FlagGT {
6375			break
6376		}
6377		v.copyOf(y)
6378		return true
6379	}
6380	// match: (ISEL [1] _ y (FlagEQ))
6381	// result: y
6382	for {
6383		if auxIntToInt32(v.AuxInt) != 1 {
6384			break
6385		}
6386		y := v_1
6387		if v_2.Op != OpPPC64FlagEQ {
6388			break
6389		}
6390		v.copyOf(y)
6391		return true
6392	}
6393	// match: (ISEL [1] _ y (FlagLT))
6394	// result: y
6395	for {
6396		if auxIntToInt32(v.AuxInt) != 1 {
6397			break
6398		}
6399		y := v_1
6400		if v_2.Op != OpPPC64FlagLT {
6401			break
6402		}
6403		v.copyOf(y)
6404		return true
6405	}
6406	// match: (ISEL [1] x _ (FlagGT))
6407	// result: x
6408	for {
6409		if auxIntToInt32(v.AuxInt) != 1 {
6410			break
6411		}
6412		x := v_0
6413		if v_2.Op != OpPPC64FlagGT {
6414			break
6415		}
6416		v.copyOf(x)
6417		return true
6418	}
6419	// match: (ISEL [4] x _ (FlagEQ))
6420	// result: x
6421	for {
6422		if auxIntToInt32(v.AuxInt) != 4 {
6423			break
6424		}
6425		x := v_0
6426		if v_2.Op != OpPPC64FlagEQ {
6427			break
6428		}
6429		v.copyOf(x)
6430		return true
6431	}
6432	// match: (ISEL [4] x _ (FlagGT))
6433	// result: x
6434	for {
6435		if auxIntToInt32(v.AuxInt) != 4 {
6436			break
6437		}
6438		x := v_0
6439		if v_2.Op != OpPPC64FlagGT {
6440			break
6441		}
6442		v.copyOf(x)
6443		return true
6444	}
6445	// match: (ISEL [4] _ y (FlagLT))
6446	// result: y
6447	for {
6448		if auxIntToInt32(v.AuxInt) != 4 {
6449			break
6450		}
6451		y := v_1
6452		if v_2.Op != OpPPC64FlagLT {
6453			break
6454		}
6455		v.copyOf(y)
6456		return true
6457	}
6458	// match: (ISEL [n] x y (InvertFlags bool))
6459	// cond: n%4 == 0
6460	// result: (ISEL [n+1] x y bool)
6461	for {
6462		n := auxIntToInt32(v.AuxInt)
6463		x := v_0
6464		y := v_1
6465		if v_2.Op != OpPPC64InvertFlags {
6466			break
6467		}
6468		bool := v_2.Args[0]
6469		if !(n%4 == 0) {
6470			break
6471		}
6472		v.reset(OpPPC64ISEL)
6473		v.AuxInt = int32ToAuxInt(n + 1)
6474		v.AddArg3(x, y, bool)
6475		return true
6476	}
6477	// match: (ISEL [n] x y (InvertFlags bool))
6478	// cond: n%4 == 1
6479	// result: (ISEL [n-1] x y bool)
6480	for {
6481		n := auxIntToInt32(v.AuxInt)
6482		x := v_0
6483		y := v_1
6484		if v_2.Op != OpPPC64InvertFlags {
6485			break
6486		}
6487		bool := v_2.Args[0]
6488		if !(n%4 == 1) {
6489			break
6490		}
6491		v.reset(OpPPC64ISEL)
6492		v.AuxInt = int32ToAuxInt(n - 1)
6493		v.AddArg3(x, y, bool)
6494		return true
6495	}
6496	// match: (ISEL [n] x y (InvertFlags bool))
6497	// cond: n%4 == 2
6498	// result: (ISEL [n] x y bool)
6499	for {
6500		n := auxIntToInt32(v.AuxInt)
6501		x := v_0
6502		y := v_1
6503		if v_2.Op != OpPPC64InvertFlags {
6504			break
6505		}
6506		bool := v_2.Args[0]
6507		if !(n%4 == 2) {
6508			break
6509		}
6510		v.reset(OpPPC64ISEL)
6511		v.AuxInt = int32ToAuxInt(n)
6512		v.AddArg3(x, y, bool)
6513		return true
6514	}
6515	return false
6516}
6517func rewriteValuePPC64_OpPPC64LessEqual(v *Value) bool {
6518	v_0 := v.Args[0]
6519	// match: (LessEqual (FlagEQ))
6520	// result: (MOVDconst [1])
6521	for {
6522		if v_0.Op != OpPPC64FlagEQ {
6523			break
6524		}
6525		v.reset(OpPPC64MOVDconst)
6526		v.AuxInt = int64ToAuxInt(1)
6527		return true
6528	}
6529	// match: (LessEqual (FlagLT))
6530	// result: (MOVDconst [1])
6531	for {
6532		if v_0.Op != OpPPC64FlagLT {
6533			break
6534		}
6535		v.reset(OpPPC64MOVDconst)
6536		v.AuxInt = int64ToAuxInt(1)
6537		return true
6538	}
6539	// match: (LessEqual (FlagGT))
6540	// result: (MOVDconst [0])
6541	for {
6542		if v_0.Op != OpPPC64FlagGT {
6543			break
6544		}
6545		v.reset(OpPPC64MOVDconst)
6546		v.AuxInt = int64ToAuxInt(0)
6547		return true
6548	}
6549	// match: (LessEqual (InvertFlags x))
6550	// result: (GreaterEqual x)
6551	for {
6552		if v_0.Op != OpPPC64InvertFlags {
6553			break
6554		}
6555		x := v_0.Args[0]
6556		v.reset(OpPPC64GreaterEqual)
6557		v.AddArg(x)
6558		return true
6559	}
6560	// match: (LessEqual cmp)
6561	// result: (SETBCR [1] cmp)
6562	for {
6563		cmp := v_0
6564		v.reset(OpPPC64SETBCR)
6565		v.AuxInt = int32ToAuxInt(1)
6566		v.AddArg(cmp)
6567		return true
6568	}
6569}
6570func rewriteValuePPC64_OpPPC64LessThan(v *Value) bool {
6571	v_0 := v.Args[0]
6572	// match: (LessThan (FlagEQ))
6573	// result: (MOVDconst [0])
6574	for {
6575		if v_0.Op != OpPPC64FlagEQ {
6576			break
6577		}
6578		v.reset(OpPPC64MOVDconst)
6579		v.AuxInt = int64ToAuxInt(0)
6580		return true
6581	}
6582	// match: (LessThan (FlagLT))
6583	// result: (MOVDconst [1])
6584	for {
6585		if v_0.Op != OpPPC64FlagLT {
6586			break
6587		}
6588		v.reset(OpPPC64MOVDconst)
6589		v.AuxInt = int64ToAuxInt(1)
6590		return true
6591	}
6592	// match: (LessThan (FlagGT))
6593	// result: (MOVDconst [0])
6594	for {
6595		if v_0.Op != OpPPC64FlagGT {
6596			break
6597		}
6598		v.reset(OpPPC64MOVDconst)
6599		v.AuxInt = int64ToAuxInt(0)
6600		return true
6601	}
6602	// match: (LessThan (InvertFlags x))
6603	// result: (GreaterThan x)
6604	for {
6605		if v_0.Op != OpPPC64InvertFlags {
6606			break
6607		}
6608		x := v_0.Args[0]
6609		v.reset(OpPPC64GreaterThan)
6610		v.AddArg(x)
6611		return true
6612	}
6613	// match: (LessThan cmp)
6614	// result: (SETBC [0] cmp)
6615	for {
6616		cmp := v_0
6617		v.reset(OpPPC64SETBC)
6618		v.AuxInt = int32ToAuxInt(0)
6619		v.AddArg(cmp)
6620		return true
6621	}
6622}
6623func rewriteValuePPC64_OpPPC64MFVSRD(v *Value) bool {
6624	v_0 := v.Args[0]
6625	b := v.Block
6626	typ := &b.Func.Config.Types
6627	// match: (MFVSRD (FMOVDconst [c]))
6628	// result: (MOVDconst [int64(math.Float64bits(c))])
6629	for {
6630		if v_0.Op != OpPPC64FMOVDconst {
6631			break
6632		}
6633		c := auxIntToFloat64(v_0.AuxInt)
6634		v.reset(OpPPC64MOVDconst)
6635		v.AuxInt = int64ToAuxInt(int64(math.Float64bits(c)))
6636		return true
6637	}
6638	// match: (MFVSRD x:(FMOVDload [off] {sym} ptr mem))
6639	// cond: x.Uses == 1 && clobber(x)
6640	// result: @x.Block (MOVDload [off] {sym} ptr mem)
6641	for {
6642		x := v_0
6643		if x.Op != OpPPC64FMOVDload {
6644			break
6645		}
6646		off := auxIntToInt32(x.AuxInt)
6647		sym := auxToSym(x.Aux)
6648		mem := x.Args[1]
6649		ptr := x.Args[0]
6650		if !(x.Uses == 1 && clobber(x)) {
6651			break
6652		}
6653		b = x.Block
6654		v0 := b.NewValue0(x.Pos, OpPPC64MOVDload, typ.Int64)
6655		v.copyOf(v0)
6656		v0.AuxInt = int32ToAuxInt(off)
6657		v0.Aux = symToAux(sym)
6658		v0.AddArg2(ptr, mem)
6659		return true
6660	}
6661	return false
6662}
6663func rewriteValuePPC64_OpPPC64MOVBZload(v *Value) bool {
6664	v_1 := v.Args[1]
6665	v_0 := v.Args[0]
6666	// match: (MOVBZload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
6667	// cond: canMergeSym(sym1,sym2) && ((is16Bit(int64(off1+off2)) && (ptr.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))
6668	// result: (MOVBZload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
6669	for {
6670		off1 := auxIntToInt32(v.AuxInt)
6671		sym1 := auxToSym(v.Aux)
6672		p := v_0
6673		if p.Op != OpPPC64MOVDaddr {
6674			break
6675		}
6676		off2 := auxIntToInt32(p.AuxInt)
6677		sym2 := auxToSym(p.Aux)
6678		ptr := p.Args[0]
6679		mem := v_1
6680		if !(canMergeSym(sym1, sym2) && ((is16Bit(int64(off1+off2)) && (ptr.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))) {
6681			break
6682		}
6683		v.reset(OpPPC64MOVBZload)
6684		v.AuxInt = int32ToAuxInt(off1 + off2)
6685		v.Aux = symToAux(mergeSym(sym1, sym2))
6686		v.AddArg2(ptr, mem)
6687		return true
6688	}
6689	// match: (MOVBZload [off1] {sym} (ADDconst [off2] x) mem)
6690	// cond: (is16Bit(int64(off1)+off2) || (supportsPPC64PCRel() && is32Bit(int64(off1)+off2)))
6691	// result: (MOVBZload [off1+int32(off2)] {sym} x mem)
6692	for {
6693		off1 := auxIntToInt32(v.AuxInt)
6694		sym := auxToSym(v.Aux)
6695		if v_0.Op != OpPPC64ADDconst {
6696			break
6697		}
6698		off2 := auxIntToInt64(v_0.AuxInt)
6699		x := v_0.Args[0]
6700		mem := v_1
6701		if !(is16Bit(int64(off1)+off2) || (supportsPPC64PCRel() && is32Bit(int64(off1)+off2))) {
6702			break
6703		}
6704		v.reset(OpPPC64MOVBZload)
6705		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
6706		v.Aux = symToAux(sym)
6707		v.AddArg2(x, mem)
6708		return true
6709	}
6710	// match: (MOVBZload [0] {sym} p:(ADD ptr idx) mem)
6711	// cond: sym == nil && p.Uses == 1
6712	// result: (MOVBZloadidx ptr idx mem)
6713	for {
6714		if auxIntToInt32(v.AuxInt) != 0 {
6715			break
6716		}
6717		sym := auxToSym(v.Aux)
6718		p := v_0
6719		if p.Op != OpPPC64ADD {
6720			break
6721		}
6722		idx := p.Args[1]
6723		ptr := p.Args[0]
6724		mem := v_1
6725		if !(sym == nil && p.Uses == 1) {
6726			break
6727		}
6728		v.reset(OpPPC64MOVBZloadidx)
6729		v.AddArg3(ptr, idx, mem)
6730		return true
6731	}
6732	return false
6733}
6734func rewriteValuePPC64_OpPPC64MOVBZloadidx(v *Value) bool {
6735	v_2 := v.Args[2]
6736	v_1 := v.Args[1]
6737	v_0 := v.Args[0]
6738	// match: (MOVBZloadidx ptr (MOVDconst [c]) mem)
6739	// cond: (is16Bit(c) || (buildcfg.GOPPC64 >= 10 && is32Bit(c)))
6740	// result: (MOVBZload [int32(c)] ptr mem)
6741	for {
6742		ptr := v_0
6743		if v_1.Op != OpPPC64MOVDconst {
6744			break
6745		}
6746		c := auxIntToInt64(v_1.AuxInt)
6747		mem := v_2
6748		if !(is16Bit(c) || (buildcfg.GOPPC64 >= 10 && is32Bit(c))) {
6749			break
6750		}
6751		v.reset(OpPPC64MOVBZload)
6752		v.AuxInt = int32ToAuxInt(int32(c))
6753		v.AddArg2(ptr, mem)
6754		return true
6755	}
6756	// match: (MOVBZloadidx (MOVDconst [c]) ptr mem)
6757	// cond: (is16Bit(c) || (buildcfg.GOPPC64 >= 10 && is32Bit(c)))
6758	// result: (MOVBZload [int32(c)] ptr mem)
6759	for {
6760		if v_0.Op != OpPPC64MOVDconst {
6761			break
6762		}
6763		c := auxIntToInt64(v_0.AuxInt)
6764		ptr := v_1
6765		mem := v_2
6766		if !(is16Bit(c) || (buildcfg.GOPPC64 >= 10 && is32Bit(c))) {
6767			break
6768		}
6769		v.reset(OpPPC64MOVBZload)
6770		v.AuxInt = int32ToAuxInt(int32(c))
6771		v.AddArg2(ptr, mem)
6772		return true
6773	}
6774	return false
6775}
6776func rewriteValuePPC64_OpPPC64MOVBZreg(v *Value) bool {
6777	v_0 := v.Args[0]
6778	b := v.Block
6779	typ := &b.Func.Config.Types
6780	// match: (MOVBZreg y:(ANDconst [c] _))
6781	// cond: uint64(c) <= 0xFF
6782	// result: y
6783	for {
6784		y := v_0
6785		if y.Op != OpPPC64ANDconst {
6786			break
6787		}
6788		c := auxIntToInt64(y.AuxInt)
6789		if !(uint64(c) <= 0xFF) {
6790			break
6791		}
6792		v.copyOf(y)
6793		return true
6794	}
6795	// match: (MOVBZreg (SRWconst [c] (MOVBZreg x)))
6796	// result: (SRWconst [c] (MOVBZreg x))
6797	for {
6798		if v_0.Op != OpPPC64SRWconst {
6799			break
6800		}
6801		c := auxIntToInt64(v_0.AuxInt)
6802		v_0_0 := v_0.Args[0]
6803		if v_0_0.Op != OpPPC64MOVBZreg {
6804			break
6805		}
6806		x := v_0_0.Args[0]
6807		v.reset(OpPPC64SRWconst)
6808		v.AuxInt = int64ToAuxInt(c)
6809		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
6810		v0.AddArg(x)
6811		v.AddArg(v0)
6812		return true
6813	}
6814	// match: (MOVBZreg (SRWconst [c] x))
6815	// cond: sizeof(x.Type) == 8
6816	// result: (SRWconst [c] x)
6817	for {
6818		if v_0.Op != OpPPC64SRWconst {
6819			break
6820		}
6821		c := auxIntToInt64(v_0.AuxInt)
6822		x := v_0.Args[0]
6823		if !(sizeof(x.Type) == 8) {
6824			break
6825		}
6826		v.reset(OpPPC64SRWconst)
6827		v.AuxInt = int64ToAuxInt(c)
6828		v.AddArg(x)
6829		return true
6830	}
6831	// match: (MOVBZreg (SRDconst [c] x))
6832	// cond: c>=56
6833	// result: (SRDconst [c] x)
6834	for {
6835		if v_0.Op != OpPPC64SRDconst {
6836			break
6837		}
6838		c := auxIntToInt64(v_0.AuxInt)
6839		x := v_0.Args[0]
6840		if !(c >= 56) {
6841			break
6842		}
6843		v.reset(OpPPC64SRDconst)
6844		v.AuxInt = int64ToAuxInt(c)
6845		v.AddArg(x)
6846		return true
6847	}
6848	// match: (MOVBZreg (SRWconst [c] x))
6849	// cond: c>=24
6850	// result: (SRWconst [c] x)
6851	for {
6852		if v_0.Op != OpPPC64SRWconst {
6853			break
6854		}
6855		c := auxIntToInt64(v_0.AuxInt)
6856		x := v_0.Args[0]
6857		if !(c >= 24) {
6858			break
6859		}
6860		v.reset(OpPPC64SRWconst)
6861		v.AuxInt = int64ToAuxInt(c)
6862		v.AddArg(x)
6863		return true
6864	}
6865	// match: (MOVBZreg y:(MOVBZreg _))
6866	// result: y
6867	for {
6868		y := v_0
6869		if y.Op != OpPPC64MOVBZreg {
6870			break
6871		}
6872		v.copyOf(y)
6873		return true
6874	}
6875	// match: (MOVBZreg (MOVBreg x))
6876	// result: (MOVBZreg x)
6877	for {
6878		if v_0.Op != OpPPC64MOVBreg {
6879			break
6880		}
6881		x := v_0.Args[0]
6882		v.reset(OpPPC64MOVBZreg)
6883		v.AddArg(x)
6884		return true
6885	}
6886	// match: (MOVBZreg (SRWconst x [s]))
6887	// cond: mergePPC64AndSrwi(0xFF,s) != 0
6888	// result: (RLWINM [mergePPC64AndSrwi(0xFF,s)] x)
6889	for {
6890		if v_0.Op != OpPPC64SRWconst {
6891			break
6892		}
6893		s := auxIntToInt64(v_0.AuxInt)
6894		x := v_0.Args[0]
6895		if !(mergePPC64AndSrwi(0xFF, s) != 0) {
6896			break
6897		}
6898		v.reset(OpPPC64RLWINM)
6899		v.AuxInt = int64ToAuxInt(mergePPC64AndSrwi(0xFF, s))
6900		v.AddArg(x)
6901		return true
6902	}
6903	// match: (MOVBZreg (RLWINM [r] y))
6904	// cond: mergePPC64AndRlwinm(0xFF,r) != 0
6905	// result: (RLWINM [mergePPC64AndRlwinm(0xFF,r)] y)
6906	for {
6907		if v_0.Op != OpPPC64RLWINM {
6908			break
6909		}
6910		r := auxIntToInt64(v_0.AuxInt)
6911		y := v_0.Args[0]
6912		if !(mergePPC64AndRlwinm(0xFF, r) != 0) {
6913			break
6914		}
6915		v.reset(OpPPC64RLWINM)
6916		v.AuxInt = int64ToAuxInt(mergePPC64AndRlwinm(0xFF, r))
6917		v.AddArg(y)
6918		return true
6919	}
6920	// match: (MOVBZreg (OR <t> x (MOVWZreg y)))
6921	// result: (MOVBZreg (OR <t> x y))
6922	for {
6923		if v_0.Op != OpPPC64OR {
6924			break
6925		}
6926		t := v_0.Type
6927		_ = v_0.Args[1]
6928		v_0_0 := v_0.Args[0]
6929		v_0_1 := v_0.Args[1]
6930		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
6931			x := v_0_0
6932			if v_0_1.Op != OpPPC64MOVWZreg {
6933				continue
6934			}
6935			y := v_0_1.Args[0]
6936			v.reset(OpPPC64MOVBZreg)
6937			v0 := b.NewValue0(v.Pos, OpPPC64OR, t)
6938			v0.AddArg2(x, y)
6939			v.AddArg(v0)
6940			return true
6941		}
6942		break
6943	}
6944	// match: (MOVBZreg (XOR <t> x (MOVWZreg y)))
6945	// result: (MOVBZreg (XOR <t> x y))
6946	for {
6947		if v_0.Op != OpPPC64XOR {
6948			break
6949		}
6950		t := v_0.Type
6951		_ = v_0.Args[1]
6952		v_0_0 := v_0.Args[0]
6953		v_0_1 := v_0.Args[1]
6954		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
6955			x := v_0_0
6956			if v_0_1.Op != OpPPC64MOVWZreg {
6957				continue
6958			}
6959			y := v_0_1.Args[0]
6960			v.reset(OpPPC64MOVBZreg)
6961			v0 := b.NewValue0(v.Pos, OpPPC64XOR, t)
6962			v0.AddArg2(x, y)
6963			v.AddArg(v0)
6964			return true
6965		}
6966		break
6967	}
6968	// match: (MOVBZreg (AND <t> x (MOVWZreg y)))
6969	// result: (MOVBZreg (AND <t> x y))
6970	for {
6971		if v_0.Op != OpPPC64AND {
6972			break
6973		}
6974		t := v_0.Type
6975		_ = v_0.Args[1]
6976		v_0_0 := v_0.Args[0]
6977		v_0_1 := v_0.Args[1]
6978		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
6979			x := v_0_0
6980			if v_0_1.Op != OpPPC64MOVWZreg {
6981				continue
6982			}
6983			y := v_0_1.Args[0]
6984			v.reset(OpPPC64MOVBZreg)
6985			v0 := b.NewValue0(v.Pos, OpPPC64AND, t)
6986			v0.AddArg2(x, y)
6987			v.AddArg(v0)
6988			return true
6989		}
6990		break
6991	}
6992	// match: (MOVBZreg (OR <t> x (MOVHZreg y)))
6993	// result: (MOVBZreg (OR <t> x y))
6994	for {
6995		if v_0.Op != OpPPC64OR {
6996			break
6997		}
6998		t := v_0.Type
6999		_ = v_0.Args[1]
7000		v_0_0 := v_0.Args[0]
7001		v_0_1 := v_0.Args[1]
7002		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
7003			x := v_0_0
7004			if v_0_1.Op != OpPPC64MOVHZreg {
7005				continue
7006			}
7007			y := v_0_1.Args[0]
7008			v.reset(OpPPC64MOVBZreg)
7009			v0 := b.NewValue0(v.Pos, OpPPC64OR, t)
7010			v0.AddArg2(x, y)
7011			v.AddArg(v0)
7012			return true
7013		}
7014		break
7015	}
7016	// match: (MOVBZreg (XOR <t> x (MOVHZreg y)))
7017	// result: (MOVBZreg (XOR <t> x y))
7018	for {
7019		if v_0.Op != OpPPC64XOR {
7020			break
7021		}
7022		t := v_0.Type
7023		_ = v_0.Args[1]
7024		v_0_0 := v_0.Args[0]
7025		v_0_1 := v_0.Args[1]
7026		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
7027			x := v_0_0
7028			if v_0_1.Op != OpPPC64MOVHZreg {
7029				continue
7030			}
7031			y := v_0_1.Args[0]
7032			v.reset(OpPPC64MOVBZreg)
7033			v0 := b.NewValue0(v.Pos, OpPPC64XOR, t)
7034			v0.AddArg2(x, y)
7035			v.AddArg(v0)
7036			return true
7037		}
7038		break
7039	}
7040	// match: (MOVBZreg (AND <t> x (MOVHZreg y)))
7041	// result: (MOVBZreg (AND <t> x y))
7042	for {
7043		if v_0.Op != OpPPC64AND {
7044			break
7045		}
7046		t := v_0.Type
7047		_ = v_0.Args[1]
7048		v_0_0 := v_0.Args[0]
7049		v_0_1 := v_0.Args[1]
7050		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
7051			x := v_0_0
7052			if v_0_1.Op != OpPPC64MOVHZreg {
7053				continue
7054			}
7055			y := v_0_1.Args[0]
7056			v.reset(OpPPC64MOVBZreg)
7057			v0 := b.NewValue0(v.Pos, OpPPC64AND, t)
7058			v0.AddArg2(x, y)
7059			v.AddArg(v0)
7060			return true
7061		}
7062		break
7063	}
7064	// match: (MOVBZreg (OR <t> x (MOVBZreg y)))
7065	// result: (MOVBZreg (OR <t> x y))
7066	for {
7067		if v_0.Op != OpPPC64OR {
7068			break
7069		}
7070		t := v_0.Type
7071		_ = v_0.Args[1]
7072		v_0_0 := v_0.Args[0]
7073		v_0_1 := v_0.Args[1]
7074		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
7075			x := v_0_0
7076			if v_0_1.Op != OpPPC64MOVBZreg {
7077				continue
7078			}
7079			y := v_0_1.Args[0]
7080			v.reset(OpPPC64MOVBZreg)
7081			v0 := b.NewValue0(v.Pos, OpPPC64OR, t)
7082			v0.AddArg2(x, y)
7083			v.AddArg(v0)
7084			return true
7085		}
7086		break
7087	}
7088	// match: (MOVBZreg (XOR <t> x (MOVBZreg y)))
7089	// result: (MOVBZreg (XOR <t> x y))
7090	for {
7091		if v_0.Op != OpPPC64XOR {
7092			break
7093		}
7094		t := v_0.Type
7095		_ = v_0.Args[1]
7096		v_0_0 := v_0.Args[0]
7097		v_0_1 := v_0.Args[1]
7098		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
7099			x := v_0_0
7100			if v_0_1.Op != OpPPC64MOVBZreg {
7101				continue
7102			}
7103			y := v_0_1.Args[0]
7104			v.reset(OpPPC64MOVBZreg)
7105			v0 := b.NewValue0(v.Pos, OpPPC64XOR, t)
7106			v0.AddArg2(x, y)
7107			v.AddArg(v0)
7108			return true
7109		}
7110		break
7111	}
7112	// match: (MOVBZreg (AND <t> x (MOVBZreg y)))
7113	// result: (MOVBZreg (AND <t> x y))
7114	for {
7115		if v_0.Op != OpPPC64AND {
7116			break
7117		}
7118		t := v_0.Type
7119		_ = v_0.Args[1]
7120		v_0_0 := v_0.Args[0]
7121		v_0_1 := v_0.Args[1]
7122		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
7123			x := v_0_0
7124			if v_0_1.Op != OpPPC64MOVBZreg {
7125				continue
7126			}
7127			y := v_0_1.Args[0]
7128			v.reset(OpPPC64MOVBZreg)
7129			v0 := b.NewValue0(v.Pos, OpPPC64AND, t)
7130			v0.AddArg2(x, y)
7131			v.AddArg(v0)
7132			return true
7133		}
7134		break
7135	}
7136	// match: (MOVBZreg z:(ANDconst [c] (MOVBZload ptr x)))
7137	// result: z
7138	for {
7139		z := v_0
7140		if z.Op != OpPPC64ANDconst {
7141			break
7142		}
7143		z_0 := z.Args[0]
7144		if z_0.Op != OpPPC64MOVBZload {
7145			break
7146		}
7147		v.copyOf(z)
7148		return true
7149	}
7150	// match: (MOVBZreg z:(AND y (MOVBZload ptr x)))
7151	// result: z
7152	for {
7153		z := v_0
7154		if z.Op != OpPPC64AND {
7155			break
7156		}
7157		_ = z.Args[1]
7158		z_0 := z.Args[0]
7159		z_1 := z.Args[1]
7160		for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
7161			if z_1.Op != OpPPC64MOVBZload {
7162				continue
7163			}
7164			v.copyOf(z)
7165			return true
7166		}
7167		break
7168	}
7169	// match: (MOVBZreg x:(MOVBZload _ _))
7170	// result: x
7171	for {
7172		x := v_0
7173		if x.Op != OpPPC64MOVBZload {
7174			break
7175		}
7176		v.copyOf(x)
7177		return true
7178	}
7179	// match: (MOVBZreg x:(MOVBZloadidx _ _ _))
7180	// result: x
7181	for {
7182		x := v_0
7183		if x.Op != OpPPC64MOVBZloadidx {
7184			break
7185		}
7186		v.copyOf(x)
7187		return true
7188	}
7189	// match: (MOVBZreg x:(Select0 (LoweredAtomicLoad8 _ _)))
7190	// result: x
7191	for {
7192		x := v_0
7193		if x.Op != OpSelect0 {
7194			break
7195		}
7196		x_0 := x.Args[0]
7197		if x_0.Op != OpPPC64LoweredAtomicLoad8 {
7198			break
7199		}
7200		v.copyOf(x)
7201		return true
7202	}
7203	// match: (MOVBZreg x:(Arg <t>))
7204	// cond: is8BitInt(t) && !t.IsSigned()
7205	// result: x
7206	for {
7207		x := v_0
7208		if x.Op != OpArg {
7209			break
7210		}
7211		t := x.Type
7212		if !(is8BitInt(t) && !t.IsSigned()) {
7213			break
7214		}
7215		v.copyOf(x)
7216		return true
7217	}
7218	// match: (MOVBZreg (MOVDconst [c]))
7219	// result: (MOVDconst [int64(uint8(c))])
7220	for {
7221		if v_0.Op != OpPPC64MOVDconst {
7222			break
7223		}
7224		c := auxIntToInt64(v_0.AuxInt)
7225		v.reset(OpPPC64MOVDconst)
7226		v.AuxInt = int64ToAuxInt(int64(uint8(c)))
7227		return true
7228	}
7229	return false
7230}
7231func rewriteValuePPC64_OpPPC64MOVBreg(v *Value) bool {
7232	v_0 := v.Args[0]
7233	b := v.Block
7234	typ := &b.Func.Config.Types
7235	// match: (MOVBreg y:(ANDconst [c] _))
7236	// cond: uint64(c) <= 0x7F
7237	// result: y
7238	for {
7239		y := v_0
7240		if y.Op != OpPPC64ANDconst {
7241			break
7242		}
7243		c := auxIntToInt64(y.AuxInt)
7244		if !(uint64(c) <= 0x7F) {
7245			break
7246		}
7247		v.copyOf(y)
7248		return true
7249	}
7250	// match: (MOVBreg (SRAWconst [c] (MOVBreg x)))
7251	// result: (SRAWconst [c] (MOVBreg x))
7252	for {
7253		if v_0.Op != OpPPC64SRAWconst {
7254			break
7255		}
7256		c := auxIntToInt64(v_0.AuxInt)
7257		v_0_0 := v_0.Args[0]
7258		if v_0_0.Op != OpPPC64MOVBreg {
7259			break
7260		}
7261		x := v_0_0.Args[0]
7262		v.reset(OpPPC64SRAWconst)
7263		v.AuxInt = int64ToAuxInt(c)
7264		v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
7265		v0.AddArg(x)
7266		v.AddArg(v0)
7267		return true
7268	}
7269	// match: (MOVBreg (SRAWconst [c] x))
7270	// cond: sizeof(x.Type) == 8
7271	// result: (SRAWconst [c] x)
7272	for {
7273		if v_0.Op != OpPPC64SRAWconst {
7274			break
7275		}
7276		c := auxIntToInt64(v_0.AuxInt)
7277		x := v_0.Args[0]
7278		if !(sizeof(x.Type) == 8) {
7279			break
7280		}
7281		v.reset(OpPPC64SRAWconst)
7282		v.AuxInt = int64ToAuxInt(c)
7283		v.AddArg(x)
7284		return true
7285	}
7286	// match: (MOVBreg (SRDconst [c] x))
7287	// cond: c>56
7288	// result: (SRDconst [c] x)
7289	for {
7290		if v_0.Op != OpPPC64SRDconst {
7291			break
7292		}
7293		c := auxIntToInt64(v_0.AuxInt)
7294		x := v_0.Args[0]
7295		if !(c > 56) {
7296			break
7297		}
7298		v.reset(OpPPC64SRDconst)
7299		v.AuxInt = int64ToAuxInt(c)
7300		v.AddArg(x)
7301		return true
7302	}
7303	// match: (MOVBreg (SRDconst [c] x))
7304	// cond: c==56
7305	// result: (SRADconst [c] x)
7306	for {
7307		if v_0.Op != OpPPC64SRDconst {
7308			break
7309		}
7310		c := auxIntToInt64(v_0.AuxInt)
7311		x := v_0.Args[0]
7312		if !(c == 56) {
7313			break
7314		}
7315		v.reset(OpPPC64SRADconst)
7316		v.AuxInt = int64ToAuxInt(c)
7317		v.AddArg(x)
7318		return true
7319	}
7320	// match: (MOVBreg (SRADconst [c] x))
7321	// cond: c>=56
7322	// result: (SRADconst [c] x)
7323	for {
7324		if v_0.Op != OpPPC64SRADconst {
7325			break
7326		}
7327		c := auxIntToInt64(v_0.AuxInt)
7328		x := v_0.Args[0]
7329		if !(c >= 56) {
7330			break
7331		}
7332		v.reset(OpPPC64SRADconst)
7333		v.AuxInt = int64ToAuxInt(c)
7334		v.AddArg(x)
7335		return true
7336	}
7337	// match: (MOVBreg (SRWconst [c] x))
7338	// cond: c>24
7339	// result: (SRWconst [c] x)
7340	for {
7341		if v_0.Op != OpPPC64SRWconst {
7342			break
7343		}
7344		c := auxIntToInt64(v_0.AuxInt)
7345		x := v_0.Args[0]
7346		if !(c > 24) {
7347			break
7348		}
7349		v.reset(OpPPC64SRWconst)
7350		v.AuxInt = int64ToAuxInt(c)
7351		v.AddArg(x)
7352		return true
7353	}
7354	// match: (MOVBreg (SRWconst [c] x))
7355	// cond: c==24
7356	// result: (SRAWconst [c] x)
7357	for {
7358		if v_0.Op != OpPPC64SRWconst {
7359			break
7360		}
7361		c := auxIntToInt64(v_0.AuxInt)
7362		x := v_0.Args[0]
7363		if !(c == 24) {
7364			break
7365		}
7366		v.reset(OpPPC64SRAWconst)
7367		v.AuxInt = int64ToAuxInt(c)
7368		v.AddArg(x)
7369		return true
7370	}
7371	// match: (MOVBreg (SRAWconst [c] x))
7372	// cond: c>=24
7373	// result: (SRAWconst [c] x)
7374	for {
7375		if v_0.Op != OpPPC64SRAWconst {
7376			break
7377		}
7378		c := auxIntToInt64(v_0.AuxInt)
7379		x := v_0.Args[0]
7380		if !(c >= 24) {
7381			break
7382		}
7383		v.reset(OpPPC64SRAWconst)
7384		v.AuxInt = int64ToAuxInt(c)
7385		v.AddArg(x)
7386		return true
7387	}
7388	// match: (MOVBreg y:(MOVBreg _))
7389	// result: y
7390	for {
7391		y := v_0
7392		if y.Op != OpPPC64MOVBreg {
7393			break
7394		}
7395		v.copyOf(y)
7396		return true
7397	}
7398	// match: (MOVBreg (MOVBZreg x))
7399	// result: (MOVBreg x)
7400	for {
7401		if v_0.Op != OpPPC64MOVBZreg {
7402			break
7403		}
7404		x := v_0.Args[0]
7405		v.reset(OpPPC64MOVBreg)
7406		v.AddArg(x)
7407		return true
7408	}
7409	// match: (MOVBreg x:(Arg <t>))
7410	// cond: is8BitInt(t) && t.IsSigned()
7411	// result: x
7412	for {
7413		x := v_0
7414		if x.Op != OpArg {
7415			break
7416		}
7417		t := x.Type
7418		if !(is8BitInt(t) && t.IsSigned()) {
7419			break
7420		}
7421		v.copyOf(x)
7422		return true
7423	}
7424	// match: (MOVBreg (MOVDconst [c]))
7425	// result: (MOVDconst [int64(int8(c))])
7426	for {
7427		if v_0.Op != OpPPC64MOVDconst {
7428			break
7429		}
7430		c := auxIntToInt64(v_0.AuxInt)
7431		v.reset(OpPPC64MOVDconst)
7432		v.AuxInt = int64ToAuxInt(int64(int8(c)))
7433		return true
7434	}
7435	return false
7436}
7437func rewriteValuePPC64_OpPPC64MOVBstore(v *Value) bool {
7438	v_2 := v.Args[2]
7439	v_1 := v.Args[1]
7440	v_0 := v.Args[0]
7441	b := v.Block
7442	typ := &b.Func.Config.Types
7443	// match: (MOVBstore [off1] {sym} (ADDconst [off2] x) val mem)
7444	// cond: (is16Bit(int64(off1)+off2) || (supportsPPC64PCRel() && is32Bit(int64(off1)+off2)))
7445	// result: (MOVBstore [off1+int32(off2)] {sym} x val mem)
7446	for {
7447		off1 := auxIntToInt32(v.AuxInt)
7448		sym := auxToSym(v.Aux)
7449		if v_0.Op != OpPPC64ADDconst {
7450			break
7451		}
7452		off2 := auxIntToInt64(v_0.AuxInt)
7453		x := v_0.Args[0]
7454		val := v_1
7455		mem := v_2
7456		if !(is16Bit(int64(off1)+off2) || (supportsPPC64PCRel() && is32Bit(int64(off1)+off2))) {
7457			break
7458		}
7459		v.reset(OpPPC64MOVBstore)
7460		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
7461		v.Aux = symToAux(sym)
7462		v.AddArg3(x, val, mem)
7463		return true
7464	}
7465	// match: (MOVBstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
7466	// cond: canMergeSym(sym1,sym2) && ((is16Bit(int64(off1+off2)) && (ptr.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))
7467	// result: (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
7468	for {
7469		off1 := auxIntToInt32(v.AuxInt)
7470		sym1 := auxToSym(v.Aux)
7471		p := v_0
7472		if p.Op != OpPPC64MOVDaddr {
7473			break
7474		}
7475		off2 := auxIntToInt32(p.AuxInt)
7476		sym2 := auxToSym(p.Aux)
7477		ptr := p.Args[0]
7478		val := v_1
7479		mem := v_2
7480		if !(canMergeSym(sym1, sym2) && ((is16Bit(int64(off1+off2)) && (ptr.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))) {
7481			break
7482		}
7483		v.reset(OpPPC64MOVBstore)
7484		v.AuxInt = int32ToAuxInt(off1 + off2)
7485		v.Aux = symToAux(mergeSym(sym1, sym2))
7486		v.AddArg3(ptr, val, mem)
7487		return true
7488	}
7489	// match: (MOVBstore [off] {sym} ptr (MOVDconst [0]) mem)
7490	// result: (MOVBstorezero [off] {sym} ptr mem)
7491	for {
7492		off := auxIntToInt32(v.AuxInt)
7493		sym := auxToSym(v.Aux)
7494		ptr := v_0
7495		if v_1.Op != OpPPC64MOVDconst || auxIntToInt64(v_1.AuxInt) != 0 {
7496			break
7497		}
7498		mem := v_2
7499		v.reset(OpPPC64MOVBstorezero)
7500		v.AuxInt = int32ToAuxInt(off)
7501		v.Aux = symToAux(sym)
7502		v.AddArg2(ptr, mem)
7503		return true
7504	}
7505	// match: (MOVBstore [0] {sym} p:(ADD ptr idx) val mem)
7506	// cond: sym == nil && p.Uses == 1
7507	// result: (MOVBstoreidx ptr idx val mem)
7508	for {
7509		if auxIntToInt32(v.AuxInt) != 0 {
7510			break
7511		}
7512		sym := auxToSym(v.Aux)
7513		p := v_0
7514		if p.Op != OpPPC64ADD {
7515			break
7516		}
7517		idx := p.Args[1]
7518		ptr := p.Args[0]
7519		val := v_1
7520		mem := v_2
7521		if !(sym == nil && p.Uses == 1) {
7522			break
7523		}
7524		v.reset(OpPPC64MOVBstoreidx)
7525		v.AddArg4(ptr, idx, val, mem)
7526		return true
7527	}
7528	// match: (MOVBstore [off] {sym} ptr (MOVBreg x) mem)
7529	// result: (MOVBstore [off] {sym} ptr x mem)
7530	for {
7531		off := auxIntToInt32(v.AuxInt)
7532		sym := auxToSym(v.Aux)
7533		ptr := v_0
7534		if v_1.Op != OpPPC64MOVBreg {
7535			break
7536		}
7537		x := v_1.Args[0]
7538		mem := v_2
7539		v.reset(OpPPC64MOVBstore)
7540		v.AuxInt = int32ToAuxInt(off)
7541		v.Aux = symToAux(sym)
7542		v.AddArg3(ptr, x, mem)
7543		return true
7544	}
7545	// match: (MOVBstore [off] {sym} ptr (MOVBZreg x) mem)
7546	// result: (MOVBstore [off] {sym} ptr x mem)
7547	for {
7548		off := auxIntToInt32(v.AuxInt)
7549		sym := auxToSym(v.Aux)
7550		ptr := v_0
7551		if v_1.Op != OpPPC64MOVBZreg {
7552			break
7553		}
7554		x := v_1.Args[0]
7555		mem := v_2
7556		v.reset(OpPPC64MOVBstore)
7557		v.AuxInt = int32ToAuxInt(off)
7558		v.Aux = symToAux(sym)
7559		v.AddArg3(ptr, x, mem)
7560		return true
7561	}
7562	// match: (MOVBstore [off] {sym} ptr (MOVHreg x) mem)
7563	// result: (MOVBstore [off] {sym} ptr x mem)
7564	for {
7565		off := auxIntToInt32(v.AuxInt)
7566		sym := auxToSym(v.Aux)
7567		ptr := v_0
7568		if v_1.Op != OpPPC64MOVHreg {
7569			break
7570		}
7571		x := v_1.Args[0]
7572		mem := v_2
7573		v.reset(OpPPC64MOVBstore)
7574		v.AuxInt = int32ToAuxInt(off)
7575		v.Aux = symToAux(sym)
7576		v.AddArg3(ptr, x, mem)
7577		return true
7578	}
7579	// match: (MOVBstore [off] {sym} ptr (MOVHZreg x) mem)
7580	// result: (MOVBstore [off] {sym} ptr x mem)
7581	for {
7582		off := auxIntToInt32(v.AuxInt)
7583		sym := auxToSym(v.Aux)
7584		ptr := v_0
7585		if v_1.Op != OpPPC64MOVHZreg {
7586			break
7587		}
7588		x := v_1.Args[0]
7589		mem := v_2
7590		v.reset(OpPPC64MOVBstore)
7591		v.AuxInt = int32ToAuxInt(off)
7592		v.Aux = symToAux(sym)
7593		v.AddArg3(ptr, x, mem)
7594		return true
7595	}
7596	// match: (MOVBstore [off] {sym} ptr (MOVWreg x) mem)
7597	// result: (MOVBstore [off] {sym} ptr x mem)
7598	for {
7599		off := auxIntToInt32(v.AuxInt)
7600		sym := auxToSym(v.Aux)
7601		ptr := v_0
7602		if v_1.Op != OpPPC64MOVWreg {
7603			break
7604		}
7605		x := v_1.Args[0]
7606		mem := v_2
7607		v.reset(OpPPC64MOVBstore)
7608		v.AuxInt = int32ToAuxInt(off)
7609		v.Aux = symToAux(sym)
7610		v.AddArg3(ptr, x, mem)
7611		return true
7612	}
7613	// match: (MOVBstore [off] {sym} ptr (MOVWZreg x) mem)
7614	// result: (MOVBstore [off] {sym} ptr x mem)
7615	for {
7616		off := auxIntToInt32(v.AuxInt)
7617		sym := auxToSym(v.Aux)
7618		ptr := v_0
7619		if v_1.Op != OpPPC64MOVWZreg {
7620			break
7621		}
7622		x := v_1.Args[0]
7623		mem := v_2
7624		v.reset(OpPPC64MOVBstore)
7625		v.AuxInt = int32ToAuxInt(off)
7626		v.Aux = symToAux(sym)
7627		v.AddArg3(ptr, x, mem)
7628		return true
7629	}
7630	// match: (MOVBstore [off] {sym} ptr (SRWconst (MOVHreg x) [c]) mem)
7631	// cond: c <= 8
7632	// result: (MOVBstore [off] {sym} ptr (SRWconst <typ.UInt32> x [c]) mem)
7633	for {
7634		off := auxIntToInt32(v.AuxInt)
7635		sym := auxToSym(v.Aux)
7636		ptr := v_0
7637		if v_1.Op != OpPPC64SRWconst {
7638			break
7639		}
7640		c := auxIntToInt64(v_1.AuxInt)
7641		v_1_0 := v_1.Args[0]
7642		if v_1_0.Op != OpPPC64MOVHreg {
7643			break
7644		}
7645		x := v_1_0.Args[0]
7646		mem := v_2
7647		if !(c <= 8) {
7648			break
7649		}
7650		v.reset(OpPPC64MOVBstore)
7651		v.AuxInt = int32ToAuxInt(off)
7652		v.Aux = symToAux(sym)
7653		v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
7654		v0.AuxInt = int64ToAuxInt(c)
7655		v0.AddArg(x)
7656		v.AddArg3(ptr, v0, mem)
7657		return true
7658	}
7659	// match: (MOVBstore [off] {sym} ptr (SRWconst (MOVHZreg x) [c]) mem)
7660	// cond: c <= 8
7661	// result: (MOVBstore [off] {sym} ptr (SRWconst <typ.UInt32> x [c]) mem)
7662	for {
7663		off := auxIntToInt32(v.AuxInt)
7664		sym := auxToSym(v.Aux)
7665		ptr := v_0
7666		if v_1.Op != OpPPC64SRWconst {
7667			break
7668		}
7669		c := auxIntToInt64(v_1.AuxInt)
7670		v_1_0 := v_1.Args[0]
7671		if v_1_0.Op != OpPPC64MOVHZreg {
7672			break
7673		}
7674		x := v_1_0.Args[0]
7675		mem := v_2
7676		if !(c <= 8) {
7677			break
7678		}
7679		v.reset(OpPPC64MOVBstore)
7680		v.AuxInt = int32ToAuxInt(off)
7681		v.Aux = symToAux(sym)
7682		v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
7683		v0.AuxInt = int64ToAuxInt(c)
7684		v0.AddArg(x)
7685		v.AddArg3(ptr, v0, mem)
7686		return true
7687	}
7688	// match: (MOVBstore [off] {sym} ptr (SRWconst (MOVWreg x) [c]) mem)
7689	// cond: c <= 24
7690	// result: (MOVBstore [off] {sym} ptr (SRWconst <typ.UInt32> x [c]) mem)
7691	for {
7692		off := auxIntToInt32(v.AuxInt)
7693		sym := auxToSym(v.Aux)
7694		ptr := v_0
7695		if v_1.Op != OpPPC64SRWconst {
7696			break
7697		}
7698		c := auxIntToInt64(v_1.AuxInt)
7699		v_1_0 := v_1.Args[0]
7700		if v_1_0.Op != OpPPC64MOVWreg {
7701			break
7702		}
7703		x := v_1_0.Args[0]
7704		mem := v_2
7705		if !(c <= 24) {
7706			break
7707		}
7708		v.reset(OpPPC64MOVBstore)
7709		v.AuxInt = int32ToAuxInt(off)
7710		v.Aux = symToAux(sym)
7711		v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
7712		v0.AuxInt = int64ToAuxInt(c)
7713		v0.AddArg(x)
7714		v.AddArg3(ptr, v0, mem)
7715		return true
7716	}
7717	// match: (MOVBstore [off] {sym} ptr (SRWconst (MOVWZreg x) [c]) mem)
7718	// cond: c <= 24
7719	// result: (MOVBstore [off] {sym} ptr (SRWconst <typ.UInt32> x [c]) mem)
7720	for {
7721		off := auxIntToInt32(v.AuxInt)
7722		sym := auxToSym(v.Aux)
7723		ptr := v_0
7724		if v_1.Op != OpPPC64SRWconst {
7725			break
7726		}
7727		c := auxIntToInt64(v_1.AuxInt)
7728		v_1_0 := v_1.Args[0]
7729		if v_1_0.Op != OpPPC64MOVWZreg {
7730			break
7731		}
7732		x := v_1_0.Args[0]
7733		mem := v_2
7734		if !(c <= 24) {
7735			break
7736		}
7737		v.reset(OpPPC64MOVBstore)
7738		v.AuxInt = int32ToAuxInt(off)
7739		v.Aux = symToAux(sym)
7740		v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
7741		v0.AuxInt = int64ToAuxInt(c)
7742		v0.AddArg(x)
7743		v.AddArg3(ptr, v0, mem)
7744		return true
7745	}
7746	return false
7747}
7748func rewriteValuePPC64_OpPPC64MOVBstoreidx(v *Value) bool {
7749	v_3 := v.Args[3]
7750	v_2 := v.Args[2]
7751	v_1 := v.Args[1]
7752	v_0 := v.Args[0]
7753	b := v.Block
7754	typ := &b.Func.Config.Types
7755	// match: (MOVBstoreidx ptr (MOVDconst [c]) val mem)
7756	// cond: (is16Bit(c) || (buildcfg.GOPPC64 >= 10 && is32Bit(c)))
7757	// result: (MOVBstore [int32(c)] ptr val mem)
7758	for {
7759		ptr := v_0
7760		if v_1.Op != OpPPC64MOVDconst {
7761			break
7762		}
7763		c := auxIntToInt64(v_1.AuxInt)
7764		val := v_2
7765		mem := v_3
7766		if !(is16Bit(c) || (buildcfg.GOPPC64 >= 10 && is32Bit(c))) {
7767			break
7768		}
7769		v.reset(OpPPC64MOVBstore)
7770		v.AuxInt = int32ToAuxInt(int32(c))
7771		v.AddArg3(ptr, val, mem)
7772		return true
7773	}
7774	// match: (MOVBstoreidx (MOVDconst [c]) ptr val mem)
7775	// cond: (is16Bit(c) || (buildcfg.GOPPC64 >= 10 && is32Bit(c)))
7776	// result: (MOVBstore [int32(c)] ptr val mem)
7777	for {
7778		if v_0.Op != OpPPC64MOVDconst {
7779			break
7780		}
7781		c := auxIntToInt64(v_0.AuxInt)
7782		ptr := v_1
7783		val := v_2
7784		mem := v_3
7785		if !(is16Bit(c) || (buildcfg.GOPPC64 >= 10 && is32Bit(c))) {
7786			break
7787		}
7788		v.reset(OpPPC64MOVBstore)
7789		v.AuxInt = int32ToAuxInt(int32(c))
7790		v.AddArg3(ptr, val, mem)
7791		return true
7792	}
7793	// match: (MOVBstoreidx ptr idx (MOVBreg x) mem)
7794	// result: (MOVBstoreidx ptr idx x mem)
7795	for {
7796		ptr := v_0
7797		idx := v_1
7798		if v_2.Op != OpPPC64MOVBreg {
7799			break
7800		}
7801		x := v_2.Args[0]
7802		mem := v_3
7803		v.reset(OpPPC64MOVBstoreidx)
7804		v.AddArg4(ptr, idx, x, mem)
7805		return true
7806	}
7807	// match: (MOVBstoreidx ptr idx (MOVBZreg x) mem)
7808	// result: (MOVBstoreidx ptr idx x mem)
7809	for {
7810		ptr := v_0
7811		idx := v_1
7812		if v_2.Op != OpPPC64MOVBZreg {
7813			break
7814		}
7815		x := v_2.Args[0]
7816		mem := v_3
7817		v.reset(OpPPC64MOVBstoreidx)
7818		v.AddArg4(ptr, idx, x, mem)
7819		return true
7820	}
7821	// match: (MOVBstoreidx ptr idx (MOVHreg x) mem)
7822	// result: (MOVBstoreidx ptr idx x mem)
7823	for {
7824		ptr := v_0
7825		idx := v_1
7826		if v_2.Op != OpPPC64MOVHreg {
7827			break
7828		}
7829		x := v_2.Args[0]
7830		mem := v_3
7831		v.reset(OpPPC64MOVBstoreidx)
7832		v.AddArg4(ptr, idx, x, mem)
7833		return true
7834	}
7835	// match: (MOVBstoreidx ptr idx (MOVHZreg x) mem)
7836	// result: (MOVBstoreidx ptr idx x mem)
7837	for {
7838		ptr := v_0
7839		idx := v_1
7840		if v_2.Op != OpPPC64MOVHZreg {
7841			break
7842		}
7843		x := v_2.Args[0]
7844		mem := v_3
7845		v.reset(OpPPC64MOVBstoreidx)
7846		v.AddArg4(ptr, idx, x, mem)
7847		return true
7848	}
7849	// match: (MOVBstoreidx ptr idx (MOVWreg x) mem)
7850	// result: (MOVBstoreidx ptr idx x mem)
7851	for {
7852		ptr := v_0
7853		idx := v_1
7854		if v_2.Op != OpPPC64MOVWreg {
7855			break
7856		}
7857		x := v_2.Args[0]
7858		mem := v_3
7859		v.reset(OpPPC64MOVBstoreidx)
7860		v.AddArg4(ptr, idx, x, mem)
7861		return true
7862	}
7863	// match: (MOVBstoreidx ptr idx (MOVWZreg x) mem)
7864	// result: (MOVBstoreidx ptr idx x mem)
7865	for {
7866		ptr := v_0
7867		idx := v_1
7868		if v_2.Op != OpPPC64MOVWZreg {
7869			break
7870		}
7871		x := v_2.Args[0]
7872		mem := v_3
7873		v.reset(OpPPC64MOVBstoreidx)
7874		v.AddArg4(ptr, idx, x, mem)
7875		return true
7876	}
7877	// match: (MOVBstoreidx ptr idx (SRWconst (MOVHreg x) [c]) mem)
7878	// cond: c <= 8
7879	// result: (MOVBstoreidx ptr idx (SRWconst <typ.UInt32> x [c]) mem)
7880	for {
7881		ptr := v_0
7882		idx := v_1
7883		if v_2.Op != OpPPC64SRWconst {
7884			break
7885		}
7886		c := auxIntToInt64(v_2.AuxInt)
7887		v_2_0 := v_2.Args[0]
7888		if v_2_0.Op != OpPPC64MOVHreg {
7889			break
7890		}
7891		x := v_2_0.Args[0]
7892		mem := v_3
7893		if !(c <= 8) {
7894			break
7895		}
7896		v.reset(OpPPC64MOVBstoreidx)
7897		v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
7898		v0.AuxInt = int64ToAuxInt(c)
7899		v0.AddArg(x)
7900		v.AddArg4(ptr, idx, v0, mem)
7901		return true
7902	}
7903	// match: (MOVBstoreidx ptr idx (SRWconst (MOVHZreg x) [c]) mem)
7904	// cond: c <= 8
7905	// result: (MOVBstoreidx ptr idx (SRWconst <typ.UInt32> x [c]) mem)
7906	for {
7907		ptr := v_0
7908		idx := v_1
7909		if v_2.Op != OpPPC64SRWconst {
7910			break
7911		}
7912		c := auxIntToInt64(v_2.AuxInt)
7913		v_2_0 := v_2.Args[0]
7914		if v_2_0.Op != OpPPC64MOVHZreg {
7915			break
7916		}
7917		x := v_2_0.Args[0]
7918		mem := v_3
7919		if !(c <= 8) {
7920			break
7921		}
7922		v.reset(OpPPC64MOVBstoreidx)
7923		v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
7924		v0.AuxInt = int64ToAuxInt(c)
7925		v0.AddArg(x)
7926		v.AddArg4(ptr, idx, v0, mem)
7927		return true
7928	}
7929	// match: (MOVBstoreidx ptr idx (SRWconst (MOVWreg x) [c]) mem)
7930	// cond: c <= 24
7931	// result: (MOVBstoreidx ptr idx (SRWconst <typ.UInt32> x [c]) mem)
7932	for {
7933		ptr := v_0
7934		idx := v_1
7935		if v_2.Op != OpPPC64SRWconst {
7936			break
7937		}
7938		c := auxIntToInt64(v_2.AuxInt)
7939		v_2_0 := v_2.Args[0]
7940		if v_2_0.Op != OpPPC64MOVWreg {
7941			break
7942		}
7943		x := v_2_0.Args[0]
7944		mem := v_3
7945		if !(c <= 24) {
7946			break
7947		}
7948		v.reset(OpPPC64MOVBstoreidx)
7949		v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
7950		v0.AuxInt = int64ToAuxInt(c)
7951		v0.AddArg(x)
7952		v.AddArg4(ptr, idx, v0, mem)
7953		return true
7954	}
7955	// match: (MOVBstoreidx ptr idx (SRWconst (MOVWZreg x) [c]) mem)
7956	// cond: c <= 24
7957	// result: (MOVBstoreidx ptr idx (SRWconst <typ.UInt32> x [c]) mem)
7958	for {
7959		ptr := v_0
7960		idx := v_1
7961		if v_2.Op != OpPPC64SRWconst {
7962			break
7963		}
7964		c := auxIntToInt64(v_2.AuxInt)
7965		v_2_0 := v_2.Args[0]
7966		if v_2_0.Op != OpPPC64MOVWZreg {
7967			break
7968		}
7969		x := v_2_0.Args[0]
7970		mem := v_3
7971		if !(c <= 24) {
7972			break
7973		}
7974		v.reset(OpPPC64MOVBstoreidx)
7975		v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
7976		v0.AuxInt = int64ToAuxInt(c)
7977		v0.AddArg(x)
7978		v.AddArg4(ptr, idx, v0, mem)
7979		return true
7980	}
7981	return false
7982}
7983func rewriteValuePPC64_OpPPC64MOVBstorezero(v *Value) bool {
7984	v_1 := v.Args[1]
7985	v_0 := v.Args[0]
7986	// match: (MOVBstorezero [off1] {sym} (ADDconst [off2] x) mem)
7987	// cond: ((supportsPPC64PCRel() && is32Bit(int64(off1)+off2)) || (is16Bit(int64(off1)+off2)))
7988	// result: (MOVBstorezero [off1+int32(off2)] {sym} x mem)
7989	for {
7990		off1 := auxIntToInt32(v.AuxInt)
7991		sym := auxToSym(v.Aux)
7992		if v_0.Op != OpPPC64ADDconst {
7993			break
7994		}
7995		off2 := auxIntToInt64(v_0.AuxInt)
7996		x := v_0.Args[0]
7997		mem := v_1
7998		if !((supportsPPC64PCRel() && is32Bit(int64(off1)+off2)) || (is16Bit(int64(off1) + off2))) {
7999			break
8000		}
8001		v.reset(OpPPC64MOVBstorezero)
8002		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
8003		v.Aux = symToAux(sym)
8004		v.AddArg2(x, mem)
8005		return true
8006	}
8007	// match: (MOVBstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem)
8008	// cond: canMergeSym(sym1,sym2) && ((is16Bit(int64(off1+off2)) && (x.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))
8009	// result: (MOVBstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
8010	for {
8011		off1 := auxIntToInt32(v.AuxInt)
8012		sym1 := auxToSym(v.Aux)
8013		p := v_0
8014		if p.Op != OpPPC64MOVDaddr {
8015			break
8016		}
8017		off2 := auxIntToInt32(p.AuxInt)
8018		sym2 := auxToSym(p.Aux)
8019		x := p.Args[0]
8020		mem := v_1
8021		if !(canMergeSym(sym1, sym2) && ((is16Bit(int64(off1+off2)) && (x.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))) {
8022			break
8023		}
8024		v.reset(OpPPC64MOVBstorezero)
8025		v.AuxInt = int32ToAuxInt(off1 + off2)
8026		v.Aux = symToAux(mergeSym(sym1, sym2))
8027		v.AddArg2(x, mem)
8028		return true
8029	}
8030	return false
8031}
8032func rewriteValuePPC64_OpPPC64MOVDaddr(v *Value) bool {
8033	v_0 := v.Args[0]
8034	// match: (MOVDaddr {sym} [n] p:(ADD x y))
8035	// cond: sym == nil && n == 0
8036	// result: p
8037	for {
8038		n := auxIntToInt32(v.AuxInt)
8039		sym := auxToSym(v.Aux)
8040		p := v_0
8041		if p.Op != OpPPC64ADD {
8042			break
8043		}
8044		if !(sym == nil && n == 0) {
8045			break
8046		}
8047		v.copyOf(p)
8048		return true
8049	}
8050	// match: (MOVDaddr {sym} [n] ptr)
8051	// cond: sym == nil && n == 0 && (ptr.Op == OpArgIntReg || ptr.Op == OpPhi)
8052	// result: ptr
8053	for {
8054		n := auxIntToInt32(v.AuxInt)
8055		sym := auxToSym(v.Aux)
8056		ptr := v_0
8057		if !(sym == nil && n == 0 && (ptr.Op == OpArgIntReg || ptr.Op == OpPhi)) {
8058			break
8059		}
8060		v.copyOf(ptr)
8061		return true
8062	}
8063	return false
8064}
8065func rewriteValuePPC64_OpPPC64MOVDload(v *Value) bool {
8066	v_1 := v.Args[1]
8067	v_0 := v.Args[0]
8068	// match: (MOVDload [off] {sym} ptr (FMOVDstore [off] {sym} ptr x _))
8069	// result: (MFVSRD x)
8070	for {
8071		off := auxIntToInt32(v.AuxInt)
8072		sym := auxToSym(v.Aux)
8073		ptr := v_0
8074		if v_1.Op != OpPPC64FMOVDstore || auxIntToInt32(v_1.AuxInt) != off || auxToSym(v_1.Aux) != sym {
8075			break
8076		}
8077		x := v_1.Args[1]
8078		if ptr != v_1.Args[0] {
8079			break
8080		}
8081		v.reset(OpPPC64MFVSRD)
8082		v.AddArg(x)
8083		return true
8084	}
8085	// match: (MOVDload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
8086	// cond: canMergeSym(sym1,sym2) && ((is16Bit(int64(off1+off2)) && (ptr.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))
8087	// result: (MOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
8088	for {
8089		off1 := auxIntToInt32(v.AuxInt)
8090		sym1 := auxToSym(v.Aux)
8091		p := v_0
8092		if p.Op != OpPPC64MOVDaddr {
8093			break
8094		}
8095		off2 := auxIntToInt32(p.AuxInt)
8096		sym2 := auxToSym(p.Aux)
8097		ptr := p.Args[0]
8098		mem := v_1
8099		if !(canMergeSym(sym1, sym2) && ((is16Bit(int64(off1+off2)) && (ptr.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))) {
8100			break
8101		}
8102		v.reset(OpPPC64MOVDload)
8103		v.AuxInt = int32ToAuxInt(off1 + off2)
8104		v.Aux = symToAux(mergeSym(sym1, sym2))
8105		v.AddArg2(ptr, mem)
8106		return true
8107	}
8108	// match: (MOVDload [off1] {sym} (ADDconst [off2] x) mem)
8109	// cond: (is16Bit(int64(off1)+off2) || (supportsPPC64PCRel() && is32Bit(int64(off1)+off2)))
8110	// result: (MOVDload [off1+int32(off2)] {sym} x mem)
8111	for {
8112		off1 := auxIntToInt32(v.AuxInt)
8113		sym := auxToSym(v.Aux)
8114		if v_0.Op != OpPPC64ADDconst {
8115			break
8116		}
8117		off2 := auxIntToInt64(v_0.AuxInt)
8118		x := v_0.Args[0]
8119		mem := v_1
8120		if !(is16Bit(int64(off1)+off2) || (supportsPPC64PCRel() && is32Bit(int64(off1)+off2))) {
8121			break
8122		}
8123		v.reset(OpPPC64MOVDload)
8124		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
8125		v.Aux = symToAux(sym)
8126		v.AddArg2(x, mem)
8127		return true
8128	}
8129	// match: (MOVDload [0] {sym} p:(ADD ptr idx) mem)
8130	// cond: sym == nil && p.Uses == 1
8131	// result: (MOVDloadidx ptr idx mem)
8132	for {
8133		if auxIntToInt32(v.AuxInt) != 0 {
8134			break
8135		}
8136		sym := auxToSym(v.Aux)
8137		p := v_0
8138		if p.Op != OpPPC64ADD {
8139			break
8140		}
8141		idx := p.Args[1]
8142		ptr := p.Args[0]
8143		mem := v_1
8144		if !(sym == nil && p.Uses == 1) {
8145			break
8146		}
8147		v.reset(OpPPC64MOVDloadidx)
8148		v.AddArg3(ptr, idx, mem)
8149		return true
8150	}
8151	return false
8152}
8153func rewriteValuePPC64_OpPPC64MOVDloadidx(v *Value) bool {
8154	v_2 := v.Args[2]
8155	v_1 := v.Args[1]
8156	v_0 := v.Args[0]
8157	// match: (MOVDloadidx ptr (MOVDconst [c]) mem)
8158	// cond: ((is16Bit(c) && c%4 == 0) || (buildcfg.GOPPC64 >= 10 && is32Bit(c)))
8159	// result: (MOVDload [int32(c)] ptr mem)
8160	for {
8161		ptr := v_0
8162		if v_1.Op != OpPPC64MOVDconst {
8163			break
8164		}
8165		c := auxIntToInt64(v_1.AuxInt)
8166		mem := v_2
8167		if !((is16Bit(c) && c%4 == 0) || (buildcfg.GOPPC64 >= 10 && is32Bit(c))) {
8168			break
8169		}
8170		v.reset(OpPPC64MOVDload)
8171		v.AuxInt = int32ToAuxInt(int32(c))
8172		v.AddArg2(ptr, mem)
8173		return true
8174	}
8175	// match: (MOVDloadidx (MOVDconst [c]) ptr mem)
8176	// cond: ((is16Bit(c) && c%4 == 0) || (buildcfg.GOPPC64 >= 10 && is32Bit(c)))
8177	// result: (MOVDload [int32(c)] ptr mem)
8178	for {
8179		if v_0.Op != OpPPC64MOVDconst {
8180			break
8181		}
8182		c := auxIntToInt64(v_0.AuxInt)
8183		ptr := v_1
8184		mem := v_2
8185		if !((is16Bit(c) && c%4 == 0) || (buildcfg.GOPPC64 >= 10 && is32Bit(c))) {
8186			break
8187		}
8188		v.reset(OpPPC64MOVDload)
8189		v.AuxInt = int32ToAuxInt(int32(c))
8190		v.AddArg2(ptr, mem)
8191		return true
8192	}
8193	return false
8194}
8195func rewriteValuePPC64_OpPPC64MOVDstore(v *Value) bool {
8196	v_2 := v.Args[2]
8197	v_1 := v.Args[1]
8198	v_0 := v.Args[0]
8199	b := v.Block
8200	// match: (MOVDstore [off] {sym} ptr (MFVSRD x) mem)
8201	// result: (FMOVDstore [off] {sym} ptr x mem)
8202	for {
8203		off := auxIntToInt32(v.AuxInt)
8204		sym := auxToSym(v.Aux)
8205		ptr := v_0
8206		if v_1.Op != OpPPC64MFVSRD {
8207			break
8208		}
8209		x := v_1.Args[0]
8210		mem := v_2
8211		v.reset(OpPPC64FMOVDstore)
8212		v.AuxInt = int32ToAuxInt(off)
8213		v.Aux = symToAux(sym)
8214		v.AddArg3(ptr, x, mem)
8215		return true
8216	}
8217	// match: (MOVDstore [off1] {sym} (ADDconst [off2] x) val mem)
8218	// cond: (is16Bit(int64(off1)+off2) || (supportsPPC64PCRel() && is32Bit(int64(off1)+off2)))
8219	// result: (MOVDstore [off1+int32(off2)] {sym} x val mem)
8220	for {
8221		off1 := auxIntToInt32(v.AuxInt)
8222		sym := auxToSym(v.Aux)
8223		if v_0.Op != OpPPC64ADDconst {
8224			break
8225		}
8226		off2 := auxIntToInt64(v_0.AuxInt)
8227		x := v_0.Args[0]
8228		val := v_1
8229		mem := v_2
8230		if !(is16Bit(int64(off1)+off2) || (supportsPPC64PCRel() && is32Bit(int64(off1)+off2))) {
8231			break
8232		}
8233		v.reset(OpPPC64MOVDstore)
8234		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
8235		v.Aux = symToAux(sym)
8236		v.AddArg3(x, val, mem)
8237		return true
8238	}
8239	// match: (MOVDstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
8240	// cond: canMergeSym(sym1,sym2) && ((is16Bit(int64(off1+off2)) && (ptr.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))
8241	// result: (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
8242	for {
8243		off1 := auxIntToInt32(v.AuxInt)
8244		sym1 := auxToSym(v.Aux)
8245		p := v_0
8246		if p.Op != OpPPC64MOVDaddr {
8247			break
8248		}
8249		off2 := auxIntToInt32(p.AuxInt)
8250		sym2 := auxToSym(p.Aux)
8251		ptr := p.Args[0]
8252		val := v_1
8253		mem := v_2
8254		if !(canMergeSym(sym1, sym2) && ((is16Bit(int64(off1+off2)) && (ptr.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))) {
8255			break
8256		}
8257		v.reset(OpPPC64MOVDstore)
8258		v.AuxInt = int32ToAuxInt(off1 + off2)
8259		v.Aux = symToAux(mergeSym(sym1, sym2))
8260		v.AddArg3(ptr, val, mem)
8261		return true
8262	}
8263	// match: (MOVDstore [off] {sym} ptr (MOVDconst [0]) mem)
8264	// result: (MOVDstorezero [off] {sym} ptr mem)
8265	for {
8266		off := auxIntToInt32(v.AuxInt)
8267		sym := auxToSym(v.Aux)
8268		ptr := v_0
8269		if v_1.Op != OpPPC64MOVDconst || auxIntToInt64(v_1.AuxInt) != 0 {
8270			break
8271		}
8272		mem := v_2
8273		v.reset(OpPPC64MOVDstorezero)
8274		v.AuxInt = int32ToAuxInt(off)
8275		v.Aux = symToAux(sym)
8276		v.AddArg2(ptr, mem)
8277		return true
8278	}
8279	// match: (MOVDstore [0] {sym} p:(ADD ptr idx) val mem)
8280	// cond: sym == nil && p.Uses == 1
8281	// result: (MOVDstoreidx ptr idx val mem)
8282	for {
8283		if auxIntToInt32(v.AuxInt) != 0 {
8284			break
8285		}
8286		sym := auxToSym(v.Aux)
8287		p := v_0
8288		if p.Op != OpPPC64ADD {
8289			break
8290		}
8291		idx := p.Args[1]
8292		ptr := p.Args[0]
8293		val := v_1
8294		mem := v_2
8295		if !(sym == nil && p.Uses == 1) {
8296			break
8297		}
8298		v.reset(OpPPC64MOVDstoreidx)
8299		v.AddArg4(ptr, idx, val, mem)
8300		return true
8301	}
8302	// match: (MOVDstore [off] {sym} ptr r:(BRD val) mem)
8303	// cond: r.Uses == 1
8304	// result: (MOVDBRstore (MOVDaddr <ptr.Type> [off] {sym} ptr) val mem)
8305	for {
8306		off := auxIntToInt32(v.AuxInt)
8307		sym := auxToSym(v.Aux)
8308		ptr := v_0
8309		r := v_1
8310		if r.Op != OpPPC64BRD {
8311			break
8312		}
8313		val := r.Args[0]
8314		mem := v_2
8315		if !(r.Uses == 1) {
8316			break
8317		}
8318		v.reset(OpPPC64MOVDBRstore)
8319		v0 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, ptr.Type)
8320		v0.AuxInt = int32ToAuxInt(off)
8321		v0.Aux = symToAux(sym)
8322		v0.AddArg(ptr)
8323		v.AddArg3(v0, val, mem)
8324		return true
8325	}
8326	// match: (MOVDstore [off] {sym} ptr (Bswap64 val) mem)
8327	// result: (MOVDBRstore (MOVDaddr <ptr.Type> [off] {sym} ptr) val mem)
8328	for {
8329		off := auxIntToInt32(v.AuxInt)
8330		sym := auxToSym(v.Aux)
8331		ptr := v_0
8332		if v_1.Op != OpBswap64 {
8333			break
8334		}
8335		val := v_1.Args[0]
8336		mem := v_2
8337		v.reset(OpPPC64MOVDBRstore)
8338		v0 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, ptr.Type)
8339		v0.AuxInt = int32ToAuxInt(off)
8340		v0.Aux = symToAux(sym)
8341		v0.AddArg(ptr)
8342		v.AddArg3(v0, val, mem)
8343		return true
8344	}
8345	return false
8346}
8347func rewriteValuePPC64_OpPPC64MOVDstoreidx(v *Value) bool {
8348	v_3 := v.Args[3]
8349	v_2 := v.Args[2]
8350	v_1 := v.Args[1]
8351	v_0 := v.Args[0]
8352	// match: (MOVDstoreidx ptr (MOVDconst [c]) val mem)
8353	// cond: ((is16Bit(c) && c%4 == 0) || (buildcfg.GOPPC64 >= 10 && is32Bit(c)))
8354	// result: (MOVDstore [int32(c)] ptr val mem)
8355	for {
8356		ptr := v_0
8357		if v_1.Op != OpPPC64MOVDconst {
8358			break
8359		}
8360		c := auxIntToInt64(v_1.AuxInt)
8361		val := v_2
8362		mem := v_3
8363		if !((is16Bit(c) && c%4 == 0) || (buildcfg.GOPPC64 >= 10 && is32Bit(c))) {
8364			break
8365		}
8366		v.reset(OpPPC64MOVDstore)
8367		v.AuxInt = int32ToAuxInt(int32(c))
8368		v.AddArg3(ptr, val, mem)
8369		return true
8370	}
8371	// match: (MOVDstoreidx (MOVDconst [c]) ptr val mem)
8372	// cond: ((is16Bit(c) && c%4 == 0) || (buildcfg.GOPPC64 >= 10 && is32Bit(c)))
8373	// result: (MOVDstore [int32(c)] ptr val mem)
8374	for {
8375		if v_0.Op != OpPPC64MOVDconst {
8376			break
8377		}
8378		c := auxIntToInt64(v_0.AuxInt)
8379		ptr := v_1
8380		val := v_2
8381		mem := v_3
8382		if !((is16Bit(c) && c%4 == 0) || (buildcfg.GOPPC64 >= 10 && is32Bit(c))) {
8383			break
8384		}
8385		v.reset(OpPPC64MOVDstore)
8386		v.AuxInt = int32ToAuxInt(int32(c))
8387		v.AddArg3(ptr, val, mem)
8388		return true
8389	}
8390	// match: (MOVDstoreidx ptr idx r:(BRD val) mem)
8391	// cond: r.Uses == 1
8392	// result: (MOVDBRstoreidx ptr idx val mem)
8393	for {
8394		ptr := v_0
8395		idx := v_1
8396		r := v_2
8397		if r.Op != OpPPC64BRD {
8398			break
8399		}
8400		val := r.Args[0]
8401		mem := v_3
8402		if !(r.Uses == 1) {
8403			break
8404		}
8405		v.reset(OpPPC64MOVDBRstoreidx)
8406		v.AddArg4(ptr, idx, val, mem)
8407		return true
8408	}
8409	// match: (MOVDstoreidx ptr idx (Bswap64 val) mem)
8410	// result: (MOVDBRstoreidx ptr idx val mem)
8411	for {
8412		ptr := v_0
8413		idx := v_1
8414		if v_2.Op != OpBswap64 {
8415			break
8416		}
8417		val := v_2.Args[0]
8418		mem := v_3
8419		v.reset(OpPPC64MOVDBRstoreidx)
8420		v.AddArg4(ptr, idx, val, mem)
8421		return true
8422	}
8423	return false
8424}
8425func rewriteValuePPC64_OpPPC64MOVDstorezero(v *Value) bool {
8426	v_1 := v.Args[1]
8427	v_0 := v.Args[0]
8428	// match: (MOVDstorezero [off1] {sym} (ADDconst [off2] x) mem)
8429	// cond: ((supportsPPC64PCRel() && is32Bit(int64(off1)+off2)) || (is16Bit(int64(off1)+off2)))
8430	// result: (MOVDstorezero [off1+int32(off2)] {sym} x mem)
8431	for {
8432		off1 := auxIntToInt32(v.AuxInt)
8433		sym := auxToSym(v.Aux)
8434		if v_0.Op != OpPPC64ADDconst {
8435			break
8436		}
8437		off2 := auxIntToInt64(v_0.AuxInt)
8438		x := v_0.Args[0]
8439		mem := v_1
8440		if !((supportsPPC64PCRel() && is32Bit(int64(off1)+off2)) || (is16Bit(int64(off1) + off2))) {
8441			break
8442		}
8443		v.reset(OpPPC64MOVDstorezero)
8444		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
8445		v.Aux = symToAux(sym)
8446		v.AddArg2(x, mem)
8447		return true
8448	}
8449	// match: (MOVDstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem)
8450	// cond: canMergeSym(sym1,sym2) && ((is16Bit(int64(off1+off2)) && (x.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))
8451	// result: (MOVDstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
8452	for {
8453		off1 := auxIntToInt32(v.AuxInt)
8454		sym1 := auxToSym(v.Aux)
8455		p := v_0
8456		if p.Op != OpPPC64MOVDaddr {
8457			break
8458		}
8459		off2 := auxIntToInt32(p.AuxInt)
8460		sym2 := auxToSym(p.Aux)
8461		x := p.Args[0]
8462		mem := v_1
8463		if !(canMergeSym(sym1, sym2) && ((is16Bit(int64(off1+off2)) && (x.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))) {
8464			break
8465		}
8466		v.reset(OpPPC64MOVDstorezero)
8467		v.AuxInt = int32ToAuxInt(off1 + off2)
8468		v.Aux = symToAux(mergeSym(sym1, sym2))
8469		v.AddArg2(x, mem)
8470		return true
8471	}
8472	return false
8473}
8474func rewriteValuePPC64_OpPPC64MOVHBRstore(v *Value) bool {
8475	v_2 := v.Args[2]
8476	v_1 := v.Args[1]
8477	v_0 := v.Args[0]
8478	// match: (MOVHBRstore ptr (MOVHreg x) mem)
8479	// result: (MOVHBRstore ptr x mem)
8480	for {
8481		ptr := v_0
8482		if v_1.Op != OpPPC64MOVHreg {
8483			break
8484		}
8485		x := v_1.Args[0]
8486		mem := v_2
8487		v.reset(OpPPC64MOVHBRstore)
8488		v.AddArg3(ptr, x, mem)
8489		return true
8490	}
8491	// match: (MOVHBRstore ptr (MOVHZreg x) mem)
8492	// result: (MOVHBRstore ptr x mem)
8493	for {
8494		ptr := v_0
8495		if v_1.Op != OpPPC64MOVHZreg {
8496			break
8497		}
8498		x := v_1.Args[0]
8499		mem := v_2
8500		v.reset(OpPPC64MOVHBRstore)
8501		v.AddArg3(ptr, x, mem)
8502		return true
8503	}
8504	// match: (MOVHBRstore ptr (MOVWreg x) mem)
8505	// result: (MOVHBRstore ptr x mem)
8506	for {
8507		ptr := v_0
8508		if v_1.Op != OpPPC64MOVWreg {
8509			break
8510		}
8511		x := v_1.Args[0]
8512		mem := v_2
8513		v.reset(OpPPC64MOVHBRstore)
8514		v.AddArg3(ptr, x, mem)
8515		return true
8516	}
8517	// match: (MOVHBRstore ptr (MOVWZreg x) mem)
8518	// result: (MOVHBRstore ptr x mem)
8519	for {
8520		ptr := v_0
8521		if v_1.Op != OpPPC64MOVWZreg {
8522			break
8523		}
8524		x := v_1.Args[0]
8525		mem := v_2
8526		v.reset(OpPPC64MOVHBRstore)
8527		v.AddArg3(ptr, x, mem)
8528		return true
8529	}
8530	return false
8531}
8532func rewriteValuePPC64_OpPPC64MOVHZload(v *Value) bool {
8533	v_1 := v.Args[1]
8534	v_0 := v.Args[0]
8535	// match: (MOVHZload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
8536	// cond: canMergeSym(sym1,sym2) && ((is16Bit(int64(off1+off2)) && (ptr.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))
8537	// result: (MOVHZload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
8538	for {
8539		off1 := auxIntToInt32(v.AuxInt)
8540		sym1 := auxToSym(v.Aux)
8541		p := v_0
8542		if p.Op != OpPPC64MOVDaddr {
8543			break
8544		}
8545		off2 := auxIntToInt32(p.AuxInt)
8546		sym2 := auxToSym(p.Aux)
8547		ptr := p.Args[0]
8548		mem := v_1
8549		if !(canMergeSym(sym1, sym2) && ((is16Bit(int64(off1+off2)) && (ptr.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))) {
8550			break
8551		}
8552		v.reset(OpPPC64MOVHZload)
8553		v.AuxInt = int32ToAuxInt(off1 + off2)
8554		v.Aux = symToAux(mergeSym(sym1, sym2))
8555		v.AddArg2(ptr, mem)
8556		return true
8557	}
8558	// match: (MOVHZload [off1] {sym} (ADDconst [off2] x) mem)
8559	// cond: (is16Bit(int64(off1)+off2) || (supportsPPC64PCRel() && is32Bit(int64(off1)+off2)))
8560	// result: (MOVHZload [off1+int32(off2)] {sym} x mem)
8561	for {
8562		off1 := auxIntToInt32(v.AuxInt)
8563		sym := auxToSym(v.Aux)
8564		if v_0.Op != OpPPC64ADDconst {
8565			break
8566		}
8567		off2 := auxIntToInt64(v_0.AuxInt)
8568		x := v_0.Args[0]
8569		mem := v_1
8570		if !(is16Bit(int64(off1)+off2) || (supportsPPC64PCRel() && is32Bit(int64(off1)+off2))) {
8571			break
8572		}
8573		v.reset(OpPPC64MOVHZload)
8574		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
8575		v.Aux = symToAux(sym)
8576		v.AddArg2(x, mem)
8577		return true
8578	}
8579	// match: (MOVHZload [0] {sym} p:(ADD ptr idx) mem)
8580	// cond: sym == nil && p.Uses == 1
8581	// result: (MOVHZloadidx ptr idx mem)
8582	for {
8583		if auxIntToInt32(v.AuxInt) != 0 {
8584			break
8585		}
8586		sym := auxToSym(v.Aux)
8587		p := v_0
8588		if p.Op != OpPPC64ADD {
8589			break
8590		}
8591		idx := p.Args[1]
8592		ptr := p.Args[0]
8593		mem := v_1
8594		if !(sym == nil && p.Uses == 1) {
8595			break
8596		}
8597		v.reset(OpPPC64MOVHZloadidx)
8598		v.AddArg3(ptr, idx, mem)
8599		return true
8600	}
8601	return false
8602}
8603func rewriteValuePPC64_OpPPC64MOVHZloadidx(v *Value) bool {
8604	v_2 := v.Args[2]
8605	v_1 := v.Args[1]
8606	v_0 := v.Args[0]
8607	// match: (MOVHZloadidx ptr (MOVDconst [c]) mem)
8608	// cond: (is16Bit(c) || (buildcfg.GOPPC64 >= 10 && is32Bit(c)))
8609	// result: (MOVHZload [int32(c)] ptr mem)
8610	for {
8611		ptr := v_0
8612		if v_1.Op != OpPPC64MOVDconst {
8613			break
8614		}
8615		c := auxIntToInt64(v_1.AuxInt)
8616		mem := v_2
8617		if !(is16Bit(c) || (buildcfg.GOPPC64 >= 10 && is32Bit(c))) {
8618			break
8619		}
8620		v.reset(OpPPC64MOVHZload)
8621		v.AuxInt = int32ToAuxInt(int32(c))
8622		v.AddArg2(ptr, mem)
8623		return true
8624	}
8625	// match: (MOVHZloadidx (MOVDconst [c]) ptr mem)
8626	// cond: (is16Bit(c) || (buildcfg.GOPPC64 >= 10 && is32Bit(c)))
8627	// result: (MOVHZload [int32(c)] ptr mem)
8628	for {
8629		if v_0.Op != OpPPC64MOVDconst {
8630			break
8631		}
8632		c := auxIntToInt64(v_0.AuxInt)
8633		ptr := v_1
8634		mem := v_2
8635		if !(is16Bit(c) || (buildcfg.GOPPC64 >= 10 && is32Bit(c))) {
8636			break
8637		}
8638		v.reset(OpPPC64MOVHZload)
8639		v.AuxInt = int32ToAuxInt(int32(c))
8640		v.AddArg2(ptr, mem)
8641		return true
8642	}
8643	return false
8644}
8645func rewriteValuePPC64_OpPPC64MOVHZreg(v *Value) bool {
8646	v_0 := v.Args[0]
8647	b := v.Block
8648	typ := &b.Func.Config.Types
8649	// match: (MOVHZreg y:(ANDconst [c] _))
8650	// cond: uint64(c) <= 0xFFFF
8651	// result: y
8652	for {
8653		y := v_0
8654		if y.Op != OpPPC64ANDconst {
8655			break
8656		}
8657		c := auxIntToInt64(y.AuxInt)
8658		if !(uint64(c) <= 0xFFFF) {
8659			break
8660		}
8661		v.copyOf(y)
8662		return true
8663	}
8664	// match: (MOVHZreg (SRWconst [c] (MOVBZreg x)))
8665	// result: (SRWconst [c] (MOVBZreg x))
8666	for {
8667		if v_0.Op != OpPPC64SRWconst {
8668			break
8669		}
8670		c := auxIntToInt64(v_0.AuxInt)
8671		v_0_0 := v_0.Args[0]
8672		if v_0_0.Op != OpPPC64MOVBZreg {
8673			break
8674		}
8675		x := v_0_0.Args[0]
8676		v.reset(OpPPC64SRWconst)
8677		v.AuxInt = int64ToAuxInt(c)
8678		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
8679		v0.AddArg(x)
8680		v.AddArg(v0)
8681		return true
8682	}
8683	// match: (MOVHZreg (SRWconst [c] (MOVHZreg x)))
8684	// result: (SRWconst [c] (MOVHZreg x))
8685	for {
8686		if v_0.Op != OpPPC64SRWconst {
8687			break
8688		}
8689		c := auxIntToInt64(v_0.AuxInt)
8690		v_0_0 := v_0.Args[0]
8691		if v_0_0.Op != OpPPC64MOVHZreg {
8692			break
8693		}
8694		x := v_0_0.Args[0]
8695		v.reset(OpPPC64SRWconst)
8696		v.AuxInt = int64ToAuxInt(c)
8697		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
8698		v0.AddArg(x)
8699		v.AddArg(v0)
8700		return true
8701	}
8702	// match: (MOVHZreg (SRWconst [c] x))
8703	// cond: sizeof(x.Type) <= 16
8704	// result: (SRWconst [c] x)
8705	for {
8706		if v_0.Op != OpPPC64SRWconst {
8707			break
8708		}
8709		c := auxIntToInt64(v_0.AuxInt)
8710		x := v_0.Args[0]
8711		if !(sizeof(x.Type) <= 16) {
8712			break
8713		}
8714		v.reset(OpPPC64SRWconst)
8715		v.AuxInt = int64ToAuxInt(c)
8716		v.AddArg(x)
8717		return true
8718	}
8719	// match: (MOVHZreg (SRDconst [c] x))
8720	// cond: c>=48
8721	// result: (SRDconst [c] x)
8722	for {
8723		if v_0.Op != OpPPC64SRDconst {
8724			break
8725		}
8726		c := auxIntToInt64(v_0.AuxInt)
8727		x := v_0.Args[0]
8728		if !(c >= 48) {
8729			break
8730		}
8731		v.reset(OpPPC64SRDconst)
8732		v.AuxInt = int64ToAuxInt(c)
8733		v.AddArg(x)
8734		return true
8735	}
8736	// match: (MOVHZreg (SRWconst [c] x))
8737	// cond: c>=16
8738	// result: (SRWconst [c] x)
8739	for {
8740		if v_0.Op != OpPPC64SRWconst {
8741			break
8742		}
8743		c := auxIntToInt64(v_0.AuxInt)
8744		x := v_0.Args[0]
8745		if !(c >= 16) {
8746			break
8747		}
8748		v.reset(OpPPC64SRWconst)
8749		v.AuxInt = int64ToAuxInt(c)
8750		v.AddArg(x)
8751		return true
8752	}
8753	// match: (MOVHZreg (RLWINM [r] y))
8754	// cond: mergePPC64AndRlwinm(0xFFFF,r) != 0
8755	// result: (RLWINM [mergePPC64AndRlwinm(0xFFFF,r)] y)
8756	for {
8757		if v_0.Op != OpPPC64RLWINM {
8758			break
8759		}
8760		r := auxIntToInt64(v_0.AuxInt)
8761		y := v_0.Args[0]
8762		if !(mergePPC64AndRlwinm(0xFFFF, r) != 0) {
8763			break
8764		}
8765		v.reset(OpPPC64RLWINM)
8766		v.AuxInt = int64ToAuxInt(mergePPC64AndRlwinm(0xFFFF, r))
8767		v.AddArg(y)
8768		return true
8769	}
8770	// match: (MOVHZreg y:(MOVHZreg _))
8771	// result: y
8772	for {
8773		y := v_0
8774		if y.Op != OpPPC64MOVHZreg {
8775			break
8776		}
8777		v.copyOf(y)
8778		return true
8779	}
8780	// match: (MOVHZreg y:(MOVBZreg _))
8781	// result: y
8782	for {
8783		y := v_0
8784		if y.Op != OpPPC64MOVBZreg {
8785			break
8786		}
8787		v.copyOf(y)
8788		return true
8789	}
8790	// match: (MOVHZreg y:(MOVHBRload _ _))
8791	// result: y
8792	for {
8793		y := v_0
8794		if y.Op != OpPPC64MOVHBRload {
8795			break
8796		}
8797		v.copyOf(y)
8798		return true
8799	}
8800	// match: (MOVHZreg y:(MOVHreg x))
8801	// result: (MOVHZreg x)
8802	for {
8803		y := v_0
8804		if y.Op != OpPPC64MOVHreg {
8805			break
8806		}
8807		x := y.Args[0]
8808		v.reset(OpPPC64MOVHZreg)
8809		v.AddArg(x)
8810		return true
8811	}
8812	// match: (MOVHZreg (OR <t> x (MOVWZreg y)))
8813	// result: (MOVHZreg (OR <t> x y))
8814	for {
8815		if v_0.Op != OpPPC64OR {
8816			break
8817		}
8818		t := v_0.Type
8819		_ = v_0.Args[1]
8820		v_0_0 := v_0.Args[0]
8821		v_0_1 := v_0.Args[1]
8822		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
8823			x := v_0_0
8824			if v_0_1.Op != OpPPC64MOVWZreg {
8825				continue
8826			}
8827			y := v_0_1.Args[0]
8828			v.reset(OpPPC64MOVHZreg)
8829			v0 := b.NewValue0(v.Pos, OpPPC64OR, t)
8830			v0.AddArg2(x, y)
8831			v.AddArg(v0)
8832			return true
8833		}
8834		break
8835	}
8836	// match: (MOVHZreg (XOR <t> x (MOVWZreg y)))
8837	// result: (MOVHZreg (XOR <t> x y))
8838	for {
8839		if v_0.Op != OpPPC64XOR {
8840			break
8841		}
8842		t := v_0.Type
8843		_ = v_0.Args[1]
8844		v_0_0 := v_0.Args[0]
8845		v_0_1 := v_0.Args[1]
8846		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
8847			x := v_0_0
8848			if v_0_1.Op != OpPPC64MOVWZreg {
8849				continue
8850			}
8851			y := v_0_1.Args[0]
8852			v.reset(OpPPC64MOVHZreg)
8853			v0 := b.NewValue0(v.Pos, OpPPC64XOR, t)
8854			v0.AddArg2(x, y)
8855			v.AddArg(v0)
8856			return true
8857		}
8858		break
8859	}
8860	// match: (MOVHZreg (AND <t> x (MOVWZreg y)))
8861	// result: (MOVHZreg (AND <t> x y))
8862	for {
8863		if v_0.Op != OpPPC64AND {
8864			break
8865		}
8866		t := v_0.Type
8867		_ = v_0.Args[1]
8868		v_0_0 := v_0.Args[0]
8869		v_0_1 := v_0.Args[1]
8870		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
8871			x := v_0_0
8872			if v_0_1.Op != OpPPC64MOVWZreg {
8873				continue
8874			}
8875			y := v_0_1.Args[0]
8876			v.reset(OpPPC64MOVHZreg)
8877			v0 := b.NewValue0(v.Pos, OpPPC64AND, t)
8878			v0.AddArg2(x, y)
8879			v.AddArg(v0)
8880			return true
8881		}
8882		break
8883	}
8884	// match: (MOVHZreg (OR <t> x (MOVHZreg y)))
8885	// result: (MOVHZreg (OR <t> x y))
8886	for {
8887		if v_0.Op != OpPPC64OR {
8888			break
8889		}
8890		t := v_0.Type
8891		_ = v_0.Args[1]
8892		v_0_0 := v_0.Args[0]
8893		v_0_1 := v_0.Args[1]
8894		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
8895			x := v_0_0
8896			if v_0_1.Op != OpPPC64MOVHZreg {
8897				continue
8898			}
8899			y := v_0_1.Args[0]
8900			v.reset(OpPPC64MOVHZreg)
8901			v0 := b.NewValue0(v.Pos, OpPPC64OR, t)
8902			v0.AddArg2(x, y)
8903			v.AddArg(v0)
8904			return true
8905		}
8906		break
8907	}
8908	// match: (MOVHZreg (XOR <t> x (MOVHZreg y)))
8909	// result: (MOVHZreg (XOR <t> x y))
8910	for {
8911		if v_0.Op != OpPPC64XOR {
8912			break
8913		}
8914		t := v_0.Type
8915		_ = v_0.Args[1]
8916		v_0_0 := v_0.Args[0]
8917		v_0_1 := v_0.Args[1]
8918		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
8919			x := v_0_0
8920			if v_0_1.Op != OpPPC64MOVHZreg {
8921				continue
8922			}
8923			y := v_0_1.Args[0]
8924			v.reset(OpPPC64MOVHZreg)
8925			v0 := b.NewValue0(v.Pos, OpPPC64XOR, t)
8926			v0.AddArg2(x, y)
8927			v.AddArg(v0)
8928			return true
8929		}
8930		break
8931	}
8932	// match: (MOVHZreg (AND <t> x (MOVHZreg y)))
8933	// result: (MOVHZreg (AND <t> x y))
8934	for {
8935		if v_0.Op != OpPPC64AND {
8936			break
8937		}
8938		t := v_0.Type
8939		_ = v_0.Args[1]
8940		v_0_0 := v_0.Args[0]
8941		v_0_1 := v_0.Args[1]
8942		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
8943			x := v_0_0
8944			if v_0_1.Op != OpPPC64MOVHZreg {
8945				continue
8946			}
8947			y := v_0_1.Args[0]
8948			v.reset(OpPPC64MOVHZreg)
8949			v0 := b.NewValue0(v.Pos, OpPPC64AND, t)
8950			v0.AddArg2(x, y)
8951			v.AddArg(v0)
8952			return true
8953		}
8954		break
8955	}
8956	// match: (MOVHZreg z:(ANDconst [c] (MOVBZload ptr x)))
8957	// result: z
8958	for {
8959		z := v_0
8960		if z.Op != OpPPC64ANDconst {
8961			break
8962		}
8963		z_0 := z.Args[0]
8964		if z_0.Op != OpPPC64MOVBZload {
8965			break
8966		}
8967		v.copyOf(z)
8968		return true
8969	}
8970	// match: (MOVHZreg z:(AND y (MOVHZload ptr x)))
8971	// result: z
8972	for {
8973		z := v_0
8974		if z.Op != OpPPC64AND {
8975			break
8976		}
8977		_ = z.Args[1]
8978		z_0 := z.Args[0]
8979		z_1 := z.Args[1]
8980		for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
8981			if z_1.Op != OpPPC64MOVHZload {
8982				continue
8983			}
8984			v.copyOf(z)
8985			return true
8986		}
8987		break
8988	}
8989	// match: (MOVHZreg z:(ANDconst [c] (MOVHZload ptr x)))
8990	// result: z
8991	for {
8992		z := v_0
8993		if z.Op != OpPPC64ANDconst {
8994			break
8995		}
8996		z_0 := z.Args[0]
8997		if z_0.Op != OpPPC64MOVHZload {
8998			break
8999		}
9000		v.copyOf(z)
9001		return true
9002	}
9003	// match: (MOVHZreg x:(MOVBZload _ _))
9004	// result: x
9005	for {
9006		x := v_0
9007		if x.Op != OpPPC64MOVBZload {
9008			break
9009		}
9010		v.copyOf(x)
9011		return true
9012	}
9013	// match: (MOVHZreg x:(MOVBZloadidx _ _ _))
9014	// result: x
9015	for {
9016		x := v_0
9017		if x.Op != OpPPC64MOVBZloadidx {
9018			break
9019		}
9020		v.copyOf(x)
9021		return true
9022	}
9023	// match: (MOVHZreg x:(MOVHZload _ _))
9024	// result: x
9025	for {
9026		x := v_0
9027		if x.Op != OpPPC64MOVHZload {
9028			break
9029		}
9030		v.copyOf(x)
9031		return true
9032	}
9033	// match: (MOVHZreg x:(MOVHZloadidx _ _ _))
9034	// result: x
9035	for {
9036		x := v_0
9037		if x.Op != OpPPC64MOVHZloadidx {
9038			break
9039		}
9040		v.copyOf(x)
9041		return true
9042	}
9043	// match: (MOVHZreg x:(Arg <t>))
9044	// cond: (is8BitInt(t) || is16BitInt(t)) && !t.IsSigned()
9045	// result: x
9046	for {
9047		x := v_0
9048		if x.Op != OpArg {
9049			break
9050		}
9051		t := x.Type
9052		if !((is8BitInt(t) || is16BitInt(t)) && !t.IsSigned()) {
9053			break
9054		}
9055		v.copyOf(x)
9056		return true
9057	}
9058	// match: (MOVHZreg (MOVDconst [c]))
9059	// result: (MOVDconst [int64(uint16(c))])
9060	for {
9061		if v_0.Op != OpPPC64MOVDconst {
9062			break
9063		}
9064		c := auxIntToInt64(v_0.AuxInt)
9065		v.reset(OpPPC64MOVDconst)
9066		v.AuxInt = int64ToAuxInt(int64(uint16(c)))
9067		return true
9068	}
9069	return false
9070}
9071func rewriteValuePPC64_OpPPC64MOVHload(v *Value) bool {
9072	v_1 := v.Args[1]
9073	v_0 := v.Args[0]
9074	// match: (MOVHload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
9075	// cond: canMergeSym(sym1,sym2) && ((is16Bit(int64(off1+off2)) && (ptr.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))
9076	// result: (MOVHload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
9077	for {
9078		off1 := auxIntToInt32(v.AuxInt)
9079		sym1 := auxToSym(v.Aux)
9080		p := v_0
9081		if p.Op != OpPPC64MOVDaddr {
9082			break
9083		}
9084		off2 := auxIntToInt32(p.AuxInt)
9085		sym2 := auxToSym(p.Aux)
9086		ptr := p.Args[0]
9087		mem := v_1
9088		if !(canMergeSym(sym1, sym2) && ((is16Bit(int64(off1+off2)) && (ptr.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))) {
9089			break
9090		}
9091		v.reset(OpPPC64MOVHload)
9092		v.AuxInt = int32ToAuxInt(off1 + off2)
9093		v.Aux = symToAux(mergeSym(sym1, sym2))
9094		v.AddArg2(ptr, mem)
9095		return true
9096	}
9097	// match: (MOVHload [off1] {sym} (ADDconst [off2] x) mem)
9098	// cond: (is16Bit(int64(off1)+off2) || (supportsPPC64PCRel() && is32Bit(int64(off1)+off2)))
9099	// result: (MOVHload [off1+int32(off2)] {sym} x mem)
9100	for {
9101		off1 := auxIntToInt32(v.AuxInt)
9102		sym := auxToSym(v.Aux)
9103		if v_0.Op != OpPPC64ADDconst {
9104			break
9105		}
9106		off2 := auxIntToInt64(v_0.AuxInt)
9107		x := v_0.Args[0]
9108		mem := v_1
9109		if !(is16Bit(int64(off1)+off2) || (supportsPPC64PCRel() && is32Bit(int64(off1)+off2))) {
9110			break
9111		}
9112		v.reset(OpPPC64MOVHload)
9113		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
9114		v.Aux = symToAux(sym)
9115		v.AddArg2(x, mem)
9116		return true
9117	}
9118	// match: (MOVHload [0] {sym} p:(ADD ptr idx) mem)
9119	// cond: sym == nil && p.Uses == 1
9120	// result: (MOVHloadidx ptr idx mem)
9121	for {
9122		if auxIntToInt32(v.AuxInt) != 0 {
9123			break
9124		}
9125		sym := auxToSym(v.Aux)
9126		p := v_0
9127		if p.Op != OpPPC64ADD {
9128			break
9129		}
9130		idx := p.Args[1]
9131		ptr := p.Args[0]
9132		mem := v_1
9133		if !(sym == nil && p.Uses == 1) {
9134			break
9135		}
9136		v.reset(OpPPC64MOVHloadidx)
9137		v.AddArg3(ptr, idx, mem)
9138		return true
9139	}
9140	return false
9141}
9142func rewriteValuePPC64_OpPPC64MOVHloadidx(v *Value) bool {
9143	v_2 := v.Args[2]
9144	v_1 := v.Args[1]
9145	v_0 := v.Args[0]
9146	// match: (MOVHloadidx ptr (MOVDconst [c]) mem)
9147	// cond: (is16Bit(c) || (buildcfg.GOPPC64 >= 10 && is32Bit(c)))
9148	// result: (MOVHload [int32(c)] ptr mem)
9149	for {
9150		ptr := v_0
9151		if v_1.Op != OpPPC64MOVDconst {
9152			break
9153		}
9154		c := auxIntToInt64(v_1.AuxInt)
9155		mem := v_2
9156		if !(is16Bit(c) || (buildcfg.GOPPC64 >= 10 && is32Bit(c))) {
9157			break
9158		}
9159		v.reset(OpPPC64MOVHload)
9160		v.AuxInt = int32ToAuxInt(int32(c))
9161		v.AddArg2(ptr, mem)
9162		return true
9163	}
9164	// match: (MOVHloadidx (MOVDconst [c]) ptr mem)
9165	// cond: (is16Bit(c) || (buildcfg.GOPPC64 >= 10 && is32Bit(c)))
9166	// result: (MOVHload [int32(c)] ptr mem)
9167	for {
9168		if v_0.Op != OpPPC64MOVDconst {
9169			break
9170		}
9171		c := auxIntToInt64(v_0.AuxInt)
9172		ptr := v_1
9173		mem := v_2
9174		if !(is16Bit(c) || (buildcfg.GOPPC64 >= 10 && is32Bit(c))) {
9175			break
9176		}
9177		v.reset(OpPPC64MOVHload)
9178		v.AuxInt = int32ToAuxInt(int32(c))
9179		v.AddArg2(ptr, mem)
9180		return true
9181	}
9182	return false
9183}
9184func rewriteValuePPC64_OpPPC64MOVHreg(v *Value) bool {
9185	v_0 := v.Args[0]
9186	b := v.Block
9187	typ := &b.Func.Config.Types
9188	// match: (MOVHreg y:(ANDconst [c] _))
9189	// cond: uint64(c) <= 0x7FFF
9190	// result: y
9191	for {
9192		y := v_0
9193		if y.Op != OpPPC64ANDconst {
9194			break
9195		}
9196		c := auxIntToInt64(y.AuxInt)
9197		if !(uint64(c) <= 0x7FFF) {
9198			break
9199		}
9200		v.copyOf(y)
9201		return true
9202	}
9203	// match: (MOVHreg (SRAWconst [c] (MOVBreg x)))
9204	// result: (SRAWconst [c] (MOVBreg x))
9205	for {
9206		if v_0.Op != OpPPC64SRAWconst {
9207			break
9208		}
9209		c := auxIntToInt64(v_0.AuxInt)
9210		v_0_0 := v_0.Args[0]
9211		if v_0_0.Op != OpPPC64MOVBreg {
9212			break
9213		}
9214		x := v_0_0.Args[0]
9215		v.reset(OpPPC64SRAWconst)
9216		v.AuxInt = int64ToAuxInt(c)
9217		v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
9218		v0.AddArg(x)
9219		v.AddArg(v0)
9220		return true
9221	}
9222	// match: (MOVHreg (SRAWconst [c] (MOVHreg x)))
9223	// result: (SRAWconst [c] (MOVHreg x))
9224	for {
9225		if v_0.Op != OpPPC64SRAWconst {
9226			break
9227		}
9228		c := auxIntToInt64(v_0.AuxInt)
9229		v_0_0 := v_0.Args[0]
9230		if v_0_0.Op != OpPPC64MOVHreg {
9231			break
9232		}
9233		x := v_0_0.Args[0]
9234		v.reset(OpPPC64SRAWconst)
9235		v.AuxInt = int64ToAuxInt(c)
9236		v0 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
9237		v0.AddArg(x)
9238		v.AddArg(v0)
9239		return true
9240	}
9241	// match: (MOVHreg (SRAWconst [c] x))
9242	// cond: sizeof(x.Type) <= 16
9243	// result: (SRAWconst [c] x)
9244	for {
9245		if v_0.Op != OpPPC64SRAWconst {
9246			break
9247		}
9248		c := auxIntToInt64(v_0.AuxInt)
9249		x := v_0.Args[0]
9250		if !(sizeof(x.Type) <= 16) {
9251			break
9252		}
9253		v.reset(OpPPC64SRAWconst)
9254		v.AuxInt = int64ToAuxInt(c)
9255		v.AddArg(x)
9256		return true
9257	}
9258	// match: (MOVHreg (SRDconst [c] x))
9259	// cond: c>48
9260	// result: (SRDconst [c] x)
9261	for {
9262		if v_0.Op != OpPPC64SRDconst {
9263			break
9264		}
9265		c := auxIntToInt64(v_0.AuxInt)
9266		x := v_0.Args[0]
9267		if !(c > 48) {
9268			break
9269		}
9270		v.reset(OpPPC64SRDconst)
9271		v.AuxInt = int64ToAuxInt(c)
9272		v.AddArg(x)
9273		return true
9274	}
9275	// match: (MOVHreg (SRDconst [c] x))
9276	// cond: c==48
9277	// result: (SRADconst [c] x)
9278	for {
9279		if v_0.Op != OpPPC64SRDconst {
9280			break
9281		}
9282		c := auxIntToInt64(v_0.AuxInt)
9283		x := v_0.Args[0]
9284		if !(c == 48) {
9285			break
9286		}
9287		v.reset(OpPPC64SRADconst)
9288		v.AuxInt = int64ToAuxInt(c)
9289		v.AddArg(x)
9290		return true
9291	}
9292	// match: (MOVHreg (SRADconst [c] x))
9293	// cond: c>=48
9294	// result: (SRADconst [c] x)
9295	for {
9296		if v_0.Op != OpPPC64SRADconst {
9297			break
9298		}
9299		c := auxIntToInt64(v_0.AuxInt)
9300		x := v_0.Args[0]
9301		if !(c >= 48) {
9302			break
9303		}
9304		v.reset(OpPPC64SRADconst)
9305		v.AuxInt = int64ToAuxInt(c)
9306		v.AddArg(x)
9307		return true
9308	}
9309	// match: (MOVHreg (SRWconst [c] x))
9310	// cond: c>16
9311	// result: (SRWconst [c] x)
9312	for {
9313		if v_0.Op != OpPPC64SRWconst {
9314			break
9315		}
9316		c := auxIntToInt64(v_0.AuxInt)
9317		x := v_0.Args[0]
9318		if !(c > 16) {
9319			break
9320		}
9321		v.reset(OpPPC64SRWconst)
9322		v.AuxInt = int64ToAuxInt(c)
9323		v.AddArg(x)
9324		return true
9325	}
9326	// match: (MOVHreg (SRAWconst [c] x))
9327	// cond: c>=16
9328	// result: (SRAWconst [c] x)
9329	for {
9330		if v_0.Op != OpPPC64SRAWconst {
9331			break
9332		}
9333		c := auxIntToInt64(v_0.AuxInt)
9334		x := v_0.Args[0]
9335		if !(c >= 16) {
9336			break
9337		}
9338		v.reset(OpPPC64SRAWconst)
9339		v.AuxInt = int64ToAuxInt(c)
9340		v.AddArg(x)
9341		return true
9342	}
9343	// match: (MOVHreg (SRWconst [c] x))
9344	// cond: c==16
9345	// result: (SRAWconst [c] x)
9346	for {
9347		if v_0.Op != OpPPC64SRWconst {
9348			break
9349		}
9350		c := auxIntToInt64(v_0.AuxInt)
9351		x := v_0.Args[0]
9352		if !(c == 16) {
9353			break
9354		}
9355		v.reset(OpPPC64SRAWconst)
9356		v.AuxInt = int64ToAuxInt(c)
9357		v.AddArg(x)
9358		return true
9359	}
9360	// match: (MOVHreg y:(MOVHreg _))
9361	// result: y
9362	for {
9363		y := v_0
9364		if y.Op != OpPPC64MOVHreg {
9365			break
9366		}
9367		v.copyOf(y)
9368		return true
9369	}
9370	// match: (MOVHreg y:(MOVBreg _))
9371	// result: y
9372	for {
9373		y := v_0
9374		if y.Op != OpPPC64MOVBreg {
9375			break
9376		}
9377		v.copyOf(y)
9378		return true
9379	}
9380	// match: (MOVHreg y:(MOVHZreg x))
9381	// result: (MOVHreg x)
9382	for {
9383		y := v_0
9384		if y.Op != OpPPC64MOVHZreg {
9385			break
9386		}
9387		x := y.Args[0]
9388		v.reset(OpPPC64MOVHreg)
9389		v.AddArg(x)
9390		return true
9391	}
9392	// match: (MOVHreg x:(MOVHload _ _))
9393	// result: x
9394	for {
9395		x := v_0
9396		if x.Op != OpPPC64MOVHload {
9397			break
9398		}
9399		v.copyOf(x)
9400		return true
9401	}
9402	// match: (MOVHreg x:(MOVHloadidx _ _ _))
9403	// result: x
9404	for {
9405		x := v_0
9406		if x.Op != OpPPC64MOVHloadidx {
9407			break
9408		}
9409		v.copyOf(x)
9410		return true
9411	}
9412	// match: (MOVHreg x:(Arg <t>))
9413	// cond: (is8BitInt(t) || is16BitInt(t)) && t.IsSigned()
9414	// result: x
9415	for {
9416		x := v_0
9417		if x.Op != OpArg {
9418			break
9419		}
9420		t := x.Type
9421		if !((is8BitInt(t) || is16BitInt(t)) && t.IsSigned()) {
9422			break
9423		}
9424		v.copyOf(x)
9425		return true
9426	}
9427	// match: (MOVHreg (MOVDconst [c]))
9428	// result: (MOVDconst [int64(int16(c))])
9429	for {
9430		if v_0.Op != OpPPC64MOVDconst {
9431			break
9432		}
9433		c := auxIntToInt64(v_0.AuxInt)
9434		v.reset(OpPPC64MOVDconst)
9435		v.AuxInt = int64ToAuxInt(int64(int16(c)))
9436		return true
9437	}
9438	return false
9439}
9440func rewriteValuePPC64_OpPPC64MOVHstore(v *Value) bool {
9441	v_2 := v.Args[2]
9442	v_1 := v.Args[1]
9443	v_0 := v.Args[0]
9444	b := v.Block
9445	// match: (MOVHstore [off1] {sym} (ADDconst [off2] x) val mem)
9446	// cond: (is16Bit(int64(off1)+off2) || (supportsPPC64PCRel() && is32Bit(int64(off1)+off2)))
9447	// result: (MOVHstore [off1+int32(off2)] {sym} x val mem)
9448	for {
9449		off1 := auxIntToInt32(v.AuxInt)
9450		sym := auxToSym(v.Aux)
9451		if v_0.Op != OpPPC64ADDconst {
9452			break
9453		}
9454		off2 := auxIntToInt64(v_0.AuxInt)
9455		x := v_0.Args[0]
9456		val := v_1
9457		mem := v_2
9458		if !(is16Bit(int64(off1)+off2) || (supportsPPC64PCRel() && is32Bit(int64(off1)+off2))) {
9459			break
9460		}
9461		v.reset(OpPPC64MOVHstore)
9462		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
9463		v.Aux = symToAux(sym)
9464		v.AddArg3(x, val, mem)
9465		return true
9466	}
9467	// match: (MOVHstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
9468	// cond: canMergeSym(sym1,sym2) && ((is16Bit(int64(off1+off2)) && (ptr.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))
9469	// result: (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
9470	for {
9471		off1 := auxIntToInt32(v.AuxInt)
9472		sym1 := auxToSym(v.Aux)
9473		p := v_0
9474		if p.Op != OpPPC64MOVDaddr {
9475			break
9476		}
9477		off2 := auxIntToInt32(p.AuxInt)
9478		sym2 := auxToSym(p.Aux)
9479		ptr := p.Args[0]
9480		val := v_1
9481		mem := v_2
9482		if !(canMergeSym(sym1, sym2) && ((is16Bit(int64(off1+off2)) && (ptr.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))) {
9483			break
9484		}
9485		v.reset(OpPPC64MOVHstore)
9486		v.AuxInt = int32ToAuxInt(off1 + off2)
9487		v.Aux = symToAux(mergeSym(sym1, sym2))
9488		v.AddArg3(ptr, val, mem)
9489		return true
9490	}
9491	// match: (MOVHstore [off] {sym} ptr (MOVDconst [0]) mem)
9492	// result: (MOVHstorezero [off] {sym} ptr mem)
9493	for {
9494		off := auxIntToInt32(v.AuxInt)
9495		sym := auxToSym(v.Aux)
9496		ptr := v_0
9497		if v_1.Op != OpPPC64MOVDconst || auxIntToInt64(v_1.AuxInt) != 0 {
9498			break
9499		}
9500		mem := v_2
9501		v.reset(OpPPC64MOVHstorezero)
9502		v.AuxInt = int32ToAuxInt(off)
9503		v.Aux = symToAux(sym)
9504		v.AddArg2(ptr, mem)
9505		return true
9506	}
9507	// match: (MOVHstore [0] {sym} p:(ADD ptr idx) val mem)
9508	// cond: sym == nil && p.Uses == 1
9509	// result: (MOVHstoreidx ptr idx val mem)
9510	for {
9511		if auxIntToInt32(v.AuxInt) != 0 {
9512			break
9513		}
9514		sym := auxToSym(v.Aux)
9515		p := v_0
9516		if p.Op != OpPPC64ADD {
9517			break
9518		}
9519		idx := p.Args[1]
9520		ptr := p.Args[0]
9521		val := v_1
9522		mem := v_2
9523		if !(sym == nil && p.Uses == 1) {
9524			break
9525		}
9526		v.reset(OpPPC64MOVHstoreidx)
9527		v.AddArg4(ptr, idx, val, mem)
9528		return true
9529	}
9530	// match: (MOVHstore [off] {sym} ptr (MOVHreg x) mem)
9531	// result: (MOVHstore [off] {sym} ptr x mem)
9532	for {
9533		off := auxIntToInt32(v.AuxInt)
9534		sym := auxToSym(v.Aux)
9535		ptr := v_0
9536		if v_1.Op != OpPPC64MOVHreg {
9537			break
9538		}
9539		x := v_1.Args[0]
9540		mem := v_2
9541		v.reset(OpPPC64MOVHstore)
9542		v.AuxInt = int32ToAuxInt(off)
9543		v.Aux = symToAux(sym)
9544		v.AddArg3(ptr, x, mem)
9545		return true
9546	}
9547	// match: (MOVHstore [off] {sym} ptr (MOVHZreg x) mem)
9548	// result: (MOVHstore [off] {sym} ptr x mem)
9549	for {
9550		off := auxIntToInt32(v.AuxInt)
9551		sym := auxToSym(v.Aux)
9552		ptr := v_0
9553		if v_1.Op != OpPPC64MOVHZreg {
9554			break
9555		}
9556		x := v_1.Args[0]
9557		mem := v_2
9558		v.reset(OpPPC64MOVHstore)
9559		v.AuxInt = int32ToAuxInt(off)
9560		v.Aux = symToAux(sym)
9561		v.AddArg3(ptr, x, mem)
9562		return true
9563	}
9564	// match: (MOVHstore [off] {sym} ptr (MOVWreg x) mem)
9565	// result: (MOVHstore [off] {sym} ptr x mem)
9566	for {
9567		off := auxIntToInt32(v.AuxInt)
9568		sym := auxToSym(v.Aux)
9569		ptr := v_0
9570		if v_1.Op != OpPPC64MOVWreg {
9571			break
9572		}
9573		x := v_1.Args[0]
9574		mem := v_2
9575		v.reset(OpPPC64MOVHstore)
9576		v.AuxInt = int32ToAuxInt(off)
9577		v.Aux = symToAux(sym)
9578		v.AddArg3(ptr, x, mem)
9579		return true
9580	}
9581	// match: (MOVHstore [off] {sym} ptr (MOVWZreg x) mem)
9582	// result: (MOVHstore [off] {sym} ptr x mem)
9583	for {
9584		off := auxIntToInt32(v.AuxInt)
9585		sym := auxToSym(v.Aux)
9586		ptr := v_0
9587		if v_1.Op != OpPPC64MOVWZreg {
9588			break
9589		}
9590		x := v_1.Args[0]
9591		mem := v_2
9592		v.reset(OpPPC64MOVHstore)
9593		v.AuxInt = int32ToAuxInt(off)
9594		v.Aux = symToAux(sym)
9595		v.AddArg3(ptr, x, mem)
9596		return true
9597	}
9598	// match: (MOVHstore [off] {sym} ptr r:(BRH val) mem)
9599	// cond: r.Uses == 1
9600	// result: (MOVHBRstore (MOVDaddr <ptr.Type> [off] {sym} ptr) val mem)
9601	for {
9602		off := auxIntToInt32(v.AuxInt)
9603		sym := auxToSym(v.Aux)
9604		ptr := v_0
9605		r := v_1
9606		if r.Op != OpPPC64BRH {
9607			break
9608		}
9609		val := r.Args[0]
9610		mem := v_2
9611		if !(r.Uses == 1) {
9612			break
9613		}
9614		v.reset(OpPPC64MOVHBRstore)
9615		v0 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, ptr.Type)
9616		v0.AuxInt = int32ToAuxInt(off)
9617		v0.Aux = symToAux(sym)
9618		v0.AddArg(ptr)
9619		v.AddArg3(v0, val, mem)
9620		return true
9621	}
9622	// match: (MOVHstore [off] {sym} ptr (Bswap16 val) mem)
9623	// result: (MOVHBRstore (MOVDaddr <ptr.Type> [off] {sym} ptr) val mem)
9624	for {
9625		off := auxIntToInt32(v.AuxInt)
9626		sym := auxToSym(v.Aux)
9627		ptr := v_0
9628		if v_1.Op != OpBswap16 {
9629			break
9630		}
9631		val := v_1.Args[0]
9632		mem := v_2
9633		v.reset(OpPPC64MOVHBRstore)
9634		v0 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, ptr.Type)
9635		v0.AuxInt = int32ToAuxInt(off)
9636		v0.Aux = symToAux(sym)
9637		v0.AddArg(ptr)
9638		v.AddArg3(v0, val, mem)
9639		return true
9640	}
9641	return false
9642}
9643func rewriteValuePPC64_OpPPC64MOVHstoreidx(v *Value) bool {
9644	v_3 := v.Args[3]
9645	v_2 := v.Args[2]
9646	v_1 := v.Args[1]
9647	v_0 := v.Args[0]
9648	// match: (MOVHstoreidx ptr (MOVDconst [c]) val mem)
9649	// cond: (is16Bit(c) || (buildcfg.GOPPC64 >= 10 && is32Bit(c)))
9650	// result: (MOVHstore [int32(c)] ptr val mem)
9651	for {
9652		ptr := v_0
9653		if v_1.Op != OpPPC64MOVDconst {
9654			break
9655		}
9656		c := auxIntToInt64(v_1.AuxInt)
9657		val := v_2
9658		mem := v_3
9659		if !(is16Bit(c) || (buildcfg.GOPPC64 >= 10 && is32Bit(c))) {
9660			break
9661		}
9662		v.reset(OpPPC64MOVHstore)
9663		v.AuxInt = int32ToAuxInt(int32(c))
9664		v.AddArg3(ptr, val, mem)
9665		return true
9666	}
9667	// match: (MOVHstoreidx (MOVDconst [c]) ptr val mem)
9668	// cond: (is16Bit(c) || (buildcfg.GOPPC64 >= 10 && is32Bit(c)))
9669	// result: (MOVHstore [int32(c)] ptr val mem)
9670	for {
9671		if v_0.Op != OpPPC64MOVDconst {
9672			break
9673		}
9674		c := auxIntToInt64(v_0.AuxInt)
9675		ptr := v_1
9676		val := v_2
9677		mem := v_3
9678		if !(is16Bit(c) || (buildcfg.GOPPC64 >= 10 && is32Bit(c))) {
9679			break
9680		}
9681		v.reset(OpPPC64MOVHstore)
9682		v.AuxInt = int32ToAuxInt(int32(c))
9683		v.AddArg3(ptr, val, mem)
9684		return true
9685	}
9686	// match: (MOVHstoreidx ptr idx (MOVHreg x) mem)
9687	// result: (MOVHstoreidx ptr idx x mem)
9688	for {
9689		ptr := v_0
9690		idx := v_1
9691		if v_2.Op != OpPPC64MOVHreg {
9692			break
9693		}
9694		x := v_2.Args[0]
9695		mem := v_3
9696		v.reset(OpPPC64MOVHstoreidx)
9697		v.AddArg4(ptr, idx, x, mem)
9698		return true
9699	}
9700	// match: (MOVHstoreidx ptr idx (MOVHZreg x) mem)
9701	// result: (MOVHstoreidx ptr idx x mem)
9702	for {
9703		ptr := v_0
9704		idx := v_1
9705		if v_2.Op != OpPPC64MOVHZreg {
9706			break
9707		}
9708		x := v_2.Args[0]
9709		mem := v_3
9710		v.reset(OpPPC64MOVHstoreidx)
9711		v.AddArg4(ptr, idx, x, mem)
9712		return true
9713	}
9714	// match: (MOVHstoreidx ptr idx (MOVWreg x) mem)
9715	// result: (MOVHstoreidx ptr idx x mem)
9716	for {
9717		ptr := v_0
9718		idx := v_1
9719		if v_2.Op != OpPPC64MOVWreg {
9720			break
9721		}
9722		x := v_2.Args[0]
9723		mem := v_3
9724		v.reset(OpPPC64MOVHstoreidx)
9725		v.AddArg4(ptr, idx, x, mem)
9726		return true
9727	}
9728	// match: (MOVHstoreidx ptr idx (MOVWZreg x) mem)
9729	// result: (MOVHstoreidx ptr idx x mem)
9730	for {
9731		ptr := v_0
9732		idx := v_1
9733		if v_2.Op != OpPPC64MOVWZreg {
9734			break
9735		}
9736		x := v_2.Args[0]
9737		mem := v_3
9738		v.reset(OpPPC64MOVHstoreidx)
9739		v.AddArg4(ptr, idx, x, mem)
9740		return true
9741	}
9742	// match: (MOVHstoreidx ptr idx r:(BRH val) mem)
9743	// cond: r.Uses == 1
9744	// result: (MOVHBRstoreidx ptr idx val mem)
9745	for {
9746		ptr := v_0
9747		idx := v_1
9748		r := v_2
9749		if r.Op != OpPPC64BRH {
9750			break
9751		}
9752		val := r.Args[0]
9753		mem := v_3
9754		if !(r.Uses == 1) {
9755			break
9756		}
9757		v.reset(OpPPC64MOVHBRstoreidx)
9758		v.AddArg4(ptr, idx, val, mem)
9759		return true
9760	}
9761	// match: (MOVHstoreidx ptr idx (Bswap16 val) mem)
9762	// result: (MOVHBRstoreidx ptr idx val mem)
9763	for {
9764		ptr := v_0
9765		idx := v_1
9766		if v_2.Op != OpBswap16 {
9767			break
9768		}
9769		val := v_2.Args[0]
9770		mem := v_3
9771		v.reset(OpPPC64MOVHBRstoreidx)
9772		v.AddArg4(ptr, idx, val, mem)
9773		return true
9774	}
9775	return false
9776}
9777func rewriteValuePPC64_OpPPC64MOVHstorezero(v *Value) bool {
9778	v_1 := v.Args[1]
9779	v_0 := v.Args[0]
9780	// match: (MOVHstorezero [off1] {sym} (ADDconst [off2] x) mem)
9781	// cond: ((supportsPPC64PCRel() && is32Bit(int64(off1)+off2)) || (is16Bit(int64(off1)+off2)))
9782	// result: (MOVHstorezero [off1+int32(off2)] {sym} x mem)
9783	for {
9784		off1 := auxIntToInt32(v.AuxInt)
9785		sym := auxToSym(v.Aux)
9786		if v_0.Op != OpPPC64ADDconst {
9787			break
9788		}
9789		off2 := auxIntToInt64(v_0.AuxInt)
9790		x := v_0.Args[0]
9791		mem := v_1
9792		if !((supportsPPC64PCRel() && is32Bit(int64(off1)+off2)) || (is16Bit(int64(off1) + off2))) {
9793			break
9794		}
9795		v.reset(OpPPC64MOVHstorezero)
9796		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
9797		v.Aux = symToAux(sym)
9798		v.AddArg2(x, mem)
9799		return true
9800	}
9801	// match: (MOVHstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem)
9802	// cond: canMergeSym(sym1,sym2) && ((is16Bit(int64(off1+off2)) && (x.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))
9803	// result: (MOVHstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
9804	for {
9805		off1 := auxIntToInt32(v.AuxInt)
9806		sym1 := auxToSym(v.Aux)
9807		p := v_0
9808		if p.Op != OpPPC64MOVDaddr {
9809			break
9810		}
9811		off2 := auxIntToInt32(p.AuxInt)
9812		sym2 := auxToSym(p.Aux)
9813		x := p.Args[0]
9814		mem := v_1
9815		if !(canMergeSym(sym1, sym2) && ((is16Bit(int64(off1+off2)) && (x.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))) {
9816			break
9817		}
9818		v.reset(OpPPC64MOVHstorezero)
9819		v.AuxInt = int32ToAuxInt(off1 + off2)
9820		v.Aux = symToAux(mergeSym(sym1, sym2))
9821		v.AddArg2(x, mem)
9822		return true
9823	}
9824	return false
9825}
9826func rewriteValuePPC64_OpPPC64MOVWBRstore(v *Value) bool {
9827	v_2 := v.Args[2]
9828	v_1 := v.Args[1]
9829	v_0 := v.Args[0]
9830	// match: (MOVWBRstore ptr (MOVWreg x) mem)
9831	// result: (MOVWBRstore ptr x mem)
9832	for {
9833		ptr := v_0
9834		if v_1.Op != OpPPC64MOVWreg {
9835			break
9836		}
9837		x := v_1.Args[0]
9838		mem := v_2
9839		v.reset(OpPPC64MOVWBRstore)
9840		v.AddArg3(ptr, x, mem)
9841		return true
9842	}
9843	// match: (MOVWBRstore ptr (MOVWZreg x) mem)
9844	// result: (MOVWBRstore ptr x mem)
9845	for {
9846		ptr := v_0
9847		if v_1.Op != OpPPC64MOVWZreg {
9848			break
9849		}
9850		x := v_1.Args[0]
9851		mem := v_2
9852		v.reset(OpPPC64MOVWBRstore)
9853		v.AddArg3(ptr, x, mem)
9854		return true
9855	}
9856	return false
9857}
9858func rewriteValuePPC64_OpPPC64MOVWZload(v *Value) bool {
9859	v_1 := v.Args[1]
9860	v_0 := v.Args[0]
9861	// match: (MOVWZload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
9862	// cond: canMergeSym(sym1,sym2) && ((is16Bit(int64(off1+off2)) && (ptr.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))
9863	// result: (MOVWZload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
9864	for {
9865		off1 := auxIntToInt32(v.AuxInt)
9866		sym1 := auxToSym(v.Aux)
9867		p := v_0
9868		if p.Op != OpPPC64MOVDaddr {
9869			break
9870		}
9871		off2 := auxIntToInt32(p.AuxInt)
9872		sym2 := auxToSym(p.Aux)
9873		ptr := p.Args[0]
9874		mem := v_1
9875		if !(canMergeSym(sym1, sym2) && ((is16Bit(int64(off1+off2)) && (ptr.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))) {
9876			break
9877		}
9878		v.reset(OpPPC64MOVWZload)
9879		v.AuxInt = int32ToAuxInt(off1 + off2)
9880		v.Aux = symToAux(mergeSym(sym1, sym2))
9881		v.AddArg2(ptr, mem)
9882		return true
9883	}
9884	// match: (MOVWZload [off1] {sym} (ADDconst [off2] x) mem)
9885	// cond: (is16Bit(int64(off1)+off2) || (supportsPPC64PCRel() && is32Bit(int64(off1)+off2)))
9886	// result: (MOVWZload [off1+int32(off2)] {sym} x mem)
9887	for {
9888		off1 := auxIntToInt32(v.AuxInt)
9889		sym := auxToSym(v.Aux)
9890		if v_0.Op != OpPPC64ADDconst {
9891			break
9892		}
9893		off2 := auxIntToInt64(v_0.AuxInt)
9894		x := v_0.Args[0]
9895		mem := v_1
9896		if !(is16Bit(int64(off1)+off2) || (supportsPPC64PCRel() && is32Bit(int64(off1)+off2))) {
9897			break
9898		}
9899		v.reset(OpPPC64MOVWZload)
9900		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
9901		v.Aux = symToAux(sym)
9902		v.AddArg2(x, mem)
9903		return true
9904	}
9905	// match: (MOVWZload [0] {sym} p:(ADD ptr idx) mem)
9906	// cond: sym == nil && p.Uses == 1
9907	// result: (MOVWZloadidx ptr idx mem)
9908	for {
9909		if auxIntToInt32(v.AuxInt) != 0 {
9910			break
9911		}
9912		sym := auxToSym(v.Aux)
9913		p := v_0
9914		if p.Op != OpPPC64ADD {
9915			break
9916		}
9917		idx := p.Args[1]
9918		ptr := p.Args[0]
9919		mem := v_1
9920		if !(sym == nil && p.Uses == 1) {
9921			break
9922		}
9923		v.reset(OpPPC64MOVWZloadidx)
9924		v.AddArg3(ptr, idx, mem)
9925		return true
9926	}
9927	return false
9928}
9929func rewriteValuePPC64_OpPPC64MOVWZloadidx(v *Value) bool {
9930	v_2 := v.Args[2]
9931	v_1 := v.Args[1]
9932	v_0 := v.Args[0]
9933	// match: (MOVWZloadidx ptr (MOVDconst [c]) mem)
9934	// cond: (is16Bit(c) || (buildcfg.GOPPC64 >= 10 && is32Bit(c)))
9935	// result: (MOVWZload [int32(c)] ptr mem)
9936	for {
9937		ptr := v_0
9938		if v_1.Op != OpPPC64MOVDconst {
9939			break
9940		}
9941		c := auxIntToInt64(v_1.AuxInt)
9942		mem := v_2
9943		if !(is16Bit(c) || (buildcfg.GOPPC64 >= 10 && is32Bit(c))) {
9944			break
9945		}
9946		v.reset(OpPPC64MOVWZload)
9947		v.AuxInt = int32ToAuxInt(int32(c))
9948		v.AddArg2(ptr, mem)
9949		return true
9950	}
9951	// match: (MOVWZloadidx (MOVDconst [c]) ptr mem)
9952	// cond: (is16Bit(c) || (buildcfg.GOPPC64 >= 10 && is32Bit(c)))
9953	// result: (MOVWZload [int32(c)] ptr mem)
9954	for {
9955		if v_0.Op != OpPPC64MOVDconst {
9956			break
9957		}
9958		c := auxIntToInt64(v_0.AuxInt)
9959		ptr := v_1
9960		mem := v_2
9961		if !(is16Bit(c) || (buildcfg.GOPPC64 >= 10 && is32Bit(c))) {
9962			break
9963		}
9964		v.reset(OpPPC64MOVWZload)
9965		v.AuxInt = int32ToAuxInt(int32(c))
9966		v.AddArg2(ptr, mem)
9967		return true
9968	}
9969	return false
9970}
9971func rewriteValuePPC64_OpPPC64MOVWZreg(v *Value) bool {
9972	v_0 := v.Args[0]
9973	b := v.Block
9974	typ := &b.Func.Config.Types
9975	// match: (MOVWZreg y:(ANDconst [c] _))
9976	// cond: uint64(c) <= 0xFFFFFFFF
9977	// result: y
9978	for {
9979		y := v_0
9980		if y.Op != OpPPC64ANDconst {
9981			break
9982		}
9983		c := auxIntToInt64(y.AuxInt)
9984		if !(uint64(c) <= 0xFFFFFFFF) {
9985			break
9986		}
9987		v.copyOf(y)
9988		return true
9989	}
9990	// match: (MOVWZreg y:(AND (MOVDconst [c]) _))
9991	// cond: uint64(c) <= 0xFFFFFFFF
9992	// result: y
9993	for {
9994		y := v_0
9995		if y.Op != OpPPC64AND {
9996			break
9997		}
9998		y_0 := y.Args[0]
9999		y_1 := y.Args[1]
10000		for _i0 := 0; _i0 <= 1; _i0, y_0, y_1 = _i0+1, y_1, y_0 {
10001			if y_0.Op != OpPPC64MOVDconst {
10002				continue
10003			}
10004			c := auxIntToInt64(y_0.AuxInt)
10005			if !(uint64(c) <= 0xFFFFFFFF) {
10006				continue
10007			}
10008			v.copyOf(y)
10009			return true
10010		}
10011		break
10012	}
10013	// match: (MOVWZreg (SRWconst [c] (MOVBZreg x)))
10014	// result: (SRWconst [c] (MOVBZreg x))
10015	for {
10016		if v_0.Op != OpPPC64SRWconst {
10017			break
10018		}
10019		c := auxIntToInt64(v_0.AuxInt)
10020		v_0_0 := v_0.Args[0]
10021		if v_0_0.Op != OpPPC64MOVBZreg {
10022			break
10023		}
10024		x := v_0_0.Args[0]
10025		v.reset(OpPPC64SRWconst)
10026		v.AuxInt = int64ToAuxInt(c)
10027		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
10028		v0.AddArg(x)
10029		v.AddArg(v0)
10030		return true
10031	}
10032	// match: (MOVWZreg (SRWconst [c] (MOVHZreg x)))
10033	// result: (SRWconst [c] (MOVHZreg x))
10034	for {
10035		if v_0.Op != OpPPC64SRWconst {
10036			break
10037		}
10038		c := auxIntToInt64(v_0.AuxInt)
10039		v_0_0 := v_0.Args[0]
10040		if v_0_0.Op != OpPPC64MOVHZreg {
10041			break
10042		}
10043		x := v_0_0.Args[0]
10044		v.reset(OpPPC64SRWconst)
10045		v.AuxInt = int64ToAuxInt(c)
10046		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
10047		v0.AddArg(x)
10048		v.AddArg(v0)
10049		return true
10050	}
10051	// match: (MOVWZreg (SRWconst [c] (MOVWZreg x)))
10052	// result: (SRWconst [c] (MOVWZreg x))
10053	for {
10054		if v_0.Op != OpPPC64SRWconst {
10055			break
10056		}
10057		c := auxIntToInt64(v_0.AuxInt)
10058		v_0_0 := v_0.Args[0]
10059		if v_0_0.Op != OpPPC64MOVWZreg {
10060			break
10061		}
10062		x := v_0_0.Args[0]
10063		v.reset(OpPPC64SRWconst)
10064		v.AuxInt = int64ToAuxInt(c)
10065		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZreg, typ.Int64)
10066		v0.AddArg(x)
10067		v.AddArg(v0)
10068		return true
10069	}
10070	// match: (MOVWZreg (SRWconst [c] x))
10071	// cond: sizeof(x.Type) <= 32
10072	// result: (SRWconst [c] x)
10073	for {
10074		if v_0.Op != OpPPC64SRWconst {
10075			break
10076		}
10077		c := auxIntToInt64(v_0.AuxInt)
10078		x := v_0.Args[0]
10079		if !(sizeof(x.Type) <= 32) {
10080			break
10081		}
10082		v.reset(OpPPC64SRWconst)
10083		v.AuxInt = int64ToAuxInt(c)
10084		v.AddArg(x)
10085		return true
10086	}
10087	// match: (MOVWZreg (SRDconst [c] x))
10088	// cond: c>=32
10089	// result: (SRDconst [c] x)
10090	for {
10091		if v_0.Op != OpPPC64SRDconst {
10092			break
10093		}
10094		c := auxIntToInt64(v_0.AuxInt)
10095		x := v_0.Args[0]
10096		if !(c >= 32) {
10097			break
10098		}
10099		v.reset(OpPPC64SRDconst)
10100		v.AuxInt = int64ToAuxInt(c)
10101		v.AddArg(x)
10102		return true
10103	}
10104	// match: (MOVWZreg (RLWINM [r] y))
10105	// cond: mergePPC64MovwzregRlwinm(r) != 0
10106	// result: (RLWINM [mergePPC64MovwzregRlwinm(r)] y)
10107	for {
10108		if v_0.Op != OpPPC64RLWINM {
10109			break
10110		}
10111		r := auxIntToInt64(v_0.AuxInt)
10112		y := v_0.Args[0]
10113		if !(mergePPC64MovwzregRlwinm(r) != 0) {
10114			break
10115		}
10116		v.reset(OpPPC64RLWINM)
10117		v.AuxInt = int64ToAuxInt(mergePPC64MovwzregRlwinm(r))
10118		v.AddArg(y)
10119		return true
10120	}
10121	// match: (MOVWZreg w:(SLWconst u))
10122	// result: w
10123	for {
10124		w := v_0
10125		if w.Op != OpPPC64SLWconst {
10126			break
10127		}
10128		v.copyOf(w)
10129		return true
10130	}
10131	// match: (MOVWZreg y:(MOVWZreg _))
10132	// result: y
10133	for {
10134		y := v_0
10135		if y.Op != OpPPC64MOVWZreg {
10136			break
10137		}
10138		v.copyOf(y)
10139		return true
10140	}
10141	// match: (MOVWZreg y:(MOVHZreg _))
10142	// result: y
10143	for {
10144		y := v_0
10145		if y.Op != OpPPC64MOVHZreg {
10146			break
10147		}
10148		v.copyOf(y)
10149		return true
10150	}
10151	// match: (MOVWZreg y:(MOVBZreg _))
10152	// result: y
10153	for {
10154		y := v_0
10155		if y.Op != OpPPC64MOVBZreg {
10156			break
10157		}
10158		v.copyOf(y)
10159		return true
10160	}
10161	// match: (MOVWZreg y:(MOVHBRload _ _))
10162	// result: y
10163	for {
10164		y := v_0
10165		if y.Op != OpPPC64MOVHBRload {
10166			break
10167		}
10168		v.copyOf(y)
10169		return true
10170	}
10171	// match: (MOVWZreg y:(MOVWBRload _ _))
10172	// result: y
10173	for {
10174		y := v_0
10175		if y.Op != OpPPC64MOVWBRload {
10176			break
10177		}
10178		v.copyOf(y)
10179		return true
10180	}
10181	// match: (MOVWZreg y:(MOVWreg x))
10182	// result: (MOVWZreg x)
10183	for {
10184		y := v_0
10185		if y.Op != OpPPC64MOVWreg {
10186			break
10187		}
10188		x := y.Args[0]
10189		v.reset(OpPPC64MOVWZreg)
10190		v.AddArg(x)
10191		return true
10192	}
10193	// match: (MOVWZreg (OR <t> x (MOVWZreg y)))
10194	// result: (MOVWZreg (OR <t> x y))
10195	for {
10196		if v_0.Op != OpPPC64OR {
10197			break
10198		}
10199		t := v_0.Type
10200		_ = v_0.Args[1]
10201		v_0_0 := v_0.Args[0]
10202		v_0_1 := v_0.Args[1]
10203		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
10204			x := v_0_0
10205			if v_0_1.Op != OpPPC64MOVWZreg {
10206				continue
10207			}
10208			y := v_0_1.Args[0]
10209			v.reset(OpPPC64MOVWZreg)
10210			v0 := b.NewValue0(v.Pos, OpPPC64OR, t)
10211			v0.AddArg2(x, y)
10212			v.AddArg(v0)
10213			return true
10214		}
10215		break
10216	}
10217	// match: (MOVWZreg (XOR <t> x (MOVWZreg y)))
10218	// result: (MOVWZreg (XOR <t> x y))
10219	for {
10220		if v_0.Op != OpPPC64XOR {
10221			break
10222		}
10223		t := v_0.Type
10224		_ = v_0.Args[1]
10225		v_0_0 := v_0.Args[0]
10226		v_0_1 := v_0.Args[1]
10227		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
10228			x := v_0_0
10229			if v_0_1.Op != OpPPC64MOVWZreg {
10230				continue
10231			}
10232			y := v_0_1.Args[0]
10233			v.reset(OpPPC64MOVWZreg)
10234			v0 := b.NewValue0(v.Pos, OpPPC64XOR, t)
10235			v0.AddArg2(x, y)
10236			v.AddArg(v0)
10237			return true
10238		}
10239		break
10240	}
10241	// match: (MOVWZreg (AND <t> x (MOVWZreg y)))
10242	// result: (MOVWZreg (AND <t> x y))
10243	for {
10244		if v_0.Op != OpPPC64AND {
10245			break
10246		}
10247		t := v_0.Type
10248		_ = v_0.Args[1]
10249		v_0_0 := v_0.Args[0]
10250		v_0_1 := v_0.Args[1]
10251		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
10252			x := v_0_0
10253			if v_0_1.Op != OpPPC64MOVWZreg {
10254				continue
10255			}
10256			y := v_0_1.Args[0]
10257			v.reset(OpPPC64MOVWZreg)
10258			v0 := b.NewValue0(v.Pos, OpPPC64AND, t)
10259			v0.AddArg2(x, y)
10260			v.AddArg(v0)
10261			return true
10262		}
10263		break
10264	}
10265	// match: (MOVWZreg z:(ANDconst [c] (MOVBZload ptr x)))
10266	// result: z
10267	for {
10268		z := v_0
10269		if z.Op != OpPPC64ANDconst {
10270			break
10271		}
10272		z_0 := z.Args[0]
10273		if z_0.Op != OpPPC64MOVBZload {
10274			break
10275		}
10276		v.copyOf(z)
10277		return true
10278	}
10279	// match: (MOVWZreg z:(AND y (MOVWZload ptr x)))
10280	// result: z
10281	for {
10282		z := v_0
10283		if z.Op != OpPPC64AND {
10284			break
10285		}
10286		_ = z.Args[1]
10287		z_0 := z.Args[0]
10288		z_1 := z.Args[1]
10289		for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
10290			if z_1.Op != OpPPC64MOVWZload {
10291				continue
10292			}
10293			v.copyOf(z)
10294			return true
10295		}
10296		break
10297	}
10298	// match: (MOVWZreg z:(ANDconst [c] (MOVHZload ptr x)))
10299	// result: z
10300	for {
10301		z := v_0
10302		if z.Op != OpPPC64ANDconst {
10303			break
10304		}
10305		z_0 := z.Args[0]
10306		if z_0.Op != OpPPC64MOVHZload {
10307			break
10308		}
10309		v.copyOf(z)
10310		return true
10311	}
10312	// match: (MOVWZreg z:(ANDconst [c] (MOVWZload ptr x)))
10313	// result: z
10314	for {
10315		z := v_0
10316		if z.Op != OpPPC64ANDconst {
10317			break
10318		}
10319		z_0 := z.Args[0]
10320		if z_0.Op != OpPPC64MOVWZload {
10321			break
10322		}
10323		v.copyOf(z)
10324		return true
10325	}
10326	// match: (MOVWZreg x:(MOVBZload _ _))
10327	// result: x
10328	for {
10329		x := v_0
10330		if x.Op != OpPPC64MOVBZload {
10331			break
10332		}
10333		v.copyOf(x)
10334		return true
10335	}
10336	// match: (MOVWZreg x:(MOVBZloadidx _ _ _))
10337	// result: x
10338	for {
10339		x := v_0
10340		if x.Op != OpPPC64MOVBZloadidx {
10341			break
10342		}
10343		v.copyOf(x)
10344		return true
10345	}
10346	// match: (MOVWZreg x:(MOVHZload _ _))
10347	// result: x
10348	for {
10349		x := v_0
10350		if x.Op != OpPPC64MOVHZload {
10351			break
10352		}
10353		v.copyOf(x)
10354		return true
10355	}
10356	// match: (MOVWZreg x:(MOVHZloadidx _ _ _))
10357	// result: x
10358	for {
10359		x := v_0
10360		if x.Op != OpPPC64MOVHZloadidx {
10361			break
10362		}
10363		v.copyOf(x)
10364		return true
10365	}
10366	// match: (MOVWZreg x:(MOVWZload _ _))
10367	// result: x
10368	for {
10369		x := v_0
10370		if x.Op != OpPPC64MOVWZload {
10371			break
10372		}
10373		v.copyOf(x)
10374		return true
10375	}
10376	// match: (MOVWZreg x:(MOVWZloadidx _ _ _))
10377	// result: x
10378	for {
10379		x := v_0
10380		if x.Op != OpPPC64MOVWZloadidx {
10381			break
10382		}
10383		v.copyOf(x)
10384		return true
10385	}
10386	// match: (MOVWZreg x:(Select0 (LoweredAtomicLoad32 _ _)))
10387	// result: x
10388	for {
10389		x := v_0
10390		if x.Op != OpSelect0 {
10391			break
10392		}
10393		x_0 := x.Args[0]
10394		if x_0.Op != OpPPC64LoweredAtomicLoad32 {
10395			break
10396		}
10397		v.copyOf(x)
10398		return true
10399	}
10400	// match: (MOVWZreg x:(Arg <t>))
10401	// cond: (is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && !t.IsSigned()
10402	// result: x
10403	for {
10404		x := v_0
10405		if x.Op != OpArg {
10406			break
10407		}
10408		t := x.Type
10409		if !((is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && !t.IsSigned()) {
10410			break
10411		}
10412		v.copyOf(x)
10413		return true
10414	}
10415	// match: (MOVWZreg (MOVDconst [c]))
10416	// result: (MOVDconst [int64(uint32(c))])
10417	for {
10418		if v_0.Op != OpPPC64MOVDconst {
10419			break
10420		}
10421		c := auxIntToInt64(v_0.AuxInt)
10422		v.reset(OpPPC64MOVDconst)
10423		v.AuxInt = int64ToAuxInt(int64(uint32(c)))
10424		return true
10425	}
10426	return false
10427}
10428func rewriteValuePPC64_OpPPC64MOVWload(v *Value) bool {
10429	v_1 := v.Args[1]
10430	v_0 := v.Args[0]
10431	// match: (MOVWload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
10432	// cond: canMergeSym(sym1,sym2) && ((is16Bit(int64(off1+off2)) && (ptr.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))
10433	// result: (MOVWload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
10434	for {
10435		off1 := auxIntToInt32(v.AuxInt)
10436		sym1 := auxToSym(v.Aux)
10437		p := v_0
10438		if p.Op != OpPPC64MOVDaddr {
10439			break
10440		}
10441		off2 := auxIntToInt32(p.AuxInt)
10442		sym2 := auxToSym(p.Aux)
10443		ptr := p.Args[0]
10444		mem := v_1
10445		if !(canMergeSym(sym1, sym2) && ((is16Bit(int64(off1+off2)) && (ptr.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))) {
10446			break
10447		}
10448		v.reset(OpPPC64MOVWload)
10449		v.AuxInt = int32ToAuxInt(off1 + off2)
10450		v.Aux = symToAux(mergeSym(sym1, sym2))
10451		v.AddArg2(ptr, mem)
10452		return true
10453	}
10454	// match: (MOVWload [off1] {sym} (ADDconst [off2] x) mem)
10455	// cond: (is16Bit(int64(off1)+off2) || (supportsPPC64PCRel() && is32Bit(int64(off1)+off2)))
10456	// result: (MOVWload [off1+int32(off2)] {sym} x mem)
10457	for {
10458		off1 := auxIntToInt32(v.AuxInt)
10459		sym := auxToSym(v.Aux)
10460		if v_0.Op != OpPPC64ADDconst {
10461			break
10462		}
10463		off2 := auxIntToInt64(v_0.AuxInt)
10464		x := v_0.Args[0]
10465		mem := v_1
10466		if !(is16Bit(int64(off1)+off2) || (supportsPPC64PCRel() && is32Bit(int64(off1)+off2))) {
10467			break
10468		}
10469		v.reset(OpPPC64MOVWload)
10470		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
10471		v.Aux = symToAux(sym)
10472		v.AddArg2(x, mem)
10473		return true
10474	}
10475	// match: (MOVWload [0] {sym} p:(ADD ptr idx) mem)
10476	// cond: sym == nil && p.Uses == 1
10477	// result: (MOVWloadidx ptr idx mem)
10478	for {
10479		if auxIntToInt32(v.AuxInt) != 0 {
10480			break
10481		}
10482		sym := auxToSym(v.Aux)
10483		p := v_0
10484		if p.Op != OpPPC64ADD {
10485			break
10486		}
10487		idx := p.Args[1]
10488		ptr := p.Args[0]
10489		mem := v_1
10490		if !(sym == nil && p.Uses == 1) {
10491			break
10492		}
10493		v.reset(OpPPC64MOVWloadidx)
10494		v.AddArg3(ptr, idx, mem)
10495		return true
10496	}
10497	return false
10498}
10499func rewriteValuePPC64_OpPPC64MOVWloadidx(v *Value) bool {
10500	v_2 := v.Args[2]
10501	v_1 := v.Args[1]
10502	v_0 := v.Args[0]
10503	// match: (MOVWloadidx ptr (MOVDconst [c]) mem)
10504	// cond: ((is16Bit(c) && c%4 == 0) || (buildcfg.GOPPC64 >= 10 && is32Bit(c)))
10505	// result: (MOVWload [int32(c)] ptr mem)
10506	for {
10507		ptr := v_0
10508		if v_1.Op != OpPPC64MOVDconst {
10509			break
10510		}
10511		c := auxIntToInt64(v_1.AuxInt)
10512		mem := v_2
10513		if !((is16Bit(c) && c%4 == 0) || (buildcfg.GOPPC64 >= 10 && is32Bit(c))) {
10514			break
10515		}
10516		v.reset(OpPPC64MOVWload)
10517		v.AuxInt = int32ToAuxInt(int32(c))
10518		v.AddArg2(ptr, mem)
10519		return true
10520	}
10521	// match: (MOVWloadidx (MOVDconst [c]) ptr mem)
10522	// cond: ((is16Bit(c) && c%4 == 0) || (buildcfg.GOPPC64 >= 10 && is32Bit(c)))
10523	// result: (MOVWload [int32(c)] ptr mem)
10524	for {
10525		if v_0.Op != OpPPC64MOVDconst {
10526			break
10527		}
10528		c := auxIntToInt64(v_0.AuxInt)
10529		ptr := v_1
10530		mem := v_2
10531		if !((is16Bit(c) && c%4 == 0) || (buildcfg.GOPPC64 >= 10 && is32Bit(c))) {
10532			break
10533		}
10534		v.reset(OpPPC64MOVWload)
10535		v.AuxInt = int32ToAuxInt(int32(c))
10536		v.AddArg2(ptr, mem)
10537		return true
10538	}
10539	return false
10540}
10541func rewriteValuePPC64_OpPPC64MOVWreg(v *Value) bool {
10542	v_0 := v.Args[0]
10543	b := v.Block
10544	typ := &b.Func.Config.Types
10545	// match: (MOVWreg y:(ANDconst [c] _))
10546	// cond: uint64(c) <= 0xFFFF
10547	// result: y
10548	for {
10549		y := v_0
10550		if y.Op != OpPPC64ANDconst {
10551			break
10552		}
10553		c := auxIntToInt64(y.AuxInt)
10554		if !(uint64(c) <= 0xFFFF) {
10555			break
10556		}
10557		v.copyOf(y)
10558		return true
10559	}
10560	// match: (MOVWreg y:(AND (MOVDconst [c]) _))
10561	// cond: uint64(c) <= 0x7FFFFFFF
10562	// result: y
10563	for {
10564		y := v_0
10565		if y.Op != OpPPC64AND {
10566			break
10567		}
10568		y_0 := y.Args[0]
10569		y_1 := y.Args[1]
10570		for _i0 := 0; _i0 <= 1; _i0, y_0, y_1 = _i0+1, y_1, y_0 {
10571			if y_0.Op != OpPPC64MOVDconst {
10572				continue
10573			}
10574			c := auxIntToInt64(y_0.AuxInt)
10575			if !(uint64(c) <= 0x7FFFFFFF) {
10576				continue
10577			}
10578			v.copyOf(y)
10579			return true
10580		}
10581		break
10582	}
10583	// match: (MOVWreg (SRAWconst [c] (MOVBreg x)))
10584	// result: (SRAWconst [c] (MOVBreg x))
10585	for {
10586		if v_0.Op != OpPPC64SRAWconst {
10587			break
10588		}
10589		c := auxIntToInt64(v_0.AuxInt)
10590		v_0_0 := v_0.Args[0]
10591		if v_0_0.Op != OpPPC64MOVBreg {
10592			break
10593		}
10594		x := v_0_0.Args[0]
10595		v.reset(OpPPC64SRAWconst)
10596		v.AuxInt = int64ToAuxInt(c)
10597		v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
10598		v0.AddArg(x)
10599		v.AddArg(v0)
10600		return true
10601	}
10602	// match: (MOVWreg (SRAWconst [c] (MOVHreg x)))
10603	// result: (SRAWconst [c] (MOVHreg x))
10604	for {
10605		if v_0.Op != OpPPC64SRAWconst {
10606			break
10607		}
10608		c := auxIntToInt64(v_0.AuxInt)
10609		v_0_0 := v_0.Args[0]
10610		if v_0_0.Op != OpPPC64MOVHreg {
10611			break
10612		}
10613		x := v_0_0.Args[0]
10614		v.reset(OpPPC64SRAWconst)
10615		v.AuxInt = int64ToAuxInt(c)
10616		v0 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
10617		v0.AddArg(x)
10618		v.AddArg(v0)
10619		return true
10620	}
10621	// match: (MOVWreg (SRAWconst [c] (MOVWreg x)))
10622	// result: (SRAWconst [c] (MOVWreg x))
10623	for {
10624		if v_0.Op != OpPPC64SRAWconst {
10625			break
10626		}
10627		c := auxIntToInt64(v_0.AuxInt)
10628		v_0_0 := v_0.Args[0]
10629		if v_0_0.Op != OpPPC64MOVWreg {
10630			break
10631		}
10632		x := v_0_0.Args[0]
10633		v.reset(OpPPC64SRAWconst)
10634		v.AuxInt = int64ToAuxInt(c)
10635		v0 := b.NewValue0(v.Pos, OpPPC64MOVWreg, typ.Int64)
10636		v0.AddArg(x)
10637		v.AddArg(v0)
10638		return true
10639	}
10640	// match: (MOVWreg (SRAWconst [c] x))
10641	// cond: sizeof(x.Type) <= 32
10642	// result: (SRAWconst [c] x)
10643	for {
10644		if v_0.Op != OpPPC64SRAWconst {
10645			break
10646		}
10647		c := auxIntToInt64(v_0.AuxInt)
10648		x := v_0.Args[0]
10649		if !(sizeof(x.Type) <= 32) {
10650			break
10651		}
10652		v.reset(OpPPC64SRAWconst)
10653		v.AuxInt = int64ToAuxInt(c)
10654		v.AddArg(x)
10655		return true
10656	}
10657	// match: (MOVWreg (SRDconst [c] x))
10658	// cond: c>32
10659	// result: (SRDconst [c] x)
10660	for {
10661		if v_0.Op != OpPPC64SRDconst {
10662			break
10663		}
10664		c := auxIntToInt64(v_0.AuxInt)
10665		x := v_0.Args[0]
10666		if !(c > 32) {
10667			break
10668		}
10669		v.reset(OpPPC64SRDconst)
10670		v.AuxInt = int64ToAuxInt(c)
10671		v.AddArg(x)
10672		return true
10673	}
10674	// match: (MOVWreg (SRADconst [c] x))
10675	// cond: c>=32
10676	// result: (SRADconst [c] x)
10677	for {
10678		if v_0.Op != OpPPC64SRADconst {
10679			break
10680		}
10681		c := auxIntToInt64(v_0.AuxInt)
10682		x := v_0.Args[0]
10683		if !(c >= 32) {
10684			break
10685		}
10686		v.reset(OpPPC64SRADconst)
10687		v.AuxInt = int64ToAuxInt(c)
10688		v.AddArg(x)
10689		return true
10690	}
10691	// match: (MOVWreg (SRDconst [c] x))
10692	// cond: c==32
10693	// result: (SRADconst [c] x)
10694	for {
10695		if v_0.Op != OpPPC64SRDconst {
10696			break
10697		}
10698		c := auxIntToInt64(v_0.AuxInt)
10699		x := v_0.Args[0]
10700		if !(c == 32) {
10701			break
10702		}
10703		v.reset(OpPPC64SRADconst)
10704		v.AuxInt = int64ToAuxInt(c)
10705		v.AddArg(x)
10706		return true
10707	}
10708	// match: (MOVWreg y:(MOVWreg _))
10709	// result: y
10710	for {
10711		y := v_0
10712		if y.Op != OpPPC64MOVWreg {
10713			break
10714		}
10715		v.copyOf(y)
10716		return true
10717	}
10718	// match: (MOVWreg y:(MOVHreg _))
10719	// result: y
10720	for {
10721		y := v_0
10722		if y.Op != OpPPC64MOVHreg {
10723			break
10724		}
10725		v.copyOf(y)
10726		return true
10727	}
10728	// match: (MOVWreg y:(MOVBreg _))
10729	// result: y
10730	for {
10731		y := v_0
10732		if y.Op != OpPPC64MOVBreg {
10733			break
10734		}
10735		v.copyOf(y)
10736		return true
10737	}
10738	// match: (MOVWreg y:(MOVWZreg x))
10739	// result: (MOVWreg x)
10740	for {
10741		y := v_0
10742		if y.Op != OpPPC64MOVWZreg {
10743			break
10744		}
10745		x := y.Args[0]
10746		v.reset(OpPPC64MOVWreg)
10747		v.AddArg(x)
10748		return true
10749	}
10750	// match: (MOVWreg x:(MOVHload _ _))
10751	// result: x
10752	for {
10753		x := v_0
10754		if x.Op != OpPPC64MOVHload {
10755			break
10756		}
10757		v.copyOf(x)
10758		return true
10759	}
10760	// match: (MOVWreg x:(MOVHloadidx _ _ _))
10761	// result: x
10762	for {
10763		x := v_0
10764		if x.Op != OpPPC64MOVHloadidx {
10765			break
10766		}
10767		v.copyOf(x)
10768		return true
10769	}
10770	// match: (MOVWreg x:(MOVWload _ _))
10771	// result: x
10772	for {
10773		x := v_0
10774		if x.Op != OpPPC64MOVWload {
10775			break
10776		}
10777		v.copyOf(x)
10778		return true
10779	}
10780	// match: (MOVWreg x:(MOVWloadidx _ _ _))
10781	// result: x
10782	for {
10783		x := v_0
10784		if x.Op != OpPPC64MOVWloadidx {
10785			break
10786		}
10787		v.copyOf(x)
10788		return true
10789	}
10790	// match: (MOVWreg x:(Arg <t>))
10791	// cond: (is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && t.IsSigned()
10792	// result: x
10793	for {
10794		x := v_0
10795		if x.Op != OpArg {
10796			break
10797		}
10798		t := x.Type
10799		if !((is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && t.IsSigned()) {
10800			break
10801		}
10802		v.copyOf(x)
10803		return true
10804	}
10805	// match: (MOVWreg (MOVDconst [c]))
10806	// result: (MOVDconst [int64(int32(c))])
10807	for {
10808		if v_0.Op != OpPPC64MOVDconst {
10809			break
10810		}
10811		c := auxIntToInt64(v_0.AuxInt)
10812		v.reset(OpPPC64MOVDconst)
10813		v.AuxInt = int64ToAuxInt(int64(int32(c)))
10814		return true
10815	}
10816	return false
10817}
10818func rewriteValuePPC64_OpPPC64MOVWstore(v *Value) bool {
10819	v_2 := v.Args[2]
10820	v_1 := v.Args[1]
10821	v_0 := v.Args[0]
10822	b := v.Block
10823	// match: (MOVWstore [off1] {sym} (ADDconst [off2] x) val mem)
10824	// cond: (is16Bit(int64(off1)+off2) || (supportsPPC64PCRel() && is32Bit(int64(off1)+off2)))
10825	// result: (MOVWstore [off1+int32(off2)] {sym} x val mem)
10826	for {
10827		off1 := auxIntToInt32(v.AuxInt)
10828		sym := auxToSym(v.Aux)
10829		if v_0.Op != OpPPC64ADDconst {
10830			break
10831		}
10832		off2 := auxIntToInt64(v_0.AuxInt)
10833		x := v_0.Args[0]
10834		val := v_1
10835		mem := v_2
10836		if !(is16Bit(int64(off1)+off2) || (supportsPPC64PCRel() && is32Bit(int64(off1)+off2))) {
10837			break
10838		}
10839		v.reset(OpPPC64MOVWstore)
10840		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
10841		v.Aux = symToAux(sym)
10842		v.AddArg3(x, val, mem)
10843		return true
10844	}
10845	// match: (MOVWstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
10846	// cond: canMergeSym(sym1,sym2) && ((is16Bit(int64(off1+off2)) && (ptr.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))
10847	// result: (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
10848	for {
10849		off1 := auxIntToInt32(v.AuxInt)
10850		sym1 := auxToSym(v.Aux)
10851		p := v_0
10852		if p.Op != OpPPC64MOVDaddr {
10853			break
10854		}
10855		off2 := auxIntToInt32(p.AuxInt)
10856		sym2 := auxToSym(p.Aux)
10857		ptr := p.Args[0]
10858		val := v_1
10859		mem := v_2
10860		if !(canMergeSym(sym1, sym2) && ((is16Bit(int64(off1+off2)) && (ptr.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))) {
10861			break
10862		}
10863		v.reset(OpPPC64MOVWstore)
10864		v.AuxInt = int32ToAuxInt(off1 + off2)
10865		v.Aux = symToAux(mergeSym(sym1, sym2))
10866		v.AddArg3(ptr, val, mem)
10867		return true
10868	}
10869	// match: (MOVWstore [off] {sym} ptr (MOVDconst [0]) mem)
10870	// result: (MOVWstorezero [off] {sym} ptr mem)
10871	for {
10872		off := auxIntToInt32(v.AuxInt)
10873		sym := auxToSym(v.Aux)
10874		ptr := v_0
10875		if v_1.Op != OpPPC64MOVDconst || auxIntToInt64(v_1.AuxInt) != 0 {
10876			break
10877		}
10878		mem := v_2
10879		v.reset(OpPPC64MOVWstorezero)
10880		v.AuxInt = int32ToAuxInt(off)
10881		v.Aux = symToAux(sym)
10882		v.AddArg2(ptr, mem)
10883		return true
10884	}
10885	// match: (MOVWstore [0] {sym} p:(ADD ptr idx) val mem)
10886	// cond: sym == nil && p.Uses == 1
10887	// result: (MOVWstoreidx ptr idx val mem)
10888	for {
10889		if auxIntToInt32(v.AuxInt) != 0 {
10890			break
10891		}
10892		sym := auxToSym(v.Aux)
10893		p := v_0
10894		if p.Op != OpPPC64ADD {
10895			break
10896		}
10897		idx := p.Args[1]
10898		ptr := p.Args[0]
10899		val := v_1
10900		mem := v_2
10901		if !(sym == nil && p.Uses == 1) {
10902			break
10903		}
10904		v.reset(OpPPC64MOVWstoreidx)
10905		v.AddArg4(ptr, idx, val, mem)
10906		return true
10907	}
10908	// match: (MOVWstore [off] {sym} ptr (MOVWreg x) mem)
10909	// result: (MOVWstore [off] {sym} ptr x mem)
10910	for {
10911		off := auxIntToInt32(v.AuxInt)
10912		sym := auxToSym(v.Aux)
10913		ptr := v_0
10914		if v_1.Op != OpPPC64MOVWreg {
10915			break
10916		}
10917		x := v_1.Args[0]
10918		mem := v_2
10919		v.reset(OpPPC64MOVWstore)
10920		v.AuxInt = int32ToAuxInt(off)
10921		v.Aux = symToAux(sym)
10922		v.AddArg3(ptr, x, mem)
10923		return true
10924	}
10925	// match: (MOVWstore [off] {sym} ptr (MOVWZreg x) mem)
10926	// result: (MOVWstore [off] {sym} ptr x mem)
10927	for {
10928		off := auxIntToInt32(v.AuxInt)
10929		sym := auxToSym(v.Aux)
10930		ptr := v_0
10931		if v_1.Op != OpPPC64MOVWZreg {
10932			break
10933		}
10934		x := v_1.Args[0]
10935		mem := v_2
10936		v.reset(OpPPC64MOVWstore)
10937		v.AuxInt = int32ToAuxInt(off)
10938		v.Aux = symToAux(sym)
10939		v.AddArg3(ptr, x, mem)
10940		return true
10941	}
10942	// match: (MOVWstore [off] {sym} ptr r:(BRW val) mem)
10943	// cond: r.Uses == 1
10944	// result: (MOVWBRstore (MOVDaddr <ptr.Type> [off] {sym} ptr) val mem)
10945	for {
10946		off := auxIntToInt32(v.AuxInt)
10947		sym := auxToSym(v.Aux)
10948		ptr := v_0
10949		r := v_1
10950		if r.Op != OpPPC64BRW {
10951			break
10952		}
10953		val := r.Args[0]
10954		mem := v_2
10955		if !(r.Uses == 1) {
10956			break
10957		}
10958		v.reset(OpPPC64MOVWBRstore)
10959		v0 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, ptr.Type)
10960		v0.AuxInt = int32ToAuxInt(off)
10961		v0.Aux = symToAux(sym)
10962		v0.AddArg(ptr)
10963		v.AddArg3(v0, val, mem)
10964		return true
10965	}
10966	// match: (MOVWstore [off] {sym} ptr (Bswap32 val) mem)
10967	// result: (MOVWBRstore (MOVDaddr <ptr.Type> [off] {sym} ptr) val mem)
10968	for {
10969		off := auxIntToInt32(v.AuxInt)
10970		sym := auxToSym(v.Aux)
10971		ptr := v_0
10972		if v_1.Op != OpBswap32 {
10973			break
10974		}
10975		val := v_1.Args[0]
10976		mem := v_2
10977		v.reset(OpPPC64MOVWBRstore)
10978		v0 := b.NewValue0(v.Pos, OpPPC64MOVDaddr, ptr.Type)
10979		v0.AuxInt = int32ToAuxInt(off)
10980		v0.Aux = symToAux(sym)
10981		v0.AddArg(ptr)
10982		v.AddArg3(v0, val, mem)
10983		return true
10984	}
10985	return false
10986}
10987func rewriteValuePPC64_OpPPC64MOVWstoreidx(v *Value) bool {
10988	v_3 := v.Args[3]
10989	v_2 := v.Args[2]
10990	v_1 := v.Args[1]
10991	v_0 := v.Args[0]
10992	// match: (MOVWstoreidx ptr (MOVDconst [c]) val mem)
10993	// cond: (is16Bit(c) || (buildcfg.GOPPC64 >= 10 && is32Bit(c)))
10994	// result: (MOVWstore [int32(c)] ptr val mem)
10995	for {
10996		ptr := v_0
10997		if v_1.Op != OpPPC64MOVDconst {
10998			break
10999		}
11000		c := auxIntToInt64(v_1.AuxInt)
11001		val := v_2
11002		mem := v_3
11003		if !(is16Bit(c) || (buildcfg.GOPPC64 >= 10 && is32Bit(c))) {
11004			break
11005		}
11006		v.reset(OpPPC64MOVWstore)
11007		v.AuxInt = int32ToAuxInt(int32(c))
11008		v.AddArg3(ptr, val, mem)
11009		return true
11010	}
11011	// match: (MOVWstoreidx (MOVDconst [c]) ptr val mem)
11012	// cond: (is16Bit(c) || (buildcfg.GOPPC64 >= 10 && is32Bit(c)))
11013	// result: (MOVWstore [int32(c)] ptr val mem)
11014	for {
11015		if v_0.Op != OpPPC64MOVDconst {
11016			break
11017		}
11018		c := auxIntToInt64(v_0.AuxInt)
11019		ptr := v_1
11020		val := v_2
11021		mem := v_3
11022		if !(is16Bit(c) || (buildcfg.GOPPC64 >= 10 && is32Bit(c))) {
11023			break
11024		}
11025		v.reset(OpPPC64MOVWstore)
11026		v.AuxInt = int32ToAuxInt(int32(c))
11027		v.AddArg3(ptr, val, mem)
11028		return true
11029	}
11030	// match: (MOVWstoreidx ptr idx (MOVWreg x) mem)
11031	// result: (MOVWstoreidx ptr idx x mem)
11032	for {
11033		ptr := v_0
11034		idx := v_1
11035		if v_2.Op != OpPPC64MOVWreg {
11036			break
11037		}
11038		x := v_2.Args[0]
11039		mem := v_3
11040		v.reset(OpPPC64MOVWstoreidx)
11041		v.AddArg4(ptr, idx, x, mem)
11042		return true
11043	}
11044	// match: (MOVWstoreidx ptr idx (MOVWZreg x) mem)
11045	// result: (MOVWstoreidx ptr idx x mem)
11046	for {
11047		ptr := v_0
11048		idx := v_1
11049		if v_2.Op != OpPPC64MOVWZreg {
11050			break
11051		}
11052		x := v_2.Args[0]
11053		mem := v_3
11054		v.reset(OpPPC64MOVWstoreidx)
11055		v.AddArg4(ptr, idx, x, mem)
11056		return true
11057	}
11058	// match: (MOVWstoreidx ptr idx r:(BRW val) mem)
11059	// cond: r.Uses == 1
11060	// result: (MOVWBRstoreidx ptr idx val mem)
11061	for {
11062		ptr := v_0
11063		idx := v_1
11064		r := v_2
11065		if r.Op != OpPPC64BRW {
11066			break
11067		}
11068		val := r.Args[0]
11069		mem := v_3
11070		if !(r.Uses == 1) {
11071			break
11072		}
11073		v.reset(OpPPC64MOVWBRstoreidx)
11074		v.AddArg4(ptr, idx, val, mem)
11075		return true
11076	}
11077	// match: (MOVWstoreidx ptr idx (Bswap32 val) mem)
11078	// result: (MOVWBRstoreidx ptr idx val mem)
11079	for {
11080		ptr := v_0
11081		idx := v_1
11082		if v_2.Op != OpBswap32 {
11083			break
11084		}
11085		val := v_2.Args[0]
11086		mem := v_3
11087		v.reset(OpPPC64MOVWBRstoreidx)
11088		v.AddArg4(ptr, idx, val, mem)
11089		return true
11090	}
11091	return false
11092}
11093func rewriteValuePPC64_OpPPC64MOVWstorezero(v *Value) bool {
11094	v_1 := v.Args[1]
11095	v_0 := v.Args[0]
11096	// match: (MOVWstorezero [off1] {sym} (ADDconst [off2] x) mem)
11097	// cond: ((supportsPPC64PCRel() && is32Bit(int64(off1)+off2)) || (is16Bit(int64(off1)+off2)))
11098	// result: (MOVWstorezero [off1+int32(off2)] {sym} x mem)
11099	for {
11100		off1 := auxIntToInt32(v.AuxInt)
11101		sym := auxToSym(v.Aux)
11102		if v_0.Op != OpPPC64ADDconst {
11103			break
11104		}
11105		off2 := auxIntToInt64(v_0.AuxInt)
11106		x := v_0.Args[0]
11107		mem := v_1
11108		if !((supportsPPC64PCRel() && is32Bit(int64(off1)+off2)) || (is16Bit(int64(off1) + off2))) {
11109			break
11110		}
11111		v.reset(OpPPC64MOVWstorezero)
11112		v.AuxInt = int32ToAuxInt(off1 + int32(off2))
11113		v.Aux = symToAux(sym)
11114		v.AddArg2(x, mem)
11115		return true
11116	}
11117	// match: (MOVWstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem)
11118	// cond: canMergeSym(sym1,sym2) && ((is16Bit(int64(off1+off2)) && (x.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))
11119	// result: (MOVWstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
11120	for {
11121		off1 := auxIntToInt32(v.AuxInt)
11122		sym1 := auxToSym(v.Aux)
11123		p := v_0
11124		if p.Op != OpPPC64MOVDaddr {
11125			break
11126		}
11127		off2 := auxIntToInt32(p.AuxInt)
11128		sym2 := auxToSym(p.Aux)
11129		x := p.Args[0]
11130		mem := v_1
11131		if !(canMergeSym(sym1, sym2) && ((is16Bit(int64(off1+off2)) && (x.Op != OpSB || p.Uses == 1)) || (supportsPPC64PCRel() && is32Bit(int64(off1+off2))))) {
11132			break
11133		}
11134		v.reset(OpPPC64MOVWstorezero)
11135		v.AuxInt = int32ToAuxInt(off1 + off2)
11136		v.Aux = symToAux(mergeSym(sym1, sym2))
11137		v.AddArg2(x, mem)
11138		return true
11139	}
11140	return false
11141}
11142func rewriteValuePPC64_OpPPC64MTVSRD(v *Value) bool {
11143	v_0 := v.Args[0]
11144	b := v.Block
11145	typ := &b.Func.Config.Types
11146	// match: (MTVSRD (MOVDconst [c]))
11147	// cond: !math.IsNaN(math.Float64frombits(uint64(c)))
11148	// result: (FMOVDconst [math.Float64frombits(uint64(c))])
11149	for {
11150		if v_0.Op != OpPPC64MOVDconst {
11151			break
11152		}
11153		c := auxIntToInt64(v_0.AuxInt)
11154		if !(!math.IsNaN(math.Float64frombits(uint64(c)))) {
11155			break
11156		}
11157		v.reset(OpPPC64FMOVDconst)
11158		v.AuxInt = float64ToAuxInt(math.Float64frombits(uint64(c)))
11159		return true
11160	}
11161	// match: (MTVSRD x:(MOVDload [off] {sym} ptr mem))
11162	// cond: x.Uses == 1 && clobber(x)
11163	// result: @x.Block (FMOVDload [off] {sym} ptr mem)
11164	for {
11165		x := v_0
11166		if x.Op != OpPPC64MOVDload {
11167			break
11168		}
11169		off := auxIntToInt32(x.AuxInt)
11170		sym := auxToSym(x.Aux)
11171		mem := x.Args[1]
11172		ptr := x.Args[0]
11173		if !(x.Uses == 1 && clobber(x)) {
11174			break
11175		}
11176		b = x.Block
11177		v0 := b.NewValue0(x.Pos, OpPPC64FMOVDload, typ.Float64)
11178		v.copyOf(v0)
11179		v0.AuxInt = int32ToAuxInt(off)
11180		v0.Aux = symToAux(sym)
11181		v0.AddArg2(ptr, mem)
11182		return true
11183	}
11184	return false
11185}
11186func rewriteValuePPC64_OpPPC64MULLD(v *Value) bool {
11187	v_1 := v.Args[1]
11188	v_0 := v.Args[0]
11189	// match: (MULLD x (MOVDconst [c]))
11190	// cond: is16Bit(c)
11191	// result: (MULLDconst [int32(c)] x)
11192	for {
11193		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
11194			x := v_0
11195			if v_1.Op != OpPPC64MOVDconst {
11196				continue
11197			}
11198			c := auxIntToInt64(v_1.AuxInt)
11199			if !(is16Bit(c)) {
11200				continue
11201			}
11202			v.reset(OpPPC64MULLDconst)
11203			v.AuxInt = int32ToAuxInt(int32(c))
11204			v.AddArg(x)
11205			return true
11206		}
11207		break
11208	}
11209	return false
11210}
11211func rewriteValuePPC64_OpPPC64MULLW(v *Value) bool {
11212	v_1 := v.Args[1]
11213	v_0 := v.Args[0]
11214	// match: (MULLW x (MOVDconst [c]))
11215	// cond: is16Bit(c)
11216	// result: (MULLWconst [int32(c)] x)
11217	for {
11218		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
11219			x := v_0
11220			if v_1.Op != OpPPC64MOVDconst {
11221				continue
11222			}
11223			c := auxIntToInt64(v_1.AuxInt)
11224			if !(is16Bit(c)) {
11225				continue
11226			}
11227			v.reset(OpPPC64MULLWconst)
11228			v.AuxInt = int32ToAuxInt(int32(c))
11229			v.AddArg(x)
11230			return true
11231		}
11232		break
11233	}
11234	return false
11235}
11236func rewriteValuePPC64_OpPPC64NEG(v *Value) bool {
11237	v_0 := v.Args[0]
11238	// match: (NEG (ADDconst [c] x))
11239	// cond: is32Bit(-c)
11240	// result: (SUBFCconst [-c] x)
11241	for {
11242		if v_0.Op != OpPPC64ADDconst {
11243			break
11244		}
11245		c := auxIntToInt64(v_0.AuxInt)
11246		x := v_0.Args[0]
11247		if !(is32Bit(-c)) {
11248			break
11249		}
11250		v.reset(OpPPC64SUBFCconst)
11251		v.AuxInt = int64ToAuxInt(-c)
11252		v.AddArg(x)
11253		return true
11254	}
11255	// match: (NEG (SUBFCconst [c] x))
11256	// cond: is32Bit(-c)
11257	// result: (ADDconst [-c] x)
11258	for {
11259		if v_0.Op != OpPPC64SUBFCconst {
11260			break
11261		}
11262		c := auxIntToInt64(v_0.AuxInt)
11263		x := v_0.Args[0]
11264		if !(is32Bit(-c)) {
11265			break
11266		}
11267		v.reset(OpPPC64ADDconst)
11268		v.AuxInt = int64ToAuxInt(-c)
11269		v.AddArg(x)
11270		return true
11271	}
11272	// match: (NEG (SUB x y))
11273	// result: (SUB y x)
11274	for {
11275		if v_0.Op != OpPPC64SUB {
11276			break
11277		}
11278		y := v_0.Args[1]
11279		x := v_0.Args[0]
11280		v.reset(OpPPC64SUB)
11281		v.AddArg2(y, x)
11282		return true
11283	}
11284	// match: (NEG (NEG x))
11285	// result: x
11286	for {
11287		if v_0.Op != OpPPC64NEG {
11288			break
11289		}
11290		x := v_0.Args[0]
11291		v.copyOf(x)
11292		return true
11293	}
11294	return false
11295}
11296func rewriteValuePPC64_OpPPC64NOR(v *Value) bool {
11297	v_1 := v.Args[1]
11298	v_0 := v.Args[0]
11299	// match: (NOR (MOVDconst [c]) (MOVDconst [d]))
11300	// result: (MOVDconst [^(c|d)])
11301	for {
11302		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
11303			if v_0.Op != OpPPC64MOVDconst {
11304				continue
11305			}
11306			c := auxIntToInt64(v_0.AuxInt)
11307			if v_1.Op != OpPPC64MOVDconst {
11308				continue
11309			}
11310			d := auxIntToInt64(v_1.AuxInt)
11311			v.reset(OpPPC64MOVDconst)
11312			v.AuxInt = int64ToAuxInt(^(c | d))
11313			return true
11314		}
11315		break
11316	}
11317	return false
11318}
11319func rewriteValuePPC64_OpPPC64NotEqual(v *Value) bool {
11320	v_0 := v.Args[0]
11321	// match: (NotEqual (FlagEQ))
11322	// result: (MOVDconst [0])
11323	for {
11324		if v_0.Op != OpPPC64FlagEQ {
11325			break
11326		}
11327		v.reset(OpPPC64MOVDconst)
11328		v.AuxInt = int64ToAuxInt(0)
11329		return true
11330	}
11331	// match: (NotEqual (FlagLT))
11332	// result: (MOVDconst [1])
11333	for {
11334		if v_0.Op != OpPPC64FlagLT {
11335			break
11336		}
11337		v.reset(OpPPC64MOVDconst)
11338		v.AuxInt = int64ToAuxInt(1)
11339		return true
11340	}
11341	// match: (NotEqual (FlagGT))
11342	// result: (MOVDconst [1])
11343	for {
11344		if v_0.Op != OpPPC64FlagGT {
11345			break
11346		}
11347		v.reset(OpPPC64MOVDconst)
11348		v.AuxInt = int64ToAuxInt(1)
11349		return true
11350	}
11351	// match: (NotEqual (InvertFlags x))
11352	// result: (NotEqual x)
11353	for {
11354		if v_0.Op != OpPPC64InvertFlags {
11355			break
11356		}
11357		x := v_0.Args[0]
11358		v.reset(OpPPC64NotEqual)
11359		v.AddArg(x)
11360		return true
11361	}
11362	// match: (NotEqual cmp)
11363	// result: (SETBCR [2] cmp)
11364	for {
11365		cmp := v_0
11366		v.reset(OpPPC64SETBCR)
11367		v.AuxInt = int32ToAuxInt(2)
11368		v.AddArg(cmp)
11369		return true
11370	}
11371}
11372func rewriteValuePPC64_OpPPC64OR(v *Value) bool {
11373	v_1 := v.Args[1]
11374	v_0 := v.Args[0]
11375	// match: (OR x (NOR y y))
11376	// result: (ORN x y)
11377	for {
11378		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
11379			x := v_0
11380			if v_1.Op != OpPPC64NOR {
11381				continue
11382			}
11383			y := v_1.Args[1]
11384			if y != v_1.Args[0] {
11385				continue
11386			}
11387			v.reset(OpPPC64ORN)
11388			v.AddArg2(x, y)
11389			return true
11390		}
11391		break
11392	}
11393	// match: (OR (MOVDconst [c]) (MOVDconst [d]))
11394	// result: (MOVDconst [c|d])
11395	for {
11396		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
11397			if v_0.Op != OpPPC64MOVDconst {
11398				continue
11399			}
11400			c := auxIntToInt64(v_0.AuxInt)
11401			if v_1.Op != OpPPC64MOVDconst {
11402				continue
11403			}
11404			d := auxIntToInt64(v_1.AuxInt)
11405			v.reset(OpPPC64MOVDconst)
11406			v.AuxInt = int64ToAuxInt(c | d)
11407			return true
11408		}
11409		break
11410	}
11411	// match: (OR x (MOVDconst [c]))
11412	// cond: isU32Bit(c)
11413	// result: (ORconst [c] x)
11414	for {
11415		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
11416			x := v_0
11417			if v_1.Op != OpPPC64MOVDconst {
11418				continue
11419			}
11420			c := auxIntToInt64(v_1.AuxInt)
11421			if !(isU32Bit(c)) {
11422				continue
11423			}
11424			v.reset(OpPPC64ORconst)
11425			v.AuxInt = int64ToAuxInt(c)
11426			v.AddArg(x)
11427			return true
11428		}
11429		break
11430	}
11431	return false
11432}
11433func rewriteValuePPC64_OpPPC64ORN(v *Value) bool {
11434	v_1 := v.Args[1]
11435	v_0 := v.Args[0]
11436	// match: (ORN x (MOVDconst [-1]))
11437	// result: x
11438	for {
11439		x := v_0
11440		if v_1.Op != OpPPC64MOVDconst || auxIntToInt64(v_1.AuxInt) != -1 {
11441			break
11442		}
11443		v.copyOf(x)
11444		return true
11445	}
11446	// match: (ORN (MOVDconst [c]) (MOVDconst [d]))
11447	// result: (MOVDconst [c|^d])
11448	for {
11449		if v_0.Op != OpPPC64MOVDconst {
11450			break
11451		}
11452		c := auxIntToInt64(v_0.AuxInt)
11453		if v_1.Op != OpPPC64MOVDconst {
11454			break
11455		}
11456		d := auxIntToInt64(v_1.AuxInt)
11457		v.reset(OpPPC64MOVDconst)
11458		v.AuxInt = int64ToAuxInt(c | ^d)
11459		return true
11460	}
11461	return false
11462}
11463func rewriteValuePPC64_OpPPC64ORconst(v *Value) bool {
11464	v_0 := v.Args[0]
11465	// match: (ORconst [c] (ORconst [d] x))
11466	// result: (ORconst [c|d] x)
11467	for {
11468		c := auxIntToInt64(v.AuxInt)
11469		if v_0.Op != OpPPC64ORconst {
11470			break
11471		}
11472		d := auxIntToInt64(v_0.AuxInt)
11473		x := v_0.Args[0]
11474		v.reset(OpPPC64ORconst)
11475		v.AuxInt = int64ToAuxInt(c | d)
11476		v.AddArg(x)
11477		return true
11478	}
11479	// match: (ORconst [-1] _)
11480	// result: (MOVDconst [-1])
11481	for {
11482		if auxIntToInt64(v.AuxInt) != -1 {
11483			break
11484		}
11485		v.reset(OpPPC64MOVDconst)
11486		v.AuxInt = int64ToAuxInt(-1)
11487		return true
11488	}
11489	// match: (ORconst [0] x)
11490	// result: x
11491	for {
11492		if auxIntToInt64(v.AuxInt) != 0 {
11493			break
11494		}
11495		x := v_0
11496		v.copyOf(x)
11497		return true
11498	}
11499	return false
11500}
11501func rewriteValuePPC64_OpPPC64RLWINM(v *Value) bool {
11502	v_0 := v.Args[0]
11503	// match: (RLWINM [r] (MOVHZreg u))
11504	// cond: mergePPC64RlwinmAnd(r,0xFFFF) != 0
11505	// result: (RLWINM [mergePPC64RlwinmAnd(r,0xFFFF)] u)
11506	for {
11507		r := auxIntToInt64(v.AuxInt)
11508		if v_0.Op != OpPPC64MOVHZreg {
11509			break
11510		}
11511		u := v_0.Args[0]
11512		if !(mergePPC64RlwinmAnd(r, 0xFFFF) != 0) {
11513			break
11514		}
11515		v.reset(OpPPC64RLWINM)
11516		v.AuxInt = int64ToAuxInt(mergePPC64RlwinmAnd(r, 0xFFFF))
11517		v.AddArg(u)
11518		return true
11519	}
11520	// match: (RLWINM [r] (ANDconst [a] u))
11521	// cond: mergePPC64RlwinmAnd(r,uint32(a)) != 0
11522	// result: (RLWINM [mergePPC64RlwinmAnd(r,uint32(a))] u)
11523	for {
11524		r := auxIntToInt64(v.AuxInt)
11525		if v_0.Op != OpPPC64ANDconst {
11526			break
11527		}
11528		a := auxIntToInt64(v_0.AuxInt)
11529		u := v_0.Args[0]
11530		if !(mergePPC64RlwinmAnd(r, uint32(a)) != 0) {
11531			break
11532		}
11533		v.reset(OpPPC64RLWINM)
11534		v.AuxInt = int64ToAuxInt(mergePPC64RlwinmAnd(r, uint32(a)))
11535		v.AddArg(u)
11536		return true
11537	}
11538	return false
11539}
11540func rewriteValuePPC64_OpPPC64ROTL(v *Value) bool {
11541	v_1 := v.Args[1]
11542	v_0 := v.Args[0]
11543	// match: (ROTL x (MOVDconst [c]))
11544	// result: (ROTLconst x [c&63])
11545	for {
11546		x := v_0
11547		if v_1.Op != OpPPC64MOVDconst {
11548			break
11549		}
11550		c := auxIntToInt64(v_1.AuxInt)
11551		v.reset(OpPPC64ROTLconst)
11552		v.AuxInt = int64ToAuxInt(c & 63)
11553		v.AddArg(x)
11554		return true
11555	}
11556	return false
11557}
11558func rewriteValuePPC64_OpPPC64ROTLW(v *Value) bool {
11559	v_1 := v.Args[1]
11560	v_0 := v.Args[0]
11561	// match: (ROTLW x (MOVDconst [c]))
11562	// result: (ROTLWconst x [c&31])
11563	for {
11564		x := v_0
11565		if v_1.Op != OpPPC64MOVDconst {
11566			break
11567		}
11568		c := auxIntToInt64(v_1.AuxInt)
11569		v.reset(OpPPC64ROTLWconst)
11570		v.AuxInt = int64ToAuxInt(c & 31)
11571		v.AddArg(x)
11572		return true
11573	}
11574	return false
11575}
11576func rewriteValuePPC64_OpPPC64ROTLWconst(v *Value) bool {
11577	v_0 := v.Args[0]
11578	// match: (ROTLWconst [r] (AND (MOVDconst [m]) x))
11579	// cond: isPPC64WordRotateMask(m)
11580	// result: (RLWINM [encodePPC64RotateMask(r,rotateLeft32(m,r),32)] x)
11581	for {
11582		r := auxIntToInt64(v.AuxInt)
11583		if v_0.Op != OpPPC64AND {
11584			break
11585		}
11586		_ = v_0.Args[1]
11587		v_0_0 := v_0.Args[0]
11588		v_0_1 := v_0.Args[1]
11589		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
11590			if v_0_0.Op != OpPPC64MOVDconst {
11591				continue
11592			}
11593			m := auxIntToInt64(v_0_0.AuxInt)
11594			x := v_0_1
11595			if !(isPPC64WordRotateMask(m)) {
11596				continue
11597			}
11598			v.reset(OpPPC64RLWINM)
11599			v.AuxInt = int64ToAuxInt(encodePPC64RotateMask(r, rotateLeft32(m, r), 32))
11600			v.AddArg(x)
11601			return true
11602		}
11603		break
11604	}
11605	// match: (ROTLWconst [r] (ANDconst [m] x))
11606	// cond: isPPC64WordRotateMask(m)
11607	// result: (RLWINM [encodePPC64RotateMask(r,rotateLeft32(m,r),32)] x)
11608	for {
11609		r := auxIntToInt64(v.AuxInt)
11610		if v_0.Op != OpPPC64ANDconst {
11611			break
11612		}
11613		m := auxIntToInt64(v_0.AuxInt)
11614		x := v_0.Args[0]
11615		if !(isPPC64WordRotateMask(m)) {
11616			break
11617		}
11618		v.reset(OpPPC64RLWINM)
11619		v.AuxInt = int64ToAuxInt(encodePPC64RotateMask(r, rotateLeft32(m, r), 32))
11620		v.AddArg(x)
11621		return true
11622	}
11623	return false
11624}
11625func rewriteValuePPC64_OpPPC64SETBC(v *Value) bool {
11626	v_0 := v.Args[0]
11627	b := v.Block
11628	typ := &b.Func.Config.Types
11629	// match: (SETBC [0] (FlagLT))
11630	// result: (MOVDconst [1])
11631	for {
11632		if auxIntToInt32(v.AuxInt) != 0 || v_0.Op != OpPPC64FlagLT {
11633			break
11634		}
11635		v.reset(OpPPC64MOVDconst)
11636		v.AuxInt = int64ToAuxInt(1)
11637		return true
11638	}
11639	// match: (SETBC [0] (FlagGT))
11640	// result: (MOVDconst [0])
11641	for {
11642		if auxIntToInt32(v.AuxInt) != 0 || v_0.Op != OpPPC64FlagGT {
11643			break
11644		}
11645		v.reset(OpPPC64MOVDconst)
11646		v.AuxInt = int64ToAuxInt(0)
11647		return true
11648	}
11649	// match: (SETBC [0] (FlagEQ))
11650	// result: (MOVDconst [0])
11651	for {
11652		if auxIntToInt32(v.AuxInt) != 0 || v_0.Op != OpPPC64FlagEQ {
11653			break
11654		}
11655		v.reset(OpPPC64MOVDconst)
11656		v.AuxInt = int64ToAuxInt(0)
11657		return true
11658	}
11659	// match: (SETBC [1] (FlagGT))
11660	// result: (MOVDconst [1])
11661	for {
11662		if auxIntToInt32(v.AuxInt) != 1 || v_0.Op != OpPPC64FlagGT {
11663			break
11664		}
11665		v.reset(OpPPC64MOVDconst)
11666		v.AuxInt = int64ToAuxInt(1)
11667		return true
11668	}
11669	// match: (SETBC [1] (FlagLT))
11670	// result: (MOVDconst [0])
11671	for {
11672		if auxIntToInt32(v.AuxInt) != 1 || v_0.Op != OpPPC64FlagLT {
11673			break
11674		}
11675		v.reset(OpPPC64MOVDconst)
11676		v.AuxInt = int64ToAuxInt(0)
11677		return true
11678	}
11679	// match: (SETBC [1] (FlagEQ))
11680	// result: (MOVDconst [0])
11681	for {
11682		if auxIntToInt32(v.AuxInt) != 1 || v_0.Op != OpPPC64FlagEQ {
11683			break
11684		}
11685		v.reset(OpPPC64MOVDconst)
11686		v.AuxInt = int64ToAuxInt(0)
11687		return true
11688	}
11689	// match: (SETBC [2] (FlagEQ))
11690	// result: (MOVDconst [1])
11691	for {
11692		if auxIntToInt32(v.AuxInt) != 2 || v_0.Op != OpPPC64FlagEQ {
11693			break
11694		}
11695		v.reset(OpPPC64MOVDconst)
11696		v.AuxInt = int64ToAuxInt(1)
11697		return true
11698	}
11699	// match: (SETBC [2] (FlagLT))
11700	// result: (MOVDconst [0])
11701	for {
11702		if auxIntToInt32(v.AuxInt) != 2 || v_0.Op != OpPPC64FlagLT {
11703			break
11704		}
11705		v.reset(OpPPC64MOVDconst)
11706		v.AuxInt = int64ToAuxInt(0)
11707		return true
11708	}
11709	// match: (SETBC [2] (FlagGT))
11710	// result: (MOVDconst [0])
11711	for {
11712		if auxIntToInt32(v.AuxInt) != 2 || v_0.Op != OpPPC64FlagGT {
11713			break
11714		}
11715		v.reset(OpPPC64MOVDconst)
11716		v.AuxInt = int64ToAuxInt(0)
11717		return true
11718	}
11719	// match: (SETBC [0] (InvertFlags bool))
11720	// result: (SETBC [1] bool)
11721	for {
11722		if auxIntToInt32(v.AuxInt) != 0 || v_0.Op != OpPPC64InvertFlags {
11723			break
11724		}
11725		bool := v_0.Args[0]
11726		v.reset(OpPPC64SETBC)
11727		v.AuxInt = int32ToAuxInt(1)
11728		v.AddArg(bool)
11729		return true
11730	}
11731	// match: (SETBC [1] (InvertFlags bool))
11732	// result: (SETBC [0] bool)
11733	for {
11734		if auxIntToInt32(v.AuxInt) != 1 || v_0.Op != OpPPC64InvertFlags {
11735			break
11736		}
11737		bool := v_0.Args[0]
11738		v.reset(OpPPC64SETBC)
11739		v.AuxInt = int32ToAuxInt(0)
11740		v.AddArg(bool)
11741		return true
11742	}
11743	// match: (SETBC [2] (InvertFlags bool))
11744	// result: (SETBC [2] bool)
11745	for {
11746		if auxIntToInt32(v.AuxInt) != 2 || v_0.Op != OpPPC64InvertFlags {
11747			break
11748		}
11749		bool := v_0.Args[0]
11750		v.reset(OpPPC64SETBC)
11751		v.AuxInt = int32ToAuxInt(2)
11752		v.AddArg(bool)
11753		return true
11754	}
11755	// match: (SETBC [n] (InvertFlags bool))
11756	// result: (SETBCR [n] bool)
11757	for {
11758		n := auxIntToInt32(v.AuxInt)
11759		if v_0.Op != OpPPC64InvertFlags {
11760			break
11761		}
11762		bool := v_0.Args[0]
11763		v.reset(OpPPC64SETBCR)
11764		v.AuxInt = int32ToAuxInt(n)
11765		v.AddArg(bool)
11766		return true
11767	}
11768	// match: (SETBC [2] (CMPconst [0] a:(ANDconst [1] _)))
11769	// result: (XORconst [1] a)
11770	for {
11771		if auxIntToInt32(v.AuxInt) != 2 || v_0.Op != OpPPC64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
11772			break
11773		}
11774		a := v_0.Args[0]
11775		if a.Op != OpPPC64ANDconst || auxIntToInt64(a.AuxInt) != 1 {
11776			break
11777		}
11778		v.reset(OpPPC64XORconst)
11779		v.AuxInt = int64ToAuxInt(1)
11780		v.AddArg(a)
11781		return true
11782	}
11783	// match: (SETBC [2] (CMPconst [0] a:(AND y z)))
11784	// cond: a.Uses == 1
11785	// result: (SETBC [2] (Select1 <types.TypeFlags> (ANDCC y z )))
11786	for {
11787		if auxIntToInt32(v.AuxInt) != 2 || v_0.Op != OpPPC64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
11788			break
11789		}
11790		a := v_0.Args[0]
11791		if a.Op != OpPPC64AND {
11792			break
11793		}
11794		z := a.Args[1]
11795		y := a.Args[0]
11796		if !(a.Uses == 1) {
11797			break
11798		}
11799		v.reset(OpPPC64SETBC)
11800		v.AuxInt = int32ToAuxInt(2)
11801		v0 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
11802		v1 := b.NewValue0(v.Pos, OpPPC64ANDCC, types.NewTuple(typ.Int64, types.TypeFlags))
11803		v1.AddArg2(y, z)
11804		v0.AddArg(v1)
11805		v.AddArg(v0)
11806		return true
11807	}
11808	// match: (SETBC [2] (CMPconst [0] o:(OR y z)))
11809	// cond: o.Uses == 1
11810	// result: (SETBC [2] (Select1 <types.TypeFlags> (ORCC y z )))
11811	for {
11812		if auxIntToInt32(v.AuxInt) != 2 || v_0.Op != OpPPC64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
11813			break
11814		}
11815		o := v_0.Args[0]
11816		if o.Op != OpPPC64OR {
11817			break
11818		}
11819		z := o.Args[1]
11820		y := o.Args[0]
11821		if !(o.Uses == 1) {
11822			break
11823		}
11824		v.reset(OpPPC64SETBC)
11825		v.AuxInt = int32ToAuxInt(2)
11826		v0 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
11827		v1 := b.NewValue0(v.Pos, OpPPC64ORCC, types.NewTuple(typ.Int, types.TypeFlags))
11828		v1.AddArg2(y, z)
11829		v0.AddArg(v1)
11830		v.AddArg(v0)
11831		return true
11832	}
11833	// match: (SETBC [2] (CMPconst [0] a:(XOR y z)))
11834	// cond: a.Uses == 1
11835	// result: (SETBC [2] (Select1 <types.TypeFlags> (XORCC y z )))
11836	for {
11837		if auxIntToInt32(v.AuxInt) != 2 || v_0.Op != OpPPC64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
11838			break
11839		}
11840		a := v_0.Args[0]
11841		if a.Op != OpPPC64XOR {
11842			break
11843		}
11844		z := a.Args[1]
11845		y := a.Args[0]
11846		if !(a.Uses == 1) {
11847			break
11848		}
11849		v.reset(OpPPC64SETBC)
11850		v.AuxInt = int32ToAuxInt(2)
11851		v0 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
11852		v1 := b.NewValue0(v.Pos, OpPPC64XORCC, types.NewTuple(typ.Int, types.TypeFlags))
11853		v1.AddArg2(y, z)
11854		v0.AddArg(v1)
11855		v.AddArg(v0)
11856		return true
11857	}
11858	return false
11859}
11860func rewriteValuePPC64_OpPPC64SETBCR(v *Value) bool {
11861	v_0 := v.Args[0]
11862	b := v.Block
11863	typ := &b.Func.Config.Types
11864	// match: (SETBCR [0] (FlagLT))
11865	// result: (MOVDconst [0])
11866	for {
11867		if auxIntToInt32(v.AuxInt) != 0 || v_0.Op != OpPPC64FlagLT {
11868			break
11869		}
11870		v.reset(OpPPC64MOVDconst)
11871		v.AuxInt = int64ToAuxInt(0)
11872		return true
11873	}
11874	// match: (SETBCR [0] (FlagGT))
11875	// result: (MOVDconst [1])
11876	for {
11877		if auxIntToInt32(v.AuxInt) != 0 || v_0.Op != OpPPC64FlagGT {
11878			break
11879		}
11880		v.reset(OpPPC64MOVDconst)
11881		v.AuxInt = int64ToAuxInt(1)
11882		return true
11883	}
11884	// match: (SETBCR [0] (FlagEQ))
11885	// result: (MOVDconst [1])
11886	for {
11887		if auxIntToInt32(v.AuxInt) != 0 || v_0.Op != OpPPC64FlagEQ {
11888			break
11889		}
11890		v.reset(OpPPC64MOVDconst)
11891		v.AuxInt = int64ToAuxInt(1)
11892		return true
11893	}
11894	// match: (SETBCR [1] (FlagGT))
11895	// result: (MOVDconst [0])
11896	for {
11897		if auxIntToInt32(v.AuxInt) != 1 || v_0.Op != OpPPC64FlagGT {
11898			break
11899		}
11900		v.reset(OpPPC64MOVDconst)
11901		v.AuxInt = int64ToAuxInt(0)
11902		return true
11903	}
11904	// match: (SETBCR [1] (FlagLT))
11905	// result: (MOVDconst [1])
11906	for {
11907		if auxIntToInt32(v.AuxInt) != 1 || v_0.Op != OpPPC64FlagLT {
11908			break
11909		}
11910		v.reset(OpPPC64MOVDconst)
11911		v.AuxInt = int64ToAuxInt(1)
11912		return true
11913	}
11914	// match: (SETBCR [1] (FlagEQ))
11915	// result: (MOVDconst [1])
11916	for {
11917		if auxIntToInt32(v.AuxInt) != 1 || v_0.Op != OpPPC64FlagEQ {
11918			break
11919		}
11920		v.reset(OpPPC64MOVDconst)
11921		v.AuxInt = int64ToAuxInt(1)
11922		return true
11923	}
11924	// match: (SETBCR [2] (FlagEQ))
11925	// result: (MOVDconst [0])
11926	for {
11927		if auxIntToInt32(v.AuxInt) != 2 || v_0.Op != OpPPC64FlagEQ {
11928			break
11929		}
11930		v.reset(OpPPC64MOVDconst)
11931		v.AuxInt = int64ToAuxInt(0)
11932		return true
11933	}
11934	// match: (SETBCR [2] (FlagLT))
11935	// result: (MOVDconst [1])
11936	for {
11937		if auxIntToInt32(v.AuxInt) != 2 || v_0.Op != OpPPC64FlagLT {
11938			break
11939		}
11940		v.reset(OpPPC64MOVDconst)
11941		v.AuxInt = int64ToAuxInt(1)
11942		return true
11943	}
11944	// match: (SETBCR [2] (FlagGT))
11945	// result: (MOVDconst [1])
11946	for {
11947		if auxIntToInt32(v.AuxInt) != 2 || v_0.Op != OpPPC64FlagGT {
11948			break
11949		}
11950		v.reset(OpPPC64MOVDconst)
11951		v.AuxInt = int64ToAuxInt(1)
11952		return true
11953	}
11954	// match: (SETBCR [0] (InvertFlags bool))
11955	// result: (SETBCR [1] bool)
11956	for {
11957		if auxIntToInt32(v.AuxInt) != 0 || v_0.Op != OpPPC64InvertFlags {
11958			break
11959		}
11960		bool := v_0.Args[0]
11961		v.reset(OpPPC64SETBCR)
11962		v.AuxInt = int32ToAuxInt(1)
11963		v.AddArg(bool)
11964		return true
11965	}
11966	// match: (SETBCR [1] (InvertFlags bool))
11967	// result: (SETBCR [0] bool)
11968	for {
11969		if auxIntToInt32(v.AuxInt) != 1 || v_0.Op != OpPPC64InvertFlags {
11970			break
11971		}
11972		bool := v_0.Args[0]
11973		v.reset(OpPPC64SETBCR)
11974		v.AuxInt = int32ToAuxInt(0)
11975		v.AddArg(bool)
11976		return true
11977	}
11978	// match: (SETBCR [2] (InvertFlags bool))
11979	// result: (SETBCR [2] bool)
11980	for {
11981		if auxIntToInt32(v.AuxInt) != 2 || v_0.Op != OpPPC64InvertFlags {
11982			break
11983		}
11984		bool := v_0.Args[0]
11985		v.reset(OpPPC64SETBCR)
11986		v.AuxInt = int32ToAuxInt(2)
11987		v.AddArg(bool)
11988		return true
11989	}
11990	// match: (SETBCR [n] (InvertFlags bool))
11991	// result: (SETBC [n] bool)
11992	for {
11993		n := auxIntToInt32(v.AuxInt)
11994		if v_0.Op != OpPPC64InvertFlags {
11995			break
11996		}
11997		bool := v_0.Args[0]
11998		v.reset(OpPPC64SETBC)
11999		v.AuxInt = int32ToAuxInt(n)
12000		v.AddArg(bool)
12001		return true
12002	}
12003	// match: (SETBCR [2] (CMPconst [0] a:(ANDconst [1] _)))
12004	// result: a
12005	for {
12006		if auxIntToInt32(v.AuxInt) != 2 || v_0.Op != OpPPC64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
12007			break
12008		}
12009		a := v_0.Args[0]
12010		if a.Op != OpPPC64ANDconst || auxIntToInt64(a.AuxInt) != 1 {
12011			break
12012		}
12013		v.copyOf(a)
12014		return true
12015	}
12016	// match: (SETBCR [2] (CMPconst [0] a:(AND y z)))
12017	// cond: a.Uses == 1
12018	// result: (SETBCR [2] (Select1 <types.TypeFlags> (ANDCC y z )))
12019	for {
12020		if auxIntToInt32(v.AuxInt) != 2 || v_0.Op != OpPPC64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
12021			break
12022		}
12023		a := v_0.Args[0]
12024		if a.Op != OpPPC64AND {
12025			break
12026		}
12027		z := a.Args[1]
12028		y := a.Args[0]
12029		if !(a.Uses == 1) {
12030			break
12031		}
12032		v.reset(OpPPC64SETBCR)
12033		v.AuxInt = int32ToAuxInt(2)
12034		v0 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
12035		v1 := b.NewValue0(v.Pos, OpPPC64ANDCC, types.NewTuple(typ.Int64, types.TypeFlags))
12036		v1.AddArg2(y, z)
12037		v0.AddArg(v1)
12038		v.AddArg(v0)
12039		return true
12040	}
12041	// match: (SETBCR [2] (CMPconst [0] o:(OR y z)))
12042	// cond: o.Uses == 1
12043	// result: (SETBCR [2] (Select1 <types.TypeFlags> (ORCC y z )))
12044	for {
12045		if auxIntToInt32(v.AuxInt) != 2 || v_0.Op != OpPPC64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
12046			break
12047		}
12048		o := v_0.Args[0]
12049		if o.Op != OpPPC64OR {
12050			break
12051		}
12052		z := o.Args[1]
12053		y := o.Args[0]
12054		if !(o.Uses == 1) {
12055			break
12056		}
12057		v.reset(OpPPC64SETBCR)
12058		v.AuxInt = int32ToAuxInt(2)
12059		v0 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
12060		v1 := b.NewValue0(v.Pos, OpPPC64ORCC, types.NewTuple(typ.Int, types.TypeFlags))
12061		v1.AddArg2(y, z)
12062		v0.AddArg(v1)
12063		v.AddArg(v0)
12064		return true
12065	}
12066	// match: (SETBCR [2] (CMPconst [0] a:(XOR y z)))
12067	// cond: a.Uses == 1
12068	// result: (SETBCR [2] (Select1 <types.TypeFlags> (XORCC y z )))
12069	for {
12070		if auxIntToInt32(v.AuxInt) != 2 || v_0.Op != OpPPC64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
12071			break
12072		}
12073		a := v_0.Args[0]
12074		if a.Op != OpPPC64XOR {
12075			break
12076		}
12077		z := a.Args[1]
12078		y := a.Args[0]
12079		if !(a.Uses == 1) {
12080			break
12081		}
12082		v.reset(OpPPC64SETBCR)
12083		v.AuxInt = int32ToAuxInt(2)
12084		v0 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
12085		v1 := b.NewValue0(v.Pos, OpPPC64XORCC, types.NewTuple(typ.Int, types.TypeFlags))
12086		v1.AddArg2(y, z)
12087		v0.AddArg(v1)
12088		v.AddArg(v0)
12089		return true
12090	}
12091	return false
12092}
12093func rewriteValuePPC64_OpPPC64SLD(v *Value) bool {
12094	v_1 := v.Args[1]
12095	v_0 := v.Args[0]
12096	// match: (SLD x (MOVDconst [c]))
12097	// result: (SLDconst [c&63 | (c>>6&1*63)] x)
12098	for {
12099		x := v_0
12100		if v_1.Op != OpPPC64MOVDconst {
12101			break
12102		}
12103		c := auxIntToInt64(v_1.AuxInt)
12104		v.reset(OpPPC64SLDconst)
12105		v.AuxInt = int64ToAuxInt(c&63 | (c >> 6 & 1 * 63))
12106		v.AddArg(x)
12107		return true
12108	}
12109	return false
12110}
12111func rewriteValuePPC64_OpPPC64SLDconst(v *Value) bool {
12112	v_0 := v.Args[0]
12113	// match: (SLDconst [l] (SRWconst [r] x))
12114	// cond: mergePPC64SldiSrw(l,r) != 0
12115	// result: (RLWINM [mergePPC64SldiSrw(l,r)] x)
12116	for {
12117		l := auxIntToInt64(v.AuxInt)
12118		if v_0.Op != OpPPC64SRWconst {
12119			break
12120		}
12121		r := auxIntToInt64(v_0.AuxInt)
12122		x := v_0.Args[0]
12123		if !(mergePPC64SldiSrw(l, r) != 0) {
12124			break
12125		}
12126		v.reset(OpPPC64RLWINM)
12127		v.AuxInt = int64ToAuxInt(mergePPC64SldiSrw(l, r))
12128		v.AddArg(x)
12129		return true
12130	}
12131	// match: (SLDconst [s] (RLWINM [r] y))
12132	// cond: mergePPC64SldiRlwinm(s,r) != 0
12133	// result: (RLWINM [mergePPC64SldiRlwinm(s,r)] y)
12134	for {
12135		s := auxIntToInt64(v.AuxInt)
12136		if v_0.Op != OpPPC64RLWINM {
12137			break
12138		}
12139		r := auxIntToInt64(v_0.AuxInt)
12140		y := v_0.Args[0]
12141		if !(mergePPC64SldiRlwinm(s, r) != 0) {
12142			break
12143		}
12144		v.reset(OpPPC64RLWINM)
12145		v.AuxInt = int64ToAuxInt(mergePPC64SldiRlwinm(s, r))
12146		v.AddArg(y)
12147		return true
12148	}
12149	// match: (SLDconst [c] z:(MOVBZreg x))
12150	// cond: c < 8 && z.Uses == 1
12151	// result: (CLRLSLDI [newPPC64ShiftAuxInt(c,56,63,64)] x)
12152	for {
12153		c := auxIntToInt64(v.AuxInt)
12154		z := v_0
12155		if z.Op != OpPPC64MOVBZreg {
12156			break
12157		}
12158		x := z.Args[0]
12159		if !(c < 8 && z.Uses == 1) {
12160			break
12161		}
12162		v.reset(OpPPC64CLRLSLDI)
12163		v.AuxInt = int32ToAuxInt(newPPC64ShiftAuxInt(c, 56, 63, 64))
12164		v.AddArg(x)
12165		return true
12166	}
12167	// match: (SLDconst [c] z:(MOVHZreg x))
12168	// cond: c < 16 && z.Uses == 1
12169	// result: (CLRLSLDI [newPPC64ShiftAuxInt(c,48,63,64)] x)
12170	for {
12171		c := auxIntToInt64(v.AuxInt)
12172		z := v_0
12173		if z.Op != OpPPC64MOVHZreg {
12174			break
12175		}
12176		x := z.Args[0]
12177		if !(c < 16 && z.Uses == 1) {
12178			break
12179		}
12180		v.reset(OpPPC64CLRLSLDI)
12181		v.AuxInt = int32ToAuxInt(newPPC64ShiftAuxInt(c, 48, 63, 64))
12182		v.AddArg(x)
12183		return true
12184	}
12185	// match: (SLDconst [c] z:(MOVWZreg x))
12186	// cond: c < 32 && z.Uses == 1
12187	// result: (CLRLSLDI [newPPC64ShiftAuxInt(c,32,63,64)] x)
12188	for {
12189		c := auxIntToInt64(v.AuxInt)
12190		z := v_0
12191		if z.Op != OpPPC64MOVWZreg {
12192			break
12193		}
12194		x := z.Args[0]
12195		if !(c < 32 && z.Uses == 1) {
12196			break
12197		}
12198		v.reset(OpPPC64CLRLSLDI)
12199		v.AuxInt = int32ToAuxInt(newPPC64ShiftAuxInt(c, 32, 63, 64))
12200		v.AddArg(x)
12201		return true
12202	}
12203	// match: (SLDconst [c] z:(ANDconst [d] x))
12204	// cond: z.Uses == 1 && isPPC64ValidShiftMask(d) && c <= (64-getPPC64ShiftMaskLength(d))
12205	// result: (CLRLSLDI [newPPC64ShiftAuxInt(c,64-getPPC64ShiftMaskLength(d),63,64)] x)
12206	for {
12207		c := auxIntToInt64(v.AuxInt)
12208		z := v_0
12209		if z.Op != OpPPC64ANDconst {
12210			break
12211		}
12212		d := auxIntToInt64(z.AuxInt)
12213		x := z.Args[0]
12214		if !(z.Uses == 1 && isPPC64ValidShiftMask(d) && c <= (64-getPPC64ShiftMaskLength(d))) {
12215			break
12216		}
12217		v.reset(OpPPC64CLRLSLDI)
12218		v.AuxInt = int32ToAuxInt(newPPC64ShiftAuxInt(c, 64-getPPC64ShiftMaskLength(d), 63, 64))
12219		v.AddArg(x)
12220		return true
12221	}
12222	// match: (SLDconst [c] z:(AND (MOVDconst [d]) x))
12223	// cond: z.Uses == 1 && isPPC64ValidShiftMask(d) && c<=(64-getPPC64ShiftMaskLength(d))
12224	// result: (CLRLSLDI [newPPC64ShiftAuxInt(c,64-getPPC64ShiftMaskLength(d),63,64)] x)
12225	for {
12226		c := auxIntToInt64(v.AuxInt)
12227		z := v_0
12228		if z.Op != OpPPC64AND {
12229			break
12230		}
12231		_ = z.Args[1]
12232		z_0 := z.Args[0]
12233		z_1 := z.Args[1]
12234		for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
12235			if z_0.Op != OpPPC64MOVDconst {
12236				continue
12237			}
12238			d := auxIntToInt64(z_0.AuxInt)
12239			x := z_1
12240			if !(z.Uses == 1 && isPPC64ValidShiftMask(d) && c <= (64-getPPC64ShiftMaskLength(d))) {
12241				continue
12242			}
12243			v.reset(OpPPC64CLRLSLDI)
12244			v.AuxInt = int32ToAuxInt(newPPC64ShiftAuxInt(c, 64-getPPC64ShiftMaskLength(d), 63, 64))
12245			v.AddArg(x)
12246			return true
12247		}
12248		break
12249	}
12250	// match: (SLDconst [c] z:(MOVWreg x))
12251	// cond: c < 32 && buildcfg.GOPPC64 >= 9
12252	// result: (EXTSWSLconst [c] x)
12253	for {
12254		c := auxIntToInt64(v.AuxInt)
12255		z := v_0
12256		if z.Op != OpPPC64MOVWreg {
12257			break
12258		}
12259		x := z.Args[0]
12260		if !(c < 32 && buildcfg.GOPPC64 >= 9) {
12261			break
12262		}
12263		v.reset(OpPPC64EXTSWSLconst)
12264		v.AuxInt = int64ToAuxInt(c)
12265		v.AddArg(x)
12266		return true
12267	}
12268	return false
12269}
12270func rewriteValuePPC64_OpPPC64SLW(v *Value) bool {
12271	v_1 := v.Args[1]
12272	v_0 := v.Args[0]
12273	// match: (SLW x (MOVDconst [c]))
12274	// result: (SLWconst [c&31 | (c>>5&1*31)] x)
12275	for {
12276		x := v_0
12277		if v_1.Op != OpPPC64MOVDconst {
12278			break
12279		}
12280		c := auxIntToInt64(v_1.AuxInt)
12281		v.reset(OpPPC64SLWconst)
12282		v.AuxInt = int64ToAuxInt(c&31 | (c >> 5 & 1 * 31))
12283		v.AddArg(x)
12284		return true
12285	}
12286	return false
12287}
12288func rewriteValuePPC64_OpPPC64SLWconst(v *Value) bool {
12289	v_0 := v.Args[0]
12290	// match: (SLWconst [s] (MOVWZreg w))
12291	// result: (SLWconst [s] w)
12292	for {
12293		s := auxIntToInt64(v.AuxInt)
12294		if v_0.Op != OpPPC64MOVWZreg {
12295			break
12296		}
12297		w := v_0.Args[0]
12298		v.reset(OpPPC64SLWconst)
12299		v.AuxInt = int64ToAuxInt(s)
12300		v.AddArg(w)
12301		return true
12302	}
12303	// match: (SLWconst [c] z:(MOVBZreg x))
12304	// cond: z.Uses == 1 && c < 8
12305	// result: (CLRLSLWI [newPPC64ShiftAuxInt(c,24,31,32)] x)
12306	for {
12307		c := auxIntToInt64(v.AuxInt)
12308		z := v_0
12309		if z.Op != OpPPC64MOVBZreg {
12310			break
12311		}
12312		x := z.Args[0]
12313		if !(z.Uses == 1 && c < 8) {
12314			break
12315		}
12316		v.reset(OpPPC64CLRLSLWI)
12317		v.AuxInt = int32ToAuxInt(newPPC64ShiftAuxInt(c, 24, 31, 32))
12318		v.AddArg(x)
12319		return true
12320	}
12321	// match: (SLWconst [c] z:(MOVHZreg x))
12322	// cond: z.Uses == 1 && c < 16
12323	// result: (CLRLSLWI [newPPC64ShiftAuxInt(c,16,31,32)] x)
12324	for {
12325		c := auxIntToInt64(v.AuxInt)
12326		z := v_0
12327		if z.Op != OpPPC64MOVHZreg {
12328			break
12329		}
12330		x := z.Args[0]
12331		if !(z.Uses == 1 && c < 16) {
12332			break
12333		}
12334		v.reset(OpPPC64CLRLSLWI)
12335		v.AuxInt = int32ToAuxInt(newPPC64ShiftAuxInt(c, 16, 31, 32))
12336		v.AddArg(x)
12337		return true
12338	}
12339	// match: (SLWconst [c] z:(ANDconst [d] x))
12340	// cond: z.Uses == 1 && isPPC64ValidShiftMask(d) && c<=(32-getPPC64ShiftMaskLength(d))
12341	// result: (CLRLSLWI [newPPC64ShiftAuxInt(c,32-getPPC64ShiftMaskLength(d),31,32)] x)
12342	for {
12343		c := auxIntToInt64(v.AuxInt)
12344		z := v_0
12345		if z.Op != OpPPC64ANDconst {
12346			break
12347		}
12348		d := auxIntToInt64(z.AuxInt)
12349		x := z.Args[0]
12350		if !(z.Uses == 1 && isPPC64ValidShiftMask(d) && c <= (32-getPPC64ShiftMaskLength(d))) {
12351			break
12352		}
12353		v.reset(OpPPC64CLRLSLWI)
12354		v.AuxInt = int32ToAuxInt(newPPC64ShiftAuxInt(c, 32-getPPC64ShiftMaskLength(d), 31, 32))
12355		v.AddArg(x)
12356		return true
12357	}
12358	// match: (SLWconst [c] z:(AND (MOVDconst [d]) x))
12359	// cond: z.Uses == 1 && isPPC64ValidShiftMask(d) && c<=(32-getPPC64ShiftMaskLength(d))
12360	// result: (CLRLSLWI [newPPC64ShiftAuxInt(c,32-getPPC64ShiftMaskLength(d),31,32)] x)
12361	for {
12362		c := auxIntToInt64(v.AuxInt)
12363		z := v_0
12364		if z.Op != OpPPC64AND {
12365			break
12366		}
12367		_ = z.Args[1]
12368		z_0 := z.Args[0]
12369		z_1 := z.Args[1]
12370		for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
12371			if z_0.Op != OpPPC64MOVDconst {
12372				continue
12373			}
12374			d := auxIntToInt64(z_0.AuxInt)
12375			x := z_1
12376			if !(z.Uses == 1 && isPPC64ValidShiftMask(d) && c <= (32-getPPC64ShiftMaskLength(d))) {
12377				continue
12378			}
12379			v.reset(OpPPC64CLRLSLWI)
12380			v.AuxInt = int32ToAuxInt(newPPC64ShiftAuxInt(c, 32-getPPC64ShiftMaskLength(d), 31, 32))
12381			v.AddArg(x)
12382			return true
12383		}
12384		break
12385	}
12386	// match: (SLWconst [c] z:(MOVWreg x))
12387	// cond: c < 32 && buildcfg.GOPPC64 >= 9
12388	// result: (EXTSWSLconst [c] x)
12389	for {
12390		c := auxIntToInt64(v.AuxInt)
12391		z := v_0
12392		if z.Op != OpPPC64MOVWreg {
12393			break
12394		}
12395		x := z.Args[0]
12396		if !(c < 32 && buildcfg.GOPPC64 >= 9) {
12397			break
12398		}
12399		v.reset(OpPPC64EXTSWSLconst)
12400		v.AuxInt = int64ToAuxInt(c)
12401		v.AddArg(x)
12402		return true
12403	}
12404	return false
12405}
12406func rewriteValuePPC64_OpPPC64SRAD(v *Value) bool {
12407	v_1 := v.Args[1]
12408	v_0 := v.Args[0]
12409	// match: (SRAD x (MOVDconst [c]))
12410	// result: (SRADconst [c&63 | (c>>6&1*63)] x)
12411	for {
12412		x := v_0
12413		if v_1.Op != OpPPC64MOVDconst {
12414			break
12415		}
12416		c := auxIntToInt64(v_1.AuxInt)
12417		v.reset(OpPPC64SRADconst)
12418		v.AuxInt = int64ToAuxInt(c&63 | (c >> 6 & 1 * 63))
12419		v.AddArg(x)
12420		return true
12421	}
12422	return false
12423}
12424func rewriteValuePPC64_OpPPC64SRAW(v *Value) bool {
12425	v_1 := v.Args[1]
12426	v_0 := v.Args[0]
12427	// match: (SRAW x (MOVDconst [c]))
12428	// result: (SRAWconst [c&31 | (c>>5&1*31)] x)
12429	for {
12430		x := v_0
12431		if v_1.Op != OpPPC64MOVDconst {
12432			break
12433		}
12434		c := auxIntToInt64(v_1.AuxInt)
12435		v.reset(OpPPC64SRAWconst)
12436		v.AuxInt = int64ToAuxInt(c&31 | (c >> 5 & 1 * 31))
12437		v.AddArg(x)
12438		return true
12439	}
12440	return false
12441}
12442func rewriteValuePPC64_OpPPC64SRD(v *Value) bool {
12443	v_1 := v.Args[1]
12444	v_0 := v.Args[0]
12445	// match: (SRD x (MOVDconst [c]))
12446	// result: (SRDconst [c&63 | (c>>6&1*63)] x)
12447	for {
12448		x := v_0
12449		if v_1.Op != OpPPC64MOVDconst {
12450			break
12451		}
12452		c := auxIntToInt64(v_1.AuxInt)
12453		v.reset(OpPPC64SRDconst)
12454		v.AuxInt = int64ToAuxInt(c&63 | (c >> 6 & 1 * 63))
12455		v.AddArg(x)
12456		return true
12457	}
12458	return false
12459}
12460func rewriteValuePPC64_OpPPC64SRW(v *Value) bool {
12461	v_1 := v.Args[1]
12462	v_0 := v.Args[0]
12463	// match: (SRW x (MOVDconst [c]))
12464	// result: (SRWconst [c&31 | (c>>5&1*31)] x)
12465	for {
12466		x := v_0
12467		if v_1.Op != OpPPC64MOVDconst {
12468			break
12469		}
12470		c := auxIntToInt64(v_1.AuxInt)
12471		v.reset(OpPPC64SRWconst)
12472		v.AuxInt = int64ToAuxInt(c&31 | (c >> 5 & 1 * 31))
12473		v.AddArg(x)
12474		return true
12475	}
12476	return false
12477}
12478func rewriteValuePPC64_OpPPC64SRWconst(v *Value) bool {
12479	v_0 := v.Args[0]
12480	// match: (SRWconst (ANDconst [m] x) [s])
12481	// cond: mergePPC64RShiftMask(m>>uint(s),s,32) == 0
12482	// result: (MOVDconst [0])
12483	for {
12484		s := auxIntToInt64(v.AuxInt)
12485		if v_0.Op != OpPPC64ANDconst {
12486			break
12487		}
12488		m := auxIntToInt64(v_0.AuxInt)
12489		if !(mergePPC64RShiftMask(m>>uint(s), s, 32) == 0) {
12490			break
12491		}
12492		v.reset(OpPPC64MOVDconst)
12493		v.AuxInt = int64ToAuxInt(0)
12494		return true
12495	}
12496	// match: (SRWconst (ANDconst [m] x) [s])
12497	// cond: mergePPC64AndSrwi(m>>uint(s),s) != 0
12498	// result: (RLWINM [mergePPC64AndSrwi(m>>uint(s),s)] x)
12499	for {
12500		s := auxIntToInt64(v.AuxInt)
12501		if v_0.Op != OpPPC64ANDconst {
12502			break
12503		}
12504		m := auxIntToInt64(v_0.AuxInt)
12505		x := v_0.Args[0]
12506		if !(mergePPC64AndSrwi(m>>uint(s), s) != 0) {
12507			break
12508		}
12509		v.reset(OpPPC64RLWINM)
12510		v.AuxInt = int64ToAuxInt(mergePPC64AndSrwi(m>>uint(s), s))
12511		v.AddArg(x)
12512		return true
12513	}
12514	// match: (SRWconst (AND (MOVDconst [m]) x) [s])
12515	// cond: mergePPC64RShiftMask(m>>uint(s),s,32) == 0
12516	// result: (MOVDconst [0])
12517	for {
12518		s := auxIntToInt64(v.AuxInt)
12519		if v_0.Op != OpPPC64AND {
12520			break
12521		}
12522		_ = v_0.Args[1]
12523		v_0_0 := v_0.Args[0]
12524		v_0_1 := v_0.Args[1]
12525		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
12526			if v_0_0.Op != OpPPC64MOVDconst {
12527				continue
12528			}
12529			m := auxIntToInt64(v_0_0.AuxInt)
12530			if !(mergePPC64RShiftMask(m>>uint(s), s, 32) == 0) {
12531				continue
12532			}
12533			v.reset(OpPPC64MOVDconst)
12534			v.AuxInt = int64ToAuxInt(0)
12535			return true
12536		}
12537		break
12538	}
12539	// match: (SRWconst (AND (MOVDconst [m]) x) [s])
12540	// cond: mergePPC64AndSrwi(m>>uint(s),s) != 0
12541	// result: (RLWINM [mergePPC64AndSrwi(m>>uint(s),s)] x)
12542	for {
12543		s := auxIntToInt64(v.AuxInt)
12544		if v_0.Op != OpPPC64AND {
12545			break
12546		}
12547		_ = v_0.Args[1]
12548		v_0_0 := v_0.Args[0]
12549		v_0_1 := v_0.Args[1]
12550		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
12551			if v_0_0.Op != OpPPC64MOVDconst {
12552				continue
12553			}
12554			m := auxIntToInt64(v_0_0.AuxInt)
12555			x := v_0_1
12556			if !(mergePPC64AndSrwi(m>>uint(s), s) != 0) {
12557				continue
12558			}
12559			v.reset(OpPPC64RLWINM)
12560			v.AuxInt = int64ToAuxInt(mergePPC64AndSrwi(m>>uint(s), s))
12561			v.AddArg(x)
12562			return true
12563		}
12564		break
12565	}
12566	return false
12567}
12568func rewriteValuePPC64_OpPPC64SUB(v *Value) bool {
12569	v_1 := v.Args[1]
12570	v_0 := v.Args[0]
12571	// match: (SUB x (MOVDconst [c]))
12572	// cond: is32Bit(-c)
12573	// result: (ADDconst [-c] x)
12574	for {
12575		x := v_0
12576		if v_1.Op != OpPPC64MOVDconst {
12577			break
12578		}
12579		c := auxIntToInt64(v_1.AuxInt)
12580		if !(is32Bit(-c)) {
12581			break
12582		}
12583		v.reset(OpPPC64ADDconst)
12584		v.AuxInt = int64ToAuxInt(-c)
12585		v.AddArg(x)
12586		return true
12587	}
12588	// match: (SUB (MOVDconst [c]) x)
12589	// cond: is32Bit(c)
12590	// result: (SUBFCconst [c] x)
12591	for {
12592		if v_0.Op != OpPPC64MOVDconst {
12593			break
12594		}
12595		c := auxIntToInt64(v_0.AuxInt)
12596		x := v_1
12597		if !(is32Bit(c)) {
12598			break
12599		}
12600		v.reset(OpPPC64SUBFCconst)
12601		v.AuxInt = int64ToAuxInt(c)
12602		v.AddArg(x)
12603		return true
12604	}
12605	return false
12606}
12607func rewriteValuePPC64_OpPPC64SUBE(v *Value) bool {
12608	v_2 := v.Args[2]
12609	v_1 := v.Args[1]
12610	v_0 := v.Args[0]
12611	b := v.Block
12612	typ := &b.Func.Config.Types
12613	// match: (SUBE x y (Select1 <typ.UInt64> (SUBCconst (MOVDconst [0]) [0])))
12614	// result: (SUBC x y)
12615	for {
12616		x := v_0
12617		y := v_1
12618		if v_2.Op != OpSelect1 || v_2.Type != typ.UInt64 {
12619			break
12620		}
12621		v_2_0 := v_2.Args[0]
12622		if v_2_0.Op != OpPPC64SUBCconst || auxIntToInt64(v_2_0.AuxInt) != 0 {
12623			break
12624		}
12625		v_2_0_0 := v_2_0.Args[0]
12626		if v_2_0_0.Op != OpPPC64MOVDconst || auxIntToInt64(v_2_0_0.AuxInt) != 0 {
12627			break
12628		}
12629		v.reset(OpPPC64SUBC)
12630		v.AddArg2(x, y)
12631		return true
12632	}
12633	return false
12634}
12635func rewriteValuePPC64_OpPPC64SUBFCconst(v *Value) bool {
12636	v_0 := v.Args[0]
12637	// match: (SUBFCconst [c] (NEG x))
12638	// result: (ADDconst [c] x)
12639	for {
12640		c := auxIntToInt64(v.AuxInt)
12641		if v_0.Op != OpPPC64NEG {
12642			break
12643		}
12644		x := v_0.Args[0]
12645		v.reset(OpPPC64ADDconst)
12646		v.AuxInt = int64ToAuxInt(c)
12647		v.AddArg(x)
12648		return true
12649	}
12650	// match: (SUBFCconst [c] (SUBFCconst [d] x))
12651	// cond: is32Bit(c-d)
12652	// result: (ADDconst [c-d] x)
12653	for {
12654		c := auxIntToInt64(v.AuxInt)
12655		if v_0.Op != OpPPC64SUBFCconst {
12656			break
12657		}
12658		d := auxIntToInt64(v_0.AuxInt)
12659		x := v_0.Args[0]
12660		if !(is32Bit(c - d)) {
12661			break
12662		}
12663		v.reset(OpPPC64ADDconst)
12664		v.AuxInt = int64ToAuxInt(c - d)
12665		v.AddArg(x)
12666		return true
12667	}
12668	// match: (SUBFCconst [0] x)
12669	// result: (NEG x)
12670	for {
12671		if auxIntToInt64(v.AuxInt) != 0 {
12672			break
12673		}
12674		x := v_0
12675		v.reset(OpPPC64NEG)
12676		v.AddArg(x)
12677		return true
12678	}
12679	return false
12680}
12681func rewriteValuePPC64_OpPPC64XOR(v *Value) bool {
12682	v_1 := v.Args[1]
12683	v_0 := v.Args[0]
12684	// match: (XOR (MOVDconst [c]) (MOVDconst [d]))
12685	// result: (MOVDconst [c^d])
12686	for {
12687		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
12688			if v_0.Op != OpPPC64MOVDconst {
12689				continue
12690			}
12691			c := auxIntToInt64(v_0.AuxInt)
12692			if v_1.Op != OpPPC64MOVDconst {
12693				continue
12694			}
12695			d := auxIntToInt64(v_1.AuxInt)
12696			v.reset(OpPPC64MOVDconst)
12697			v.AuxInt = int64ToAuxInt(c ^ d)
12698			return true
12699		}
12700		break
12701	}
12702	// match: (XOR x (MOVDconst [c]))
12703	// cond: isU32Bit(c)
12704	// result: (XORconst [c] x)
12705	for {
12706		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
12707			x := v_0
12708			if v_1.Op != OpPPC64MOVDconst {
12709				continue
12710			}
12711			c := auxIntToInt64(v_1.AuxInt)
12712			if !(isU32Bit(c)) {
12713				continue
12714			}
12715			v.reset(OpPPC64XORconst)
12716			v.AuxInt = int64ToAuxInt(c)
12717			v.AddArg(x)
12718			return true
12719		}
12720		break
12721	}
12722	return false
12723}
12724func rewriteValuePPC64_OpPPC64XORconst(v *Value) bool {
12725	v_0 := v.Args[0]
12726	// match: (XORconst [c] (XORconst [d] x))
12727	// result: (XORconst [c^d] x)
12728	for {
12729		c := auxIntToInt64(v.AuxInt)
12730		if v_0.Op != OpPPC64XORconst {
12731			break
12732		}
12733		d := auxIntToInt64(v_0.AuxInt)
12734		x := v_0.Args[0]
12735		v.reset(OpPPC64XORconst)
12736		v.AuxInt = int64ToAuxInt(c ^ d)
12737		v.AddArg(x)
12738		return true
12739	}
12740	// match: (XORconst [0] x)
12741	// result: x
12742	for {
12743		if auxIntToInt64(v.AuxInt) != 0 {
12744			break
12745		}
12746		x := v_0
12747		v.copyOf(x)
12748		return true
12749	}
12750	// match: (XORconst [1] (SETBCR [n] cmp))
12751	// result: (SETBC [n] cmp)
12752	for {
12753		if auxIntToInt64(v.AuxInt) != 1 || v_0.Op != OpPPC64SETBCR {
12754			break
12755		}
12756		n := auxIntToInt32(v_0.AuxInt)
12757		cmp := v_0.Args[0]
12758		v.reset(OpPPC64SETBC)
12759		v.AuxInt = int32ToAuxInt(n)
12760		v.AddArg(cmp)
12761		return true
12762	}
12763	// match: (XORconst [1] (SETBC [n] cmp))
12764	// result: (SETBCR [n] cmp)
12765	for {
12766		if auxIntToInt64(v.AuxInt) != 1 || v_0.Op != OpPPC64SETBC {
12767			break
12768		}
12769		n := auxIntToInt32(v_0.AuxInt)
12770		cmp := v_0.Args[0]
12771		v.reset(OpPPC64SETBCR)
12772		v.AuxInt = int32ToAuxInt(n)
12773		v.AddArg(cmp)
12774		return true
12775	}
12776	return false
12777}
12778func rewriteValuePPC64_OpPanicBounds(v *Value) bool {
12779	v_2 := v.Args[2]
12780	v_1 := v.Args[1]
12781	v_0 := v.Args[0]
12782	// match: (PanicBounds [kind] x y mem)
12783	// cond: boundsABI(kind) == 0
12784	// result: (LoweredPanicBoundsA [kind] x y mem)
12785	for {
12786		kind := auxIntToInt64(v.AuxInt)
12787		x := v_0
12788		y := v_1
12789		mem := v_2
12790		if !(boundsABI(kind) == 0) {
12791			break
12792		}
12793		v.reset(OpPPC64LoweredPanicBoundsA)
12794		v.AuxInt = int64ToAuxInt(kind)
12795		v.AddArg3(x, y, mem)
12796		return true
12797	}
12798	// match: (PanicBounds [kind] x y mem)
12799	// cond: boundsABI(kind) == 1
12800	// result: (LoweredPanicBoundsB [kind] x y mem)
12801	for {
12802		kind := auxIntToInt64(v.AuxInt)
12803		x := v_0
12804		y := v_1
12805		mem := v_2
12806		if !(boundsABI(kind) == 1) {
12807			break
12808		}
12809		v.reset(OpPPC64LoweredPanicBoundsB)
12810		v.AuxInt = int64ToAuxInt(kind)
12811		v.AddArg3(x, y, mem)
12812		return true
12813	}
12814	// match: (PanicBounds [kind] x y mem)
12815	// cond: boundsABI(kind) == 2
12816	// result: (LoweredPanicBoundsC [kind] x y mem)
12817	for {
12818		kind := auxIntToInt64(v.AuxInt)
12819		x := v_0
12820		y := v_1
12821		mem := v_2
12822		if !(boundsABI(kind) == 2) {
12823			break
12824		}
12825		v.reset(OpPPC64LoweredPanicBoundsC)
12826		v.AuxInt = int64ToAuxInt(kind)
12827		v.AddArg3(x, y, mem)
12828		return true
12829	}
12830	return false
12831}
12832func rewriteValuePPC64_OpPopCount16(v *Value) bool {
12833	v_0 := v.Args[0]
12834	b := v.Block
12835	typ := &b.Func.Config.Types
12836	// match: (PopCount16 x)
12837	// result: (POPCNTW (MOVHZreg x))
12838	for {
12839		x := v_0
12840		v.reset(OpPPC64POPCNTW)
12841		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
12842		v0.AddArg(x)
12843		v.AddArg(v0)
12844		return true
12845	}
12846}
12847func rewriteValuePPC64_OpPopCount32(v *Value) bool {
12848	v_0 := v.Args[0]
12849	b := v.Block
12850	typ := &b.Func.Config.Types
12851	// match: (PopCount32 x)
12852	// result: (POPCNTW (MOVWZreg x))
12853	for {
12854		x := v_0
12855		v.reset(OpPPC64POPCNTW)
12856		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZreg, typ.Int64)
12857		v0.AddArg(x)
12858		v.AddArg(v0)
12859		return true
12860	}
12861}
12862func rewriteValuePPC64_OpPopCount8(v *Value) bool {
12863	v_0 := v.Args[0]
12864	b := v.Block
12865	typ := &b.Func.Config.Types
12866	// match: (PopCount8 x)
12867	// result: (POPCNTB (MOVBZreg x))
12868	for {
12869		x := v_0
12870		v.reset(OpPPC64POPCNTB)
12871		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
12872		v0.AddArg(x)
12873		v.AddArg(v0)
12874		return true
12875	}
12876}
12877func rewriteValuePPC64_OpPrefetchCache(v *Value) bool {
12878	v_1 := v.Args[1]
12879	v_0 := v.Args[0]
12880	// match: (PrefetchCache ptr mem)
12881	// result: (DCBT ptr mem [0])
12882	for {
12883		ptr := v_0
12884		mem := v_1
12885		v.reset(OpPPC64DCBT)
12886		v.AuxInt = int64ToAuxInt(0)
12887		v.AddArg2(ptr, mem)
12888		return true
12889	}
12890}
12891func rewriteValuePPC64_OpPrefetchCacheStreamed(v *Value) bool {
12892	v_1 := v.Args[1]
12893	v_0 := v.Args[0]
12894	// match: (PrefetchCacheStreamed ptr mem)
12895	// result: (DCBT ptr mem [16])
12896	for {
12897		ptr := v_0
12898		mem := v_1
12899		v.reset(OpPPC64DCBT)
12900		v.AuxInt = int64ToAuxInt(16)
12901		v.AddArg2(ptr, mem)
12902		return true
12903	}
12904}
12905func rewriteValuePPC64_OpRotateLeft16(v *Value) bool {
12906	v_1 := v.Args[1]
12907	v_0 := v.Args[0]
12908	b := v.Block
12909	typ := &b.Func.Config.Types
12910	// match: (RotateLeft16 <t> x (MOVDconst [c]))
12911	// result: (Or16 (Lsh16x64 <t> x (MOVDconst [c&15])) (Rsh16Ux64 <t> x (MOVDconst [-c&15])))
12912	for {
12913		t := v.Type
12914		x := v_0
12915		if v_1.Op != OpPPC64MOVDconst {
12916			break
12917		}
12918		c := auxIntToInt64(v_1.AuxInt)
12919		v.reset(OpOr16)
12920		v0 := b.NewValue0(v.Pos, OpLsh16x64, t)
12921		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
12922		v1.AuxInt = int64ToAuxInt(c & 15)
12923		v0.AddArg2(x, v1)
12924		v2 := b.NewValue0(v.Pos, OpRsh16Ux64, t)
12925		v3 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
12926		v3.AuxInt = int64ToAuxInt(-c & 15)
12927		v2.AddArg2(x, v3)
12928		v.AddArg2(v0, v2)
12929		return true
12930	}
12931	return false
12932}
12933func rewriteValuePPC64_OpRotateLeft8(v *Value) bool {
12934	v_1 := v.Args[1]
12935	v_0 := v.Args[0]
12936	b := v.Block
12937	typ := &b.Func.Config.Types
12938	// match: (RotateLeft8 <t> x (MOVDconst [c]))
12939	// result: (Or8 (Lsh8x64 <t> x (MOVDconst [c&7])) (Rsh8Ux64 <t> x (MOVDconst [-c&7])))
12940	for {
12941		t := v.Type
12942		x := v_0
12943		if v_1.Op != OpPPC64MOVDconst {
12944			break
12945		}
12946		c := auxIntToInt64(v_1.AuxInt)
12947		v.reset(OpOr8)
12948		v0 := b.NewValue0(v.Pos, OpLsh8x64, t)
12949		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
12950		v1.AuxInt = int64ToAuxInt(c & 7)
12951		v0.AddArg2(x, v1)
12952		v2 := b.NewValue0(v.Pos, OpRsh8Ux64, t)
12953		v3 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
12954		v3.AuxInt = int64ToAuxInt(-c & 7)
12955		v2.AddArg2(x, v3)
12956		v.AddArg2(v0, v2)
12957		return true
12958	}
12959	return false
12960}
12961func rewriteValuePPC64_OpRsh16Ux16(v *Value) bool {
12962	v_1 := v.Args[1]
12963	v_0 := v.Args[0]
12964	b := v.Block
12965	typ := &b.Func.Config.Types
12966	// match: (Rsh16Ux16 x y)
12967	// cond: shiftIsBounded(v)
12968	// result: (SRD (MOVHZreg x) y)
12969	for {
12970		x := v_0
12971		y := v_1
12972		if !(shiftIsBounded(v)) {
12973			break
12974		}
12975		v.reset(OpPPC64SRD)
12976		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
12977		v0.AddArg(x)
12978		v.AddArg2(v0, y)
12979		return true
12980	}
12981	// match: (Rsh16Ux16 <t> x y)
12982	// result: (ISEL [2] (SRD <t> (MOVHZreg x) y) (MOVDconst [0]) (CMPconst [0] (ANDconst [0xFFF0] y)))
12983	for {
12984		t := v.Type
12985		x := v_0
12986		y := v_1
12987		v.reset(OpPPC64ISEL)
12988		v.AuxInt = int32ToAuxInt(2)
12989		v0 := b.NewValue0(v.Pos, OpPPC64SRD, t)
12990		v1 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
12991		v1.AddArg(x)
12992		v0.AddArg2(v1, y)
12993		v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
12994		v2.AuxInt = int64ToAuxInt(0)
12995		v3 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
12996		v3.AuxInt = int64ToAuxInt(0)
12997		v4 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int)
12998		v4.AuxInt = int64ToAuxInt(0xFFF0)
12999		v4.AddArg(y)
13000		v3.AddArg(v4)
13001		v.AddArg3(v0, v2, v3)
13002		return true
13003	}
13004}
13005func rewriteValuePPC64_OpRsh16Ux32(v *Value) bool {
13006	v_1 := v.Args[1]
13007	v_0 := v.Args[0]
13008	b := v.Block
13009	typ := &b.Func.Config.Types
13010	// match: (Rsh16Ux32 x y)
13011	// cond: shiftIsBounded(v)
13012	// result: (SRD (MOVHZreg x) y)
13013	for {
13014		x := v_0
13015		y := v_1
13016		if !(shiftIsBounded(v)) {
13017			break
13018		}
13019		v.reset(OpPPC64SRD)
13020		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
13021		v0.AddArg(x)
13022		v.AddArg2(v0, y)
13023		return true
13024	}
13025	// match: (Rsh16Ux32 <t> x y)
13026	// result: (ISEL [0] (SRD <t> (MOVHZreg x) y) (MOVDconst [0]) (CMPWUconst y [16]))
13027	for {
13028		t := v.Type
13029		x := v_0
13030		y := v_1
13031		v.reset(OpPPC64ISEL)
13032		v.AuxInt = int32ToAuxInt(0)
13033		v0 := b.NewValue0(v.Pos, OpPPC64SRD, t)
13034		v1 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
13035		v1.AddArg(x)
13036		v0.AddArg2(v1, y)
13037		v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
13038		v2.AuxInt = int64ToAuxInt(0)
13039		v3 := b.NewValue0(v.Pos, OpPPC64CMPWUconst, types.TypeFlags)
13040		v3.AuxInt = int32ToAuxInt(16)
13041		v3.AddArg(y)
13042		v.AddArg3(v0, v2, v3)
13043		return true
13044	}
13045}
13046func rewriteValuePPC64_OpRsh16Ux64(v *Value) bool {
13047	v_1 := v.Args[1]
13048	v_0 := v.Args[0]
13049	b := v.Block
13050	typ := &b.Func.Config.Types
13051	// match: (Rsh16Ux64 x (MOVDconst [c]))
13052	// cond: uint64(c) < 16
13053	// result: (SRWconst (ZeroExt16to32 x) [c])
13054	for {
13055		x := v_0
13056		if v_1.Op != OpPPC64MOVDconst {
13057			break
13058		}
13059		c := auxIntToInt64(v_1.AuxInt)
13060		if !(uint64(c) < 16) {
13061			break
13062		}
13063		v.reset(OpPPC64SRWconst)
13064		v.AuxInt = int64ToAuxInt(c)
13065		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
13066		v0.AddArg(x)
13067		v.AddArg(v0)
13068		return true
13069	}
13070	// match: (Rsh16Ux64 x y)
13071	// cond: shiftIsBounded(v)
13072	// result: (SRD (MOVHZreg x) y)
13073	for {
13074		x := v_0
13075		y := v_1
13076		if !(shiftIsBounded(v)) {
13077			break
13078		}
13079		v.reset(OpPPC64SRD)
13080		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
13081		v0.AddArg(x)
13082		v.AddArg2(v0, y)
13083		return true
13084	}
13085	// match: (Rsh16Ux64 <t> x y)
13086	// result: (ISEL [0] (SRD <t> (MOVHZreg x) y) (MOVDconst [0]) (CMPUconst y [16]))
13087	for {
13088		t := v.Type
13089		x := v_0
13090		y := v_1
13091		v.reset(OpPPC64ISEL)
13092		v.AuxInt = int32ToAuxInt(0)
13093		v0 := b.NewValue0(v.Pos, OpPPC64SRD, t)
13094		v1 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
13095		v1.AddArg(x)
13096		v0.AddArg2(v1, y)
13097		v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
13098		v2.AuxInt = int64ToAuxInt(0)
13099		v3 := b.NewValue0(v.Pos, OpPPC64CMPUconst, types.TypeFlags)
13100		v3.AuxInt = int64ToAuxInt(16)
13101		v3.AddArg(y)
13102		v.AddArg3(v0, v2, v3)
13103		return true
13104	}
13105}
13106func rewriteValuePPC64_OpRsh16Ux8(v *Value) bool {
13107	v_1 := v.Args[1]
13108	v_0 := v.Args[0]
13109	b := v.Block
13110	typ := &b.Func.Config.Types
13111	// match: (Rsh16Ux8 x y)
13112	// cond: shiftIsBounded(v)
13113	// result: (SRD (MOVHZreg x) y)
13114	for {
13115		x := v_0
13116		y := v_1
13117		if !(shiftIsBounded(v)) {
13118			break
13119		}
13120		v.reset(OpPPC64SRD)
13121		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
13122		v0.AddArg(x)
13123		v.AddArg2(v0, y)
13124		return true
13125	}
13126	// match: (Rsh16Ux8 <t> x y)
13127	// result: (ISEL [2] (SRD <t> (MOVHZreg x) y) (MOVDconst [0]) (CMPconst [0] (ANDconst [0x00F0] y)))
13128	for {
13129		t := v.Type
13130		x := v_0
13131		y := v_1
13132		v.reset(OpPPC64ISEL)
13133		v.AuxInt = int32ToAuxInt(2)
13134		v0 := b.NewValue0(v.Pos, OpPPC64SRD, t)
13135		v1 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
13136		v1.AddArg(x)
13137		v0.AddArg2(v1, y)
13138		v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
13139		v2.AuxInt = int64ToAuxInt(0)
13140		v3 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
13141		v3.AuxInt = int64ToAuxInt(0)
13142		v4 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int)
13143		v4.AuxInt = int64ToAuxInt(0x00F0)
13144		v4.AddArg(y)
13145		v3.AddArg(v4)
13146		v.AddArg3(v0, v2, v3)
13147		return true
13148	}
13149}
13150func rewriteValuePPC64_OpRsh16x16(v *Value) bool {
13151	v_1 := v.Args[1]
13152	v_0 := v.Args[0]
13153	b := v.Block
13154	typ := &b.Func.Config.Types
13155	// match: (Rsh16x16 x y)
13156	// cond: shiftIsBounded(v)
13157	// result: (SRAD (MOVHreg x) y)
13158	for {
13159		x := v_0
13160		y := v_1
13161		if !(shiftIsBounded(v)) {
13162			break
13163		}
13164		v.reset(OpPPC64SRAD)
13165		v0 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
13166		v0.AddArg(x)
13167		v.AddArg2(v0, y)
13168		return true
13169	}
13170	// match: (Rsh16x16 <t> x y)
13171	// result: (ISEL [2] (SRAD <t> (MOVHreg x) y) (SRADconst <t> (MOVHreg x) [15]) (CMPconst [0] (ANDconst [0xFFF0] y)))
13172	for {
13173		t := v.Type
13174		x := v_0
13175		y := v_1
13176		v.reset(OpPPC64ISEL)
13177		v.AuxInt = int32ToAuxInt(2)
13178		v0 := b.NewValue0(v.Pos, OpPPC64SRAD, t)
13179		v1 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
13180		v1.AddArg(x)
13181		v0.AddArg2(v1, y)
13182		v2 := b.NewValue0(v.Pos, OpPPC64SRADconst, t)
13183		v2.AuxInt = int64ToAuxInt(15)
13184		v2.AddArg(v1)
13185		v3 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
13186		v3.AuxInt = int64ToAuxInt(0)
13187		v4 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int)
13188		v4.AuxInt = int64ToAuxInt(0xFFF0)
13189		v4.AddArg(y)
13190		v3.AddArg(v4)
13191		v.AddArg3(v0, v2, v3)
13192		return true
13193	}
13194}
13195func rewriteValuePPC64_OpRsh16x32(v *Value) bool {
13196	v_1 := v.Args[1]
13197	v_0 := v.Args[0]
13198	b := v.Block
13199	typ := &b.Func.Config.Types
13200	// match: (Rsh16x32 x y)
13201	// cond: shiftIsBounded(v)
13202	// result: (SRAD (MOVHreg x) y)
13203	for {
13204		x := v_0
13205		y := v_1
13206		if !(shiftIsBounded(v)) {
13207			break
13208		}
13209		v.reset(OpPPC64SRAD)
13210		v0 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
13211		v0.AddArg(x)
13212		v.AddArg2(v0, y)
13213		return true
13214	}
13215	// match: (Rsh16x32 <t> x y)
13216	// result: (ISEL [0] (SRAD <t> (MOVHreg x) y) (SRADconst <t> (MOVHreg x) [15]) (CMPWUconst y [16]))
13217	for {
13218		t := v.Type
13219		x := v_0
13220		y := v_1
13221		v.reset(OpPPC64ISEL)
13222		v.AuxInt = int32ToAuxInt(0)
13223		v0 := b.NewValue0(v.Pos, OpPPC64SRAD, t)
13224		v1 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
13225		v1.AddArg(x)
13226		v0.AddArg2(v1, y)
13227		v2 := b.NewValue0(v.Pos, OpPPC64SRADconst, t)
13228		v2.AuxInt = int64ToAuxInt(15)
13229		v2.AddArg(v1)
13230		v3 := b.NewValue0(v.Pos, OpPPC64CMPWUconst, types.TypeFlags)
13231		v3.AuxInt = int32ToAuxInt(16)
13232		v3.AddArg(y)
13233		v.AddArg3(v0, v2, v3)
13234		return true
13235	}
13236}
13237func rewriteValuePPC64_OpRsh16x64(v *Value) bool {
13238	v_1 := v.Args[1]
13239	v_0 := v.Args[0]
13240	b := v.Block
13241	typ := &b.Func.Config.Types
13242	// match: (Rsh16x64 x (MOVDconst [c]))
13243	// cond: uint64(c) >= 16
13244	// result: (SRAWconst (SignExt16to32 x) [63])
13245	for {
13246		x := v_0
13247		if v_1.Op != OpPPC64MOVDconst {
13248			break
13249		}
13250		c := auxIntToInt64(v_1.AuxInt)
13251		if !(uint64(c) >= 16) {
13252			break
13253		}
13254		v.reset(OpPPC64SRAWconst)
13255		v.AuxInt = int64ToAuxInt(63)
13256		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
13257		v0.AddArg(x)
13258		v.AddArg(v0)
13259		return true
13260	}
13261	// match: (Rsh16x64 x (MOVDconst [c]))
13262	// cond: uint64(c) < 16
13263	// result: (SRAWconst (SignExt16to32 x) [c])
13264	for {
13265		x := v_0
13266		if v_1.Op != OpPPC64MOVDconst {
13267			break
13268		}
13269		c := auxIntToInt64(v_1.AuxInt)
13270		if !(uint64(c) < 16) {
13271			break
13272		}
13273		v.reset(OpPPC64SRAWconst)
13274		v.AuxInt = int64ToAuxInt(c)
13275		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
13276		v0.AddArg(x)
13277		v.AddArg(v0)
13278		return true
13279	}
13280	// match: (Rsh16x64 x y)
13281	// cond: shiftIsBounded(v)
13282	// result: (SRAD (MOVHreg x) y)
13283	for {
13284		x := v_0
13285		y := v_1
13286		if !(shiftIsBounded(v)) {
13287			break
13288		}
13289		v.reset(OpPPC64SRAD)
13290		v0 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
13291		v0.AddArg(x)
13292		v.AddArg2(v0, y)
13293		return true
13294	}
13295	// match: (Rsh16x64 <t> x y)
13296	// result: (ISEL [0] (SRAD <t> (MOVHreg x) y) (SRADconst <t> (MOVHreg x) [15]) (CMPUconst y [16]))
13297	for {
13298		t := v.Type
13299		x := v_0
13300		y := v_1
13301		v.reset(OpPPC64ISEL)
13302		v.AuxInt = int32ToAuxInt(0)
13303		v0 := b.NewValue0(v.Pos, OpPPC64SRAD, t)
13304		v1 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
13305		v1.AddArg(x)
13306		v0.AddArg2(v1, y)
13307		v2 := b.NewValue0(v.Pos, OpPPC64SRADconst, t)
13308		v2.AuxInt = int64ToAuxInt(15)
13309		v2.AddArg(v1)
13310		v3 := b.NewValue0(v.Pos, OpPPC64CMPUconst, types.TypeFlags)
13311		v3.AuxInt = int64ToAuxInt(16)
13312		v3.AddArg(y)
13313		v.AddArg3(v0, v2, v3)
13314		return true
13315	}
13316}
13317func rewriteValuePPC64_OpRsh16x8(v *Value) bool {
13318	v_1 := v.Args[1]
13319	v_0 := v.Args[0]
13320	b := v.Block
13321	typ := &b.Func.Config.Types
13322	// match: (Rsh16x8 x y)
13323	// cond: shiftIsBounded(v)
13324	// result: (SRAD (MOVHreg x) y)
13325	for {
13326		x := v_0
13327		y := v_1
13328		if !(shiftIsBounded(v)) {
13329			break
13330		}
13331		v.reset(OpPPC64SRAD)
13332		v0 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
13333		v0.AddArg(x)
13334		v.AddArg2(v0, y)
13335		return true
13336	}
13337	// match: (Rsh16x8 <t> x y)
13338	// result: (ISEL [2] (SRAD <t> (MOVHreg x) y) (SRADconst <t> (MOVHreg x) [15]) (CMPconst [0] (ANDconst [0x00F0] y)))
13339	for {
13340		t := v.Type
13341		x := v_0
13342		y := v_1
13343		v.reset(OpPPC64ISEL)
13344		v.AuxInt = int32ToAuxInt(2)
13345		v0 := b.NewValue0(v.Pos, OpPPC64SRAD, t)
13346		v1 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
13347		v1.AddArg(x)
13348		v0.AddArg2(v1, y)
13349		v2 := b.NewValue0(v.Pos, OpPPC64SRADconst, t)
13350		v2.AuxInt = int64ToAuxInt(15)
13351		v2.AddArg(v1)
13352		v3 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
13353		v3.AuxInt = int64ToAuxInt(0)
13354		v4 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int)
13355		v4.AuxInt = int64ToAuxInt(0x00F0)
13356		v4.AddArg(y)
13357		v3.AddArg(v4)
13358		v.AddArg3(v0, v2, v3)
13359		return true
13360	}
13361}
13362func rewriteValuePPC64_OpRsh32Ux16(v *Value) bool {
13363	v_1 := v.Args[1]
13364	v_0 := v.Args[0]
13365	b := v.Block
13366	typ := &b.Func.Config.Types
13367	// match: (Rsh32Ux16 x y)
13368	// cond: shiftIsBounded(v)
13369	// result: (SRW x y)
13370	for {
13371		x := v_0
13372		y := v_1
13373		if !(shiftIsBounded(v)) {
13374			break
13375		}
13376		v.reset(OpPPC64SRW)
13377		v.AddArg2(x, y)
13378		return true
13379	}
13380	// match: (Rsh32Ux16 <t> x y)
13381	// result: (ISEL [2] (SRW <t> x y) (MOVDconst [0]) (CMPconst [0] (ANDconst [0xFFE0] y)))
13382	for {
13383		t := v.Type
13384		x := v_0
13385		y := v_1
13386		v.reset(OpPPC64ISEL)
13387		v.AuxInt = int32ToAuxInt(2)
13388		v0 := b.NewValue0(v.Pos, OpPPC64SRW, t)
13389		v0.AddArg2(x, y)
13390		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
13391		v1.AuxInt = int64ToAuxInt(0)
13392		v2 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
13393		v2.AuxInt = int64ToAuxInt(0)
13394		v3 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int)
13395		v3.AuxInt = int64ToAuxInt(0xFFE0)
13396		v3.AddArg(y)
13397		v2.AddArg(v3)
13398		v.AddArg3(v0, v1, v2)
13399		return true
13400	}
13401}
13402func rewriteValuePPC64_OpRsh32Ux32(v *Value) bool {
13403	v_1 := v.Args[1]
13404	v_0 := v.Args[0]
13405	b := v.Block
13406	typ := &b.Func.Config.Types
13407	// match: (Rsh32Ux32 x y)
13408	// cond: shiftIsBounded(v)
13409	// result: (SRW x y)
13410	for {
13411		x := v_0
13412		y := v_1
13413		if !(shiftIsBounded(v)) {
13414			break
13415		}
13416		v.reset(OpPPC64SRW)
13417		v.AddArg2(x, y)
13418		return true
13419	}
13420	// match: (Rsh32Ux32 <t> x y)
13421	// result: (ISEL [0] (SRW <t> x y) (MOVDconst [0]) (CMPWUconst y [32]))
13422	for {
13423		t := v.Type
13424		x := v_0
13425		y := v_1
13426		v.reset(OpPPC64ISEL)
13427		v.AuxInt = int32ToAuxInt(0)
13428		v0 := b.NewValue0(v.Pos, OpPPC64SRW, t)
13429		v0.AddArg2(x, y)
13430		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
13431		v1.AuxInt = int64ToAuxInt(0)
13432		v2 := b.NewValue0(v.Pos, OpPPC64CMPWUconst, types.TypeFlags)
13433		v2.AuxInt = int32ToAuxInt(32)
13434		v2.AddArg(y)
13435		v.AddArg3(v0, v1, v2)
13436		return true
13437	}
13438}
13439func rewriteValuePPC64_OpRsh32Ux64(v *Value) bool {
13440	v_1 := v.Args[1]
13441	v_0 := v.Args[0]
13442	b := v.Block
13443	typ := &b.Func.Config.Types
13444	// match: (Rsh32Ux64 x (MOVDconst [c]))
13445	// cond: uint64(c) < 32
13446	// result: (SRWconst x [c])
13447	for {
13448		x := v_0
13449		if v_1.Op != OpPPC64MOVDconst {
13450			break
13451		}
13452		c := auxIntToInt64(v_1.AuxInt)
13453		if !(uint64(c) < 32) {
13454			break
13455		}
13456		v.reset(OpPPC64SRWconst)
13457		v.AuxInt = int64ToAuxInt(c)
13458		v.AddArg(x)
13459		return true
13460	}
13461	// match: (Rsh32Ux64 x y)
13462	// cond: shiftIsBounded(v)
13463	// result: (SRW x y)
13464	for {
13465		x := v_0
13466		y := v_1
13467		if !(shiftIsBounded(v)) {
13468			break
13469		}
13470		v.reset(OpPPC64SRW)
13471		v.AddArg2(x, y)
13472		return true
13473	}
13474	// match: (Rsh32Ux64 <t> x y)
13475	// result: (ISEL [0] (SRW <t> x y) (MOVDconst [0]) (CMPUconst y [32]))
13476	for {
13477		t := v.Type
13478		x := v_0
13479		y := v_1
13480		v.reset(OpPPC64ISEL)
13481		v.AuxInt = int32ToAuxInt(0)
13482		v0 := b.NewValue0(v.Pos, OpPPC64SRW, t)
13483		v0.AddArg2(x, y)
13484		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
13485		v1.AuxInt = int64ToAuxInt(0)
13486		v2 := b.NewValue0(v.Pos, OpPPC64CMPUconst, types.TypeFlags)
13487		v2.AuxInt = int64ToAuxInt(32)
13488		v2.AddArg(y)
13489		v.AddArg3(v0, v1, v2)
13490		return true
13491	}
13492}
13493func rewriteValuePPC64_OpRsh32Ux8(v *Value) bool {
13494	v_1 := v.Args[1]
13495	v_0 := v.Args[0]
13496	b := v.Block
13497	typ := &b.Func.Config.Types
13498	// match: (Rsh32Ux8 x y)
13499	// cond: shiftIsBounded(v)
13500	// result: (SRW x y)
13501	for {
13502		x := v_0
13503		y := v_1
13504		if !(shiftIsBounded(v)) {
13505			break
13506		}
13507		v.reset(OpPPC64SRW)
13508		v.AddArg2(x, y)
13509		return true
13510	}
13511	// match: (Rsh32Ux8 <t> x y)
13512	// result: (ISEL [2] (SRW <t> x y) (MOVDconst [0]) (CMPconst [0] (ANDconst [0x00E0] y)))
13513	for {
13514		t := v.Type
13515		x := v_0
13516		y := v_1
13517		v.reset(OpPPC64ISEL)
13518		v.AuxInt = int32ToAuxInt(2)
13519		v0 := b.NewValue0(v.Pos, OpPPC64SRW, t)
13520		v0.AddArg2(x, y)
13521		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
13522		v1.AuxInt = int64ToAuxInt(0)
13523		v2 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
13524		v2.AuxInt = int64ToAuxInt(0)
13525		v3 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int)
13526		v3.AuxInt = int64ToAuxInt(0x00E0)
13527		v3.AddArg(y)
13528		v2.AddArg(v3)
13529		v.AddArg3(v0, v1, v2)
13530		return true
13531	}
13532}
13533func rewriteValuePPC64_OpRsh32x16(v *Value) bool {
13534	v_1 := v.Args[1]
13535	v_0 := v.Args[0]
13536	b := v.Block
13537	typ := &b.Func.Config.Types
13538	// match: (Rsh32x16 x y)
13539	// cond: shiftIsBounded(v)
13540	// result: (SRAW x y)
13541	for {
13542		x := v_0
13543		y := v_1
13544		if !(shiftIsBounded(v)) {
13545			break
13546		}
13547		v.reset(OpPPC64SRAW)
13548		v.AddArg2(x, y)
13549		return true
13550	}
13551	// match: (Rsh32x16 <t> x y)
13552	// result: (ISEL [2] (SRAW <t> x y) (SRAWconst <t> x [31]) (CMPconst [0] (ANDconst [0xFFE0] y)))
13553	for {
13554		t := v.Type
13555		x := v_0
13556		y := v_1
13557		v.reset(OpPPC64ISEL)
13558		v.AuxInt = int32ToAuxInt(2)
13559		v0 := b.NewValue0(v.Pos, OpPPC64SRAW, t)
13560		v0.AddArg2(x, y)
13561		v1 := b.NewValue0(v.Pos, OpPPC64SRAWconst, t)
13562		v1.AuxInt = int64ToAuxInt(31)
13563		v1.AddArg(x)
13564		v2 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
13565		v2.AuxInt = int64ToAuxInt(0)
13566		v3 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int)
13567		v3.AuxInt = int64ToAuxInt(0xFFE0)
13568		v3.AddArg(y)
13569		v2.AddArg(v3)
13570		v.AddArg3(v0, v1, v2)
13571		return true
13572	}
13573}
13574func rewriteValuePPC64_OpRsh32x32(v *Value) bool {
13575	v_1 := v.Args[1]
13576	v_0 := v.Args[0]
13577	b := v.Block
13578	// match: (Rsh32x32 x y)
13579	// cond: shiftIsBounded(v)
13580	// result: (SRAW x y)
13581	for {
13582		x := v_0
13583		y := v_1
13584		if !(shiftIsBounded(v)) {
13585			break
13586		}
13587		v.reset(OpPPC64SRAW)
13588		v.AddArg2(x, y)
13589		return true
13590	}
13591	// match: (Rsh32x32 <t> x y)
13592	// result: (ISEL [0] (SRAW <t> x y) (SRAWconst <t> x [31]) (CMPWUconst y [32]))
13593	for {
13594		t := v.Type
13595		x := v_0
13596		y := v_1
13597		v.reset(OpPPC64ISEL)
13598		v.AuxInt = int32ToAuxInt(0)
13599		v0 := b.NewValue0(v.Pos, OpPPC64SRAW, t)
13600		v0.AddArg2(x, y)
13601		v1 := b.NewValue0(v.Pos, OpPPC64SRAWconst, t)
13602		v1.AuxInt = int64ToAuxInt(31)
13603		v1.AddArg(x)
13604		v2 := b.NewValue0(v.Pos, OpPPC64CMPWUconst, types.TypeFlags)
13605		v2.AuxInt = int32ToAuxInt(32)
13606		v2.AddArg(y)
13607		v.AddArg3(v0, v1, v2)
13608		return true
13609	}
13610}
13611func rewriteValuePPC64_OpRsh32x64(v *Value) bool {
13612	v_1 := v.Args[1]
13613	v_0 := v.Args[0]
13614	b := v.Block
13615	// match: (Rsh32x64 x (MOVDconst [c]))
13616	// cond: uint64(c) >= 32
13617	// result: (SRAWconst x [63])
13618	for {
13619		x := v_0
13620		if v_1.Op != OpPPC64MOVDconst {
13621			break
13622		}
13623		c := auxIntToInt64(v_1.AuxInt)
13624		if !(uint64(c) >= 32) {
13625			break
13626		}
13627		v.reset(OpPPC64SRAWconst)
13628		v.AuxInt = int64ToAuxInt(63)
13629		v.AddArg(x)
13630		return true
13631	}
13632	// match: (Rsh32x64 x (MOVDconst [c]))
13633	// cond: uint64(c) < 32
13634	// result: (SRAWconst x [c])
13635	for {
13636		x := v_0
13637		if v_1.Op != OpPPC64MOVDconst {
13638			break
13639		}
13640		c := auxIntToInt64(v_1.AuxInt)
13641		if !(uint64(c) < 32) {
13642			break
13643		}
13644		v.reset(OpPPC64SRAWconst)
13645		v.AuxInt = int64ToAuxInt(c)
13646		v.AddArg(x)
13647		return true
13648	}
13649	// match: (Rsh32x64 x y)
13650	// cond: shiftIsBounded(v)
13651	// result: (SRAW x y)
13652	for {
13653		x := v_0
13654		y := v_1
13655		if !(shiftIsBounded(v)) {
13656			break
13657		}
13658		v.reset(OpPPC64SRAW)
13659		v.AddArg2(x, y)
13660		return true
13661	}
13662	// match: (Rsh32x64 <t> x y)
13663	// result: (ISEL [0] (SRAW <t> x y) (SRAWconst <t> x [31]) (CMPUconst y [32]))
13664	for {
13665		t := v.Type
13666		x := v_0
13667		y := v_1
13668		v.reset(OpPPC64ISEL)
13669		v.AuxInt = int32ToAuxInt(0)
13670		v0 := b.NewValue0(v.Pos, OpPPC64SRAW, t)
13671		v0.AddArg2(x, y)
13672		v1 := b.NewValue0(v.Pos, OpPPC64SRAWconst, t)
13673		v1.AuxInt = int64ToAuxInt(31)
13674		v1.AddArg(x)
13675		v2 := b.NewValue0(v.Pos, OpPPC64CMPUconst, types.TypeFlags)
13676		v2.AuxInt = int64ToAuxInt(32)
13677		v2.AddArg(y)
13678		v.AddArg3(v0, v1, v2)
13679		return true
13680	}
13681}
13682func rewriteValuePPC64_OpRsh32x8(v *Value) bool {
13683	v_1 := v.Args[1]
13684	v_0 := v.Args[0]
13685	b := v.Block
13686	typ := &b.Func.Config.Types
13687	// match: (Rsh32x8 x y)
13688	// cond: shiftIsBounded(v)
13689	// result: (SRAW x y)
13690	for {
13691		x := v_0
13692		y := v_1
13693		if !(shiftIsBounded(v)) {
13694			break
13695		}
13696		v.reset(OpPPC64SRAW)
13697		v.AddArg2(x, y)
13698		return true
13699	}
13700	// match: (Rsh32x8 <t> x y)
13701	// result: (ISEL [2] (SRAW <t> x y) (SRAWconst <t> x [31]) (CMPconst [0] (ANDconst [0x00E0] y)))
13702	for {
13703		t := v.Type
13704		x := v_0
13705		y := v_1
13706		v.reset(OpPPC64ISEL)
13707		v.AuxInt = int32ToAuxInt(2)
13708		v0 := b.NewValue0(v.Pos, OpPPC64SRAW, t)
13709		v0.AddArg2(x, y)
13710		v1 := b.NewValue0(v.Pos, OpPPC64SRAWconst, t)
13711		v1.AuxInt = int64ToAuxInt(31)
13712		v1.AddArg(x)
13713		v2 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
13714		v2.AuxInt = int64ToAuxInt(0)
13715		v3 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int)
13716		v3.AuxInt = int64ToAuxInt(0x00E0)
13717		v3.AddArg(y)
13718		v2.AddArg(v3)
13719		v.AddArg3(v0, v1, v2)
13720		return true
13721	}
13722}
13723func rewriteValuePPC64_OpRsh64Ux16(v *Value) bool {
13724	v_1 := v.Args[1]
13725	v_0 := v.Args[0]
13726	b := v.Block
13727	typ := &b.Func.Config.Types
13728	// match: (Rsh64Ux16 x y)
13729	// cond: shiftIsBounded(v)
13730	// result: (SRD x y)
13731	for {
13732		x := v_0
13733		y := v_1
13734		if !(shiftIsBounded(v)) {
13735			break
13736		}
13737		v.reset(OpPPC64SRD)
13738		v.AddArg2(x, y)
13739		return true
13740	}
13741	// match: (Rsh64Ux16 <t> x y)
13742	// result: (ISEL [2] (SRD <t> x y) (MOVDconst [0]) (CMPconst [0] (ANDconst [0xFFC0] y)))
13743	for {
13744		t := v.Type
13745		x := v_0
13746		y := v_1
13747		v.reset(OpPPC64ISEL)
13748		v.AuxInt = int32ToAuxInt(2)
13749		v0 := b.NewValue0(v.Pos, OpPPC64SRD, t)
13750		v0.AddArg2(x, y)
13751		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
13752		v1.AuxInt = int64ToAuxInt(0)
13753		v2 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
13754		v2.AuxInt = int64ToAuxInt(0)
13755		v3 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int)
13756		v3.AuxInt = int64ToAuxInt(0xFFC0)
13757		v3.AddArg(y)
13758		v2.AddArg(v3)
13759		v.AddArg3(v0, v1, v2)
13760		return true
13761	}
13762}
13763func rewriteValuePPC64_OpRsh64Ux32(v *Value) bool {
13764	v_1 := v.Args[1]
13765	v_0 := v.Args[0]
13766	b := v.Block
13767	typ := &b.Func.Config.Types
13768	// match: (Rsh64Ux32 x y)
13769	// cond: shiftIsBounded(v)
13770	// result: (SRD x y)
13771	for {
13772		x := v_0
13773		y := v_1
13774		if !(shiftIsBounded(v)) {
13775			break
13776		}
13777		v.reset(OpPPC64SRD)
13778		v.AddArg2(x, y)
13779		return true
13780	}
13781	// match: (Rsh64Ux32 <t> x y)
13782	// result: (ISEL [0] (SRD <t> x y) (MOVDconst [0]) (CMPWUconst y [64]))
13783	for {
13784		t := v.Type
13785		x := v_0
13786		y := v_1
13787		v.reset(OpPPC64ISEL)
13788		v.AuxInt = int32ToAuxInt(0)
13789		v0 := b.NewValue0(v.Pos, OpPPC64SRD, t)
13790		v0.AddArg2(x, y)
13791		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
13792		v1.AuxInt = int64ToAuxInt(0)
13793		v2 := b.NewValue0(v.Pos, OpPPC64CMPWUconst, types.TypeFlags)
13794		v2.AuxInt = int32ToAuxInt(64)
13795		v2.AddArg(y)
13796		v.AddArg3(v0, v1, v2)
13797		return true
13798	}
13799}
13800func rewriteValuePPC64_OpRsh64Ux64(v *Value) bool {
13801	v_1 := v.Args[1]
13802	v_0 := v.Args[0]
13803	b := v.Block
13804	typ := &b.Func.Config.Types
13805	// match: (Rsh64Ux64 x (MOVDconst [c]))
13806	// cond: uint64(c) < 64
13807	// result: (SRDconst x [c])
13808	for {
13809		x := v_0
13810		if v_1.Op != OpPPC64MOVDconst {
13811			break
13812		}
13813		c := auxIntToInt64(v_1.AuxInt)
13814		if !(uint64(c) < 64) {
13815			break
13816		}
13817		v.reset(OpPPC64SRDconst)
13818		v.AuxInt = int64ToAuxInt(c)
13819		v.AddArg(x)
13820		return true
13821	}
13822	// match: (Rsh64Ux64 x y)
13823	// cond: shiftIsBounded(v)
13824	// result: (SRD x y)
13825	for {
13826		x := v_0
13827		y := v_1
13828		if !(shiftIsBounded(v)) {
13829			break
13830		}
13831		v.reset(OpPPC64SRD)
13832		v.AddArg2(x, y)
13833		return true
13834	}
13835	// match: (Rsh64Ux64 <t> x y)
13836	// result: (ISEL [0] (SRD <t> x y) (MOVDconst [0]) (CMPUconst y [64]))
13837	for {
13838		t := v.Type
13839		x := v_0
13840		y := v_1
13841		v.reset(OpPPC64ISEL)
13842		v.AuxInt = int32ToAuxInt(0)
13843		v0 := b.NewValue0(v.Pos, OpPPC64SRD, t)
13844		v0.AddArg2(x, y)
13845		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
13846		v1.AuxInt = int64ToAuxInt(0)
13847		v2 := b.NewValue0(v.Pos, OpPPC64CMPUconst, types.TypeFlags)
13848		v2.AuxInt = int64ToAuxInt(64)
13849		v2.AddArg(y)
13850		v.AddArg3(v0, v1, v2)
13851		return true
13852	}
13853}
13854func rewriteValuePPC64_OpRsh64Ux8(v *Value) bool {
13855	v_1 := v.Args[1]
13856	v_0 := v.Args[0]
13857	b := v.Block
13858	typ := &b.Func.Config.Types
13859	// match: (Rsh64Ux8 x y)
13860	// cond: shiftIsBounded(v)
13861	// result: (SRD x y)
13862	for {
13863		x := v_0
13864		y := v_1
13865		if !(shiftIsBounded(v)) {
13866			break
13867		}
13868		v.reset(OpPPC64SRD)
13869		v.AddArg2(x, y)
13870		return true
13871	}
13872	// match: (Rsh64Ux8 <t> x y)
13873	// result: (ISEL [2] (SRD <t> x y) (MOVDconst [0]) (CMPconst [0] (ANDconst [0x00C0] y)))
13874	for {
13875		t := v.Type
13876		x := v_0
13877		y := v_1
13878		v.reset(OpPPC64ISEL)
13879		v.AuxInt = int32ToAuxInt(2)
13880		v0 := b.NewValue0(v.Pos, OpPPC64SRD, t)
13881		v0.AddArg2(x, y)
13882		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
13883		v1.AuxInt = int64ToAuxInt(0)
13884		v2 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
13885		v2.AuxInt = int64ToAuxInt(0)
13886		v3 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int)
13887		v3.AuxInt = int64ToAuxInt(0x00C0)
13888		v3.AddArg(y)
13889		v2.AddArg(v3)
13890		v.AddArg3(v0, v1, v2)
13891		return true
13892	}
13893}
13894func rewriteValuePPC64_OpRsh64x16(v *Value) bool {
13895	v_1 := v.Args[1]
13896	v_0 := v.Args[0]
13897	b := v.Block
13898	typ := &b.Func.Config.Types
13899	// match: (Rsh64x16 x y)
13900	// cond: shiftIsBounded(v)
13901	// result: (SRAD x y)
13902	for {
13903		x := v_0
13904		y := v_1
13905		if !(shiftIsBounded(v)) {
13906			break
13907		}
13908		v.reset(OpPPC64SRAD)
13909		v.AddArg2(x, y)
13910		return true
13911	}
13912	// match: (Rsh64x16 <t> x y)
13913	// result: (ISEL [2] (SRAD <t> x y) (SRADconst <t> x [63]) (CMPconst [0] (ANDconst [0xFFC0] y)))
13914	for {
13915		t := v.Type
13916		x := v_0
13917		y := v_1
13918		v.reset(OpPPC64ISEL)
13919		v.AuxInt = int32ToAuxInt(2)
13920		v0 := b.NewValue0(v.Pos, OpPPC64SRAD, t)
13921		v0.AddArg2(x, y)
13922		v1 := b.NewValue0(v.Pos, OpPPC64SRADconst, t)
13923		v1.AuxInt = int64ToAuxInt(63)
13924		v1.AddArg(x)
13925		v2 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
13926		v2.AuxInt = int64ToAuxInt(0)
13927		v3 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int)
13928		v3.AuxInt = int64ToAuxInt(0xFFC0)
13929		v3.AddArg(y)
13930		v2.AddArg(v3)
13931		v.AddArg3(v0, v1, v2)
13932		return true
13933	}
13934}
13935func rewriteValuePPC64_OpRsh64x32(v *Value) bool {
13936	v_1 := v.Args[1]
13937	v_0 := v.Args[0]
13938	b := v.Block
13939	// match: (Rsh64x32 x y)
13940	// cond: shiftIsBounded(v)
13941	// result: (SRAD x y)
13942	for {
13943		x := v_0
13944		y := v_1
13945		if !(shiftIsBounded(v)) {
13946			break
13947		}
13948		v.reset(OpPPC64SRAD)
13949		v.AddArg2(x, y)
13950		return true
13951	}
13952	// match: (Rsh64x32 <t> x y)
13953	// result: (ISEL [0] (SRAD <t> x y) (SRADconst <t> x [63]) (CMPWUconst y [64]))
13954	for {
13955		t := v.Type
13956		x := v_0
13957		y := v_1
13958		v.reset(OpPPC64ISEL)
13959		v.AuxInt = int32ToAuxInt(0)
13960		v0 := b.NewValue0(v.Pos, OpPPC64SRAD, t)
13961		v0.AddArg2(x, y)
13962		v1 := b.NewValue0(v.Pos, OpPPC64SRADconst, t)
13963		v1.AuxInt = int64ToAuxInt(63)
13964		v1.AddArg(x)
13965		v2 := b.NewValue0(v.Pos, OpPPC64CMPWUconst, types.TypeFlags)
13966		v2.AuxInt = int32ToAuxInt(64)
13967		v2.AddArg(y)
13968		v.AddArg3(v0, v1, v2)
13969		return true
13970	}
13971}
13972func rewriteValuePPC64_OpRsh64x64(v *Value) bool {
13973	v_1 := v.Args[1]
13974	v_0 := v.Args[0]
13975	b := v.Block
13976	// match: (Rsh64x64 x (MOVDconst [c]))
13977	// cond: uint64(c) >= 64
13978	// result: (SRADconst x [63])
13979	for {
13980		x := v_0
13981		if v_1.Op != OpPPC64MOVDconst {
13982			break
13983		}
13984		c := auxIntToInt64(v_1.AuxInt)
13985		if !(uint64(c) >= 64) {
13986			break
13987		}
13988		v.reset(OpPPC64SRADconst)
13989		v.AuxInt = int64ToAuxInt(63)
13990		v.AddArg(x)
13991		return true
13992	}
13993	// match: (Rsh64x64 x (MOVDconst [c]))
13994	// cond: uint64(c) < 64
13995	// result: (SRADconst x [c])
13996	for {
13997		x := v_0
13998		if v_1.Op != OpPPC64MOVDconst {
13999			break
14000		}
14001		c := auxIntToInt64(v_1.AuxInt)
14002		if !(uint64(c) < 64) {
14003			break
14004		}
14005		v.reset(OpPPC64SRADconst)
14006		v.AuxInt = int64ToAuxInt(c)
14007		v.AddArg(x)
14008		return true
14009	}
14010	// match: (Rsh64x64 x y)
14011	// cond: shiftIsBounded(v)
14012	// result: (SRAD x y)
14013	for {
14014		x := v_0
14015		y := v_1
14016		if !(shiftIsBounded(v)) {
14017			break
14018		}
14019		v.reset(OpPPC64SRAD)
14020		v.AddArg2(x, y)
14021		return true
14022	}
14023	// match: (Rsh64x64 <t> x y)
14024	// result: (ISEL [0] (SRAD <t> x y) (SRADconst <t> x [63]) (CMPUconst y [64]))
14025	for {
14026		t := v.Type
14027		x := v_0
14028		y := v_1
14029		v.reset(OpPPC64ISEL)
14030		v.AuxInt = int32ToAuxInt(0)
14031		v0 := b.NewValue0(v.Pos, OpPPC64SRAD, t)
14032		v0.AddArg2(x, y)
14033		v1 := b.NewValue0(v.Pos, OpPPC64SRADconst, t)
14034		v1.AuxInt = int64ToAuxInt(63)
14035		v1.AddArg(x)
14036		v2 := b.NewValue0(v.Pos, OpPPC64CMPUconst, types.TypeFlags)
14037		v2.AuxInt = int64ToAuxInt(64)
14038		v2.AddArg(y)
14039		v.AddArg3(v0, v1, v2)
14040		return true
14041	}
14042}
14043func rewriteValuePPC64_OpRsh64x8(v *Value) bool {
14044	v_1 := v.Args[1]
14045	v_0 := v.Args[0]
14046	b := v.Block
14047	typ := &b.Func.Config.Types
14048	// match: (Rsh64x8 x y)
14049	// cond: shiftIsBounded(v)
14050	// result: (SRAD x y)
14051	for {
14052		x := v_0
14053		y := v_1
14054		if !(shiftIsBounded(v)) {
14055			break
14056		}
14057		v.reset(OpPPC64SRAD)
14058		v.AddArg2(x, y)
14059		return true
14060	}
14061	// match: (Rsh64x8 <t> x y)
14062	// result: (ISEL [2] (SRAD <t> x y) (SRADconst <t> x [63]) (CMPconst [0] (ANDconst [0x00C0] y)))
14063	for {
14064		t := v.Type
14065		x := v_0
14066		y := v_1
14067		v.reset(OpPPC64ISEL)
14068		v.AuxInt = int32ToAuxInt(2)
14069		v0 := b.NewValue0(v.Pos, OpPPC64SRAD, t)
14070		v0.AddArg2(x, y)
14071		v1 := b.NewValue0(v.Pos, OpPPC64SRADconst, t)
14072		v1.AuxInt = int64ToAuxInt(63)
14073		v1.AddArg(x)
14074		v2 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
14075		v2.AuxInt = int64ToAuxInt(0)
14076		v3 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int)
14077		v3.AuxInt = int64ToAuxInt(0x00C0)
14078		v3.AddArg(y)
14079		v2.AddArg(v3)
14080		v.AddArg3(v0, v1, v2)
14081		return true
14082	}
14083}
14084func rewriteValuePPC64_OpRsh8Ux16(v *Value) bool {
14085	v_1 := v.Args[1]
14086	v_0 := v.Args[0]
14087	b := v.Block
14088	typ := &b.Func.Config.Types
14089	// match: (Rsh8Ux16 x y)
14090	// cond: shiftIsBounded(v)
14091	// result: (SRD (MOVBZreg x) y)
14092	for {
14093		x := v_0
14094		y := v_1
14095		if !(shiftIsBounded(v)) {
14096			break
14097		}
14098		v.reset(OpPPC64SRD)
14099		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
14100		v0.AddArg(x)
14101		v.AddArg2(v0, y)
14102		return true
14103	}
14104	// match: (Rsh8Ux16 <t> x y)
14105	// result: (ISEL [2] (SRD <t> (MOVBZreg x) y) (MOVDconst [0]) (CMPconst [0] (ANDconst [0xFFF8] y)))
14106	for {
14107		t := v.Type
14108		x := v_0
14109		y := v_1
14110		v.reset(OpPPC64ISEL)
14111		v.AuxInt = int32ToAuxInt(2)
14112		v0 := b.NewValue0(v.Pos, OpPPC64SRD, t)
14113		v1 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
14114		v1.AddArg(x)
14115		v0.AddArg2(v1, y)
14116		v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
14117		v2.AuxInt = int64ToAuxInt(0)
14118		v3 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
14119		v3.AuxInt = int64ToAuxInt(0)
14120		v4 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int)
14121		v4.AuxInt = int64ToAuxInt(0xFFF8)
14122		v4.AddArg(y)
14123		v3.AddArg(v4)
14124		v.AddArg3(v0, v2, v3)
14125		return true
14126	}
14127}
14128func rewriteValuePPC64_OpRsh8Ux32(v *Value) bool {
14129	v_1 := v.Args[1]
14130	v_0 := v.Args[0]
14131	b := v.Block
14132	typ := &b.Func.Config.Types
14133	// match: (Rsh8Ux32 x y)
14134	// cond: shiftIsBounded(v)
14135	// result: (SRD (MOVBZreg x) y)
14136	for {
14137		x := v_0
14138		y := v_1
14139		if !(shiftIsBounded(v)) {
14140			break
14141		}
14142		v.reset(OpPPC64SRD)
14143		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
14144		v0.AddArg(x)
14145		v.AddArg2(v0, y)
14146		return true
14147	}
14148	// match: (Rsh8Ux32 <t> x y)
14149	// result: (ISEL [0] (SRD <t> (MOVBZreg x) y) (MOVDconst [0]) (CMPWUconst y [8]))
14150	for {
14151		t := v.Type
14152		x := v_0
14153		y := v_1
14154		v.reset(OpPPC64ISEL)
14155		v.AuxInt = int32ToAuxInt(0)
14156		v0 := b.NewValue0(v.Pos, OpPPC64SRD, t)
14157		v1 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
14158		v1.AddArg(x)
14159		v0.AddArg2(v1, y)
14160		v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
14161		v2.AuxInt = int64ToAuxInt(0)
14162		v3 := b.NewValue0(v.Pos, OpPPC64CMPWUconst, types.TypeFlags)
14163		v3.AuxInt = int32ToAuxInt(8)
14164		v3.AddArg(y)
14165		v.AddArg3(v0, v2, v3)
14166		return true
14167	}
14168}
14169func rewriteValuePPC64_OpRsh8Ux64(v *Value) bool {
14170	v_1 := v.Args[1]
14171	v_0 := v.Args[0]
14172	b := v.Block
14173	typ := &b.Func.Config.Types
14174	// match: (Rsh8Ux64 x (MOVDconst [c]))
14175	// cond: uint64(c) < 8
14176	// result: (SRWconst (ZeroExt8to32 x) [c])
14177	for {
14178		x := v_0
14179		if v_1.Op != OpPPC64MOVDconst {
14180			break
14181		}
14182		c := auxIntToInt64(v_1.AuxInt)
14183		if !(uint64(c) < 8) {
14184			break
14185		}
14186		v.reset(OpPPC64SRWconst)
14187		v.AuxInt = int64ToAuxInt(c)
14188		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
14189		v0.AddArg(x)
14190		v.AddArg(v0)
14191		return true
14192	}
14193	// match: (Rsh8Ux64 x y)
14194	// cond: shiftIsBounded(v)
14195	// result: (SRD (MOVBZreg x) y)
14196	for {
14197		x := v_0
14198		y := v_1
14199		if !(shiftIsBounded(v)) {
14200			break
14201		}
14202		v.reset(OpPPC64SRD)
14203		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
14204		v0.AddArg(x)
14205		v.AddArg2(v0, y)
14206		return true
14207	}
14208	// match: (Rsh8Ux64 <t> x y)
14209	// result: (ISEL [0] (SRD <t> (MOVBZreg x) y) (MOVDconst [0]) (CMPUconst y [8]))
14210	for {
14211		t := v.Type
14212		x := v_0
14213		y := v_1
14214		v.reset(OpPPC64ISEL)
14215		v.AuxInt = int32ToAuxInt(0)
14216		v0 := b.NewValue0(v.Pos, OpPPC64SRD, t)
14217		v1 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
14218		v1.AddArg(x)
14219		v0.AddArg2(v1, y)
14220		v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
14221		v2.AuxInt = int64ToAuxInt(0)
14222		v3 := b.NewValue0(v.Pos, OpPPC64CMPUconst, types.TypeFlags)
14223		v3.AuxInt = int64ToAuxInt(8)
14224		v3.AddArg(y)
14225		v.AddArg3(v0, v2, v3)
14226		return true
14227	}
14228}
14229func rewriteValuePPC64_OpRsh8Ux8(v *Value) bool {
14230	v_1 := v.Args[1]
14231	v_0 := v.Args[0]
14232	b := v.Block
14233	typ := &b.Func.Config.Types
14234	// match: (Rsh8Ux8 x y)
14235	// cond: shiftIsBounded(v)
14236	// result: (SRD (MOVBZreg x) y)
14237	for {
14238		x := v_0
14239		y := v_1
14240		if !(shiftIsBounded(v)) {
14241			break
14242		}
14243		v.reset(OpPPC64SRD)
14244		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
14245		v0.AddArg(x)
14246		v.AddArg2(v0, y)
14247		return true
14248	}
14249	// match: (Rsh8Ux8 <t> x y)
14250	// result: (ISEL [2] (SRD <t> (MOVBZreg x) y) (MOVDconst [0]) (CMPconst [0] (ANDconst [0x00F8] y)))
14251	for {
14252		t := v.Type
14253		x := v_0
14254		y := v_1
14255		v.reset(OpPPC64ISEL)
14256		v.AuxInt = int32ToAuxInt(2)
14257		v0 := b.NewValue0(v.Pos, OpPPC64SRD, t)
14258		v1 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
14259		v1.AddArg(x)
14260		v0.AddArg2(v1, y)
14261		v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
14262		v2.AuxInt = int64ToAuxInt(0)
14263		v3 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
14264		v3.AuxInt = int64ToAuxInt(0)
14265		v4 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int)
14266		v4.AuxInt = int64ToAuxInt(0x00F8)
14267		v4.AddArg(y)
14268		v3.AddArg(v4)
14269		v.AddArg3(v0, v2, v3)
14270		return true
14271	}
14272}
14273func rewriteValuePPC64_OpRsh8x16(v *Value) bool {
14274	v_1 := v.Args[1]
14275	v_0 := v.Args[0]
14276	b := v.Block
14277	typ := &b.Func.Config.Types
14278	// match: (Rsh8x16 x y)
14279	// cond: shiftIsBounded(v)
14280	// result: (SRAD (MOVBreg x) y)
14281	for {
14282		x := v_0
14283		y := v_1
14284		if !(shiftIsBounded(v)) {
14285			break
14286		}
14287		v.reset(OpPPC64SRAD)
14288		v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
14289		v0.AddArg(x)
14290		v.AddArg2(v0, y)
14291		return true
14292	}
14293	// match: (Rsh8x16 <t> x y)
14294	// result: (ISEL [2] (SRAD <t> (MOVBreg x) y) (SRADconst <t> (MOVBreg x) [7]) (CMPconst [0] (ANDconst [0xFFF8] y)))
14295	for {
14296		t := v.Type
14297		x := v_0
14298		y := v_1
14299		v.reset(OpPPC64ISEL)
14300		v.AuxInt = int32ToAuxInt(2)
14301		v0 := b.NewValue0(v.Pos, OpPPC64SRAD, t)
14302		v1 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
14303		v1.AddArg(x)
14304		v0.AddArg2(v1, y)
14305		v2 := b.NewValue0(v.Pos, OpPPC64SRADconst, t)
14306		v2.AuxInt = int64ToAuxInt(7)
14307		v2.AddArg(v1)
14308		v3 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
14309		v3.AuxInt = int64ToAuxInt(0)
14310		v4 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int)
14311		v4.AuxInt = int64ToAuxInt(0xFFF8)
14312		v4.AddArg(y)
14313		v3.AddArg(v4)
14314		v.AddArg3(v0, v2, v3)
14315		return true
14316	}
14317}
14318func rewriteValuePPC64_OpRsh8x32(v *Value) bool {
14319	v_1 := v.Args[1]
14320	v_0 := v.Args[0]
14321	b := v.Block
14322	typ := &b.Func.Config.Types
14323	// match: (Rsh8x32 x y)
14324	// cond: shiftIsBounded(v)
14325	// result: (SRAD (MOVBreg x) y)
14326	for {
14327		x := v_0
14328		y := v_1
14329		if !(shiftIsBounded(v)) {
14330			break
14331		}
14332		v.reset(OpPPC64SRAD)
14333		v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
14334		v0.AddArg(x)
14335		v.AddArg2(v0, y)
14336		return true
14337	}
14338	// match: (Rsh8x32 <t> x y)
14339	// result: (ISEL [0] (SRAD <t> (MOVBreg x) y) (SRADconst <t> (MOVBreg x) [7]) (CMPWUconst y [8]))
14340	for {
14341		t := v.Type
14342		x := v_0
14343		y := v_1
14344		v.reset(OpPPC64ISEL)
14345		v.AuxInt = int32ToAuxInt(0)
14346		v0 := b.NewValue0(v.Pos, OpPPC64SRAD, t)
14347		v1 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
14348		v1.AddArg(x)
14349		v0.AddArg2(v1, y)
14350		v2 := b.NewValue0(v.Pos, OpPPC64SRADconst, t)
14351		v2.AuxInt = int64ToAuxInt(7)
14352		v2.AddArg(v1)
14353		v3 := b.NewValue0(v.Pos, OpPPC64CMPWUconst, types.TypeFlags)
14354		v3.AuxInt = int32ToAuxInt(8)
14355		v3.AddArg(y)
14356		v.AddArg3(v0, v2, v3)
14357		return true
14358	}
14359}
14360func rewriteValuePPC64_OpRsh8x64(v *Value) bool {
14361	v_1 := v.Args[1]
14362	v_0 := v.Args[0]
14363	b := v.Block
14364	typ := &b.Func.Config.Types
14365	// match: (Rsh8x64 x (MOVDconst [c]))
14366	// cond: uint64(c) >= 8
14367	// result: (SRAWconst (SignExt8to32 x) [63])
14368	for {
14369		x := v_0
14370		if v_1.Op != OpPPC64MOVDconst {
14371			break
14372		}
14373		c := auxIntToInt64(v_1.AuxInt)
14374		if !(uint64(c) >= 8) {
14375			break
14376		}
14377		v.reset(OpPPC64SRAWconst)
14378		v.AuxInt = int64ToAuxInt(63)
14379		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
14380		v0.AddArg(x)
14381		v.AddArg(v0)
14382		return true
14383	}
14384	// match: (Rsh8x64 x (MOVDconst [c]))
14385	// cond: uint64(c) < 8
14386	// result: (SRAWconst (SignExt8to32 x) [c])
14387	for {
14388		x := v_0
14389		if v_1.Op != OpPPC64MOVDconst {
14390			break
14391		}
14392		c := auxIntToInt64(v_1.AuxInt)
14393		if !(uint64(c) < 8) {
14394			break
14395		}
14396		v.reset(OpPPC64SRAWconst)
14397		v.AuxInt = int64ToAuxInt(c)
14398		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
14399		v0.AddArg(x)
14400		v.AddArg(v0)
14401		return true
14402	}
14403	// match: (Rsh8x64 x y)
14404	// cond: shiftIsBounded(v)
14405	// result: (SRAD (MOVBreg x) y)
14406	for {
14407		x := v_0
14408		y := v_1
14409		if !(shiftIsBounded(v)) {
14410			break
14411		}
14412		v.reset(OpPPC64SRAD)
14413		v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
14414		v0.AddArg(x)
14415		v.AddArg2(v0, y)
14416		return true
14417	}
14418	// match: (Rsh8x64 <t> x y)
14419	// result: (ISEL [0] (SRAD <t> (MOVBreg x) y) (SRADconst <t> (MOVBreg x) [7]) (CMPUconst y [8]))
14420	for {
14421		t := v.Type
14422		x := v_0
14423		y := v_1
14424		v.reset(OpPPC64ISEL)
14425		v.AuxInt = int32ToAuxInt(0)
14426		v0 := b.NewValue0(v.Pos, OpPPC64SRAD, t)
14427		v1 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
14428		v1.AddArg(x)
14429		v0.AddArg2(v1, y)
14430		v2 := b.NewValue0(v.Pos, OpPPC64SRADconst, t)
14431		v2.AuxInt = int64ToAuxInt(7)
14432		v2.AddArg(v1)
14433		v3 := b.NewValue0(v.Pos, OpPPC64CMPUconst, types.TypeFlags)
14434		v3.AuxInt = int64ToAuxInt(8)
14435		v3.AddArg(y)
14436		v.AddArg3(v0, v2, v3)
14437		return true
14438	}
14439}
14440func rewriteValuePPC64_OpRsh8x8(v *Value) bool {
14441	v_1 := v.Args[1]
14442	v_0 := v.Args[0]
14443	b := v.Block
14444	typ := &b.Func.Config.Types
14445	// match: (Rsh8x8 x y)
14446	// cond: shiftIsBounded(v)
14447	// result: (SRAD (MOVBreg x) y)
14448	for {
14449		x := v_0
14450		y := v_1
14451		if !(shiftIsBounded(v)) {
14452			break
14453		}
14454		v.reset(OpPPC64SRAD)
14455		v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
14456		v0.AddArg(x)
14457		v.AddArg2(v0, y)
14458		return true
14459	}
14460	// match: (Rsh8x8 <t> x y)
14461	// result: (ISEL [2] (SRAD <t> (MOVBreg x) y) (SRADconst <t> (MOVBreg x) [7]) (CMPconst [0] (ANDconst [0x00F8] y)))
14462	for {
14463		t := v.Type
14464		x := v_0
14465		y := v_1
14466		v.reset(OpPPC64ISEL)
14467		v.AuxInt = int32ToAuxInt(2)
14468		v0 := b.NewValue0(v.Pos, OpPPC64SRAD, t)
14469		v1 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
14470		v1.AddArg(x)
14471		v0.AddArg2(v1, y)
14472		v2 := b.NewValue0(v.Pos, OpPPC64SRADconst, t)
14473		v2.AuxInt = int64ToAuxInt(7)
14474		v2.AddArg(v1)
14475		v3 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
14476		v3.AuxInt = int64ToAuxInt(0)
14477		v4 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int)
14478		v4.AuxInt = int64ToAuxInt(0x00F8)
14479		v4.AddArg(y)
14480		v3.AddArg(v4)
14481		v.AddArg3(v0, v2, v3)
14482		return true
14483	}
14484}
14485func rewriteValuePPC64_OpSelect0(v *Value) bool {
14486	v_0 := v.Args[0]
14487	b := v.Block
14488	typ := &b.Func.Config.Types
14489	// match: (Select0 (Mul64uhilo x y))
14490	// result: (MULHDU x y)
14491	for {
14492		if v_0.Op != OpMul64uhilo {
14493			break
14494		}
14495		y := v_0.Args[1]
14496		x := v_0.Args[0]
14497		v.reset(OpPPC64MULHDU)
14498		v.AddArg2(x, y)
14499		return true
14500	}
14501	// match: (Select0 (Add64carry x y c))
14502	// result: (Select0 <typ.UInt64> (ADDE x y (Select1 <typ.UInt64> (ADDCconst c [-1]))))
14503	for {
14504		if v_0.Op != OpAdd64carry {
14505			break
14506		}
14507		c := v_0.Args[2]
14508		x := v_0.Args[0]
14509		y := v_0.Args[1]
14510		v.reset(OpSelect0)
14511		v.Type = typ.UInt64
14512		v0 := b.NewValue0(v.Pos, OpPPC64ADDE, types.NewTuple(typ.UInt64, typ.UInt64))
14513		v1 := b.NewValue0(v.Pos, OpSelect1, typ.UInt64)
14514		v2 := b.NewValue0(v.Pos, OpPPC64ADDCconst, types.NewTuple(typ.UInt64, typ.UInt64))
14515		v2.AuxInt = int64ToAuxInt(-1)
14516		v2.AddArg(c)
14517		v1.AddArg(v2)
14518		v0.AddArg3(x, y, v1)
14519		v.AddArg(v0)
14520		return true
14521	}
14522	// match: (Select0 (Sub64borrow x y c))
14523	// result: (Select0 <typ.UInt64> (SUBE x y (Select1 <typ.UInt64> (SUBCconst c [0]))))
14524	for {
14525		if v_0.Op != OpSub64borrow {
14526			break
14527		}
14528		c := v_0.Args[2]
14529		x := v_0.Args[0]
14530		y := v_0.Args[1]
14531		v.reset(OpSelect0)
14532		v.Type = typ.UInt64
14533		v0 := b.NewValue0(v.Pos, OpPPC64SUBE, types.NewTuple(typ.UInt64, typ.UInt64))
14534		v1 := b.NewValue0(v.Pos, OpSelect1, typ.UInt64)
14535		v2 := b.NewValue0(v.Pos, OpPPC64SUBCconst, types.NewTuple(typ.UInt64, typ.UInt64))
14536		v2.AuxInt = int64ToAuxInt(0)
14537		v2.AddArg(c)
14538		v1.AddArg(v2)
14539		v0.AddArg3(x, y, v1)
14540		v.AddArg(v0)
14541		return true
14542	}
14543	return false
14544}
14545func rewriteValuePPC64_OpSelect1(v *Value) bool {
14546	v_0 := v.Args[0]
14547	b := v.Block
14548	typ := &b.Func.Config.Types
14549	// match: (Select1 (Mul64uhilo x y))
14550	// result: (MULLD x y)
14551	for {
14552		if v_0.Op != OpMul64uhilo {
14553			break
14554		}
14555		y := v_0.Args[1]
14556		x := v_0.Args[0]
14557		v.reset(OpPPC64MULLD)
14558		v.AddArg2(x, y)
14559		return true
14560	}
14561	// match: (Select1 (Add64carry x y c))
14562	// result: (ADDZEzero (Select1 <typ.UInt64> (ADDE x y (Select1 <typ.UInt64> (ADDCconst c [-1])))))
14563	for {
14564		if v_0.Op != OpAdd64carry {
14565			break
14566		}
14567		c := v_0.Args[2]
14568		x := v_0.Args[0]
14569		y := v_0.Args[1]
14570		v.reset(OpPPC64ADDZEzero)
14571		v0 := b.NewValue0(v.Pos, OpSelect1, typ.UInt64)
14572		v1 := b.NewValue0(v.Pos, OpPPC64ADDE, types.NewTuple(typ.UInt64, typ.UInt64))
14573		v2 := b.NewValue0(v.Pos, OpSelect1, typ.UInt64)
14574		v3 := b.NewValue0(v.Pos, OpPPC64ADDCconst, types.NewTuple(typ.UInt64, typ.UInt64))
14575		v3.AuxInt = int64ToAuxInt(-1)
14576		v3.AddArg(c)
14577		v2.AddArg(v3)
14578		v1.AddArg3(x, y, v2)
14579		v0.AddArg(v1)
14580		v.AddArg(v0)
14581		return true
14582	}
14583	// match: (Select1 (ADDCconst n:(ADDZEzero x) [-1]))
14584	// cond: n.Uses <= 2
14585	// result: x
14586	for {
14587		if v_0.Op != OpPPC64ADDCconst || auxIntToInt64(v_0.AuxInt) != -1 {
14588			break
14589		}
14590		n := v_0.Args[0]
14591		if n.Op != OpPPC64ADDZEzero {
14592			break
14593		}
14594		x := n.Args[0]
14595		if !(n.Uses <= 2) {
14596			break
14597		}
14598		v.copyOf(x)
14599		return true
14600	}
14601	// match: (Select1 (Sub64borrow x y c))
14602	// result: (NEG (SUBZEzero (Select1 <typ.UInt64> (SUBE x y (Select1 <typ.UInt64> (SUBCconst c [0]))))))
14603	for {
14604		if v_0.Op != OpSub64borrow {
14605			break
14606		}
14607		c := v_0.Args[2]
14608		x := v_0.Args[0]
14609		y := v_0.Args[1]
14610		v.reset(OpPPC64NEG)
14611		v0 := b.NewValue0(v.Pos, OpPPC64SUBZEzero, typ.UInt64)
14612		v1 := b.NewValue0(v.Pos, OpSelect1, typ.UInt64)
14613		v2 := b.NewValue0(v.Pos, OpPPC64SUBE, types.NewTuple(typ.UInt64, typ.UInt64))
14614		v3 := b.NewValue0(v.Pos, OpSelect1, typ.UInt64)
14615		v4 := b.NewValue0(v.Pos, OpPPC64SUBCconst, types.NewTuple(typ.UInt64, typ.UInt64))
14616		v4.AuxInt = int64ToAuxInt(0)
14617		v4.AddArg(c)
14618		v3.AddArg(v4)
14619		v2.AddArg3(x, y, v3)
14620		v1.AddArg(v2)
14621		v0.AddArg(v1)
14622		v.AddArg(v0)
14623		return true
14624	}
14625	// match: (Select1 (SUBCconst n:(NEG (SUBZEzero x)) [0]))
14626	// cond: n.Uses <= 2
14627	// result: x
14628	for {
14629		if v_0.Op != OpPPC64SUBCconst || auxIntToInt64(v_0.AuxInt) != 0 {
14630			break
14631		}
14632		n := v_0.Args[0]
14633		if n.Op != OpPPC64NEG {
14634			break
14635		}
14636		n_0 := n.Args[0]
14637		if n_0.Op != OpPPC64SUBZEzero {
14638			break
14639		}
14640		x := n_0.Args[0]
14641		if !(n.Uses <= 2) {
14642			break
14643		}
14644		v.copyOf(x)
14645		return true
14646	}
14647	return false
14648}
14649func rewriteValuePPC64_OpSelectN(v *Value) bool {
14650	v_0 := v.Args[0]
14651	b := v.Block
14652	config := b.Func.Config
14653	// match: (SelectN [0] call:(CALLstatic {sym} s1:(MOVDstore _ (MOVDconst [sz]) s2:(MOVDstore _ src s3:(MOVDstore {t} _ dst mem)))))
14654	// cond: sz >= 0 && isSameCall(sym, "runtime.memmove") && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && isInlinableMemmove(dst, src, sz, config) && clobber(s1, s2, s3, call)
14655	// result: (Move [sz] dst src mem)
14656	for {
14657		if auxIntToInt64(v.AuxInt) != 0 {
14658			break
14659		}
14660		call := v_0
14661		if call.Op != OpPPC64CALLstatic || len(call.Args) != 1 {
14662			break
14663		}
14664		sym := auxToCall(call.Aux)
14665		s1 := call.Args[0]
14666		if s1.Op != OpPPC64MOVDstore {
14667			break
14668		}
14669		_ = s1.Args[2]
14670		s1_1 := s1.Args[1]
14671		if s1_1.Op != OpPPC64MOVDconst {
14672			break
14673		}
14674		sz := auxIntToInt64(s1_1.AuxInt)
14675		s2 := s1.Args[2]
14676		if s2.Op != OpPPC64MOVDstore {
14677			break
14678		}
14679		_ = s2.Args[2]
14680		src := s2.Args[1]
14681		s3 := s2.Args[2]
14682		if s3.Op != OpPPC64MOVDstore {
14683			break
14684		}
14685		mem := s3.Args[2]
14686		dst := s3.Args[1]
14687		if !(sz >= 0 && isSameCall(sym, "runtime.memmove") && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && isInlinableMemmove(dst, src, sz, config) && clobber(s1, s2, s3, call)) {
14688			break
14689		}
14690		v.reset(OpMove)
14691		v.AuxInt = int64ToAuxInt(sz)
14692		v.AddArg3(dst, src, mem)
14693		return true
14694	}
14695	// match: (SelectN [0] call:(CALLstatic {sym} dst src (MOVDconst [sz]) mem))
14696	// cond: sz >= 0 && isSameCall(sym, "runtime.memmove") && call.Uses == 1 && isInlinableMemmove(dst, src, sz, config) && clobber(call)
14697	// result: (Move [sz] dst src mem)
14698	for {
14699		if auxIntToInt64(v.AuxInt) != 0 {
14700			break
14701		}
14702		call := v_0
14703		if call.Op != OpPPC64CALLstatic || len(call.Args) != 4 {
14704			break
14705		}
14706		sym := auxToCall(call.Aux)
14707		mem := call.Args[3]
14708		dst := call.Args[0]
14709		src := call.Args[1]
14710		call_2 := call.Args[2]
14711		if call_2.Op != OpPPC64MOVDconst {
14712			break
14713		}
14714		sz := auxIntToInt64(call_2.AuxInt)
14715		if !(sz >= 0 && isSameCall(sym, "runtime.memmove") && call.Uses == 1 && isInlinableMemmove(dst, src, sz, config) && clobber(call)) {
14716			break
14717		}
14718		v.reset(OpMove)
14719		v.AuxInt = int64ToAuxInt(sz)
14720		v.AddArg3(dst, src, mem)
14721		return true
14722	}
14723	return false
14724}
14725func rewriteValuePPC64_OpSlicemask(v *Value) bool {
14726	v_0 := v.Args[0]
14727	b := v.Block
14728	// match: (Slicemask <t> x)
14729	// result: (SRADconst (NEG <t> x) [63])
14730	for {
14731		t := v.Type
14732		x := v_0
14733		v.reset(OpPPC64SRADconst)
14734		v.AuxInt = int64ToAuxInt(63)
14735		v0 := b.NewValue0(v.Pos, OpPPC64NEG, t)
14736		v0.AddArg(x)
14737		v.AddArg(v0)
14738		return true
14739	}
14740}
14741func rewriteValuePPC64_OpStore(v *Value) bool {
14742	v_2 := v.Args[2]
14743	v_1 := v.Args[1]
14744	v_0 := v.Args[0]
14745	// match: (Store {t} ptr val mem)
14746	// cond: t.Size() == 8 && t.IsFloat()
14747	// result: (FMOVDstore ptr val mem)
14748	for {
14749		t := auxToType(v.Aux)
14750		ptr := v_0
14751		val := v_1
14752		mem := v_2
14753		if !(t.Size() == 8 && t.IsFloat()) {
14754			break
14755		}
14756		v.reset(OpPPC64FMOVDstore)
14757		v.AddArg3(ptr, val, mem)
14758		return true
14759	}
14760	// match: (Store {t} ptr val mem)
14761	// cond: t.Size() == 4 && t.IsFloat()
14762	// result: (FMOVSstore ptr val mem)
14763	for {
14764		t := auxToType(v.Aux)
14765		ptr := v_0
14766		val := v_1
14767		mem := v_2
14768		if !(t.Size() == 4 && t.IsFloat()) {
14769			break
14770		}
14771		v.reset(OpPPC64FMOVSstore)
14772		v.AddArg3(ptr, val, mem)
14773		return true
14774	}
14775	// match: (Store {t} ptr val mem)
14776	// cond: t.Size() == 8 && !t.IsFloat()
14777	// result: (MOVDstore ptr val mem)
14778	for {
14779		t := auxToType(v.Aux)
14780		ptr := v_0
14781		val := v_1
14782		mem := v_2
14783		if !(t.Size() == 8 && !t.IsFloat()) {
14784			break
14785		}
14786		v.reset(OpPPC64MOVDstore)
14787		v.AddArg3(ptr, val, mem)
14788		return true
14789	}
14790	// match: (Store {t} ptr val mem)
14791	// cond: t.Size() == 4 && !t.IsFloat()
14792	// result: (MOVWstore ptr val mem)
14793	for {
14794		t := auxToType(v.Aux)
14795		ptr := v_0
14796		val := v_1
14797		mem := v_2
14798		if !(t.Size() == 4 && !t.IsFloat()) {
14799			break
14800		}
14801		v.reset(OpPPC64MOVWstore)
14802		v.AddArg3(ptr, val, mem)
14803		return true
14804	}
14805	// match: (Store {t} ptr val mem)
14806	// cond: t.Size() == 2
14807	// result: (MOVHstore ptr val mem)
14808	for {
14809		t := auxToType(v.Aux)
14810		ptr := v_0
14811		val := v_1
14812		mem := v_2
14813		if !(t.Size() == 2) {
14814			break
14815		}
14816		v.reset(OpPPC64MOVHstore)
14817		v.AddArg3(ptr, val, mem)
14818		return true
14819	}
14820	// match: (Store {t} ptr val mem)
14821	// cond: t.Size() == 1
14822	// result: (MOVBstore ptr val mem)
14823	for {
14824		t := auxToType(v.Aux)
14825		ptr := v_0
14826		val := v_1
14827		mem := v_2
14828		if !(t.Size() == 1) {
14829			break
14830		}
14831		v.reset(OpPPC64MOVBstore)
14832		v.AddArg3(ptr, val, mem)
14833		return true
14834	}
14835	return false
14836}
14837func rewriteValuePPC64_OpTrunc16to8(v *Value) bool {
14838	v_0 := v.Args[0]
14839	// match: (Trunc16to8 <t> x)
14840	// cond: t.IsSigned()
14841	// result: (MOVBreg x)
14842	for {
14843		t := v.Type
14844		x := v_0
14845		if !(t.IsSigned()) {
14846			break
14847		}
14848		v.reset(OpPPC64MOVBreg)
14849		v.AddArg(x)
14850		return true
14851	}
14852	// match: (Trunc16to8 x)
14853	// result: (MOVBZreg x)
14854	for {
14855		x := v_0
14856		v.reset(OpPPC64MOVBZreg)
14857		v.AddArg(x)
14858		return true
14859	}
14860}
14861func rewriteValuePPC64_OpTrunc32to16(v *Value) bool {
14862	v_0 := v.Args[0]
14863	// match: (Trunc32to16 <t> x)
14864	// cond: t.IsSigned()
14865	// result: (MOVHreg x)
14866	for {
14867		t := v.Type
14868		x := v_0
14869		if !(t.IsSigned()) {
14870			break
14871		}
14872		v.reset(OpPPC64MOVHreg)
14873		v.AddArg(x)
14874		return true
14875	}
14876	// match: (Trunc32to16 x)
14877	// result: (MOVHZreg x)
14878	for {
14879		x := v_0
14880		v.reset(OpPPC64MOVHZreg)
14881		v.AddArg(x)
14882		return true
14883	}
14884}
14885func rewriteValuePPC64_OpTrunc32to8(v *Value) bool {
14886	v_0 := v.Args[0]
14887	// match: (Trunc32to8 <t> x)
14888	// cond: t.IsSigned()
14889	// result: (MOVBreg x)
14890	for {
14891		t := v.Type
14892		x := v_0
14893		if !(t.IsSigned()) {
14894			break
14895		}
14896		v.reset(OpPPC64MOVBreg)
14897		v.AddArg(x)
14898		return true
14899	}
14900	// match: (Trunc32to8 x)
14901	// result: (MOVBZreg x)
14902	for {
14903		x := v_0
14904		v.reset(OpPPC64MOVBZreg)
14905		v.AddArg(x)
14906		return true
14907	}
14908}
14909func rewriteValuePPC64_OpTrunc64to16(v *Value) bool {
14910	v_0 := v.Args[0]
14911	// match: (Trunc64to16 <t> x)
14912	// cond: t.IsSigned()
14913	// result: (MOVHreg x)
14914	for {
14915		t := v.Type
14916		x := v_0
14917		if !(t.IsSigned()) {
14918			break
14919		}
14920		v.reset(OpPPC64MOVHreg)
14921		v.AddArg(x)
14922		return true
14923	}
14924	// match: (Trunc64to16 x)
14925	// result: (MOVHZreg x)
14926	for {
14927		x := v_0
14928		v.reset(OpPPC64MOVHZreg)
14929		v.AddArg(x)
14930		return true
14931	}
14932}
14933func rewriteValuePPC64_OpTrunc64to32(v *Value) bool {
14934	v_0 := v.Args[0]
14935	// match: (Trunc64to32 <t> x)
14936	// cond: t.IsSigned()
14937	// result: (MOVWreg x)
14938	for {
14939		t := v.Type
14940		x := v_0
14941		if !(t.IsSigned()) {
14942			break
14943		}
14944		v.reset(OpPPC64MOVWreg)
14945		v.AddArg(x)
14946		return true
14947	}
14948	// match: (Trunc64to32 x)
14949	// result: (MOVWZreg x)
14950	for {
14951		x := v_0
14952		v.reset(OpPPC64MOVWZreg)
14953		v.AddArg(x)
14954		return true
14955	}
14956}
14957func rewriteValuePPC64_OpTrunc64to8(v *Value) bool {
14958	v_0 := v.Args[0]
14959	// match: (Trunc64to8 <t> x)
14960	// cond: t.IsSigned()
14961	// result: (MOVBreg x)
14962	for {
14963		t := v.Type
14964		x := v_0
14965		if !(t.IsSigned()) {
14966			break
14967		}
14968		v.reset(OpPPC64MOVBreg)
14969		v.AddArg(x)
14970		return true
14971	}
14972	// match: (Trunc64to8 x)
14973	// result: (MOVBZreg x)
14974	for {
14975		x := v_0
14976		v.reset(OpPPC64MOVBZreg)
14977		v.AddArg(x)
14978		return true
14979	}
14980}
14981func rewriteValuePPC64_OpZero(v *Value) bool {
14982	v_1 := v.Args[1]
14983	v_0 := v.Args[0]
14984	b := v.Block
14985	// match: (Zero [0] _ mem)
14986	// result: mem
14987	for {
14988		if auxIntToInt64(v.AuxInt) != 0 {
14989			break
14990		}
14991		mem := v_1
14992		v.copyOf(mem)
14993		return true
14994	}
14995	// match: (Zero [1] destptr mem)
14996	// result: (MOVBstorezero destptr mem)
14997	for {
14998		if auxIntToInt64(v.AuxInt) != 1 {
14999			break
15000		}
15001		destptr := v_0
15002		mem := v_1
15003		v.reset(OpPPC64MOVBstorezero)
15004		v.AddArg2(destptr, mem)
15005		return true
15006	}
15007	// match: (Zero [2] destptr mem)
15008	// result: (MOVHstorezero destptr mem)
15009	for {
15010		if auxIntToInt64(v.AuxInt) != 2 {
15011			break
15012		}
15013		destptr := v_0
15014		mem := v_1
15015		v.reset(OpPPC64MOVHstorezero)
15016		v.AddArg2(destptr, mem)
15017		return true
15018	}
15019	// match: (Zero [3] destptr mem)
15020	// result: (MOVBstorezero [2] destptr (MOVHstorezero destptr mem))
15021	for {
15022		if auxIntToInt64(v.AuxInt) != 3 {
15023			break
15024		}
15025		destptr := v_0
15026		mem := v_1
15027		v.reset(OpPPC64MOVBstorezero)
15028		v.AuxInt = int32ToAuxInt(2)
15029		v0 := b.NewValue0(v.Pos, OpPPC64MOVHstorezero, types.TypeMem)
15030		v0.AddArg2(destptr, mem)
15031		v.AddArg2(destptr, v0)
15032		return true
15033	}
15034	// match: (Zero [4] destptr mem)
15035	// result: (MOVWstorezero destptr mem)
15036	for {
15037		if auxIntToInt64(v.AuxInt) != 4 {
15038			break
15039		}
15040		destptr := v_0
15041		mem := v_1
15042		v.reset(OpPPC64MOVWstorezero)
15043		v.AddArg2(destptr, mem)
15044		return true
15045	}
15046	// match: (Zero [5] destptr mem)
15047	// result: (MOVBstorezero [4] destptr (MOVWstorezero destptr mem))
15048	for {
15049		if auxIntToInt64(v.AuxInt) != 5 {
15050			break
15051		}
15052		destptr := v_0
15053		mem := v_1
15054		v.reset(OpPPC64MOVBstorezero)
15055		v.AuxInt = int32ToAuxInt(4)
15056		v0 := b.NewValue0(v.Pos, OpPPC64MOVWstorezero, types.TypeMem)
15057		v0.AddArg2(destptr, mem)
15058		v.AddArg2(destptr, v0)
15059		return true
15060	}
15061	// match: (Zero [6] destptr mem)
15062	// result: (MOVHstorezero [4] destptr (MOVWstorezero destptr mem))
15063	for {
15064		if auxIntToInt64(v.AuxInt) != 6 {
15065			break
15066		}
15067		destptr := v_0
15068		mem := v_1
15069		v.reset(OpPPC64MOVHstorezero)
15070		v.AuxInt = int32ToAuxInt(4)
15071		v0 := b.NewValue0(v.Pos, OpPPC64MOVWstorezero, types.TypeMem)
15072		v0.AddArg2(destptr, mem)
15073		v.AddArg2(destptr, v0)
15074		return true
15075	}
15076	// match: (Zero [7] destptr mem)
15077	// result: (MOVBstorezero [6] destptr (MOVHstorezero [4] destptr (MOVWstorezero destptr mem)))
15078	for {
15079		if auxIntToInt64(v.AuxInt) != 7 {
15080			break
15081		}
15082		destptr := v_0
15083		mem := v_1
15084		v.reset(OpPPC64MOVBstorezero)
15085		v.AuxInt = int32ToAuxInt(6)
15086		v0 := b.NewValue0(v.Pos, OpPPC64MOVHstorezero, types.TypeMem)
15087		v0.AuxInt = int32ToAuxInt(4)
15088		v1 := b.NewValue0(v.Pos, OpPPC64MOVWstorezero, types.TypeMem)
15089		v1.AddArg2(destptr, mem)
15090		v0.AddArg2(destptr, v1)
15091		v.AddArg2(destptr, v0)
15092		return true
15093	}
15094	// match: (Zero [8] {t} destptr mem)
15095	// result: (MOVDstorezero destptr mem)
15096	for {
15097		if auxIntToInt64(v.AuxInt) != 8 {
15098			break
15099		}
15100		destptr := v_0
15101		mem := v_1
15102		v.reset(OpPPC64MOVDstorezero)
15103		v.AddArg2(destptr, mem)
15104		return true
15105	}
15106	// match: (Zero [12] {t} destptr mem)
15107	// result: (MOVWstorezero [8] destptr (MOVDstorezero [0] destptr mem))
15108	for {
15109		if auxIntToInt64(v.AuxInt) != 12 {
15110			break
15111		}
15112		destptr := v_0
15113		mem := v_1
15114		v.reset(OpPPC64MOVWstorezero)
15115		v.AuxInt = int32ToAuxInt(8)
15116		v0 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
15117		v0.AuxInt = int32ToAuxInt(0)
15118		v0.AddArg2(destptr, mem)
15119		v.AddArg2(destptr, v0)
15120		return true
15121	}
15122	// match: (Zero [16] {t} destptr mem)
15123	// result: (MOVDstorezero [8] destptr (MOVDstorezero [0] destptr mem))
15124	for {
15125		if auxIntToInt64(v.AuxInt) != 16 {
15126			break
15127		}
15128		destptr := v_0
15129		mem := v_1
15130		v.reset(OpPPC64MOVDstorezero)
15131		v.AuxInt = int32ToAuxInt(8)
15132		v0 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
15133		v0.AuxInt = int32ToAuxInt(0)
15134		v0.AddArg2(destptr, mem)
15135		v.AddArg2(destptr, v0)
15136		return true
15137	}
15138	// match: (Zero [24] {t} destptr mem)
15139	// result: (MOVDstorezero [16] destptr (MOVDstorezero [8] destptr (MOVDstorezero [0] destptr mem)))
15140	for {
15141		if auxIntToInt64(v.AuxInt) != 24 {
15142			break
15143		}
15144		destptr := v_0
15145		mem := v_1
15146		v.reset(OpPPC64MOVDstorezero)
15147		v.AuxInt = int32ToAuxInt(16)
15148		v0 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
15149		v0.AuxInt = int32ToAuxInt(8)
15150		v1 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
15151		v1.AuxInt = int32ToAuxInt(0)
15152		v1.AddArg2(destptr, mem)
15153		v0.AddArg2(destptr, v1)
15154		v.AddArg2(destptr, v0)
15155		return true
15156	}
15157	// match: (Zero [32] {t} destptr mem)
15158	// result: (MOVDstorezero [24] destptr (MOVDstorezero [16] destptr (MOVDstorezero [8] destptr (MOVDstorezero [0] destptr mem))))
15159	for {
15160		if auxIntToInt64(v.AuxInt) != 32 {
15161			break
15162		}
15163		destptr := v_0
15164		mem := v_1
15165		v.reset(OpPPC64MOVDstorezero)
15166		v.AuxInt = int32ToAuxInt(24)
15167		v0 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
15168		v0.AuxInt = int32ToAuxInt(16)
15169		v1 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
15170		v1.AuxInt = int32ToAuxInt(8)
15171		v2 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
15172		v2.AuxInt = int32ToAuxInt(0)
15173		v2.AddArg2(destptr, mem)
15174		v1.AddArg2(destptr, v2)
15175		v0.AddArg2(destptr, v1)
15176		v.AddArg2(destptr, v0)
15177		return true
15178	}
15179	// match: (Zero [s] ptr mem)
15180	// cond: buildcfg.GOPPC64 <= 8 && s < 64
15181	// result: (LoweredZeroShort [s] ptr mem)
15182	for {
15183		s := auxIntToInt64(v.AuxInt)
15184		ptr := v_0
15185		mem := v_1
15186		if !(buildcfg.GOPPC64 <= 8 && s < 64) {
15187			break
15188		}
15189		v.reset(OpPPC64LoweredZeroShort)
15190		v.AuxInt = int64ToAuxInt(s)
15191		v.AddArg2(ptr, mem)
15192		return true
15193	}
15194	// match: (Zero [s] ptr mem)
15195	// cond: buildcfg.GOPPC64 <= 8
15196	// result: (LoweredZero [s] ptr mem)
15197	for {
15198		s := auxIntToInt64(v.AuxInt)
15199		ptr := v_0
15200		mem := v_1
15201		if !(buildcfg.GOPPC64 <= 8) {
15202			break
15203		}
15204		v.reset(OpPPC64LoweredZero)
15205		v.AuxInt = int64ToAuxInt(s)
15206		v.AddArg2(ptr, mem)
15207		return true
15208	}
15209	// match: (Zero [s] ptr mem)
15210	// cond: s < 128 && buildcfg.GOPPC64 >= 9
15211	// result: (LoweredQuadZeroShort [s] ptr mem)
15212	for {
15213		s := auxIntToInt64(v.AuxInt)
15214		ptr := v_0
15215		mem := v_1
15216		if !(s < 128 && buildcfg.GOPPC64 >= 9) {
15217			break
15218		}
15219		v.reset(OpPPC64LoweredQuadZeroShort)
15220		v.AuxInt = int64ToAuxInt(s)
15221		v.AddArg2(ptr, mem)
15222		return true
15223	}
15224	// match: (Zero [s] ptr mem)
15225	// cond: buildcfg.GOPPC64 >= 9
15226	// result: (LoweredQuadZero [s] ptr mem)
15227	for {
15228		s := auxIntToInt64(v.AuxInt)
15229		ptr := v_0
15230		mem := v_1
15231		if !(buildcfg.GOPPC64 >= 9) {
15232			break
15233		}
15234		v.reset(OpPPC64LoweredQuadZero)
15235		v.AuxInt = int64ToAuxInt(s)
15236		v.AddArg2(ptr, mem)
15237		return true
15238	}
15239	return false
15240}
15241func rewriteBlockPPC64(b *Block) bool {
15242	typ := &b.Func.Config.Types
15243	switch b.Kind {
15244	case BlockPPC64EQ:
15245		// match: (EQ (FlagEQ) yes no)
15246		// result: (First yes no)
15247		for b.Controls[0].Op == OpPPC64FlagEQ {
15248			b.Reset(BlockFirst)
15249			return true
15250		}
15251		// match: (EQ (FlagLT) yes no)
15252		// result: (First no yes)
15253		for b.Controls[0].Op == OpPPC64FlagLT {
15254			b.Reset(BlockFirst)
15255			b.swapSuccessors()
15256			return true
15257		}
15258		// match: (EQ (FlagGT) yes no)
15259		// result: (First no yes)
15260		for b.Controls[0].Op == OpPPC64FlagGT {
15261			b.Reset(BlockFirst)
15262			b.swapSuccessors()
15263			return true
15264		}
15265		// match: (EQ (InvertFlags cmp) yes no)
15266		// result: (EQ cmp yes no)
15267		for b.Controls[0].Op == OpPPC64InvertFlags {
15268			v_0 := b.Controls[0]
15269			cmp := v_0.Args[0]
15270			b.resetWithControl(BlockPPC64EQ, cmp)
15271			return true
15272		}
15273		// match: (EQ (CMPconst [0] z:(AND x y)) yes no)
15274		// cond: z.Uses == 1
15275		// result: (EQ (Select1 <types.TypeFlags> (ANDCC x y)) yes no)
15276		for b.Controls[0].Op == OpPPC64CMPconst {
15277			v_0 := b.Controls[0]
15278			if auxIntToInt64(v_0.AuxInt) != 0 {
15279				break
15280			}
15281			z := v_0.Args[0]
15282			if z.Op != OpPPC64AND {
15283				break
15284			}
15285			_ = z.Args[1]
15286			z_0 := z.Args[0]
15287			z_1 := z.Args[1]
15288			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
15289				x := z_0
15290				y := z_1
15291				if !(z.Uses == 1) {
15292					continue
15293				}
15294				v0 := b.NewValue0(v_0.Pos, OpSelect1, types.TypeFlags)
15295				v1 := b.NewValue0(v_0.Pos, OpPPC64ANDCC, types.NewTuple(typ.Int64, types.TypeFlags))
15296				v1.AddArg2(x, y)
15297				v0.AddArg(v1)
15298				b.resetWithControl(BlockPPC64EQ, v0)
15299				return true
15300			}
15301			break
15302		}
15303		// match: (EQ (CMPconst [0] z:(OR x y)) yes no)
15304		// cond: z.Uses == 1
15305		// result: (EQ (Select1 <types.TypeFlags> (ORCC x y)) yes no)
15306		for b.Controls[0].Op == OpPPC64CMPconst {
15307			v_0 := b.Controls[0]
15308			if auxIntToInt64(v_0.AuxInt) != 0 {
15309				break
15310			}
15311			z := v_0.Args[0]
15312			if z.Op != OpPPC64OR {
15313				break
15314			}
15315			_ = z.Args[1]
15316			z_0 := z.Args[0]
15317			z_1 := z.Args[1]
15318			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
15319				x := z_0
15320				y := z_1
15321				if !(z.Uses == 1) {
15322					continue
15323				}
15324				v0 := b.NewValue0(v_0.Pos, OpSelect1, types.TypeFlags)
15325				v1 := b.NewValue0(v_0.Pos, OpPPC64ORCC, types.NewTuple(typ.Int, types.TypeFlags))
15326				v1.AddArg2(x, y)
15327				v0.AddArg(v1)
15328				b.resetWithControl(BlockPPC64EQ, v0)
15329				return true
15330			}
15331			break
15332		}
15333		// match: (EQ (CMPconst [0] z:(XOR x y)) yes no)
15334		// cond: z.Uses == 1
15335		// result: (EQ (Select1 <types.TypeFlags> (XORCC x y)) yes no)
15336		for b.Controls[0].Op == OpPPC64CMPconst {
15337			v_0 := b.Controls[0]
15338			if auxIntToInt64(v_0.AuxInt) != 0 {
15339				break
15340			}
15341			z := v_0.Args[0]
15342			if z.Op != OpPPC64XOR {
15343				break
15344			}
15345			_ = z.Args[1]
15346			z_0 := z.Args[0]
15347			z_1 := z.Args[1]
15348			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
15349				x := z_0
15350				y := z_1
15351				if !(z.Uses == 1) {
15352					continue
15353				}
15354				v0 := b.NewValue0(v_0.Pos, OpSelect1, types.TypeFlags)
15355				v1 := b.NewValue0(v_0.Pos, OpPPC64XORCC, types.NewTuple(typ.Int, types.TypeFlags))
15356				v1.AddArg2(x, y)
15357				v0.AddArg(v1)
15358				b.resetWithControl(BlockPPC64EQ, v0)
15359				return true
15360			}
15361			break
15362		}
15363	case BlockPPC64GE:
15364		// match: (GE (FlagEQ) yes no)
15365		// result: (First yes no)
15366		for b.Controls[0].Op == OpPPC64FlagEQ {
15367			b.Reset(BlockFirst)
15368			return true
15369		}
15370		// match: (GE (FlagLT) yes no)
15371		// result: (First no yes)
15372		for b.Controls[0].Op == OpPPC64FlagLT {
15373			b.Reset(BlockFirst)
15374			b.swapSuccessors()
15375			return true
15376		}
15377		// match: (GE (FlagGT) yes no)
15378		// result: (First yes no)
15379		for b.Controls[0].Op == OpPPC64FlagGT {
15380			b.Reset(BlockFirst)
15381			return true
15382		}
15383		// match: (GE (InvertFlags cmp) yes no)
15384		// result: (LE cmp yes no)
15385		for b.Controls[0].Op == OpPPC64InvertFlags {
15386			v_0 := b.Controls[0]
15387			cmp := v_0.Args[0]
15388			b.resetWithControl(BlockPPC64LE, cmp)
15389			return true
15390		}
15391		// match: (GE (CMPconst [0] z:(AND x y)) yes no)
15392		// cond: z.Uses == 1
15393		// result: (GE (Select1 <types.TypeFlags> (ANDCC x y)) yes no)
15394		for b.Controls[0].Op == OpPPC64CMPconst {
15395			v_0 := b.Controls[0]
15396			if auxIntToInt64(v_0.AuxInt) != 0 {
15397				break
15398			}
15399			z := v_0.Args[0]
15400			if z.Op != OpPPC64AND {
15401				break
15402			}
15403			_ = z.Args[1]
15404			z_0 := z.Args[0]
15405			z_1 := z.Args[1]
15406			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
15407				x := z_0
15408				y := z_1
15409				if !(z.Uses == 1) {
15410					continue
15411				}
15412				v0 := b.NewValue0(v_0.Pos, OpSelect1, types.TypeFlags)
15413				v1 := b.NewValue0(v_0.Pos, OpPPC64ANDCC, types.NewTuple(typ.Int64, types.TypeFlags))
15414				v1.AddArg2(x, y)
15415				v0.AddArg(v1)
15416				b.resetWithControl(BlockPPC64GE, v0)
15417				return true
15418			}
15419			break
15420		}
15421		// match: (GE (CMPconst [0] z:(OR x y)) yes no)
15422		// cond: z.Uses == 1
15423		// result: (GE (Select1 <types.TypeFlags> (ORCC x y)) yes no)
15424		for b.Controls[0].Op == OpPPC64CMPconst {
15425			v_0 := b.Controls[0]
15426			if auxIntToInt64(v_0.AuxInt) != 0 {
15427				break
15428			}
15429			z := v_0.Args[0]
15430			if z.Op != OpPPC64OR {
15431				break
15432			}
15433			_ = z.Args[1]
15434			z_0 := z.Args[0]
15435			z_1 := z.Args[1]
15436			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
15437				x := z_0
15438				y := z_1
15439				if !(z.Uses == 1) {
15440					continue
15441				}
15442				v0 := b.NewValue0(v_0.Pos, OpSelect1, types.TypeFlags)
15443				v1 := b.NewValue0(v_0.Pos, OpPPC64ORCC, types.NewTuple(typ.Int, types.TypeFlags))
15444				v1.AddArg2(x, y)
15445				v0.AddArg(v1)
15446				b.resetWithControl(BlockPPC64GE, v0)
15447				return true
15448			}
15449			break
15450		}
15451		// match: (GE (CMPconst [0] z:(XOR x y)) yes no)
15452		// cond: z.Uses == 1
15453		// result: (GE (Select1 <types.TypeFlags> (XORCC x y)) yes no)
15454		for b.Controls[0].Op == OpPPC64CMPconst {
15455			v_0 := b.Controls[0]
15456			if auxIntToInt64(v_0.AuxInt) != 0 {
15457				break
15458			}
15459			z := v_0.Args[0]
15460			if z.Op != OpPPC64XOR {
15461				break
15462			}
15463			_ = z.Args[1]
15464			z_0 := z.Args[0]
15465			z_1 := z.Args[1]
15466			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
15467				x := z_0
15468				y := z_1
15469				if !(z.Uses == 1) {
15470					continue
15471				}
15472				v0 := b.NewValue0(v_0.Pos, OpSelect1, types.TypeFlags)
15473				v1 := b.NewValue0(v_0.Pos, OpPPC64XORCC, types.NewTuple(typ.Int, types.TypeFlags))
15474				v1.AddArg2(x, y)
15475				v0.AddArg(v1)
15476				b.resetWithControl(BlockPPC64GE, v0)
15477				return true
15478			}
15479			break
15480		}
15481	case BlockPPC64GT:
15482		// match: (GT (FlagEQ) yes no)
15483		// result: (First no yes)
15484		for b.Controls[0].Op == OpPPC64FlagEQ {
15485			b.Reset(BlockFirst)
15486			b.swapSuccessors()
15487			return true
15488		}
15489		// match: (GT (FlagLT) yes no)
15490		// result: (First no yes)
15491		for b.Controls[0].Op == OpPPC64FlagLT {
15492			b.Reset(BlockFirst)
15493			b.swapSuccessors()
15494			return true
15495		}
15496		// match: (GT (FlagGT) yes no)
15497		// result: (First yes no)
15498		for b.Controls[0].Op == OpPPC64FlagGT {
15499			b.Reset(BlockFirst)
15500			return true
15501		}
15502		// match: (GT (InvertFlags cmp) yes no)
15503		// result: (LT cmp yes no)
15504		for b.Controls[0].Op == OpPPC64InvertFlags {
15505			v_0 := b.Controls[0]
15506			cmp := v_0.Args[0]
15507			b.resetWithControl(BlockPPC64LT, cmp)
15508			return true
15509		}
15510		// match: (GT (CMPconst [0] z:(AND x y)) yes no)
15511		// cond: z.Uses == 1
15512		// result: (GT (Select1 <types.TypeFlags> (ANDCC x y)) yes no)
15513		for b.Controls[0].Op == OpPPC64CMPconst {
15514			v_0 := b.Controls[0]
15515			if auxIntToInt64(v_0.AuxInt) != 0 {
15516				break
15517			}
15518			z := v_0.Args[0]
15519			if z.Op != OpPPC64AND {
15520				break
15521			}
15522			_ = z.Args[1]
15523			z_0 := z.Args[0]
15524			z_1 := z.Args[1]
15525			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
15526				x := z_0
15527				y := z_1
15528				if !(z.Uses == 1) {
15529					continue
15530				}
15531				v0 := b.NewValue0(v_0.Pos, OpSelect1, types.TypeFlags)
15532				v1 := b.NewValue0(v_0.Pos, OpPPC64ANDCC, types.NewTuple(typ.Int64, types.TypeFlags))
15533				v1.AddArg2(x, y)
15534				v0.AddArg(v1)
15535				b.resetWithControl(BlockPPC64GT, v0)
15536				return true
15537			}
15538			break
15539		}
15540		// match: (GT (CMPconst [0] z:(OR x y)) yes no)
15541		// cond: z.Uses == 1
15542		// result: (GT (Select1 <types.TypeFlags> (ORCC x y)) yes no)
15543		for b.Controls[0].Op == OpPPC64CMPconst {
15544			v_0 := b.Controls[0]
15545			if auxIntToInt64(v_0.AuxInt) != 0 {
15546				break
15547			}
15548			z := v_0.Args[0]
15549			if z.Op != OpPPC64OR {
15550				break
15551			}
15552			_ = z.Args[1]
15553			z_0 := z.Args[0]
15554			z_1 := z.Args[1]
15555			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
15556				x := z_0
15557				y := z_1
15558				if !(z.Uses == 1) {
15559					continue
15560				}
15561				v0 := b.NewValue0(v_0.Pos, OpSelect1, types.TypeFlags)
15562				v1 := b.NewValue0(v_0.Pos, OpPPC64ORCC, types.NewTuple(typ.Int, types.TypeFlags))
15563				v1.AddArg2(x, y)
15564				v0.AddArg(v1)
15565				b.resetWithControl(BlockPPC64GT, v0)
15566				return true
15567			}
15568			break
15569		}
15570		// match: (GT (CMPconst [0] z:(XOR x y)) yes no)
15571		// cond: z.Uses == 1
15572		// result: (GT (Select1 <types.TypeFlags> (XORCC x y)) yes no)
15573		for b.Controls[0].Op == OpPPC64CMPconst {
15574			v_0 := b.Controls[0]
15575			if auxIntToInt64(v_0.AuxInt) != 0 {
15576				break
15577			}
15578			z := v_0.Args[0]
15579			if z.Op != OpPPC64XOR {
15580				break
15581			}
15582			_ = z.Args[1]
15583			z_0 := z.Args[0]
15584			z_1 := z.Args[1]
15585			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
15586				x := z_0
15587				y := z_1
15588				if !(z.Uses == 1) {
15589					continue
15590				}
15591				v0 := b.NewValue0(v_0.Pos, OpSelect1, types.TypeFlags)
15592				v1 := b.NewValue0(v_0.Pos, OpPPC64XORCC, types.NewTuple(typ.Int, types.TypeFlags))
15593				v1.AddArg2(x, y)
15594				v0.AddArg(v1)
15595				b.resetWithControl(BlockPPC64GT, v0)
15596				return true
15597			}
15598			break
15599		}
15600	case BlockIf:
15601		// match: (If (Equal cc) yes no)
15602		// result: (EQ cc yes no)
15603		for b.Controls[0].Op == OpPPC64Equal {
15604			v_0 := b.Controls[0]
15605			cc := v_0.Args[0]
15606			b.resetWithControl(BlockPPC64EQ, cc)
15607			return true
15608		}
15609		// match: (If (NotEqual cc) yes no)
15610		// result: (NE cc yes no)
15611		for b.Controls[0].Op == OpPPC64NotEqual {
15612			v_0 := b.Controls[0]
15613			cc := v_0.Args[0]
15614			b.resetWithControl(BlockPPC64NE, cc)
15615			return true
15616		}
15617		// match: (If (LessThan cc) yes no)
15618		// result: (LT cc yes no)
15619		for b.Controls[0].Op == OpPPC64LessThan {
15620			v_0 := b.Controls[0]
15621			cc := v_0.Args[0]
15622			b.resetWithControl(BlockPPC64LT, cc)
15623			return true
15624		}
15625		// match: (If (LessEqual cc) yes no)
15626		// result: (LE cc yes no)
15627		for b.Controls[0].Op == OpPPC64LessEqual {
15628			v_0 := b.Controls[0]
15629			cc := v_0.Args[0]
15630			b.resetWithControl(BlockPPC64LE, cc)
15631			return true
15632		}
15633		// match: (If (GreaterThan cc) yes no)
15634		// result: (GT cc yes no)
15635		for b.Controls[0].Op == OpPPC64GreaterThan {
15636			v_0 := b.Controls[0]
15637			cc := v_0.Args[0]
15638			b.resetWithControl(BlockPPC64GT, cc)
15639			return true
15640		}
15641		// match: (If (GreaterEqual cc) yes no)
15642		// result: (GE cc yes no)
15643		for b.Controls[0].Op == OpPPC64GreaterEqual {
15644			v_0 := b.Controls[0]
15645			cc := v_0.Args[0]
15646			b.resetWithControl(BlockPPC64GE, cc)
15647			return true
15648		}
15649		// match: (If (FLessThan cc) yes no)
15650		// result: (FLT cc yes no)
15651		for b.Controls[0].Op == OpPPC64FLessThan {
15652			v_0 := b.Controls[0]
15653			cc := v_0.Args[0]
15654			b.resetWithControl(BlockPPC64FLT, cc)
15655			return true
15656		}
15657		// match: (If (FLessEqual cc) yes no)
15658		// result: (FLE cc yes no)
15659		for b.Controls[0].Op == OpPPC64FLessEqual {
15660			v_0 := b.Controls[0]
15661			cc := v_0.Args[0]
15662			b.resetWithControl(BlockPPC64FLE, cc)
15663			return true
15664		}
15665		// match: (If (FGreaterThan cc) yes no)
15666		// result: (FGT cc yes no)
15667		for b.Controls[0].Op == OpPPC64FGreaterThan {
15668			v_0 := b.Controls[0]
15669			cc := v_0.Args[0]
15670			b.resetWithControl(BlockPPC64FGT, cc)
15671			return true
15672		}
15673		// match: (If (FGreaterEqual cc) yes no)
15674		// result: (FGE cc yes no)
15675		for b.Controls[0].Op == OpPPC64FGreaterEqual {
15676			v_0 := b.Controls[0]
15677			cc := v_0.Args[0]
15678			b.resetWithControl(BlockPPC64FGE, cc)
15679			return true
15680		}
15681		// match: (If cond yes no)
15682		// result: (NE (CMPconst [0] (ANDconst [1] cond)) yes no)
15683		for {
15684			cond := b.Controls[0]
15685			v0 := b.NewValue0(cond.Pos, OpPPC64CMPconst, types.TypeFlags)
15686			v0.AuxInt = int64ToAuxInt(0)
15687			v1 := b.NewValue0(cond.Pos, OpPPC64ANDconst, typ.Int)
15688			v1.AuxInt = int64ToAuxInt(1)
15689			v1.AddArg(cond)
15690			v0.AddArg(v1)
15691			b.resetWithControl(BlockPPC64NE, v0)
15692			return true
15693		}
15694	case BlockPPC64LE:
15695		// match: (LE (FlagEQ) yes no)
15696		// result: (First yes no)
15697		for b.Controls[0].Op == OpPPC64FlagEQ {
15698			b.Reset(BlockFirst)
15699			return true
15700		}
15701		// match: (LE (FlagLT) yes no)
15702		// result: (First yes no)
15703		for b.Controls[0].Op == OpPPC64FlagLT {
15704			b.Reset(BlockFirst)
15705			return true
15706		}
15707		// match: (LE (FlagGT) yes no)
15708		// result: (First no yes)
15709		for b.Controls[0].Op == OpPPC64FlagGT {
15710			b.Reset(BlockFirst)
15711			b.swapSuccessors()
15712			return true
15713		}
15714		// match: (LE (InvertFlags cmp) yes no)
15715		// result: (GE cmp yes no)
15716		for b.Controls[0].Op == OpPPC64InvertFlags {
15717			v_0 := b.Controls[0]
15718			cmp := v_0.Args[0]
15719			b.resetWithControl(BlockPPC64GE, cmp)
15720			return true
15721		}
15722		// match: (LE (CMPconst [0] z:(AND x y)) yes no)
15723		// cond: z.Uses == 1
15724		// result: (LE (Select1 <types.TypeFlags> (ANDCC x y)) yes no)
15725		for b.Controls[0].Op == OpPPC64CMPconst {
15726			v_0 := b.Controls[0]
15727			if auxIntToInt64(v_0.AuxInt) != 0 {
15728				break
15729			}
15730			z := v_0.Args[0]
15731			if z.Op != OpPPC64AND {
15732				break
15733			}
15734			_ = z.Args[1]
15735			z_0 := z.Args[0]
15736			z_1 := z.Args[1]
15737			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
15738				x := z_0
15739				y := z_1
15740				if !(z.Uses == 1) {
15741					continue
15742				}
15743				v0 := b.NewValue0(v_0.Pos, OpSelect1, types.TypeFlags)
15744				v1 := b.NewValue0(v_0.Pos, OpPPC64ANDCC, types.NewTuple(typ.Int64, types.TypeFlags))
15745				v1.AddArg2(x, y)
15746				v0.AddArg(v1)
15747				b.resetWithControl(BlockPPC64LE, v0)
15748				return true
15749			}
15750			break
15751		}
15752		// match: (LE (CMPconst [0] z:(OR x y)) yes no)
15753		// cond: z.Uses == 1
15754		// result: (LE (Select1 <types.TypeFlags> (ORCC x y)) yes no)
15755		for b.Controls[0].Op == OpPPC64CMPconst {
15756			v_0 := b.Controls[0]
15757			if auxIntToInt64(v_0.AuxInt) != 0 {
15758				break
15759			}
15760			z := v_0.Args[0]
15761			if z.Op != OpPPC64OR {
15762				break
15763			}
15764			_ = z.Args[1]
15765			z_0 := z.Args[0]
15766			z_1 := z.Args[1]
15767			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
15768				x := z_0
15769				y := z_1
15770				if !(z.Uses == 1) {
15771					continue
15772				}
15773				v0 := b.NewValue0(v_0.Pos, OpSelect1, types.TypeFlags)
15774				v1 := b.NewValue0(v_0.Pos, OpPPC64ORCC, types.NewTuple(typ.Int, types.TypeFlags))
15775				v1.AddArg2(x, y)
15776				v0.AddArg(v1)
15777				b.resetWithControl(BlockPPC64LE, v0)
15778				return true
15779			}
15780			break
15781		}
15782		// match: (LE (CMPconst [0] z:(XOR x y)) yes no)
15783		// cond: z.Uses == 1
15784		// result: (LE (Select1 <types.TypeFlags> (XORCC x y)) yes no)
15785		for b.Controls[0].Op == OpPPC64CMPconst {
15786			v_0 := b.Controls[0]
15787			if auxIntToInt64(v_0.AuxInt) != 0 {
15788				break
15789			}
15790			z := v_0.Args[0]
15791			if z.Op != OpPPC64XOR {
15792				break
15793			}
15794			_ = z.Args[1]
15795			z_0 := z.Args[0]
15796			z_1 := z.Args[1]
15797			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
15798				x := z_0
15799				y := z_1
15800				if !(z.Uses == 1) {
15801					continue
15802				}
15803				v0 := b.NewValue0(v_0.Pos, OpSelect1, types.TypeFlags)
15804				v1 := b.NewValue0(v_0.Pos, OpPPC64XORCC, types.NewTuple(typ.Int, types.TypeFlags))
15805				v1.AddArg2(x, y)
15806				v0.AddArg(v1)
15807				b.resetWithControl(BlockPPC64LE, v0)
15808				return true
15809			}
15810			break
15811		}
15812	case BlockPPC64LT:
15813		// match: (LT (FlagEQ) yes no)
15814		// result: (First no yes)
15815		for b.Controls[0].Op == OpPPC64FlagEQ {
15816			b.Reset(BlockFirst)
15817			b.swapSuccessors()
15818			return true
15819		}
15820		// match: (LT (FlagLT) yes no)
15821		// result: (First yes no)
15822		for b.Controls[0].Op == OpPPC64FlagLT {
15823			b.Reset(BlockFirst)
15824			return true
15825		}
15826		// match: (LT (FlagGT) yes no)
15827		// result: (First no yes)
15828		for b.Controls[0].Op == OpPPC64FlagGT {
15829			b.Reset(BlockFirst)
15830			b.swapSuccessors()
15831			return true
15832		}
15833		// match: (LT (InvertFlags cmp) yes no)
15834		// result: (GT cmp yes no)
15835		for b.Controls[0].Op == OpPPC64InvertFlags {
15836			v_0 := b.Controls[0]
15837			cmp := v_0.Args[0]
15838			b.resetWithControl(BlockPPC64GT, cmp)
15839			return true
15840		}
15841		// match: (LT (CMPconst [0] z:(AND x y)) yes no)
15842		// cond: z.Uses == 1
15843		// result: (LT (Select1 <types.TypeFlags> (ANDCC x y)) yes no)
15844		for b.Controls[0].Op == OpPPC64CMPconst {
15845			v_0 := b.Controls[0]
15846			if auxIntToInt64(v_0.AuxInt) != 0 {
15847				break
15848			}
15849			z := v_0.Args[0]
15850			if z.Op != OpPPC64AND {
15851				break
15852			}
15853			_ = z.Args[1]
15854			z_0 := z.Args[0]
15855			z_1 := z.Args[1]
15856			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
15857				x := z_0
15858				y := z_1
15859				if !(z.Uses == 1) {
15860					continue
15861				}
15862				v0 := b.NewValue0(v_0.Pos, OpSelect1, types.TypeFlags)
15863				v1 := b.NewValue0(v_0.Pos, OpPPC64ANDCC, types.NewTuple(typ.Int64, types.TypeFlags))
15864				v1.AddArg2(x, y)
15865				v0.AddArg(v1)
15866				b.resetWithControl(BlockPPC64LT, v0)
15867				return true
15868			}
15869			break
15870		}
15871		// match: (LT (CMPconst [0] z:(OR x y)) yes no)
15872		// cond: z.Uses == 1
15873		// result: (LT (Select1 <types.TypeFlags> (ORCC x y)) yes no)
15874		for b.Controls[0].Op == OpPPC64CMPconst {
15875			v_0 := b.Controls[0]
15876			if auxIntToInt64(v_0.AuxInt) != 0 {
15877				break
15878			}
15879			z := v_0.Args[0]
15880			if z.Op != OpPPC64OR {
15881				break
15882			}
15883			_ = z.Args[1]
15884			z_0 := z.Args[0]
15885			z_1 := z.Args[1]
15886			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
15887				x := z_0
15888				y := z_1
15889				if !(z.Uses == 1) {
15890					continue
15891				}
15892				v0 := b.NewValue0(v_0.Pos, OpSelect1, types.TypeFlags)
15893				v1 := b.NewValue0(v_0.Pos, OpPPC64ORCC, types.NewTuple(typ.Int, types.TypeFlags))
15894				v1.AddArg2(x, y)
15895				v0.AddArg(v1)
15896				b.resetWithControl(BlockPPC64LT, v0)
15897				return true
15898			}
15899			break
15900		}
15901		// match: (LT (CMPconst [0] z:(XOR x y)) yes no)
15902		// cond: z.Uses == 1
15903		// result: (LT (Select1 <types.TypeFlags> (XORCC x y)) yes no)
15904		for b.Controls[0].Op == OpPPC64CMPconst {
15905			v_0 := b.Controls[0]
15906			if auxIntToInt64(v_0.AuxInt) != 0 {
15907				break
15908			}
15909			z := v_0.Args[0]
15910			if z.Op != OpPPC64XOR {
15911				break
15912			}
15913			_ = z.Args[1]
15914			z_0 := z.Args[0]
15915			z_1 := z.Args[1]
15916			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
15917				x := z_0
15918				y := z_1
15919				if !(z.Uses == 1) {
15920					continue
15921				}
15922				v0 := b.NewValue0(v_0.Pos, OpSelect1, types.TypeFlags)
15923				v1 := b.NewValue0(v_0.Pos, OpPPC64XORCC, types.NewTuple(typ.Int, types.TypeFlags))
15924				v1.AddArg2(x, y)
15925				v0.AddArg(v1)
15926				b.resetWithControl(BlockPPC64LT, v0)
15927				return true
15928			}
15929			break
15930		}
15931	case BlockPPC64NE:
15932		// match: (NE (CMPconst [0] (ANDconst [1] (Equal cc))) yes no)
15933		// result: (EQ cc yes no)
15934		for b.Controls[0].Op == OpPPC64CMPconst {
15935			v_0 := b.Controls[0]
15936			if auxIntToInt64(v_0.AuxInt) != 0 {
15937				break
15938			}
15939			v_0_0 := v_0.Args[0]
15940			if v_0_0.Op != OpPPC64ANDconst || auxIntToInt64(v_0_0.AuxInt) != 1 {
15941				break
15942			}
15943			v_0_0_0 := v_0_0.Args[0]
15944			if v_0_0_0.Op != OpPPC64Equal {
15945				break
15946			}
15947			cc := v_0_0_0.Args[0]
15948			b.resetWithControl(BlockPPC64EQ, cc)
15949			return true
15950		}
15951		// match: (NE (CMPconst [0] (ANDconst [1] (NotEqual cc))) yes no)
15952		// result: (NE cc yes no)
15953		for b.Controls[0].Op == OpPPC64CMPconst {
15954			v_0 := b.Controls[0]
15955			if auxIntToInt64(v_0.AuxInt) != 0 {
15956				break
15957			}
15958			v_0_0 := v_0.Args[0]
15959			if v_0_0.Op != OpPPC64ANDconst || auxIntToInt64(v_0_0.AuxInt) != 1 {
15960				break
15961			}
15962			v_0_0_0 := v_0_0.Args[0]
15963			if v_0_0_0.Op != OpPPC64NotEqual {
15964				break
15965			}
15966			cc := v_0_0_0.Args[0]
15967			b.resetWithControl(BlockPPC64NE, cc)
15968			return true
15969		}
15970		// match: (NE (CMPconst [0] (ANDconst [1] (LessThan cc))) yes no)
15971		// result: (LT cc yes no)
15972		for b.Controls[0].Op == OpPPC64CMPconst {
15973			v_0 := b.Controls[0]
15974			if auxIntToInt64(v_0.AuxInt) != 0 {
15975				break
15976			}
15977			v_0_0 := v_0.Args[0]
15978			if v_0_0.Op != OpPPC64ANDconst || auxIntToInt64(v_0_0.AuxInt) != 1 {
15979				break
15980			}
15981			v_0_0_0 := v_0_0.Args[0]
15982			if v_0_0_0.Op != OpPPC64LessThan {
15983				break
15984			}
15985			cc := v_0_0_0.Args[0]
15986			b.resetWithControl(BlockPPC64LT, cc)
15987			return true
15988		}
15989		// match: (NE (CMPconst [0] (ANDconst [1] (LessEqual cc))) yes no)
15990		// result: (LE cc yes no)
15991		for b.Controls[0].Op == OpPPC64CMPconst {
15992			v_0 := b.Controls[0]
15993			if auxIntToInt64(v_0.AuxInt) != 0 {
15994				break
15995			}
15996			v_0_0 := v_0.Args[0]
15997			if v_0_0.Op != OpPPC64ANDconst || auxIntToInt64(v_0_0.AuxInt) != 1 {
15998				break
15999			}
16000			v_0_0_0 := v_0_0.Args[0]
16001			if v_0_0_0.Op != OpPPC64LessEqual {
16002				break
16003			}
16004			cc := v_0_0_0.Args[0]
16005			b.resetWithControl(BlockPPC64LE, cc)
16006			return true
16007		}
16008		// match: (NE (CMPconst [0] (ANDconst [1] (GreaterThan cc))) yes no)
16009		// result: (GT cc yes no)
16010		for b.Controls[0].Op == OpPPC64CMPconst {
16011			v_0 := b.Controls[0]
16012			if auxIntToInt64(v_0.AuxInt) != 0 {
16013				break
16014			}
16015			v_0_0 := v_0.Args[0]
16016			if v_0_0.Op != OpPPC64ANDconst || auxIntToInt64(v_0_0.AuxInt) != 1 {
16017				break
16018			}
16019			v_0_0_0 := v_0_0.Args[0]
16020			if v_0_0_0.Op != OpPPC64GreaterThan {
16021				break
16022			}
16023			cc := v_0_0_0.Args[0]
16024			b.resetWithControl(BlockPPC64GT, cc)
16025			return true
16026		}
16027		// match: (NE (CMPconst [0] (ANDconst [1] (GreaterEqual cc))) yes no)
16028		// result: (GE cc yes no)
16029		for b.Controls[0].Op == OpPPC64CMPconst {
16030			v_0 := b.Controls[0]
16031			if auxIntToInt64(v_0.AuxInt) != 0 {
16032				break
16033			}
16034			v_0_0 := v_0.Args[0]
16035			if v_0_0.Op != OpPPC64ANDconst || auxIntToInt64(v_0_0.AuxInt) != 1 {
16036				break
16037			}
16038			v_0_0_0 := v_0_0.Args[0]
16039			if v_0_0_0.Op != OpPPC64GreaterEqual {
16040				break
16041			}
16042			cc := v_0_0_0.Args[0]
16043			b.resetWithControl(BlockPPC64GE, cc)
16044			return true
16045		}
16046		// match: (NE (CMPconst [0] (ANDconst [1] (FLessThan cc))) yes no)
16047		// result: (FLT cc yes no)
16048		for b.Controls[0].Op == OpPPC64CMPconst {
16049			v_0 := b.Controls[0]
16050			if auxIntToInt64(v_0.AuxInt) != 0 {
16051				break
16052			}
16053			v_0_0 := v_0.Args[0]
16054			if v_0_0.Op != OpPPC64ANDconst || auxIntToInt64(v_0_0.AuxInt) != 1 {
16055				break
16056			}
16057			v_0_0_0 := v_0_0.Args[0]
16058			if v_0_0_0.Op != OpPPC64FLessThan {
16059				break
16060			}
16061			cc := v_0_0_0.Args[0]
16062			b.resetWithControl(BlockPPC64FLT, cc)
16063			return true
16064		}
16065		// match: (NE (CMPconst [0] (ANDconst [1] (FLessEqual cc))) yes no)
16066		// result: (FLE cc yes no)
16067		for b.Controls[0].Op == OpPPC64CMPconst {
16068			v_0 := b.Controls[0]
16069			if auxIntToInt64(v_0.AuxInt) != 0 {
16070				break
16071			}
16072			v_0_0 := v_0.Args[0]
16073			if v_0_0.Op != OpPPC64ANDconst || auxIntToInt64(v_0_0.AuxInt) != 1 {
16074				break
16075			}
16076			v_0_0_0 := v_0_0.Args[0]
16077			if v_0_0_0.Op != OpPPC64FLessEqual {
16078				break
16079			}
16080			cc := v_0_0_0.Args[0]
16081			b.resetWithControl(BlockPPC64FLE, cc)
16082			return true
16083		}
16084		// match: (NE (CMPconst [0] (ANDconst [1] (FGreaterThan cc))) yes no)
16085		// result: (FGT cc yes no)
16086		for b.Controls[0].Op == OpPPC64CMPconst {
16087			v_0 := b.Controls[0]
16088			if auxIntToInt64(v_0.AuxInt) != 0 {
16089				break
16090			}
16091			v_0_0 := v_0.Args[0]
16092			if v_0_0.Op != OpPPC64ANDconst || auxIntToInt64(v_0_0.AuxInt) != 1 {
16093				break
16094			}
16095			v_0_0_0 := v_0_0.Args[0]
16096			if v_0_0_0.Op != OpPPC64FGreaterThan {
16097				break
16098			}
16099			cc := v_0_0_0.Args[0]
16100			b.resetWithControl(BlockPPC64FGT, cc)
16101			return true
16102		}
16103		// match: (NE (CMPconst [0] (ANDconst [1] (FGreaterEqual cc))) yes no)
16104		// result: (FGE cc yes no)
16105		for b.Controls[0].Op == OpPPC64CMPconst {
16106			v_0 := b.Controls[0]
16107			if auxIntToInt64(v_0.AuxInt) != 0 {
16108				break
16109			}
16110			v_0_0 := v_0.Args[0]
16111			if v_0_0.Op != OpPPC64ANDconst || auxIntToInt64(v_0_0.AuxInt) != 1 {
16112				break
16113			}
16114			v_0_0_0 := v_0_0.Args[0]
16115			if v_0_0_0.Op != OpPPC64FGreaterEqual {
16116				break
16117			}
16118			cc := v_0_0_0.Args[0]
16119			b.resetWithControl(BlockPPC64FGE, cc)
16120			return true
16121		}
16122		// match: (NE (FlagEQ) yes no)
16123		// result: (First no yes)
16124		for b.Controls[0].Op == OpPPC64FlagEQ {
16125			b.Reset(BlockFirst)
16126			b.swapSuccessors()
16127			return true
16128		}
16129		// match: (NE (FlagLT) yes no)
16130		// result: (First yes no)
16131		for b.Controls[0].Op == OpPPC64FlagLT {
16132			b.Reset(BlockFirst)
16133			return true
16134		}
16135		// match: (NE (FlagGT) yes no)
16136		// result: (First yes no)
16137		for b.Controls[0].Op == OpPPC64FlagGT {
16138			b.Reset(BlockFirst)
16139			return true
16140		}
16141		// match: (NE (InvertFlags cmp) yes no)
16142		// result: (NE cmp yes no)
16143		for b.Controls[0].Op == OpPPC64InvertFlags {
16144			v_0 := b.Controls[0]
16145			cmp := v_0.Args[0]
16146			b.resetWithControl(BlockPPC64NE, cmp)
16147			return true
16148		}
16149		// match: (NE (CMPconst [0] z:(AND x y)) yes no)
16150		// cond: z.Uses == 1
16151		// result: (NE (Select1 <types.TypeFlags> (ANDCC x y)) yes no)
16152		for b.Controls[0].Op == OpPPC64CMPconst {
16153			v_0 := b.Controls[0]
16154			if auxIntToInt64(v_0.AuxInt) != 0 {
16155				break
16156			}
16157			z := v_0.Args[0]
16158			if z.Op != OpPPC64AND {
16159				break
16160			}
16161			_ = z.Args[1]
16162			z_0 := z.Args[0]
16163			z_1 := z.Args[1]
16164			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
16165				x := z_0
16166				y := z_1
16167				if !(z.Uses == 1) {
16168					continue
16169				}
16170				v0 := b.NewValue0(v_0.Pos, OpSelect1, types.TypeFlags)
16171				v1 := b.NewValue0(v_0.Pos, OpPPC64ANDCC, types.NewTuple(typ.Int64, types.TypeFlags))
16172				v1.AddArg2(x, y)
16173				v0.AddArg(v1)
16174				b.resetWithControl(BlockPPC64NE, v0)
16175				return true
16176			}
16177			break
16178		}
16179		// match: (NE (CMPconst [0] z:(OR x y)) yes no)
16180		// cond: z.Uses == 1
16181		// result: (NE (Select1 <types.TypeFlags> (ORCC x y)) yes no)
16182		for b.Controls[0].Op == OpPPC64CMPconst {
16183			v_0 := b.Controls[0]
16184			if auxIntToInt64(v_0.AuxInt) != 0 {
16185				break
16186			}
16187			z := v_0.Args[0]
16188			if z.Op != OpPPC64OR {
16189				break
16190			}
16191			_ = z.Args[1]
16192			z_0 := z.Args[0]
16193			z_1 := z.Args[1]
16194			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
16195				x := z_0
16196				y := z_1
16197				if !(z.Uses == 1) {
16198					continue
16199				}
16200				v0 := b.NewValue0(v_0.Pos, OpSelect1, types.TypeFlags)
16201				v1 := b.NewValue0(v_0.Pos, OpPPC64ORCC, types.NewTuple(typ.Int, types.TypeFlags))
16202				v1.AddArg2(x, y)
16203				v0.AddArg(v1)
16204				b.resetWithControl(BlockPPC64NE, v0)
16205				return true
16206			}
16207			break
16208		}
16209		// match: (NE (CMPconst [0] z:(XOR x y)) yes no)
16210		// cond: z.Uses == 1
16211		// result: (NE (Select1 <types.TypeFlags> (XORCC x y)) yes no)
16212		for b.Controls[0].Op == OpPPC64CMPconst {
16213			v_0 := b.Controls[0]
16214			if auxIntToInt64(v_0.AuxInt) != 0 {
16215				break
16216			}
16217			z := v_0.Args[0]
16218			if z.Op != OpPPC64XOR {
16219				break
16220			}
16221			_ = z.Args[1]
16222			z_0 := z.Args[0]
16223			z_1 := z.Args[1]
16224			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
16225				x := z_0
16226				y := z_1
16227				if !(z.Uses == 1) {
16228					continue
16229				}
16230				v0 := b.NewValue0(v_0.Pos, OpSelect1, types.TypeFlags)
16231				v1 := b.NewValue0(v_0.Pos, OpPPC64XORCC, types.NewTuple(typ.Int, types.TypeFlags))
16232				v1.AddArg2(x, y)
16233				v0.AddArg(v1)
16234				b.resetWithControl(BlockPPC64NE, v0)
16235				return true
16236			}
16237			break
16238		}
16239	}
16240	return false
16241}
16242