xref: /aosp_15_r20/external/flashrom/atahpt.c (revision 0d6140be3aa665ecc836e8907834fcd3e3b018fc)
1 /*
2  * This file is part of the flashrom project.
3  *
4  * Copyright (C) 2010 Uwe Hermann <[email protected]>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  */
16 
17 #include <stdlib.h>
18 #include <string.h>
19 #include "flash.h"
20 #include "programmer.h"
21 #include "hwaccess_x86_io.h"
22 #include "platform/pci.h"
23 
24 #define BIOS_ROM_ADDR		0x90
25 #define BIOS_ROM_DATA		0x94
26 
27 #define REG_FLASH_ACCESS	0x58
28 #define BIT_FLASH_ACCESS	BIT(24)
29 
30 #define PCI_VENDOR_ID_HPT	0x1103
31 
32 struct atahpt_data {
33 	struct pci_dev *dev;
34 	uint32_t io_base_addr;
35 	uint32_t flash_access;
36 };
37 
38 static const struct dev_entry ata_hpt[] = {
39 	{0x1103, 0x0004, NT, "Highpoint", "HPT366/368/370/370A/372/372N"},
40 	{0x1103, 0x0005, NT, "Highpoint", "HPT372A/372N"},
41 	{0x1103, 0x0006, NT, "Highpoint", "HPT302/302N"},
42 
43 	{0},
44 };
45 
atahpt_chip_writeb(const struct flashctx * flash,uint8_t val,chipaddr addr)46 static void atahpt_chip_writeb(const struct flashctx *flash, uint8_t val,
47 			       chipaddr addr)
48 {
49 	struct atahpt_data *data = flash->mst->par.data;
50 
51 	OUTL((uint32_t)addr, data->io_base_addr + BIOS_ROM_ADDR);
52 	OUTB(val, data->io_base_addr + BIOS_ROM_DATA);
53 }
54 
atahpt_chip_readb(const struct flashctx * flash,const chipaddr addr)55 static uint8_t atahpt_chip_readb(const struct flashctx *flash,
56 				 const chipaddr addr)
57 {
58 	struct atahpt_data *data = flash->mst->par.data;
59 
60 	OUTL((uint32_t)addr, data->io_base_addr + BIOS_ROM_ADDR);
61 	return INB(data->io_base_addr + BIOS_ROM_DATA);
62 }
63 
atahpt_shutdown(void * par_data)64 static int atahpt_shutdown(void *par_data)
65 {
66 	struct atahpt_data *data = par_data;
67 
68 	/* Restore original flash access state. */
69 	pci_write_long(data->dev, REG_FLASH_ACCESS, data->flash_access);
70 
71 	free(par_data);
72 	return 0;
73 }
74 
75 static const struct par_master par_master_atahpt = {
76 	.chip_readb	= atahpt_chip_readb,
77 	.chip_writeb	= atahpt_chip_writeb,
78 	.shutdown	= atahpt_shutdown,
79 };
80 
atahpt_init(const struct programmer_cfg * cfg)81 static int atahpt_init(const struct programmer_cfg *cfg)
82 {
83 	struct pci_dev *dev = NULL;
84 	uint32_t io_base_addr;
85 
86 	if (rget_io_perms())
87 		return 1;
88 
89 	dev = pcidev_init(cfg, ata_hpt, PCI_BASE_ADDRESS_4);
90 	if (!dev)
91 		return 1;
92 
93 	io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_4);
94 	if (!io_base_addr)
95 		return 1;
96 
97 	struct atahpt_data *data = calloc(1, sizeof(*data));
98 	if (!data) {
99 		msg_perr("Unable to allocate space for PAR master data\n");
100 		return 1;
101 	}
102 	data->dev = dev;
103 	data->io_base_addr = io_base_addr;
104 
105 	/* Enable flash access. */
106 	data->flash_access = pci_read_long(dev, REG_FLASH_ACCESS);
107 	pci_write_long(dev, REG_FLASH_ACCESS, data->flash_access | BIT_FLASH_ACCESS);
108 
109 	return register_par_master(&par_master_atahpt, BUS_PARALLEL, data);
110 }
111 
112 const struct programmer_entry programmer_atahpt = {
113 	.name			= "atahpt",
114 	.type			= PCI,
115 	.devs.dev		= ata_hpt,
116 	.init			= atahpt_init,
117 };
118