1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2
3 #include <device/pci_ops.h>
4 #include <southbridge/intel/lynxpoint/hsio/hsio.h>
5 #include <southbridge/intel/lynxpoint/pch.h>
6 #include <types.h>
7
8 const struct hsio_table_row hsio_sata_shared_lpt_lp_bx[] = {
9 { 0xea008008, ~0xff000000, 0x1c000000 },
10 { 0xea002008, ~0xfffc6108, 0xea6c6108 },
11 { 0xea002208, ~0xfffc6108, 0xea6c6108 },
12 { 0xea002408, ~0xfffc6108, 0xea6c6108 },
13 { 0xea002608, ~0xfffc6108, 0xea6c6108 },
14 { 0xea002038, ~0x0000000f, 0x0000000d },
15 { 0xea002238, ~0x0000000f, 0x0000000d },
16 { 0xea002438, ~0x0000000f, 0x0000000d },
17 { 0xea002638, ~0x0000000f, 0x0000000d },
18 { 0xea00202c, ~0x00020f00, 0x00020100 },
19 { 0xea00222c, ~0x00020f00, 0x00020100 },
20 { 0xea00242c, ~0x00020f00, 0x00020100 },
21 { 0xea00262c, ~0x00020f00, 0x00020100 },
22 { 0xea002040, ~0x1f000000, 0x01000000 },
23 { 0xea002240, ~0x1f000000, 0x01000000 },
24 { 0xea002440, ~0x1f000000, 0x01000000 },
25 { 0xea002640, ~0x1f000000, 0x01000000 },
26 { 0xea002010, ~0xffff0000, 0x55510000 },
27 { 0xea002210, ~0xffff0000, 0x55510000 },
28 { 0xea002410, ~0xffff0000, 0x55510000 },
29 { 0xea002610, ~0xffff0000, 0x55510000 },
30 { 0xea002140, ~0x00ffffff, 0x00140718 },
31 { 0xea002340, ~0x00ffffff, 0x00140718 },
32 { 0xea002540, ~0x00ffffff, 0x00140718 },
33 { 0xea002740, ~0x00ffffff, 0x00140718 },
34 { 0xea002144, ~0x00ffffff, 0x00140998 },
35 { 0xea002344, ~0x00ffffff, 0x00140998 },
36 { 0xea002544, ~0x00ffffff, 0x00140998 },
37 { 0xea002744, ~0x00ffffff, 0x00140998 },
38 { 0xea002148, ~0x00ffffff, 0x00140998 },
39 { 0xea002348, ~0x00ffffff, 0x00140998 },
40 { 0xea002548, ~0x00ffffff, 0x00140998 },
41 { 0xea002748, ~0x00ffffff, 0x00140998 },
42 { 0xea00217c, ~0x03000000, 0x03000000 },
43 { 0xea00237c, ~0x03000000, 0x03000000 },
44 { 0xea00257c, ~0x03000000, 0x03000000 },
45 { 0xea00277c, ~0x03000000, 0x03000000 },
46 { 0xea00208c, ~0x00ff0000, 0x00800000 },
47 { 0xea00228c, ~0x00ff0000, 0x00800000 },
48 { 0xea00248c, ~0x00ff0000, 0x00800000 },
49 { 0xea00268c, ~0x00ff0000, 0x00800000 },
50 { 0xea0020a4, ~0x0030ff00, 0x00308300 },
51 { 0xea0022a4, ~0x0030ff00, 0x00308300 },
52 { 0xea0024a4, ~0x0030ff00, 0x00308300 },
53 { 0xea0026a4, ~0x0030ff00, 0x00308300 },
54 { 0xea0020ac, ~0x00000030, 0x00000020 },
55 { 0xea0022ac, ~0x00000030, 0x00000020 },
56 { 0xea0024ac, ~0x00000030, 0x00000020 },
57 { 0xea0026ac, ~0x00000030, 0x00000020 },
58 { 0xea002018, ~0xffff0300, 0x38250100 },
59 { 0xea002218, ~0xffff0300, 0x38250100 },
60 { 0xea002418, ~0xffff0300, 0x38250100 },
61 { 0xea002618, ~0xffff0300, 0x38250100 },
62 { 0xea002000, ~0xcf030000, 0xcf030000 },
63 { 0xea002200, ~0xcf030000, 0xcf030000 },
64 { 0xea002400, ~0xcf030000, 0xcf030000 },
65 { 0xea002600, ~0xcf030000, 0xcf030000 },
66 { 0xea002028, ~0xff1f0000, 0x580e0000 },
67 { 0xea002228, ~0xff1f0000, 0x580e0000 },
68 { 0xea002428, ~0xff1f0000, 0x580e0000 },
69 { 0xea002628, ~0xff1f0000, 0x580e0000 },
70 { 0xea00201c, ~0x00007c00, 0x00002400 },
71 { 0xea00221c, ~0x00007c00, 0x00002400 },
72 { 0xea00241c, ~0x00007c00, 0x00002400 },
73 { 0xea00261c, ~0x00007c00, 0x00002400 },
74 { 0xea002178, ~0x00001f00, 0x00001800 },
75 { 0xea002378, ~0x00001f00, 0x00001800 },
76 { 0xea002578, ~0x00001f00, 0x00001800 },
77 { 0xea002778, ~0x00001f00, 0x00001800 },
78 { 0xea00210c, ~0x0038000f, 0x00000005 },
79 { 0xea00230c, ~0x0038000f, 0x00000005 },
80 { 0xea00250c, ~0x0038000f, 0x00000005 },
81 { 0xea00270c, ~0x0038000f, 0x00000005 },
82 };
83
84 const struct hsio_table_row hsio_xhci_shared_lpt_lp_bx[] = {
85 { 0xe90025cc, ~0x00001407, 0x00001407 },
86 { 0xe90027cc, ~0x00001407, 0x00001407 },
87 { 0xe9002568, ~0x01000f3c, 0x00000a28 },
88 { 0xe9002768, ~0x01000f3c, 0x00000a28 },
89 { 0xe900242c, ~0x00000700, 0x00000100 },
90 { 0xe900262c, ~0x00000700, 0x00000100 },
91 { 0xe900256c, ~0x000000ff, 0x0000003f },
92 { 0xe900276c, ~0x000000ff, 0x0000003f },
93 { 0xe900254c, ~0x00ffff00, 0x00120500 },
94 { 0xe900274c, ~0x00ffff00, 0x00120500 },
95 { 0xe9002564, ~0x0000f000, 0x00005000 },
96 { 0xe9002764, ~0x0000f000, 0x00005000 },
97 { 0xe9002570, ~0x00000018, 0x00000000 },
98 { 0xe9002770, ~0x00000018, 0x00000000 },
99 { 0xe9002514, ~0x38000700, 0x00000100 },
100 { 0xe9002714, ~0x38000700, 0x00000100 },
101 { 0xe9002438, ~0x0000000f, 0x0000000b },
102 { 0xe9002638, ~0x0000000f, 0x0000000b },
103 { 0xe9002414, ~0x0000fe00, 0x00006600 },
104 { 0xe9002614, ~0x0000fe00, 0x00006600 },
105 { 0xe9002540, ~0x00800000, 0x00000000 },
106 { 0xe9002740, ~0x00800000, 0x00000000 },
107 };
108
109 const struct hsio_table_row hsio_xhci_lpt_lp_bx[] = {
110 { 0xe90021cc, ~0x00001407, 0x00001407 },
111 { 0xe90023cc, ~0x00001407, 0x00001407 },
112 { 0xe9002168, ~0x01000f3c, 0x00000a28 },
113 { 0xe9002368, ~0x01000f3c, 0x00000a28 },
114 { 0xe900216c, ~0x000000ff, 0x0000003f },
115 { 0xe900236c, ~0x000000ff, 0x0000003f },
116 { 0xe900214c, ~0x00ffff00, 0x00120500 },
117 { 0xe900234c, ~0x00ffff00, 0x00120500 },
118 { 0xe9002164, ~0x0000f000, 0x00005000 },
119 { 0xe9002364, ~0x0000f000, 0x00005000 },
120 { 0xe9002170, ~0x00000018, 0x00000000 },
121 { 0xe9002370, ~0x00000018, 0x00000000 },
122 { 0xe9002114, ~0x38000700, 0x00000100 },
123 { 0xe9002314, ~0x38000700, 0x00000100 },
124 { 0xe9002038, ~0x0000000f, 0x0000000b },
125 { 0xe9002238, ~0x0000000f, 0x0000000b },
126 { 0xe9002014, ~0x0000fe00, 0x00006600 },
127 { 0xe9002214, ~0x0000fe00, 0x00006600 },
128 { 0xe9002140, ~0x00800000, 0x00000000 },
129 { 0xe9002340, ~0x00800000, 0x00000000 },
130 };
131
program_hsio_sata_lpt_lp_bx(const bool is_mobile)132 void program_hsio_sata_lpt_lp_bx(const bool is_mobile)
133 {
134 const struct hsio_table_row *pch_hsio_table;
135 size_t len;
136
137 pch_hsio_table = hsio_sata_shared_lpt_lp_bx;
138 len = ARRAY_SIZE(hsio_sata_shared_lpt_lp_bx);
139 for (size_t i = 0; i < len; i++)
140 hsio_sata_shared_update_row(pch_hsio_table[i]);
141
142 const uint32_t hsio_sata_value = is_mobile ? 0x00004c5a : 0x00003e67;
143
144 hsio_sata_shared_update(0xea002090, ~0x0000ffff, hsio_sata_value);
145 hsio_sata_shared_update(0xea002290, ~0x0000ffff, hsio_sata_value);
146 hsio_sata_shared_update(0xea002490, ~0x0000ffff, hsio_sata_value);
147 hsio_sata_shared_update(0xea002690, ~0x0000ffff, hsio_sata_value);
148 }
149
program_hsio_xhci_lpt_lp_bx(void)150 void program_hsio_xhci_lpt_lp_bx(void)
151 {
152 const struct hsio_table_row *pch_hsio_table;
153 size_t len;
154
155 pch_hsio_table = hsio_xhci_lpt_lp_bx;
156 len = ARRAY_SIZE(hsio_xhci_lpt_lp_bx);
157
158 for (size_t i = 0; i < len; i++)
159 hsio_update_row(pch_hsio_table[i]);
160
161 pch_hsio_table = hsio_xhci_shared_lpt_lp_bx;
162 len = ARRAY_SIZE(hsio_xhci_shared_lpt_lp_bx);
163
164 for (size_t i = 0; i < len; i++)
165 hsio_xhci_shared_update_row(pch_hsio_table[i]);
166 }
167
program_hsio_igbe_lpt_lp_bx(void)168 void program_hsio_igbe_lpt_lp_bx(void)
169 {
170 const uint32_t strpfusecfg1 = pci_read_config32(PCH_PCIE_DEV(0), 0xfc);
171 if (!(strpfusecfg1 & (1 << 19)))
172 return;
173
174 const uint8_t gbe_port = (strpfusecfg1 >> 16) & 0x7;
175 if (gbe_port > 5)
176 return;
177
178 const uint32_t gbe_hsio_base = 0xe900 << 16 | (0x08 + 2 * gbe_port) << 8;
179 hsio_update(gbe_hsio_base + 0x08, ~0xf0000100, 0xe0000100);
180 }
181