xref: /aosp_15_r20/external/coreboot/src/soc/amd/common/block/acpimmio/pm_io_access_util.c (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <types.h>
4 #include <arch/io.h>
5 #include <amdblocks/acpimmio.h>
6 
7 /* IO index/data for accessing PMIO prior to enabling MMIO decode */
8 #define PM_INDEX			0xcd6
9 #define PM_DATA				0xcd7
10 
enable_acpimmio_decode_pm04(void)11 void enable_acpimmio_decode_pm04(void)
12 {
13 	uint32_t dw;
14 
15 	dw = pm_io_read32(ACPIMMIO_DECODE_REGISTER_04);
16 	dw |= PM_04_ACPIMMIO_DECODE_EN;
17 	pm_io_write32(ACPIMMIO_DECODE_REGISTER_04, dw);
18 }
19 
fch_io_enable_legacy_io(void)20 void fch_io_enable_legacy_io(void)
21 {
22 	pm_io_write32(PM_DECODE_EN, pm_io_read32(PM_DECODE_EN) | LEGACY_IO_EN);
23 }
24 
25 /* PM registers are accessed a byte at a time via CD6/CD7 */
pm_io_read8(uint8_t reg)26 uint8_t pm_io_read8(uint8_t reg)
27 {
28 	outb(reg, PM_INDEX);
29 	return inb(PM_DATA);
30 }
31 
pm_io_read16(uint8_t reg)32 uint16_t pm_io_read16(uint8_t reg)
33 {
34 	return (pm_io_read8(reg + sizeof(uint8_t)) << 8) | pm_io_read8(reg);
35 }
36 
pm_io_read32(uint8_t reg)37 uint32_t pm_io_read32(uint8_t reg)
38 {
39 	return (pm_io_read16(reg + sizeof(uint16_t)) << 16) | pm_io_read16(reg);
40 }
41 
pm_io_write8(uint8_t reg,uint8_t value)42 void pm_io_write8(uint8_t reg, uint8_t value)
43 {
44 	outb(reg, PM_INDEX);
45 	outb(value, PM_DATA);
46 }
47 
pm_io_write16(uint8_t reg,uint16_t value)48 void pm_io_write16(uint8_t reg, uint16_t value)
49 {
50 	pm_io_write8(reg, value & 0xff);
51 	value >>= 8;
52 	pm_io_write8(reg + sizeof(uint8_t), value & 0xff);
53 }
54 
pm_io_write32(uint8_t reg,uint32_t value)55 void pm_io_write32(uint8_t reg, uint32_t value)
56 {
57 	pm_io_write16(reg, value & 0xffff);
58 	value >>= 16;
59 	pm_io_write16(reg + sizeof(uint16_t), value & 0xffff);
60 }
61