1 /**
2 * \file
3 *
4 * \brief Parallel Input/Output (PIO) interrupt handler for SAM.
5 *
6 * Copyright (c) 2011-2015 Atmel Corporation. All rights reserved.
7 *
8 * \asf_license_start
9 *
10 * \page License
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions are met:
14 *
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 *
18 * 2. Redistributions in binary form must reproduce the above copyright notice,
19 * this list of conditions and the following disclaimer in the documentation
20 * and/or other materials provided with the distribution.
21 *
22 * 3. The name of Atmel may not be used to endorse or promote products derived
23 * from this software without specific prior written permission.
24 *
25 * 4. This software may only be redistributed and used in connection with an
26 * Atmel microcontroller product.
27 *
28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGE.
39 *
40 * \asf_license_stop
41 *
42 */
43 /*
44 * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
45 */
46
47 #include "pio.h"
48 #include "pio_handler.h"
49
50 /**
51 * Maximum number of interrupt sources that can be defined. This
52 * constant can be increased, but the current value is the smallest possible one
53 * that will be compatible with all existing projects.
54 */
55 #define MAX_INTERRUPT_SOURCES 7
56
57 /**
58 * Describes a PIO interrupt source, including the PIO instance triggering the
59 * interrupt and the associated interrupt handler.
60 */
61 struct s_interrupt_source {
62 uint32_t id;
63 uint32_t mask;
64 uint32_t attr;
65
66 /* Interrupt handler. */
67 void (*handler) (const uint32_t, const uint32_t);
68 };
69
70
71 /* List of interrupt sources. */
72 static struct s_interrupt_source gs_interrupt_sources[MAX_INTERRUPT_SOURCES];
73
74 /* Number of currently defined interrupt sources. */
75 static uint32_t gs_ul_nb_sources = 0;
76
77 #if (SAM3S || SAM4S || SAM4E)
78 /* PIO Capture handler */
79 static void (*pio_capture_handler)(Pio *) = NULL;
80 extern uint32_t pio_capture_enable_flag;
81 #endif
82
83 /**
84 * \brief Process an interrupt request on the given PIO controller.
85 *
86 * \param p_pio PIO controller base address.
87 * \param ul_id PIO controller ID.
88 */
pio_handler_process(Pio * p_pio,uint32_t ul_id)89 void pio_handler_process(Pio *p_pio, uint32_t ul_id)
90 {
91 uint32_t status;
92 uint32_t i;
93
94 /* Read PIO controller status */
95 status = pio_get_interrupt_status(p_pio);
96 status &= pio_get_interrupt_mask(p_pio);
97
98 /* Check pending events */
99 if (status != 0) {
100 /* Find triggering source */
101 i = 0;
102 while (status != 0) {
103 /* Source is configured on the same controller */
104 if (gs_interrupt_sources[i].id == ul_id) {
105 /* Source has PIOs whose statuses have changed */
106 if ((status & gs_interrupt_sources[i].mask) != 0) {
107 gs_interrupt_sources[i].handler(gs_interrupt_sources[i].id,
108 gs_interrupt_sources[i].mask);
109 status &= ~(gs_interrupt_sources[i].mask);
110 }
111 }
112 i++;
113 if (i >= MAX_INTERRUPT_SOURCES) {
114 break;
115 }
116 }
117 }
118
119 /* Check capture events */
120 #if (SAM3S || SAM4S || SAM4E)
121 if (pio_capture_enable_flag) {
122 if (pio_capture_handler) {
123 pio_capture_handler(p_pio);
124 }
125 }
126 #endif
127 }
128
129 /**
130 * \brief Set an interrupt handler for the provided pins.
131 * The provided handler will be called with the triggering pin as its parameter
132 * as soon as an interrupt is detected.
133 *
134 * \param p_pio PIO controller base address.
135 * \param ul_id PIO ID.
136 * \param ul_mask Pins (bit mask) to configure.
137 * \param ul_attr Pins attribute to configure.
138 * \param p_handler Interrupt handler function pointer.
139 *
140 * \return 0 if successful, 1 if the maximum number of sources has been defined.
141 */
pio_handler_set(Pio * p_pio,uint32_t ul_id,uint32_t ul_mask,uint32_t ul_attr,void (* p_handler)(uint32_t,uint32_t))142 uint32_t pio_handler_set(Pio *p_pio, uint32_t ul_id, uint32_t ul_mask,
143 uint32_t ul_attr, void (*p_handler) (uint32_t, uint32_t))
144 {
145 struct s_interrupt_source *pSource;
146
147 if (gs_ul_nb_sources >= MAX_INTERRUPT_SOURCES)
148 return 1;
149
150 /* Define new source */
151 pSource = &(gs_interrupt_sources[gs_ul_nb_sources]);
152 pSource->id = ul_id;
153 pSource->mask = ul_mask;
154 pSource->attr = ul_attr;
155 pSource->handler = p_handler;
156 gs_ul_nb_sources++;
157
158 /* Configure interrupt mode */
159 pio_configure_interrupt(p_pio, ul_mask, ul_attr);
160
161 return 0;
162 }
163
164 #if (SAM3S || SAM4S || SAM4E)
165 /**
166 * \brief Set a capture interrupt handler for all PIO.
167 *
168 * The handler will be called with the triggering PIO as its parameter
169 * as soon as an interrupt is detected.
170 *
171 * \param p_handler Interrupt handler function pointer.
172 *
173 */
pio_capture_handler_set(void (* p_handler)(Pio *))174 void pio_capture_handler_set(void (*p_handler)(Pio *))
175 {
176 pio_capture_handler = p_handler;
177 }
178 #endif
179
180 #ifdef ID_PIOA
181 /**
182 * \brief Set an interrupt handler for the specified pin.
183 * The provided handler will be called with the triggering pin as its parameter
184 * as soon as an interrupt is detected.
185 *
186 * \param ul_pin Pin index to configure.
187 * \param ul_flag Pin flag.
188 * \param p_handler Interrupt handler function pointer.
189 *
190 * \return 0 if successful, 1 if the maximum number of sources has been defined.
191 */
pio_handler_set_pin(uint32_t ul_pin,uint32_t ul_flag,void (* p_handler)(uint32_t,uint32_t))192 uint32_t pio_handler_set_pin(uint32_t ul_pin, uint32_t ul_flag,
193 void (*p_handler) (uint32_t, uint32_t))
194 {
195 Pio *p_pio = pio_get_pin_group(ul_pin);
196 uint32_t group_id = pio_get_pin_group_id(ul_pin);
197 uint32_t group_mask = pio_get_pin_group_mask(ul_pin);
198
199 return pio_handler_set(p_pio, group_id, group_mask, ul_flag, p_handler);
200 }
201
202 /**
203 * \brief Parallel IO Controller A interrupt handler.
204 * Redefined PIOA interrupt handler for NVIC interrupt table.
205 */
PIOA_Handler(void)206 void PIOA_Handler(void)
207 {
208 pio_handler_process(PIOA, ID_PIOA);
209 }
210 #endif
211
212 #ifdef ID_PIOB
213 /**
214 * \brief Parallel IO Controller B interrupt handler
215 * Redefined PIOB interrupt handler for NVIC interrupt table.
216 */
PIOB_Handler(void)217 void PIOB_Handler(void)
218 {
219 pio_handler_process(PIOB, ID_PIOB);
220 }
221 #endif
222
223 #ifdef ID_PIOC
224 /**
225 * \brief Parallel IO Controller C interrupt handler.
226 * Redefined PIOC interrupt handler for NVIC interrupt table.
227 */
PIOC_Handler(void)228 void PIOC_Handler(void)
229 {
230 pio_handler_process(PIOC, ID_PIOC);
231 }
232 #endif
233
234 #ifdef ID_PIOD
235 /**
236 * \brief Parallel IO Controller D interrupt handler.
237 * Redefined PIOD interrupt handler for NVIC interrupt table.
238 */
PIOD_Handler(void)239 void PIOD_Handler(void)
240 {
241 pio_handler_process(PIOD, ID_PIOD);
242 }
243 #endif
244
245 #ifdef ID_PIOE
246 /**
247 * \brief Parallel IO Controller E interrupt handler.
248 * Redefined PIOE interrupt handler for NVIC interrupt table.
249 */
PIOE_Handler(void)250 void PIOE_Handler(void)
251 {
252 pio_handler_process(PIOE, ID_PIOE);
253 }
254 #endif
255
256 #ifdef ID_PIOF
257 /**
258 * \brief Parallel IO Controller F interrupt handler.
259 * Redefined PIOF interrupt handler for NVIC interrupt table.
260 */
PIOF_Handler(void)261 void PIOF_Handler(void)
262 {
263 pio_handler_process(PIOF, ID_PIOF);
264 }
265 #endif
266
267 /**
268 * \brief Initialize PIO interrupt management logic.
269 *
270 * \param p_pio PIO controller base address.
271 * \param ul_irqn NVIC line number.
272 * \param ul_priority PIO controller interrupts priority.
273 */
pio_handler_set_priority(Pio * p_pio,IRQn_Type ul_irqn,uint32_t ul_priority)274 void pio_handler_set_priority(Pio *p_pio, IRQn_Type ul_irqn, uint32_t ul_priority)
275 {
276 uint32_t bitmask = 0;
277
278 bitmask = pio_get_interrupt_mask(p_pio);
279 pio_disable_interrupt(p_pio, 0xFFFFFFFF);
280 pio_get_interrupt_status(p_pio);
281 NVIC_DisableIRQ(ul_irqn);
282 NVIC_ClearPendingIRQ(ul_irqn);
283 NVIC_SetPriority(ul_irqn, ul_priority);
284 NVIC_EnableIRQ(ul_irqn);
285 pio_enable_interrupt(p_pio, bitmask);
286 }
287