1 /** 2 ****************************************************************************** 3 * @file stm32f4xx_hal_fmpi2c.h 4 * @author MCD Application Team 5 * @brief Header file of FMPI2C HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© Copyright (c) 2016 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef STM32F4xx_HAL_FMPI2C_H 22 #define STM32F4xx_HAL_FMPI2C_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 #if defined(FMPI2C_CR1_PE) 29 /* Includes ------------------------------------------------------------------*/ 30 #include "stm32f4xx_hal_def.h" 31 32 /** @addtogroup STM32F4xx_HAL_Driver 33 * @{ 34 */ 35 36 /** @addtogroup FMPI2C 37 * @{ 38 */ 39 40 /* Exported types ------------------------------------------------------------*/ 41 /** @defgroup FMPI2C_Exported_Types FMPI2C Exported Types 42 * @{ 43 */ 44 45 /** @defgroup FMPI2C_Configuration_Structure_definition FMPI2C Configuration Structure definition 46 * @brief FMPI2C Configuration Structure definition 47 * @{ 48 */ 49 typedef struct 50 { 51 uint32_t Timing; /*!< Specifies the FMPI2C_TIMINGR_register value. 52 This parameter calculated by referring to FMPI2C initialization 53 section in Reference manual */ 54 55 uint32_t OwnAddress1; /*!< Specifies the first device own address. 56 This parameter can be a 7-bit or 10-bit address. */ 57 58 uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected. 59 This parameter can be a value of @ref FMPI2C_ADDRESSING_MODE */ 60 61 uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected. 62 This parameter can be a value of @ref FMPI2C_DUAL_ADDRESSING_MODE */ 63 64 uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected 65 This parameter can be a 7-bit address. */ 66 67 uint32_t OwnAddress2Masks; /*!< Specifies the acknowledge mask address second device own address if dual addressing mode is selected 68 This parameter can be a value of @ref FMPI2C_OWN_ADDRESS2_MASKS */ 69 70 uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected. 71 This parameter can be a value of @ref FMPI2C_GENERAL_CALL_ADDRESSING_MODE */ 72 73 uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected. 74 This parameter can be a value of @ref FMPI2C_NOSTRETCH_MODE */ 75 76 } FMPI2C_InitTypeDef; 77 78 /** 79 * @} 80 */ 81 82 /** @defgroup HAL_state_structure_definition HAL state structure definition 83 * @brief HAL State structure definition 84 * @note HAL FMPI2C State value coding follow below described bitmap :\n 85 * b7-b6 Error information\n 86 * 00 : No Error\n 87 * 01 : Abort (Abort user request on going)\n 88 * 10 : Timeout\n 89 * 11 : Error\n 90 * b5 Peripheral initialization status\n 91 * 0 : Reset (peripheral not initialized)\n 92 * 1 : Init done (peripheral initialized and ready to use. HAL FMPI2C Init function called)\n 93 * b4 (not used)\n 94 * x : Should be set to 0\n 95 * b3\n 96 * 0 : Ready or Busy (No Listen mode ongoing)\n 97 * 1 : Listen (peripheral in Address Listen Mode)\n 98 * b2 Intrinsic process state\n 99 * 0 : Ready\n 100 * 1 : Busy (peripheral busy with some configuration or internal operations)\n 101 * b1 Rx state\n 102 * 0 : Ready (no Rx operation ongoing)\n 103 * 1 : Busy (Rx operation ongoing)\n 104 * b0 Tx state\n 105 * 0 : Ready (no Tx operation ongoing)\n 106 * 1 : Busy (Tx operation ongoing) 107 * @{ 108 */ 109 typedef enum 110 { 111 HAL_FMPI2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */ 112 HAL_FMPI2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */ 113 HAL_FMPI2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */ 114 HAL_FMPI2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */ 115 HAL_FMPI2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */ 116 HAL_FMPI2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */ 117 HAL_FMPI2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission 118 process is ongoing */ 119 HAL_FMPI2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception 120 process is ongoing */ 121 HAL_FMPI2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */ 122 HAL_FMPI2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */ 123 HAL_FMPI2C_STATE_ERROR = 0xE0U /*!< Error */ 124 125 } HAL_FMPI2C_StateTypeDef; 126 127 /** 128 * @} 129 */ 130 131 /** @defgroup HAL_mode_structure_definition HAL mode structure definition 132 * @brief HAL Mode structure definition 133 * @note HAL FMPI2C Mode value coding follow below described bitmap :\n 134 * b7 (not used)\n 135 * x : Should be set to 0\n 136 * b6\n 137 * 0 : None\n 138 * 1 : Memory (HAL FMPI2C communication is in Memory Mode)\n 139 * b5\n 140 * 0 : None\n 141 * 1 : Slave (HAL FMPI2C communication is in Slave Mode)\n 142 * b4\n 143 * 0 : None\n 144 * 1 : Master (HAL FMPI2C communication is in Master Mode)\n 145 * b3-b2-b1-b0 (not used)\n 146 * xxxx : Should be set to 0000 147 * @{ 148 */ 149 typedef enum 150 { 151 HAL_FMPI2C_MODE_NONE = 0x00U, /*!< No FMPI2C communication on going */ 152 HAL_FMPI2C_MODE_MASTER = 0x10U, /*!< FMPI2C communication is in Master Mode */ 153 HAL_FMPI2C_MODE_SLAVE = 0x20U, /*!< FMPI2C communication is in Slave Mode */ 154 HAL_FMPI2C_MODE_MEM = 0x40U /*!< FMPI2C communication is in Memory Mode */ 155 156 } HAL_FMPI2C_ModeTypeDef; 157 158 /** 159 * @} 160 */ 161 162 /** @defgroup FMPI2C_Error_Code_definition FMPI2C Error Code definition 163 * @brief FMPI2C Error Code definition 164 * @{ 165 */ 166 #define HAL_FMPI2C_ERROR_NONE (0x00000000U) /*!< No error */ 167 #define HAL_FMPI2C_ERROR_BERR (0x00000001U) /*!< BERR error */ 168 #define HAL_FMPI2C_ERROR_ARLO (0x00000002U) /*!< ARLO error */ 169 #define HAL_FMPI2C_ERROR_AF (0x00000004U) /*!< ACKF error */ 170 #define HAL_FMPI2C_ERROR_OVR (0x00000008U) /*!< OVR error */ 171 #define HAL_FMPI2C_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ 172 #define HAL_FMPI2C_ERROR_TIMEOUT (0x00000020U) /*!< Timeout error */ 173 #define HAL_FMPI2C_ERROR_SIZE (0x00000040U) /*!< Size Management error */ 174 #define HAL_FMPI2C_ERROR_DMA_PARAM (0x00000080U) /*!< DMA Parameter Error */ 175 #if (USE_HAL_FMPI2C_REGISTER_CALLBACKS == 1) 176 #define HAL_FMPI2C_ERROR_INVALID_CALLBACK (0x00000100U) /*!< Invalid Callback error */ 177 #endif /* USE_HAL_FMPI2C_REGISTER_CALLBACKS */ 178 #define HAL_FMPI2C_ERROR_INVALID_PARAM (0x00000200U) /*!< Invalid Parameters error */ 179 /** 180 * @} 181 */ 182 183 /** @defgroup FMPI2C_handle_Structure_definition FMPI2C handle Structure definition 184 * @brief FMPI2C handle Structure definition 185 * @{ 186 */ 187 typedef struct __FMPI2C_HandleTypeDef 188 { 189 FMPI2C_TypeDef *Instance; /*!< FMPI2C registers base address */ 190 191 FMPI2C_InitTypeDef Init; /*!< FMPI2C communication parameters */ 192 193 uint8_t *pBuffPtr; /*!< Pointer to FMPI2C transfer buffer */ 194 195 uint16_t XferSize; /*!< FMPI2C transfer size */ 196 197 __IO uint16_t XferCount; /*!< FMPI2C transfer counter */ 198 199 __IO uint32_t XferOptions; /*!< FMPI2C sequantial transfer options, this parameter can 200 be a value of @ref FMPI2C_XFEROPTIONS */ 201 202 __IO uint32_t PreviousState; /*!< FMPI2C communication Previous state */ 203 204 HAL_StatusTypeDef(*XferISR)(struct __FMPI2C_HandleTypeDef *hfmpi2c, uint32_t ITFlags, uint32_t ITSources); /*!< FMPI2C transfer IRQ handler function pointer */ 205 206 DMA_HandleTypeDef *hdmatx; /*!< FMPI2C Tx DMA handle parameters */ 207 208 DMA_HandleTypeDef *hdmarx; /*!< FMPI2C Rx DMA handle parameters */ 209 210 HAL_LockTypeDef Lock; /*!< FMPI2C locking object */ 211 212 __IO HAL_FMPI2C_StateTypeDef State; /*!< FMPI2C communication state */ 213 214 __IO HAL_FMPI2C_ModeTypeDef Mode; /*!< FMPI2C communication mode */ 215 216 __IO uint32_t ErrorCode; /*!< FMPI2C Error code */ 217 218 __IO uint32_t AddrEventCount; /*!< FMPI2C Address Event counter */ 219 220 #if (USE_HAL_FMPI2C_REGISTER_CALLBACKS == 1) 221 void (* MasterTxCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c); /*!< FMPI2C Master Tx Transfer completed callback */ 222 void (* MasterRxCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c); /*!< FMPI2C Master Rx Transfer completed callback */ 223 void (* SlaveTxCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c); /*!< FMPI2C Slave Tx Transfer completed callback */ 224 void (* SlaveRxCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c); /*!< FMPI2C Slave Rx Transfer completed callback */ 225 void (* ListenCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c); /*!< FMPI2C Listen Complete callback */ 226 void (* MemTxCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c); /*!< FMPI2C Memory Tx Transfer completed callback */ 227 void (* MemRxCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c); /*!< FMPI2C Memory Rx Transfer completed callback */ 228 void (* ErrorCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c); /*!< FMPI2C Error callback */ 229 void (* AbortCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c); /*!< FMPI2C Abort callback */ 230 231 void (* AddrCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< FMPI2C Slave Address Match callback */ 232 233 void (* MspInitCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c); /*!< FMPI2C Msp Init callback */ 234 void (* MspDeInitCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c); /*!< FMPI2C Msp DeInit callback */ 235 236 #endif /* USE_HAL_FMPI2C_REGISTER_CALLBACKS */ 237 } FMPI2C_HandleTypeDef; 238 239 #if (USE_HAL_FMPI2C_REGISTER_CALLBACKS == 1) 240 /** 241 * @brief HAL FMPI2C Callback ID enumeration definition 242 */ 243 typedef enum 244 { 245 HAL_FMPI2C_MASTER_TX_COMPLETE_CB_ID = 0x00U, /*!< FMPI2C Master Tx Transfer completed callback ID */ 246 HAL_FMPI2C_MASTER_RX_COMPLETE_CB_ID = 0x01U, /*!< FMPI2C Master Rx Transfer completed callback ID */ 247 HAL_FMPI2C_SLAVE_TX_COMPLETE_CB_ID = 0x02U, /*!< FMPI2C Slave Tx Transfer completed callback ID */ 248 HAL_FMPI2C_SLAVE_RX_COMPLETE_CB_ID = 0x03U, /*!< FMPI2C Slave Rx Transfer completed callback ID */ 249 HAL_FMPI2C_LISTEN_COMPLETE_CB_ID = 0x04U, /*!< FMPI2C Listen Complete callback ID */ 250 HAL_FMPI2C_MEM_TX_COMPLETE_CB_ID = 0x05U, /*!< FMPI2C Memory Tx Transfer callback ID */ 251 HAL_FMPI2C_MEM_RX_COMPLETE_CB_ID = 0x06U, /*!< FMPI2C Memory Rx Transfer completed callback ID */ 252 HAL_FMPI2C_ERROR_CB_ID = 0x07U, /*!< FMPI2C Error callback ID */ 253 HAL_FMPI2C_ABORT_CB_ID = 0x08U, /*!< FMPI2C Abort callback ID */ 254 255 HAL_FMPI2C_MSPINIT_CB_ID = 0x09U, /*!< FMPI2C Msp Init callback ID */ 256 HAL_FMPI2C_MSPDEINIT_CB_ID = 0x0AU /*!< FMPI2C Msp DeInit callback ID */ 257 258 } HAL_FMPI2C_CallbackIDTypeDef; 259 260 /** 261 * @brief HAL FMPI2C Callback pointer definition 262 */ 263 typedef void (*pFMPI2C_CallbackTypeDef)(FMPI2C_HandleTypeDef *hfmpi2c); /*!< pointer to an FMPI2C callback function */ 264 typedef void (*pFMPI2C_AddrCallbackTypeDef)(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< pointer to an FMPI2C Address Match callback function */ 265 266 #endif /* USE_HAL_FMPI2C_REGISTER_CALLBACKS */ 267 /** 268 * @} 269 */ 270 271 /** 272 * @} 273 */ 274 /* Exported constants --------------------------------------------------------*/ 275 276 /** @defgroup FMPI2C_Exported_Constants FMPI2C Exported Constants 277 * @{ 278 */ 279 280 /** @defgroup FMPI2C_XFEROPTIONS FMPI2C Sequential Transfer Options 281 * @{ 282 */ 283 #define FMPI2C_FIRST_FRAME ((uint32_t)FMPI2C_SOFTEND_MODE) 284 #define FMPI2C_FIRST_AND_NEXT_FRAME ((uint32_t)(FMPI2C_RELOAD_MODE | FMPI2C_SOFTEND_MODE)) 285 #define FMPI2C_NEXT_FRAME ((uint32_t)(FMPI2C_RELOAD_MODE | FMPI2C_SOFTEND_MODE)) 286 #define FMPI2C_FIRST_AND_LAST_FRAME ((uint32_t)FMPI2C_AUTOEND_MODE) 287 #define FMPI2C_LAST_FRAME ((uint32_t)FMPI2C_AUTOEND_MODE) 288 #define FMPI2C_LAST_FRAME_NO_STOP ((uint32_t)FMPI2C_SOFTEND_MODE) 289 290 /* List of XferOptions in usage of : 291 * 1- Restart condition in all use cases (direction change or not) 292 */ 293 #define FMPI2C_OTHER_FRAME (0x000000AAU) 294 #define FMPI2C_OTHER_AND_LAST_FRAME (0x0000AA00U) 295 /** 296 * @} 297 */ 298 299 /** @defgroup FMPI2C_ADDRESSING_MODE FMPI2C Addressing Mode 300 * @{ 301 */ 302 #define FMPI2C_ADDRESSINGMODE_7BIT (0x00000001U) 303 #define FMPI2C_ADDRESSINGMODE_10BIT (0x00000002U) 304 /** 305 * @} 306 */ 307 308 /** @defgroup FMPI2C_DUAL_ADDRESSING_MODE FMPI2C Dual Addressing Mode 309 * @{ 310 */ 311 #define FMPI2C_DUALADDRESS_DISABLE (0x00000000U) 312 #define FMPI2C_DUALADDRESS_ENABLE FMPI2C_OAR2_OA2EN 313 /** 314 * @} 315 */ 316 317 /** @defgroup FMPI2C_OWN_ADDRESS2_MASKS FMPI2C Own Address2 Masks 318 * @{ 319 */ 320 #define FMPI2C_OA2_NOMASK ((uint8_t)0x00U) 321 #define FMPI2C_OA2_MASK01 ((uint8_t)0x01U) 322 #define FMPI2C_OA2_MASK02 ((uint8_t)0x02U) 323 #define FMPI2C_OA2_MASK03 ((uint8_t)0x03U) 324 #define FMPI2C_OA2_MASK04 ((uint8_t)0x04U) 325 #define FMPI2C_OA2_MASK05 ((uint8_t)0x05U) 326 #define FMPI2C_OA2_MASK06 ((uint8_t)0x06U) 327 #define FMPI2C_OA2_MASK07 ((uint8_t)0x07U) 328 /** 329 * @} 330 */ 331 332 /** @defgroup FMPI2C_GENERAL_CALL_ADDRESSING_MODE FMPI2C General Call Addressing Mode 333 * @{ 334 */ 335 #define FMPI2C_GENERALCALL_DISABLE (0x00000000U) 336 #define FMPI2C_GENERALCALL_ENABLE FMPI2C_CR1_GCEN 337 /** 338 * @} 339 */ 340 341 /** @defgroup FMPI2C_NOSTRETCH_MODE FMPI2C No-Stretch Mode 342 * @{ 343 */ 344 #define FMPI2C_NOSTRETCH_DISABLE (0x00000000U) 345 #define FMPI2C_NOSTRETCH_ENABLE FMPI2C_CR1_NOSTRETCH 346 /** 347 * @} 348 */ 349 350 /** @defgroup FMPI2C_MEMORY_ADDRESS_SIZE FMPI2C Memory Address Size 351 * @{ 352 */ 353 #define FMPI2C_MEMADD_SIZE_8BIT (0x00000001U) 354 #define FMPI2C_MEMADD_SIZE_16BIT (0x00000002U) 355 /** 356 * @} 357 */ 358 359 /** @defgroup FMPI2C_XFERDIRECTION FMPI2C Transfer Direction Master Point of View 360 * @{ 361 */ 362 #define FMPI2C_DIRECTION_TRANSMIT (0x00000000U) 363 #define FMPI2C_DIRECTION_RECEIVE (0x00000001U) 364 /** 365 * @} 366 */ 367 368 /** @defgroup FMPI2C_RELOAD_END_MODE FMPI2C Reload End Mode 369 * @{ 370 */ 371 #define FMPI2C_RELOAD_MODE FMPI2C_CR2_RELOAD 372 #define FMPI2C_AUTOEND_MODE FMPI2C_CR2_AUTOEND 373 #define FMPI2C_SOFTEND_MODE (0x00000000U) 374 /** 375 * @} 376 */ 377 378 /** @defgroup FMPI2C_START_STOP_MODE FMPI2C Start or Stop Mode 379 * @{ 380 */ 381 #define FMPI2C_NO_STARTSTOP (0x00000000U) 382 #define FMPI2C_GENERATE_STOP (uint32_t)(0x80000000U | FMPI2C_CR2_STOP) 383 #define FMPI2C_GENERATE_START_READ (uint32_t)(0x80000000U | FMPI2C_CR2_START | FMPI2C_CR2_RD_WRN) 384 #define FMPI2C_GENERATE_START_WRITE (uint32_t)(0x80000000U | FMPI2C_CR2_START) 385 /** 386 * @} 387 */ 388 389 /** @defgroup FMPI2C_Interrupt_configuration_definition FMPI2C Interrupt configuration definition 390 * @brief FMPI2C Interrupt definition 391 * Elements values convention: 0xXXXXXXXX 392 * - XXXXXXXX : Interrupt control mask 393 * @{ 394 */ 395 #define FMPI2C_IT_ERRI FMPI2C_CR1_ERRIE 396 #define FMPI2C_IT_TCI FMPI2C_CR1_TCIE 397 #define FMPI2C_IT_STOPI FMPI2C_CR1_STOPIE 398 #define FMPI2C_IT_NACKI FMPI2C_CR1_NACKIE 399 #define FMPI2C_IT_ADDRI FMPI2C_CR1_ADDRIE 400 #define FMPI2C_IT_RXI FMPI2C_CR1_RXIE 401 #define FMPI2C_IT_TXI FMPI2C_CR1_TXIE 402 /** 403 * @} 404 */ 405 406 /** @defgroup FMPI2C_Flag_definition FMPI2C Flag definition 407 * @{ 408 */ 409 #define FMPI2C_FLAG_TXE FMPI2C_ISR_TXE 410 #define FMPI2C_FLAG_TXIS FMPI2C_ISR_TXIS 411 #define FMPI2C_FLAG_RXNE FMPI2C_ISR_RXNE 412 #define FMPI2C_FLAG_ADDR FMPI2C_ISR_ADDR 413 #define FMPI2C_FLAG_AF FMPI2C_ISR_NACKF 414 #define FMPI2C_FLAG_STOPF FMPI2C_ISR_STOPF 415 #define FMPI2C_FLAG_TC FMPI2C_ISR_TC 416 #define FMPI2C_FLAG_TCR FMPI2C_ISR_TCR 417 #define FMPI2C_FLAG_BERR FMPI2C_ISR_BERR 418 #define FMPI2C_FLAG_ARLO FMPI2C_ISR_ARLO 419 #define FMPI2C_FLAG_OVR FMPI2C_ISR_OVR 420 #define FMPI2C_FLAG_PECERR FMPI2C_ISR_PECERR 421 #define FMPI2C_FLAG_TIMEOUT FMPI2C_ISR_TIMEOUT 422 #define FMPI2C_FLAG_ALERT FMPI2C_ISR_ALERT 423 #define FMPI2C_FLAG_BUSY FMPI2C_ISR_BUSY 424 #define FMPI2C_FLAG_DIR FMPI2C_ISR_DIR 425 /** 426 * @} 427 */ 428 429 /** 430 * @} 431 */ 432 433 /* Exported macros -----------------------------------------------------------*/ 434 435 /** @defgroup FMPI2C_Exported_Macros FMPI2C Exported Macros 436 * @{ 437 */ 438 439 /** @brief Reset FMPI2C handle state. 440 * @param __HANDLE__ specifies the FMPI2C Handle. 441 * @retval None 442 */ 443 #if (USE_HAL_FMPI2C_REGISTER_CALLBACKS == 1) 444 #define __HAL_FMPI2C_RESET_HANDLE_STATE(__HANDLE__) do{ \ 445 (__HANDLE__)->State = HAL_FMPI2C_STATE_RESET; \ 446 (__HANDLE__)->MspInitCallback = NULL; \ 447 (__HANDLE__)->MspDeInitCallback = NULL; \ 448 } while(0) 449 #else 450 #define __HAL_FMPI2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_FMPI2C_STATE_RESET) 451 #endif 452 453 /** @brief Enable the specified FMPI2C interrupt. 454 * @param __HANDLE__ specifies the FMPI2C Handle. 455 * @param __INTERRUPT__ specifies the interrupt source to enable. 456 * This parameter can be one of the following values: 457 * @arg @ref FMPI2C_IT_ERRI Errors interrupt enable 458 * @arg @ref FMPI2C_IT_TCI Transfer complete interrupt enable 459 * @arg @ref FMPI2C_IT_STOPI STOP detection interrupt enable 460 * @arg @ref FMPI2C_IT_NACKI NACK received interrupt enable 461 * @arg @ref FMPI2C_IT_ADDRI Address match interrupt enable 462 * @arg @ref FMPI2C_IT_RXI RX interrupt enable 463 * @arg @ref FMPI2C_IT_TXI TX interrupt enable 464 * 465 * @retval None 466 */ 467 #define __HAL_FMPI2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__)) 468 469 /** @brief Disable the specified FMPI2C interrupt. 470 * @param __HANDLE__ specifies the FMPI2C Handle. 471 * @param __INTERRUPT__ specifies the interrupt source to disable. 472 * This parameter can be one of the following values: 473 * @arg @ref FMPI2C_IT_ERRI Errors interrupt enable 474 * @arg @ref FMPI2C_IT_TCI Transfer complete interrupt enable 475 * @arg @ref FMPI2C_IT_STOPI STOP detection interrupt enable 476 * @arg @ref FMPI2C_IT_NACKI NACK received interrupt enable 477 * @arg @ref FMPI2C_IT_ADDRI Address match interrupt enable 478 * @arg @ref FMPI2C_IT_RXI RX interrupt enable 479 * @arg @ref FMPI2C_IT_TXI TX interrupt enable 480 * 481 * @retval None 482 */ 483 #define __HAL_FMPI2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__))) 484 485 /** @brief Check whether the specified FMPI2C interrupt source is enabled or not. 486 * @param __HANDLE__ specifies the FMPI2C Handle. 487 * @param __INTERRUPT__ specifies the FMPI2C interrupt source to check. 488 * This parameter can be one of the following values: 489 * @arg @ref FMPI2C_IT_ERRI Errors interrupt enable 490 * @arg @ref FMPI2C_IT_TCI Transfer complete interrupt enable 491 * @arg @ref FMPI2C_IT_STOPI STOP detection interrupt enable 492 * @arg @ref FMPI2C_IT_NACKI NACK received interrupt enable 493 * @arg @ref FMPI2C_IT_ADDRI Address match interrupt enable 494 * @arg @ref FMPI2C_IT_RXI RX interrupt enable 495 * @arg @ref FMPI2C_IT_TXI TX interrupt enable 496 * 497 * @retval The new state of __INTERRUPT__ (SET or RESET). 498 */ 499 #define __HAL_FMPI2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 500 501 /** @brief Check whether the specified FMPI2C flag is set or not. 502 * @param __HANDLE__ specifies the FMPI2C Handle. 503 * @param __FLAG__ specifies the flag to check. 504 * This parameter can be one of the following values: 505 * @arg @ref FMPI2C_FLAG_TXE Transmit data register empty 506 * @arg @ref FMPI2C_FLAG_TXIS Transmit interrupt status 507 * @arg @ref FMPI2C_FLAG_RXNE Receive data register not empty 508 * @arg @ref FMPI2C_FLAG_ADDR Address matched (slave mode) 509 * @arg @ref FMPI2C_FLAG_AF Acknowledge failure received flag 510 * @arg @ref FMPI2C_FLAG_STOPF STOP detection flag 511 * @arg @ref FMPI2C_FLAG_TC Transfer complete (master mode) 512 * @arg @ref FMPI2C_FLAG_TCR Transfer complete reload 513 * @arg @ref FMPI2C_FLAG_BERR Bus error 514 * @arg @ref FMPI2C_FLAG_ARLO Arbitration lost 515 * @arg @ref FMPI2C_FLAG_OVR Overrun/Underrun 516 * @arg @ref FMPI2C_FLAG_PECERR PEC error in reception 517 * @arg @ref FMPI2C_FLAG_TIMEOUT Timeout or Tlow detection flag 518 * @arg @ref FMPI2C_FLAG_ALERT SMBus alert 519 * @arg @ref FMPI2C_FLAG_BUSY Bus busy 520 * @arg @ref FMPI2C_FLAG_DIR Transfer direction (slave mode) 521 * 522 * @retval The new state of __FLAG__ (SET or RESET). 523 */ 524 #define FMPI2C_FLAG_MASK (0x0001FFFFU) 525 #define __HAL_FMPI2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) ? SET : RESET) 526 527 /** @brief Clear the FMPI2C pending flags which are cleared by writing 1 in a specific bit. 528 * @param __HANDLE__ specifies the FMPI2C Handle. 529 * @param __FLAG__ specifies the flag to clear. 530 * This parameter can be any combination of the following values: 531 * @arg @ref FMPI2C_FLAG_TXE Transmit data register empty 532 * @arg @ref FMPI2C_FLAG_ADDR Address matched (slave mode) 533 * @arg @ref FMPI2C_FLAG_AF Acknowledge failure received flag 534 * @arg @ref FMPI2C_FLAG_STOPF STOP detection flag 535 * @arg @ref FMPI2C_FLAG_BERR Bus error 536 * @arg @ref FMPI2C_FLAG_ARLO Arbitration lost 537 * @arg @ref FMPI2C_FLAG_OVR Overrun/Underrun 538 * @arg @ref FMPI2C_FLAG_PECERR PEC error in reception 539 * @arg @ref FMPI2C_FLAG_TIMEOUT Timeout or Tlow detection flag 540 * @arg @ref FMPI2C_FLAG_ALERT SMBus alert 541 * 542 * @retval None 543 */ 544 #define __HAL_FMPI2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == FMPI2C_FLAG_TXE) ? ((__HANDLE__)->Instance->ISR |= (__FLAG__)) \ 545 : ((__HANDLE__)->Instance->ICR = (__FLAG__))) 546 547 /** @brief Enable the specified FMPI2C peripheral. 548 * @param __HANDLE__ specifies the FMPI2C Handle. 549 * @retval None 550 */ 551 #define __HAL_FMPI2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, FMPI2C_CR1_PE)) 552 553 /** @brief Disable the specified FMPI2C peripheral. 554 * @param __HANDLE__ specifies the FMPI2C Handle. 555 * @retval None 556 */ 557 #define __HAL_FMPI2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, FMPI2C_CR1_PE)) 558 559 /** @brief Generate a Non-Acknowledge FMPI2C peripheral in Slave mode. 560 * @param __HANDLE__ specifies the FMPI2C Handle. 561 * @retval None 562 */ 563 #define __HAL_FMPI2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, FMPI2C_CR2_NACK)) 564 /** 565 * @} 566 */ 567 568 /* Include FMPI2C HAL Extended module */ 569 #include "stm32f4xx_hal_fmpi2c_ex.h" 570 571 /* Exported functions --------------------------------------------------------*/ 572 /** @addtogroup FMPI2C_Exported_Functions 573 * @{ 574 */ 575 576 /** @addtogroup FMPI2C_Exported_Functions_Group1 Initialization and de-initialization functions 577 * @{ 578 */ 579 /* Initialization and de-initialization functions******************************/ 580 HAL_StatusTypeDef HAL_FMPI2C_Init(FMPI2C_HandleTypeDef *hfmpi2c); 581 HAL_StatusTypeDef HAL_FMPI2C_DeInit(FMPI2C_HandleTypeDef *hfmpi2c); 582 void HAL_FMPI2C_MspInit(FMPI2C_HandleTypeDef *hfmpi2c); 583 void HAL_FMPI2C_MspDeInit(FMPI2C_HandleTypeDef *hfmpi2c); 584 585 /* Callbacks Register/UnRegister functions ***********************************/ 586 #if (USE_HAL_FMPI2C_REGISTER_CALLBACKS == 1) 587 HAL_StatusTypeDef HAL_FMPI2C_RegisterCallback(FMPI2C_HandleTypeDef *hfmpi2c, HAL_FMPI2C_CallbackIDTypeDef CallbackID, pFMPI2C_CallbackTypeDef pCallback); 588 HAL_StatusTypeDef HAL_FMPI2C_UnRegisterCallback(FMPI2C_HandleTypeDef *hfmpi2c, HAL_FMPI2C_CallbackIDTypeDef CallbackID); 589 590 HAL_StatusTypeDef HAL_FMPI2C_RegisterAddrCallback(FMPI2C_HandleTypeDef *hfmpi2c, pFMPI2C_AddrCallbackTypeDef pCallback); 591 HAL_StatusTypeDef HAL_FMPI2C_UnRegisterAddrCallback(FMPI2C_HandleTypeDef *hfmpi2c); 592 #endif /* USE_HAL_FMPI2C_REGISTER_CALLBACKS */ 593 /** 594 * @} 595 */ 596 597 /** @addtogroup FMPI2C_Exported_Functions_Group2 Input and Output operation functions 598 * @{ 599 */ 600 /* IO operation functions ****************************************************/ 601 /******* Blocking mode: Polling */ 602 HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); 603 HAL_StatusTypeDef HAL_FMPI2C_Master_Receive(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); 604 HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); 605 HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); 606 HAL_StatusTypeDef HAL_FMPI2C_Mem_Write(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); 607 HAL_StatusTypeDef HAL_FMPI2C_Mem_Read(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); 608 HAL_StatusTypeDef HAL_FMPI2C_IsDeviceReady(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout); 609 610 /******* Non-Blocking mode: Interrupt */ 611 HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); 612 HAL_StatusTypeDef HAL_FMPI2C_Master_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); 613 HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size); 614 HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size); 615 HAL_StatusTypeDef HAL_FMPI2C_Mem_Write_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 616 HAL_StatusTypeDef HAL_FMPI2C_Mem_Read_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 617 618 HAL_StatusTypeDef HAL_FMPI2C_Master_Seq_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 619 HAL_StatusTypeDef HAL_FMPI2C_Master_Seq_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 620 HAL_StatusTypeDef HAL_FMPI2C_Slave_Seq_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 621 HAL_StatusTypeDef HAL_FMPI2C_Slave_Seq_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 622 HAL_StatusTypeDef HAL_FMPI2C_EnableListen_IT(FMPI2C_HandleTypeDef *hfmpi2c); 623 HAL_StatusTypeDef HAL_FMPI2C_DisableListen_IT(FMPI2C_HandleTypeDef *hfmpi2c); 624 HAL_StatusTypeDef HAL_FMPI2C_Master_Abort_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress); 625 626 /******* Non-Blocking mode: DMA */ 627 HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); 628 HAL_StatusTypeDef HAL_FMPI2C_Master_Receive_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); 629 HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size); 630 HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size); 631 HAL_StatusTypeDef HAL_FMPI2C_Mem_Write_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 632 HAL_StatusTypeDef HAL_FMPI2C_Mem_Read_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 633 634 HAL_StatusTypeDef HAL_FMPI2C_Master_Seq_Transmit_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 635 HAL_StatusTypeDef HAL_FMPI2C_Master_Seq_Receive_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 636 HAL_StatusTypeDef HAL_FMPI2C_Slave_Seq_Transmit_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 637 HAL_StatusTypeDef HAL_FMPI2C_Slave_Seq_Receive_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 638 /** 639 * @} 640 */ 641 642 /** @addtogroup FMPI2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks 643 * @{ 644 */ 645 /******* FMPI2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ 646 void HAL_FMPI2C_EV_IRQHandler(FMPI2C_HandleTypeDef *hfmpi2c); 647 void HAL_FMPI2C_ER_IRQHandler(FMPI2C_HandleTypeDef *hfmpi2c); 648 void HAL_FMPI2C_MasterTxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c); 649 void HAL_FMPI2C_MasterRxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c); 650 void HAL_FMPI2C_SlaveTxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c); 651 void HAL_FMPI2C_SlaveRxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c); 652 void HAL_FMPI2C_AddrCallback(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); 653 void HAL_FMPI2C_ListenCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c); 654 void HAL_FMPI2C_MemTxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c); 655 void HAL_FMPI2C_MemRxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c); 656 void HAL_FMPI2C_ErrorCallback(FMPI2C_HandleTypeDef *hfmpi2c); 657 void HAL_FMPI2C_AbortCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c); 658 /** 659 * @} 660 */ 661 662 /** @addtogroup FMPI2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions 663 * @{ 664 */ 665 /* Peripheral State, Mode and Error functions *********************************/ 666 HAL_FMPI2C_StateTypeDef HAL_FMPI2C_GetState(FMPI2C_HandleTypeDef *hfmpi2c); 667 HAL_FMPI2C_ModeTypeDef HAL_FMPI2C_GetMode(FMPI2C_HandleTypeDef *hfmpi2c); 668 uint32_t HAL_FMPI2C_GetError(FMPI2C_HandleTypeDef *hfmpi2c); 669 670 /** 671 * @} 672 */ 673 674 /** 675 * @} 676 */ 677 678 /* Private constants ---------------------------------------------------------*/ 679 /** @defgroup FMPI2C_Private_Constants FMPI2C Private Constants 680 * @{ 681 */ 682 683 /** 684 * @} 685 */ 686 687 /* Private macros ------------------------------------------------------------*/ 688 /** @defgroup FMPI2C_Private_Macro FMPI2C Private Macros 689 * @{ 690 */ 691 692 #define IS_FMPI2C_ADDRESSING_MODE(MODE) (((MODE) == FMPI2C_ADDRESSINGMODE_7BIT) || \ 693 ((MODE) == FMPI2C_ADDRESSINGMODE_10BIT)) 694 695 #define IS_FMPI2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == FMPI2C_DUALADDRESS_DISABLE) || \ 696 ((ADDRESS) == FMPI2C_DUALADDRESS_ENABLE)) 697 698 #define IS_FMPI2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == FMPI2C_OA2_NOMASK) || \ 699 ((MASK) == FMPI2C_OA2_MASK01) || \ 700 ((MASK) == FMPI2C_OA2_MASK02) || \ 701 ((MASK) == FMPI2C_OA2_MASK03) || \ 702 ((MASK) == FMPI2C_OA2_MASK04) || \ 703 ((MASK) == FMPI2C_OA2_MASK05) || \ 704 ((MASK) == FMPI2C_OA2_MASK06) || \ 705 ((MASK) == FMPI2C_OA2_MASK07)) 706 707 #define IS_FMPI2C_GENERAL_CALL(CALL) (((CALL) == FMPI2C_GENERALCALL_DISABLE) || \ 708 ((CALL) == FMPI2C_GENERALCALL_ENABLE)) 709 710 #define IS_FMPI2C_NO_STRETCH(STRETCH) (((STRETCH) == FMPI2C_NOSTRETCH_DISABLE) || \ 711 ((STRETCH) == FMPI2C_NOSTRETCH_ENABLE)) 712 713 #define IS_FMPI2C_MEMADD_SIZE(SIZE) (((SIZE) == FMPI2C_MEMADD_SIZE_8BIT) || \ 714 ((SIZE) == FMPI2C_MEMADD_SIZE_16BIT)) 715 716 #define IS_TRANSFER_MODE(MODE) (((MODE) == FMPI2C_RELOAD_MODE) || \ 717 ((MODE) == FMPI2C_AUTOEND_MODE) || \ 718 ((MODE) == FMPI2C_SOFTEND_MODE)) 719 720 #define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == FMPI2C_GENERATE_STOP) || \ 721 ((REQUEST) == FMPI2C_GENERATE_START_READ) || \ 722 ((REQUEST) == FMPI2C_GENERATE_START_WRITE) || \ 723 ((REQUEST) == FMPI2C_NO_STARTSTOP)) 724 725 #define IS_FMPI2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == FMPI2C_FIRST_FRAME) || \ 726 ((REQUEST) == FMPI2C_FIRST_AND_NEXT_FRAME) || \ 727 ((REQUEST) == FMPI2C_NEXT_FRAME) || \ 728 ((REQUEST) == FMPI2C_FIRST_AND_LAST_FRAME) || \ 729 ((REQUEST) == FMPI2C_LAST_FRAME) || \ 730 ((REQUEST) == FMPI2C_LAST_FRAME_NO_STOP) || \ 731 IS_FMPI2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST)) 732 733 #define IS_FMPI2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == FMPI2C_OTHER_FRAME) || \ 734 ((REQUEST) == FMPI2C_OTHER_AND_LAST_FRAME)) 735 736 #define FMPI2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(FMPI2C_CR2_SADD | FMPI2C_CR2_HEAD10R | FMPI2C_CR2_NBYTES | FMPI2C_CR2_RELOAD | FMPI2C_CR2_RD_WRN))) 737 738 #define FMPI2C_GET_ADDR_MATCH(__HANDLE__) ((uint16_t)(((__HANDLE__)->Instance->ISR & FMPI2C_ISR_ADDCODE) >> 16U)) 739 #define FMPI2C_GET_DIR(__HANDLE__) ((uint8_t)(((__HANDLE__)->Instance->ISR & FMPI2C_ISR_DIR) >> 16U)) 740 #define FMPI2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & FMPI2C_CR2_AUTOEND) 741 #define FMPI2C_GET_OWN_ADDRESS1(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR1 & FMPI2C_OAR1_OA1)) 742 #define FMPI2C_GET_OWN_ADDRESS2(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR2 & FMPI2C_OAR2_OA2)) 743 744 #define IS_FMPI2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU) 745 #define IS_FMPI2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU) 746 747 #define FMPI2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00U))) >> 8U))) 748 #define FMPI2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU)))) 749 750 #define FMPI2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == FMPI2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (FMPI2C_CR2_SADD)) | (FMPI2C_CR2_START) | (FMPI2C_CR2_AUTOEND)) & (~FMPI2C_CR2_RD_WRN)) : \ 751 (uint32_t)((((uint32_t)(__ADDRESS__) & (FMPI2C_CR2_SADD)) | (FMPI2C_CR2_ADD10) | (FMPI2C_CR2_START)) & (~FMPI2C_CR2_RD_WRN))) 752 753 #define FMPI2C_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & FMPI2C_FLAG_MASK)) == ((__FLAG__) & FMPI2C_FLAG_MASK)) ? SET : RESET) 754 #define FMPI2C_CHECK_IT_SOURCE(__CR1__, __IT__) ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET) 755 /** 756 * @} 757 */ 758 759 /* Private Functions ---------------------------------------------------------*/ 760 /** @defgroup FMPI2C_Private_Functions FMPI2C Private Functions 761 * @{ 762 */ 763 /* Private functions are defined in stm32f4xx_hal_fmpi2c.c file */ 764 /** 765 * @} 766 */ 767 768 /** 769 * @} 770 */ 771 772 /** 773 * @} 774 */ 775 776 #endif /* FMPI2C_CR1_PE */ 777 #ifdef __cplusplus 778 } 779 #endif 780 781 782 #endif /* STM32F4xx_HAL_FMPI2C_H */ 783 784 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 785