xref: /aosp_15_r20/external/mesa3d/src/gallium/drivers/nouveau/nv30/nv30_fragtex.c (revision 6104692788411f58d303aa86923a9ff6ecaded22)
1 /*
2  * Copyright 2012 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs
23  *
24  */
25 
26 #include "util/u_inlines.h"
27 
28 #include "nv_object.xml.h"
29 #include "nv30/nv30-40_3d.xml.h"
30 #include "nv30/nv30_context.h"
31 #include "nv30/nv30_format.h"
32 #include "nv30/nv30_winsys.h"
33 
34 void
nv30_fragtex_validate(struct nv30_context * nv30)35 nv30_fragtex_validate(struct nv30_context *nv30)
36 {
37    struct pipe_screen *pscreen = &nv30->screen->base.base;
38    struct nouveau_object *eng3d = nv30->screen->eng3d;
39    struct nouveau_pushbuf *push = nv30->base.pushbuf;
40    unsigned dirty = nv30->fragprog.dirty_samplers;
41 
42    while (dirty) {
43       unsigned unit = ffs(dirty) - 1;
44       struct nv30_sampler_view *sv = (void *)nv30->fragprog.textures[unit];
45       struct nv30_sampler_state *ss = nv30->fragprog.samplers[unit];
46 
47       PUSH_RESET(push, BUFCTX_FRAGTEX(unit));
48 
49       if (ss && sv) {
50          const struct nv30_texfmt *fmt = nv30_texfmt(pscreen, sv->pipe.format);
51          struct pipe_resource *pt = sv->pipe.texture;
52          struct nv30_miptree *mt = nv30_miptree(pt);
53          unsigned min_lod, max_lod;
54          u32 filter = sv->filt | (ss->filt & sv->filt_mask);
55          u32 format = sv->fmt | ss->fmt;
56          u32 enable = ss->en;
57 
58          /* handle base_level when not using a mip filter, min/max level
59           * is unfortunately ignored by the hardware otherwise
60           */
61          if (ss->pipe.min_mip_filter == PIPE_TEX_MIPFILTER_NONE) {
62             if (sv->base_lod)
63                filter += 0x00020000; /* N/L -> NMN/LMN */
64             max_lod = sv->base_lod;
65             min_lod = sv->base_lod;
66          } else {
67             max_lod = MIN2(ss->max_lod + sv->base_lod, sv->high_lod);
68             min_lod = MIN2(ss->min_lod + sv->base_lod, max_lod);
69          }
70 
71          if (eng3d->oclass >= NV40_3D_CLASS) {
72             /* this is a tad stupid of the hardware, but there's no non-rcomp
73              * z16/z24 texture formats to be had, we have to suffer and lose
74              * some precision to handle this case.
75              */
76             if (ss->pipe.compare_mode != PIPE_TEX_COMPARE_R_TO_TEXTURE) {
77                if (fmt->nv40 == NV40_3D_TEX_FORMAT_FORMAT_Z16)
78                   format |= NV40_3D_TEX_FORMAT_FORMAT_A8L8;
79                else
80                if (fmt->nv40 == NV40_3D_TEX_FORMAT_FORMAT_Z24)
81                   format |= NV40_3D_TEX_FORMAT_FORMAT_A16L16;
82                else
83                   format |= fmt->nv40;
84             } else {
85                format |= fmt->nv40;
86             }
87 
88             enable |= (min_lod << 19) | (max_lod << 7);
89             enable |= NV40_3D_TEX_ENABLE_ENABLE;
90 
91             BEGIN_NV04(push, NV40_3D(TEX_SIZE1(unit)), 1);
92             PUSH_DATA (push, sv->npot_size1);
93          } else {
94             /* this is a tad stupid of the hardware, but there's no non-rcomp
95              * z16/z24 texture formats to be had, we have to suffer and lose
96              * some precision to handle this case.
97              */
98             if (ss->pipe.compare_mode != PIPE_TEX_COMPARE_R_TO_TEXTURE) {
99                if (fmt->nv30 == NV30_3D_TEX_FORMAT_FORMAT_Z16) {
100                   if (!ss->pipe.unnormalized_coords)
101                      format |= NV30_3D_TEX_FORMAT_FORMAT_A8L8;
102                   else
103                      format |= NV30_3D_TEX_FORMAT_FORMAT_A8L8_RECT;
104                } else
105                if (fmt->nv30 == NV30_3D_TEX_FORMAT_FORMAT_Z24) {
106                   if (!ss->pipe.unnormalized_coords)
107                      format |= NV30_3D_TEX_FORMAT_FORMAT_HILO16;
108                   else
109                      format |= NV30_3D_TEX_FORMAT_FORMAT_HILO16_RECT;
110                } else {
111                   if (!ss->pipe.unnormalized_coords)
112                      format |= fmt->nv30;
113                   else
114                      format |= fmt->nv30_rect;
115                }
116             } else {
117                if (!ss->pipe.unnormalized_coords)
118                   format |= fmt->nv30;
119                else
120                   format |= fmt->nv30_rect;
121             }
122 
123             enable |= NV30_3D_TEX_ENABLE_ENABLE;
124             enable |= (min_lod << 18) | (max_lod << 6);
125          }
126 
127          BEGIN_NV04(push, NV30_3D(TEX_OFFSET(unit)), 8);
128          PUSH_MTHDl(push, NV30_3D(TEX_OFFSET(unit)), BUFCTX_FRAGTEX(unit),
129                           mt->base.bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
130          PUSH_MTHDs(push, NV30_3D(TEX_FORMAT(unit)), BUFCTX_FRAGTEX(unit),
131                           mt->base.bo, format, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD,
132                           NV30_3D_TEX_FORMAT_DMA0,
133                           NV30_3D_TEX_FORMAT_DMA1);
134          PUSH_DATA (push, sv->wrap | (ss->wrap & sv->wrap_mask));
135          PUSH_DATA (push, enable);
136          PUSH_DATA (push, sv->swz);
137          PUSH_DATA (push, filter);
138          PUSH_DATA (push, sv->npot_size0);
139          PUSH_DATA (push, ss->bcol);
140          BEGIN_NV04(push, NV30_3D(TEX_FILTER_OPTIMIZATION(unit)), 1);
141          PUSH_DATA (push, nv30->config.filter);
142       } else {
143          BEGIN_NV04(push, NV30_3D(TEX_ENABLE(unit)), 1);
144          PUSH_DATA (push, 0);
145       }
146 
147       dirty &= ~(1 << unit);
148    }
149 
150    nv30->fragprog.dirty_samplers = 0;
151 }
152 
153 void
nv30_fragtex_sampler_states_bind(struct pipe_context * pipe,unsigned nr,void ** hwcso)154 nv30_fragtex_sampler_states_bind(struct pipe_context *pipe,
155                                  unsigned nr, void **hwcso)
156 {
157    struct nv30_context *nv30 = nv30_context(pipe);
158    unsigned i;
159 
160    for (i = 0; i < nr; i++) {
161       nv30->fragprog.samplers[i] = hwcso[i];
162       nv30->fragprog.dirty_samplers |= (1 << i);
163    }
164 
165    for (; i < nv30->fragprog.num_samplers; i++) {
166       nv30->fragprog.samplers[i] = NULL;
167       nv30->fragprog.dirty_samplers |= (1 << i);
168    }
169 
170    nv30->fragprog.num_samplers = nr;
171    nv30->dirty |= NV30_NEW_FRAGTEX;
172 }
173 
174 
175 void
nv30_fragtex_set_sampler_views(struct pipe_context * pipe,unsigned nr,bool take_ownership,struct pipe_sampler_view ** views)176 nv30_fragtex_set_sampler_views(struct pipe_context *pipe, unsigned nr,
177                                bool take_ownership,
178                                struct pipe_sampler_view **views)
179 {
180    struct nv30_context *nv30 = nv30_context(pipe);
181    unsigned i;
182 
183    for (i = 0; i < nr; i++) {
184       nouveau_bufctx_reset(nv30->bufctx, BUFCTX_FRAGTEX(i));
185       if (take_ownership) {
186          pipe_sampler_view_reference(&nv30->fragprog.textures[i], NULL);
187          nv30->fragprog.textures[i] = views[i];
188       } else {
189          pipe_sampler_view_reference(&nv30->fragprog.textures[i], views[i]);
190       }
191       nv30->fragprog.dirty_samplers |= (1 << i);
192    }
193 
194    for (; i < nv30->fragprog.num_textures; i++) {
195       nouveau_bufctx_reset(nv30->bufctx, BUFCTX_FRAGTEX(i));
196       pipe_sampler_view_reference(&nv30->fragprog.textures[i], NULL);
197       nv30->fragprog.dirty_samplers |= (1 << i);
198    }
199 
200    nv30->fragprog.num_textures = nr;
201    nv30->dirty |= NV30_NEW_FRAGTEX;
202 }
203 
204 
205 static void
nv30_set_sampler_views(struct pipe_context * pipe,enum pipe_shader_type shader,unsigned start,unsigned nr,unsigned unbind_num_trailing_slots,bool take_ownership,struct pipe_sampler_view ** views)206 nv30_set_sampler_views(struct pipe_context *pipe, enum pipe_shader_type shader,
207                        unsigned start, unsigned nr,
208                        unsigned unbind_num_trailing_slots,
209                        bool take_ownership,
210                        struct pipe_sampler_view **views)
211 {
212    assert(start == 0);
213    switch (shader) {
214    case PIPE_SHADER_FRAGMENT:
215       nv30_fragtex_set_sampler_views(pipe, nr, take_ownership, views);
216       break;
217    case PIPE_SHADER_VERTEX:
218       nv40_verttex_set_sampler_views(pipe, nr, take_ownership, views);
219       break;
220    default:
221       ;
222    }
223 }
224 
225 
226 void
nv30_fragtex_init(struct pipe_context * pipe)227 nv30_fragtex_init(struct pipe_context *pipe)
228 {
229    pipe->set_sampler_views = nv30_set_sampler_views;
230 }
231