xref: /btstack/port/renesas-tb-s1ja-cc256x/template/btstack_example/synergy/ssp/inc/driver/instances/r_sci_uart.h (revision 3b5c872a8c45689e8cc17891f01530f5aa5e911c)
1 /***********************************************************************************************************************
2  * Copyright [2015-2017] Renesas Electronics Corporation and/or its licensors. All Rights Reserved.
3  *
4  * This file is part of Renesas SynergyTM Software Package (SSP)
5  *
6  * The contents of this file (the "contents") are proprietary and confidential to Renesas Electronics Corporation
7  * and/or its licensors ("Renesas") and subject to statutory and contractual protections.
8  *
9  * This file is subject to a Renesas SSP license agreement. Unless otherwise agreed in an SSP license agreement with
10  * Renesas: 1) you may not use, copy, modify, distribute, display, or perform the contents; 2) you may not use any name
11  * or mark of Renesas for advertising or publicity purposes or in connection with your use of the contents; 3) RENESAS
12  * MAKES NO WARRANTY OR REPRESENTATIONS ABOUT THE SUITABILITY OF THE CONTENTS FOR ANY PURPOSE; THE CONTENTS ARE PROVIDED
13  * "AS IS" WITHOUT ANY EXPRESS OR IMPLIED WARRANTY, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
14  * PARTICULAR PURPOSE, AND NON-INFRINGEMENT; AND 4) RENESAS SHALL NOT BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, OR
15  * CONSEQUENTIAL DAMAGES, INCLUDING DAMAGES RESULTING FROM LOSS OF USE, DATA, OR PROJECTS, WHETHER IN AN ACTION OF
16  * CONTRACT OR TORT, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THE CONTENTS. Third-party contents
17  * included in this file may be subject to different terms.
18  **********************************************************************************************************************/
19 
20 /**********************************************************************************************************************
21  * File Name    : r_sci_uart.h
22  * Description  : UART on SCI HAL module public header file
23  **********************************************************************************************************************/
24 
25 #ifndef R_SCI_UART_H
26 #define R_SCI_UART_H
27 
28 /*******************************************************************************************************************//**
29  * @ingroup HAL_Library
30  * @defgroup UARTonSCI UART on SCI
31  * @brief Driver for the UART on SCI.
32  *
33  * @section UARTonSCI_SUMMARY Summary
34  * This module supports the UART on SCI. It implements the UART interface and drives SCI as a full-duplex UART
35  * communication port. This module can drive all SCI channels as UART ports.
36  *
37  * Extends @ref UART_API.
38  *
39  * @note This module can use either the 16-stage hardware FIFO or a DTC transfer implementation to write multiple bytes.
40  * @{
41  **********************************************************************************************************************/
42 
43 /***********************************************************************************************************************
44  * Includes
45  **********************************************************************************************************************/
46 #include "bsp_api.h"
47 #include "r_uart_api.h"
48 #include "r_sci_uart_cfg.h"
49 #include "r_ioport_api.h"
50 
51 /* Common macro for SSP header files. There is also a corresponding SSP_FOOTER macro at the end of this file. */
52 SSP_HEADER
53 
54 /***********************************************************************************************************************
55  * Macro definitions
56  **********************************************************************************************************************/
57 #define SCI_UART_CODE_VERSION_MAJOR (1U)
58 #define SCI_UART_CODE_VERSION_MINOR (11U)
59 
60 /**********************************************************************************************************************
61  * Typedef definitions
62  **********************************************************************************************************************/
63 
64 /** UART instance control block. */
65 typedef struct st_sci_uart_instance_ctrl
66 {
67     /* Parameters to control UART peripheral device */
68     uint8_t  channel;                     ///< Channel number
69     uint8_t  fifo_depth;                  ///< FIFO depth of the UART channel
70     uint8_t  rx_transfer_in_progress;     ///< Set to 1 if a receive transfer is in progress, 0 otherwise
71     uint8_t  data_bytes          :2;      ///< 1 byte for 7 or 8 bit data, 2 bytes for 9 bit data
72     uint8_t  bitrate_modulation  :1;      ///< 1 if bit rate modulation is enabled, 0 otherwise
73     uint32_t open;                        ///< Used to determine if the channel is configured
74 
75     /** Optional transfer instance used to send or receive multiple bytes without interrupts. */
76     transfer_instance_t const * p_transfer_rx;
77 
78     /** Optional transfer instance used to send or receive multiple bytes without interrupts. */
79     transfer_instance_t const * p_transfer_tx;
80 
81     /** Source buffer pointer used to fill hardware FIFO from transmit ISR. */
82     uint8_t const * p_tx_src;
83 
84     /** Size of source buffer pointer used to fill hardware FIFO from transmit ISR. */
85     uint32_t tx_src_bytes;
86 
87     IRQn_Type rxi_irq;                ///< Receive IRQ number
88     IRQn_Type txi_irq;                ///< Transmit IRQ number
89     IRQn_Type tei_irq;                ///< Transmit end IRQ number
90     IRQn_Type eri_irq;                ///< Error IRQ number
91 
92     /* Parameters to process UART Event */
93     void (* p_callback)(uart_callback_args_t * p_args);       ///< Pointer to callback function
94     void const * p_context;                                   ///< Pointer to user interrupt context data
95     void       * p_reg;                                       ///< Base register for this channel
96     void (* p_extpin_ctrl)(uint32_t channel, uint32_t level); ///< External pin control
97     uint32_t baud_rate_error_x_1000;                          ///< Baud rate \<Maximum percent error\> x 1000. baud_rate_error must be greater than 0 and less than 15000
98     uint8_t  * p_rx_dst;                                      ///< Destination buffer initialized by read() API
99     uint32_t rx_dst_bytes;                                    ///< Number of bytes expected by the read() API
100     volatile uint32_t rx_bytes_count;                         ///< Number of bytes received since the last read()
101     uart_mode_t         uart_comm_mode;                       ///< UART communication mode selection
102     uart_rs485_type_t   uart_rs485_mode;                      ///< UART RS485 communication channel type selection
103     ioport_port_pin_t   rs485_de_pin;                         ///< UART Driver Enable pin
104 } sci_uart_instance_ctrl_t;
105 
106 /** Enumeration for SCI clock source */
107 typedef enum e_sci_clk_src
108 {
109     SCI_CLK_SRC_INT,        ///< Use internal clock for baud generation
110     SCI_CLK_SRC_EXT,        ///< Use external clock for baud generation
111     SCI_CLK_SRC_EXT8X,      ///< Use external clock 8x baud rate
112     SCI_CLK_SRC_EXT16X      ///< Use external clock 16x baud rate
113 } sci_clk_src_t;
114 
115 /** Receive FIFO trigger configuration. */
116 typedef enum e_sci_uart_rx_fifo_trigger
117 {
118     SCI_UART_RX_FIFO_TRIGGER_1   = 0x1,  ///< Callback after each byte is received without buffering
119     SCI_UART_RX_FIFO_TRIGGER_MAX = 0xF,  ///< Callback when FIFO is full or after 15 bit times with no data (fewer interrupts)
120 } sci_uart_rx_fifo_trigger_t;
121 
122 /** UART on SCI device Configuration */
123 typedef struct st_uart_on_sci_cfg
124 {
125     sci_clk_src_t       clk_src;                            ///< Use SCI_CLK_SRC_INT/EXT8X/EXT16X
126     bool                baudclk_out;                        ///< Baud rate clock output enable
127     bool                rx_edge_start;                      ///< Start reception on falling edge
128     bool                noisecancel_en;                     ///< Noise cancel enable
129 
130     /** Receive FIFO trigger level, unused if channel has no FIFO or if DTC is used. */
131     sci_uart_rx_fifo_trigger_t  rx_fifo_trigger;
132 
133     /** Pointer to the user callback function to control external GPIO pin control used as RTS signal.
134      *
135      * @param[in] channel The UART channel used.
136      * @param[in] level   When level is 0, assert RTS.  When level is 1, deassert RTS.
137      */
138     void (* p_extpin_ctrl)(uint32_t channel, uint32_t level);
139 
140     bool                bitrate_modulation;                 ///< Bitrate Modulation Function enable or disable
141     uint32_t            baud_rate_error_x_1000;             ///< Baud rate \<Maximum percent error\> x 1000. baud_rate_error must be greater than 0 and less than 15000
142     uart_mode_t         uart_comm_mode;                     ///< UART communication mode selection
143     uart_rs485_type_t   uart_rs485_mode;                    ///< UART RS485 communication channel type selection
144     ioport_port_pin_t   rs485_de_pin;                       ///< UART Driver Enable pin
145 } uart_on_sci_cfg_t;
146 
147 /**********************************************************************************************************************
148  * Exported global variables
149  **********************************************************************************************************************/
150 /** @cond INC_HEADER_DEFS_SEC */
151 /** Filled in Interface API structure for this Instance. */
152 extern const uart_api_t g_uart_on_sci;
153 /** @endcond */
154 
155 /*******************************************************************************************************************//**
156  * @} (end defgroup UARTonSCI)
157  **********************************************************************************************************************/
158 
159 /* Common macro for SSP header files. There is also a corresponding SSP_HEADER macro at the top of this file. */
160 SSP_FOOTER
161 
162 #endif /* R_SCI_UART_H */
163