1 /* 2 * \file trc_pkt_decode_etmv4i.h 3 * \brief OpenCSD : ETMv4 instruction decoder 4 * 5 * \copyright Copyright (c) 2015, ARM Limited. All Rights Reserved. 6 */ 7 8 /* 9 * Redistribution and use in source and binary forms, with or without modification, 10 * are permitted provided that the following conditions are met: 11 * 12 * 1. Redistributions of source code must retain the above copyright notice, 13 * this list of conditions and the following disclaimer. 14 * 15 * 2. Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 19 * 3. Neither the name of the copyright holder nor the names of its contributors 20 * may be used to endorse or promote products derived from this software without 21 * specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 27 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 #ifndef ARM_TRC_PKT_DECODE_ETMV4I_H_INCLUDED 36 #define ARM_TRC_PKT_DECODE_ETMV4I_H_INCLUDED 37 38 #include "common/trc_pkt_decode_base.h" 39 #include "opencsd/etmv4/trc_pkt_elem_etmv4i.h" 40 #include "opencsd/etmv4/trc_cmp_cfg_etmv4.h" 41 #include "common/trc_gen_elem.h" 42 #include "common/trc_ret_stack.h" 43 #include "common/ocsd_gen_elem_stack.h" 44 #include "opencsd/etmv4/trc_etmv4_stack_elem.h" 45 46 #define OCSD_ENV_INSTR_RANGE_LIMIT "OPENCSD_INSTR_RANGE_LIMIT" 47 48 class TrcStackElem; 49 class TrcStackElemParam; 50 class TrcStackElemCtxt; 51 52 class TrcPktDecodeEtmV4I : public TrcPktDecodeBase<EtmV4ITrcPacket, EtmV4Config> 53 { 54 public: 55 TrcPktDecodeEtmV4I(); 56 TrcPktDecodeEtmV4I(int instIDNum); 57 virtual ~TrcPktDecodeEtmV4I(); 58 59 protected: 60 /* implementation packet decoding interface */ 61 virtual ocsd_datapath_resp_t processPacket(); 62 virtual ocsd_datapath_resp_t onEOT(); 63 virtual ocsd_datapath_resp_t onReset(); 64 virtual ocsd_datapath_resp_t onFlush(); 65 virtual ocsd_err_t onProtocolConfig(); getCoreSightTraceID()66 virtual const uint8_t getCoreSightTraceID() { return m_CSID; }; 67 68 /* local decode methods */ 69 void initDecoder(); // initial state on creation (zeros all config) 70 void resetDecoder(); // reset state to start of decode. (moves state, retains config) 71 virtual void onFirstInitOK(); // override to set init related info. 72 73 ocsd_err_t decodePacket(); // decode packet into trace elements. return true to indicate decode complete - can change FSM to commit state - return is false. 74 ocsd_datapath_resp_t resolveElements(); // commit/cancel trace elements generated from latest / prior packets & send to output - may get wait response, or flag completion. 75 ocsd_err_t commitElements(); // commit elements - process element stack to generate output packets. 76 ocsd_err_t commitElemOnEOT(); 77 ocsd_err_t cancelElements(); // cancel elements. These not output 78 ocsd_err_t mispredictAtom(); // mispredict an atom 79 ocsd_err_t discardElements(); // discard elements and flush 80 81 void doTraceInfoPacket(); 82 void updateContext(TrcStackElemCtxt *pCtxtElem, OcsdTraceElement &elem); 83 84 // process atom will create instruction trace, or no memory access trace output elements. 85 ocsd_err_t processAtom(const ocsd_atm_val atom); 86 87 // process an exception element - output instruction trace + exception generic type. 88 ocsd_err_t processException(); 89 90 // process Q element 91 ocsd_err_t processQElement(); 92 93 // process a source address element 94 ocsd_err_t processSourceAddress(); 95 96 // process an element that cannot be cancelled / discarded 97 ocsd_err_t processTS_CC_EventElem(TrcStackElem *pElem); 98 99 // process marker elements 100 ocsd_err_t processMarkerElem(TrcStackElem *pElem); 101 102 // process a transaction element 103 ocsd_err_t processTransElem(TrcStackElem *pElem); 104 105 // process an Instrumentation element 106 ocsd_err_t processITEElem(TrcStackElem *pElem); 107 108 // process a bad packet 109 ocsd_err_t handleBadPacket(const char *reason, ocsd_trc_index_t index = OCSD_BAD_TRC_INDEX); 110 111 // sequencing error on packet processing - optionally continue 112 ocsd_err_t handlePacketSeqErr(ocsd_err_t err, ocsd_trc_index_t index, const char *reason); 113 114 // inconsistent image for decode - optionally reset and continue 115 ocsd_err_t handleBadImageError(ocsd_trc_index_t index, const char* reason); 116 117 // common packet error routine 118 ocsd_err_t handlePacketErr(ocsd_err_t err, ocsd_err_severity_t sev, ocsd_trc_index_t index, const char *reason, const unsync_info_t unsync_reason); 119 120 ocsd_err_t addElemCC(TrcStackElemParam *pParamElem); 121 ocsd_err_t addElemTS(TrcStackElemParam *pParamElem, bool withCC); 122 ocsd_err_t addElemEvent(TrcStackElemParam *pParamElem); 123 124 private: 125 void SetInstrInfoInAddrISA(const ocsd_vaddr_t addr_val, const uint8_t isa); calcISA(const bool SF,const uint8_t IS)126 const ocsd_isa calcISA(const bool SF, const uint8_t IS) const 127 { 128 if (SF) 129 return ocsd_isa_aarch64; 130 return (IS == 0) ? ocsd_isa_arm : ocsd_isa_thumb2; 131 } 132 typedef enum { 133 WP_NOT_FOUND, 134 WP_FOUND, 135 WP_NACC 136 } WP_res_t; 137 138 /* Optional run limit for decoded instruction range. 139 * Throw error if limit exceeded. Set by env var - use for debugging decode runs 140 * which may be running away due to bad data 141 */ 142 int m_num_instr_range_limit; 143 144 typedef struct { 145 ocsd_vaddr_t st_addr; 146 ocsd_vaddr_t en_addr; 147 uint32_t num_instr; 148 } instr_range_t; 149 150 //!< follow instructions from the current address to a WP. true if good, false if memory cannot be accessed. 151 ocsd_err_t traceInstrToWP(instr_range_t &instr_range, WP_res_t &WPRes, const bool traceToAddrNext = false, const ocsd_vaddr_t nextAddrMatch = 0); 152 WPFound(WP_res_t res)153 inline const bool WPFound(WP_res_t res) const { return (res == WP_FOUND); }; WPNacc(WP_res_t res)154 inline const bool WPNacc(WP_res_t res) const { return (res == WP_NACC); }; 155 156 ocsd_err_t returnStackPop(); // pop return stack and update instruction address. 157 158 void setElemTraceRange(OcsdTraceElement &elemIn, const instr_range_t &addr_range, const bool executed, ocsd_trc_index_t index); 159 void setElemTraceRangeInstr(OcsdTraceElement &elemIn, const instr_range_t &addr_range, 160 const bool executed, ocsd_trc_index_t index, ocsd_instr_info &instr); 161 162 // true if we are ETE configured. isETEConfig()163 inline bool isETEConfig() { 164 return (m_config->MajVersion() >= ETE_ARCH_VERSION); 165 } 166 167 ocsd_mem_space_acc_t getCurrMemSpace(); 168 169 //** intra packet state (see ETMv4 spec 6.2.1); 170 171 // timestamping 172 uint64_t m_timestamp; // last broadcast global Timestamp. 173 bool m_ete_first_ts_marker; 174 175 // state and context 176 uint32_t m_context_id; // most recent context ID 177 uint32_t m_vmid_id; // most recent VMID 178 bool m_is_secure; // true if Secure 179 bool m_is_64bit; // true if 64 bit 180 uint8_t m_last_IS; // last instruction set value from address packet. 181 182 // cycle counts 183 int m_cc_threshold; 184 185 // speculative trace 186 int m_curr_spec_depth; 187 int m_max_spec_depth; // nax depth - from ID reg, beyond which auto-commit occurs 188 int m_unseen_spec_elem; // speculative elements at decode start 189 190 /** Remove elements that are associated with data trace */ 191 #ifdef DATA_TRACE_SUPPORTED 192 // data trace associative elements (unsupported at present in the decoder). 193 int m_p0_key; 194 int m_p0_key_max; 195 196 // conditional non-branch trace - when data trace active (unsupported at present in the decoder) 197 int m_cond_c_key; 198 int m_cond_r_key; 199 int m_cond_key_max_incr; 200 #endif 201 202 uint8_t m_CSID; //!< Coresight trace ID for this decoder. 203 204 bool m_IASize64; //!< True if 64 bit instruction addresses supported. 205 206 //** Other processor state; 207 208 // trace decode FSM 209 typedef enum { 210 NO_SYNC, //!< pre start trace - init state or after reset or overflow, loss of sync. 211 WAIT_SYNC, //!< waiting for sync packet. 212 WAIT_TINFO, //!< waiting for trace info packet. 213 DECODE_PKTS, //!< processing packets - creating decode elements on stack 214 RESOLVE_ELEM, //!< analyze / resolve decode elements - create generic trace elements and pass on. 215 } processor_state_t; 216 217 processor_state_t m_curr_state; 218 unsync_info_t m_unsync_eot_info; //!< addition info when / why unsync / eot 219 220 //** P0 element stack 221 EtmV4P0Stack m_P0_stack; //!< P0 decode element stack 222 223 // element resolution 224 struct { 225 int P0_commit; //!< number of elements to commit 226 int P0_cancel; //!< elements to cancel 227 bool mispredict; //!< mispredict latest atom 228 bool discard; //!< discard elements 229 } m_elem_res; 230 231 //! true if any of the element resolution fields are non-zero isElemForRes()232 const bool isElemForRes() const { 233 return (m_elem_res.P0_commit || m_elem_res.P0_cancel || 234 m_elem_res.mispredict || m_elem_res.discard); 235 } 236 clearElemRes()237 void clearElemRes() { 238 m_elem_res.P0_commit = 0; 239 m_elem_res.P0_cancel = 0; 240 m_elem_res.mispredict = false; 241 m_elem_res.discard = false; 242 } 243 244 // packet decode state 245 bool m_need_ctxt; //!< need context to continue 246 bool m_need_addr; //!< need an address to continue 247 bool m_elem_pending_addr; //!< next address packet is needed for prev element. 248 249 ocsd_instr_info m_instr_info; //!< instruction info for code follower - in address is the next to be decoded. 250 251 etmv4_trace_info_t m_trace_info; //!< trace info for this trace run. 252 253 bool m_prev_overflow; 254 255 TrcAddrReturnStack m_return_stack; //!< the address return stack. 256 257 // range address check to look for possible incorrect input code memory images. 258 struct { 259 ocsd_vaddr_t next_st_addr; // expected address for next range 260 bool valid; 261 } m_next_range_check; 262 nextRangeCheckClear()263 void nextRangeCheckClear() { 264 m_next_range_check.valid = false; 265 }; 266 nextRangeCheckSet(const ocsd_vaddr_t addr)267 void nextRangeCheckSet(const ocsd_vaddr_t addr) { 268 m_next_range_check.valid = true; 269 m_next_range_check.next_st_addr = addr; 270 }; 271 nextRangeCheckOK(const ocsd_vaddr_t addr)272 bool nextRangeCheckOK(const ocsd_vaddr_t addr) { 273 if (m_next_range_check.valid) { 274 return (bool)(m_next_range_check.next_st_addr == addr); 275 } 276 // no check info - just return OK 277 return true; 278 }; 279 280 // consistency check flags 281 bool m_direct_br_chk; 282 bool m_strict_br_chk; 283 bool m_range_cont_chk; 284 285 //** output element handling 286 OcsdGenElemStack m_out_elem; //!< output element stack. outElem()287 OcsdTraceElement &outElem() { return m_out_elem.getCurrElem(); }; //!< current out element 288 }; 289 290 #endif // ARM_TRC_PKT_DECODE_ETMV4I_H_INCLUDED 291 292 /* End of File trc_pkt_decode_etmv4i.h */ 293