1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (C) 2020-2023 Loongson Technology Corporation Limited
4  */
5 
6 #ifndef __ASM_LOONGARCH_KVM_VCPU_H__
7 #define __ASM_LOONGARCH_KVM_VCPU_H__
8 
9 #include <linux/kvm_host.h>
10 #include <asm/loongarch.h>
11 
12 /* Controlled by 0x5 guest estat */
13 #define CPU_SIP0			(_ULCAST_(1))
14 #define CPU_SIP1			(_ULCAST_(1) << 1)
15 #define CPU_PMU				(_ULCAST_(1) << 10)
16 #define CPU_TIMER			(_ULCAST_(1) << 11)
17 #define CPU_IPI				(_ULCAST_(1) << 12)
18 
19 /* Controlled by 0x52 guest exception VIP aligned to estat bit 5~12 */
20 #define CPU_IP0				(_ULCAST_(1))
21 #define CPU_IP1				(_ULCAST_(1) << 1)
22 #define CPU_IP2				(_ULCAST_(1) << 2)
23 #define CPU_IP3				(_ULCAST_(1) << 3)
24 #define CPU_IP4				(_ULCAST_(1) << 4)
25 #define CPU_IP5				(_ULCAST_(1) << 5)
26 #define CPU_IP6				(_ULCAST_(1) << 6)
27 #define CPU_IP7				(_ULCAST_(1) << 7)
28 
29 #define MNSEC_PER_SEC			(NSEC_PER_SEC >> 20)
30 
31 /* KVM_IRQ_LINE irq field index values */
32 #define KVM_LOONGSON_IRQ_TYPE_SHIFT	24
33 #define KVM_LOONGSON_IRQ_TYPE_MASK	0xff
34 #define KVM_LOONGSON_IRQ_VCPU_SHIFT	16
35 #define KVM_LOONGSON_IRQ_VCPU_MASK	0xff
36 #define KVM_LOONGSON_IRQ_NUM_SHIFT	0
37 #define KVM_LOONGSON_IRQ_NUM_MASK	0xffff
38 
39 typedef union loongarch_instruction  larch_inst;
40 typedef int (*exit_handle_fn)(struct kvm_vcpu *);
41 
42 int  kvm_emu_mmio_read(struct kvm_vcpu *vcpu, larch_inst inst);
43 int  kvm_emu_mmio_write(struct kvm_vcpu *vcpu, larch_inst inst);
44 int  kvm_complete_mmio_read(struct kvm_vcpu *vcpu, struct kvm_run *run);
45 int  kvm_complete_iocsr_read(struct kvm_vcpu *vcpu, struct kvm_run *run);
46 int  kvm_complete_user_service(struct kvm_vcpu *vcpu, struct kvm_run *run);
47 int  kvm_emu_idle(struct kvm_vcpu *vcpu);
48 int  kvm_pending_timer(struct kvm_vcpu *vcpu);
49 int  kvm_handle_fault(struct kvm_vcpu *vcpu, int fault);
50 void kvm_deliver_intr(struct kvm_vcpu *vcpu);
51 void kvm_deliver_exception(struct kvm_vcpu *vcpu);
52 
53 void kvm_own_fpu(struct kvm_vcpu *vcpu);
54 void kvm_lose_fpu(struct kvm_vcpu *vcpu);
55 void kvm_save_fpu(struct loongarch_fpu *fpu);
56 void kvm_restore_fpu(struct loongarch_fpu *fpu);
57 void kvm_restore_fcsr(struct loongarch_fpu *fpu);
58 
59 #ifdef CONFIG_CPU_HAS_LSX
60 int kvm_own_lsx(struct kvm_vcpu *vcpu);
61 void kvm_save_lsx(struct loongarch_fpu *fpu);
62 void kvm_restore_lsx(struct loongarch_fpu *fpu);
63 #else
kvm_own_lsx(struct kvm_vcpu * vcpu)64 static inline int kvm_own_lsx(struct kvm_vcpu *vcpu) { return -EINVAL; }
kvm_save_lsx(struct loongarch_fpu * fpu)65 static inline void kvm_save_lsx(struct loongarch_fpu *fpu) { }
kvm_restore_lsx(struct loongarch_fpu * fpu)66 static inline void kvm_restore_lsx(struct loongarch_fpu *fpu) { }
67 #endif
68 
69 #ifdef CONFIG_CPU_HAS_LASX
70 int kvm_own_lasx(struct kvm_vcpu *vcpu);
71 void kvm_save_lasx(struct loongarch_fpu *fpu);
72 void kvm_restore_lasx(struct loongarch_fpu *fpu);
73 #else
kvm_own_lasx(struct kvm_vcpu * vcpu)74 static inline int kvm_own_lasx(struct kvm_vcpu *vcpu) { return -EINVAL; }
kvm_save_lasx(struct loongarch_fpu * fpu)75 static inline void kvm_save_lasx(struct loongarch_fpu *fpu) { }
kvm_restore_lasx(struct loongarch_fpu * fpu)76 static inline void kvm_restore_lasx(struct loongarch_fpu *fpu) { }
77 #endif
78 
79 #ifdef CONFIG_CPU_HAS_LBT
80 int kvm_own_lbt(struct kvm_vcpu *vcpu);
81 #else
kvm_own_lbt(struct kvm_vcpu * vcpu)82 static inline int kvm_own_lbt(struct kvm_vcpu *vcpu) { return -EINVAL; }
83 #endif
84 
85 void kvm_init_timer(struct kvm_vcpu *vcpu, unsigned long hz);
86 void kvm_save_timer(struct kvm_vcpu *vcpu);
87 void kvm_restore_timer(struct kvm_vcpu *vcpu);
88 
89 int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu, struct kvm_interrupt *irq);
90 struct kvm_vcpu *kvm_get_vcpu_by_cpuid(struct kvm *kvm, int cpuid);
91 
92 /*
93  * Loongarch KVM guest interrupt handling
94  */
kvm_queue_irq(struct kvm_vcpu * vcpu,unsigned int irq)95 static inline void kvm_queue_irq(struct kvm_vcpu *vcpu, unsigned int irq)
96 {
97 	set_bit(irq, &vcpu->arch.irq_pending);
98 	clear_bit(irq, &vcpu->arch.irq_clear);
99 }
100 
kvm_dequeue_irq(struct kvm_vcpu * vcpu,unsigned int irq)101 static inline void kvm_dequeue_irq(struct kvm_vcpu *vcpu, unsigned int irq)
102 {
103 	clear_bit(irq, &vcpu->arch.irq_pending);
104 	set_bit(irq, &vcpu->arch.irq_clear);
105 }
106 
kvm_queue_exception(struct kvm_vcpu * vcpu,unsigned int code,unsigned int subcode)107 static inline int kvm_queue_exception(struct kvm_vcpu *vcpu,
108 			unsigned int code, unsigned int subcode)
109 {
110 	/* only one exception can be injected */
111 	if (!vcpu->arch.exception_pending) {
112 		set_bit(code, &vcpu->arch.exception_pending);
113 		vcpu->arch.esubcode = subcode;
114 		return 0;
115 	} else
116 		return -1;
117 }
118 
kvm_read_reg(struct kvm_vcpu * vcpu,int num)119 static inline unsigned long kvm_read_reg(struct kvm_vcpu *vcpu, int num)
120 {
121 	return vcpu->arch.gprs[num];
122 }
123 
kvm_write_reg(struct kvm_vcpu * vcpu,int num,unsigned long val)124 static inline void kvm_write_reg(struct kvm_vcpu *vcpu, int num, unsigned long val)
125 {
126 	vcpu->arch.gprs[num] = val;
127 }
128 
kvm_pvtime_supported(void)129 static inline bool kvm_pvtime_supported(void)
130 {
131 	return !!sched_info_on();
132 }
133 
kvm_guest_has_pv_feature(struct kvm_vcpu * vcpu,unsigned int feature)134 static inline bool kvm_guest_has_pv_feature(struct kvm_vcpu *vcpu, unsigned int feature)
135 {
136 	return vcpu->kvm->arch.pv_features & BIT(feature);
137 }
138 
139 #endif /* __ASM_LOONGARCH_KVM_VCPU_H__ */
140