1 /*
2 * Copyright © 2018, VideoLAN and dav1d authors
3 * Copyright © 2023, Luca Barbato
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright notice, this
10 * list of conditions and the following disclaimer.
11 *
12 * 2. Redistributions in binary form must reproduce the above copyright notice,
13 * this list of conditions and the following disclaimer in the documentation
14 * and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
20 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
23 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
25 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 */
27
28 #include "src/cpu.h"
29 #include "src/itx.h"
30
31 decl_itx17_fns( 4, 4, pwr9);
32 decl_itx16_fns( 4, 8, pwr9);
33 decl_itx16_fns( 4, 16, pwr9);
34 decl_itx16_fns( 8, 4, pwr9);
35 decl_itx16_fns( 8, 8, pwr9);
36 decl_itx16_fns( 8, 16, pwr9);
37 decl_itx2_fns ( 8, 32, pwr9);
38 decl_itx16_fns(16, 4, pwr9);
39 decl_itx16_fns(16, 8, pwr9);
40 decl_itx12_fns(16, 16, pwr9);
41 decl_itx2_fns (16, 32, pwr9);
42 decl_itx2_fns (32, 8, pwr9);
43 decl_itx2_fns (32, 16, pwr9);
44 decl_itx2_fns (32, 32, pwr9);
45
46 decl_itx_fn(BF(dav1d_inv_txfm_add_dct_dct_16x64, pwr9));
47 decl_itx_fn(BF(dav1d_inv_txfm_add_dct_dct_32x64, pwr9));
48 decl_itx_fn(BF(dav1d_inv_txfm_add_dct_dct_64x16, pwr9));
49 decl_itx_fn(BF(dav1d_inv_txfm_add_dct_dct_64x32, pwr9));
50 decl_itx_fn(BF(dav1d_inv_txfm_add_dct_dct_64x64, pwr9));
51
itx_dsp_init_ppc(Dav1dInvTxfmDSPContext * const c,const int bpc)52 static ALWAYS_INLINE void itx_dsp_init_ppc(Dav1dInvTxfmDSPContext *const c, const int bpc) {
53 const unsigned flags = dav1d_get_cpu_flags();
54
55 if (!(flags & DAV1D_PPC_CPU_FLAG_PWR9)) return;
56
57 #if BITDEPTH == 8
58 assign_itx17_fn( , 4, 4, pwr9);
59 assign_itx16_fn(R, 4, 8, pwr9);
60 assign_itx16_fn(R, 8, 4, pwr9);
61 assign_itx16_fn(, 8, 8, pwr9);
62 assign_itx16_fn(R, 4, 16, pwr9);
63 assign_itx16_fn(R, 16, 4, pwr9);
64 #endif
65 }
66