1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2
3 #ifndef _CHIP_COMMON_H_
4 #define _CHIP_COMMON_H_
5
6 #include <device/device.h>
7 #include <soc/soc_util.h>
8
9 union xeon_domain_path {
10 unsigned int domain_path;
11 struct {
12 u8 bus;
13 u8 stack;
14 u8 socket;
15 u8 unused;
16 };
17 };
18
19 #define XEONSP_STACK_MAX UINT8_MAX
20 #define XEONSP_SOCKET_MAX UINT8_MAX
21 #define XEONSP_DEVICE_MAX UINT16_MAX
22 #define XEONSP_VENDOR_MAX UINT16_MAX
23
init_xeon_domain_path(struct device_path * path,int socket,int stack,int bus)24 static inline void init_xeon_domain_path(struct device_path *path, int socket,
25 int stack, int bus)
26 {
27 union xeon_domain_path dp = {
28 .socket = socket,
29 .stack = stack,
30 .bus = bus,
31 };
32 path->type = DEVICE_PATH_DOMAIN;
33 path->domain.domain = dp.domain_path;
34 };
35
36 /*
37 * Every STACK can have multiple PCI domains with an unique domain type.
38 * This is only of cosmetic nature and generates more readable ACPI code,
39 * but isn't technical necessary.
40 */
41 #define DOMAIN_TYPE_CPM0 "PM"
42 #define DOMAIN_TYPE_CPM1 "PN"
43 #define DOMAIN_TYPE_DINO "DI"
44 #define DOMAIN_TYPE_HQM0 "HQ"
45 #define DOMAIN_TYPE_HQM1 "HR"
46 #define DOMAIN_TYPE_PCIE "PC"
47 #define DOMAIN_TYPE_UBX0 "UC"
48 #define DOMAIN_TYPE_UBX1 "UD"
49 #define DOMAIN_TYPE_CXL "CX"
50
51 void attach_iio_stacks(void);
52
53 void create_ioat_domains(union xeon_domain_path path,
54 struct bus *bus,
55 const xSTACK_RES *sr,
56 const size_t pci_segment_group);
57
58 void create_xeonsp_domains(const union xeon_domain_path dp, struct bus *bus,
59 const xSTACK_RES *sr, const size_t pci_segment_group);
60
61 void create_domain(const union xeon_domain_path dp, struct bus *upstream,
62 int bus_base, int bus_limit, const char *type,
63 struct device_operations *ops, const size_t pci_segment_group);
64
65 struct device *dev_find_device_on_socket(uint8_t socket, u16 vendor, u16 device);
66 struct device *dev_find_all_devices_on_socket(uint8_t socket,
67 u16 vendor, u16 device, struct device *from);
68 struct device *dev_find_all_devices_on_stack(uint8_t socket, uint8_t stack,
69 u16 vendor, u16 device, struct device *from);
70 struct device *dev_find_all_devices_on_domain(struct device *domain,
71 u16 vendor, u16 device, struct device *from);
72
73 int iio_pci_domain_socket_from_dev(const struct device *dev);
74 int iio_pci_domain_stack_from_dev(const struct device *dev);
75
76 bool is_pcie_domain(const struct device *dev);
77 bool is_ioat_domain(const struct device *dev);
78 bool is_ubox_domain(const struct device *dev);
79 bool is_cxl_domain(const struct device *dev);
80
81 #define is_dev_on_pcie_domain(dev) is_pcie_domain(dev_get_domain(dev))
82 #define is_dev_on_ioat_domain(dev) is_ioat_domain(dev_get_domain(dev))
83 #define is_dev_on_ubox_domain(dev) is_ubox_domain(dev_get_domain(dev))
84 #define is_dev_on_cxl_domain(dev) is_cxl_domain(dev_get_domain(dev))
85
86 #define is_domain0(dev) (dev && dev->path.type == DEVICE_PATH_DOMAIN &&\
87 dev->path.domain.domain == 0)
88 #define is_dev_on_domain0(dev) (is_domain0(dev_get_domain(dev)))
89 #define is_stack0(socket, stack) (socket == 0 && stack == IioStack0)
90
91 void unlock_pam_regions(void);
92
93 size_t vtd_probe_bar_size(struct device *dev);
94
95 void soc_pci_domain_fill_ssdt(const struct device *domain);
96
97 #endif /* _CHIP_COMMON_H_ */
98