1 /***********************************************************************************************************************
2 * Copyright [2020-2022] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved.
3 *
4 * This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products
5 * of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are
6 * sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use
7 * of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property
8 * right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas
9 * reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION
10 * IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT
11 * PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES
12 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR
13 * DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM
14 * EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION
15 * (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING,
16 * WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS,
17 * OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY
18 * OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS.
19 **********************************************************************************************************************/
20
21 /***********************************************************************************************************************
22 * Includes <System Includes> , "Project Includes"
23 **********************************************************************************************************************/
24 #include "bsp_api.h"
25
26 /** ELC event definitions. */
27
28 /***********************************************************************************************************************
29 * Macro definitions
30 **********************************************************************************************************************/
31 #define BSP_IRQ_UINT32_MAX (0xFFFFFFFFU)
32 #define BSP_PRV_BITS_PER_WORD (32)
33
34 /***********************************************************************************************************************
35 * Typedef definitions
36 **********************************************************************************************************************/
37
38 /***********************************************************************************************************************
39 * Exported global variables (to be accessed by other files)
40 **********************************************************************************************************************/
41
42 /* This table is used to store the context in the ISR. */
43 void * gp_renesas_isr_context[BSP_ICU_VECTOR_MAX_ENTRIES];
44
45 /***********************************************************************************************************************
46 * Private global variables and functions
47 **********************************************************************************************************************/
48 const bsp_interrupt_event_t g_interrupt_event_link_select[BSP_ICU_VECTOR_MAX_ENTRIES] BSP_WEAK_REFERENCE =
49 {
50 (bsp_interrupt_event_t) 0
51 };
52
53 /*******************************************************************************************************************//**
54 * @addtogroup BSP_MCU
55 *
56 * @{
57 **********************************************************************************************************************/
58
59 /** @} (end addtogroup BSP_MCU) */
60
61 /*******************************************************************************************************************//**
62 * Using the vector table information section that has been built by the linker and placed into ROM in the
63 * .vector_info. section, this function will initialize the ICU so that configured ELC events will trigger interrupts
64 * in the NVIC.
65 *
66 **********************************************************************************************************************/
bsp_irq_cfg(void)67 void bsp_irq_cfg (void)
68 {
69 #if FSP_PRIV_TZ_USE_SECURE_REGS
70
71 /* Unprotect security registers. */
72 R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_SAR);
73
74 #if !BSP_TZ_SECURE_BUILD
75
76 /* Set the DMAC channels to secure access. */
77 R_CPSCU->ICUSARC = ~R_CPSCU_ICUSARC_SADMACn_Msk;
78 #endif
79
80 /* Place all vectors in non-secure state unless they are used in the secure project. */
81 uint32_t interrupt_security_state[BSP_ICU_VECTOR_MAX_ENTRIES / BSP_PRV_BITS_PER_WORD];
82 memset(&interrupt_security_state, UINT8_MAX, sizeof(interrupt_security_state));
83
84 for (uint32_t i = 0U; i < BSP_ICU_VECTOR_MAX_ENTRIES; i++)
85 {
86 if (0U != g_interrupt_event_link_select[i])
87 {
88 /* This is a secure vector. Clear the associated bit. */
89 uint32_t index = i / BSP_PRV_BITS_PER_WORD;
90 uint32_t bit = i % BSP_PRV_BITS_PER_WORD;
91 interrupt_security_state[index] &= ~(1U << bit);
92 }
93 }
94
95 /* The Secure Attribute managed within the ARM CPU NVIC must match the security attribution of IELSEn
96 * (Reference section 13.2.9 in the RA6M4 manual R01UH0890EJ0050). */
97 uint32_t volatile * p_icusarg = &R_CPSCU->ICUSARG;
98 for (uint32_t i = 0U; i < BSP_ICU_VECTOR_MAX_ENTRIES / BSP_PRV_BITS_PER_WORD; i++)
99 {
100 p_icusarg[i] = interrupt_security_state[i];
101 NVIC->ITNS[i] = interrupt_security_state[i];
102 }
103
104 /* Protect security registers. */
105 R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_SAR);
106 #endif
107
108 for (uint32_t i = 0U; i < BSP_ICU_VECTOR_MAX_ENTRIES; i++)
109 {
110 R_ICU->IELSR[i] = (uint32_t) g_interrupt_event_link_select[i];
111 }
112 }
113