1 /* SPDX-License-Identifier: GPL-2.0-only */
2
3 #include <assert.h>
4 #include <device/device.h>
5 #include <device/pci.h>
6 #include <hob_cxlnode.h>
7 #include <intelblocks/cpulib.h>
8 #include <soc/msr.h>
9 #include <soc/numa.h>
10 #include <soc/pci_devs.h>
11 #include <soc/soc_util.h>
12 #include <soc/util.h>
13 #include <pc80/mc146818rtc.h>
14
get_ewl_hob(void)15 const EWL_PRIVATE_DATA *get_ewl_hob(void)
16 {
17 size_t hob_size;
18 static const EWL_PRIVATE_DATA *hob;
19 const uint8_t ewl_id_hob_guid[16] = FSP_HOB_EWLID_GUID;
20
21 if (hob != NULL)
22 return hob;
23
24 hob = fsp_find_extension_hob_by_guid(ewl_id_hob_guid, &hob_size);
25 assert(hob != NULL && hob_size != 0);
26 return hob;
27 }
28
get_system_info_hob(void)29 const SYSTEM_INFO_VAR *get_system_info_hob(void)
30 {
31 size_t hob_size;
32 static const SYSTEM_INFO_VAR *hob;
33 const uint8_t system_info_hob_guid[16] = FSP_HOB_SYSTEMINFO_GUID;
34
35 if (hob != NULL)
36 return hob;
37
38 hob = fsp_find_extension_hob_by_guid(system_info_hob_guid, &hob_size);
39 assert(hob != NULL && hob_size != 0);
40 return hob;
41 }
42
get_system_memory_map(void)43 const struct SystemMemoryMapHob *get_system_memory_map(void)
44 {
45 size_t hob_size;
46 const uint8_t mem_hob_guid[16] = FSP_SYSTEM_MEMORYMAP_HOB_GUID;
47 const struct SystemMemoryMapHob **memmap_addr;
48
49 memmap_addr = (const struct SystemMemoryMapHob **)fsp_find_extension_hob_by_guid(
50 mem_hob_guid, &hob_size);
51 /* hob_size is the size of the 8-byte address not the hob data */
52 assert(memmap_addr != NULL && hob_size != 0);
53 /* assert the pointer to the hob is not NULL */
54 assert(*memmap_addr != NULL);
55
56 return *memmap_addr;
57 }
58
get_system_memory_map_elment(uint8_t * num)59 const struct SystemMemoryMapElement *get_system_memory_map_elment(uint8_t *num)
60 {
61 const struct SystemMemoryMapHob *hob = get_system_memory_map();
62 if (!hob)
63 return NULL;
64
65 *num = hob->numberEntries;
66 return hob->Element;
67 }
68
is_pcie_iio_stack_res(const STACK_RES * res)69 bool is_pcie_iio_stack_res(const STACK_RES *res)
70 {
71 return res->Personality == TYPE_UBOX_IIO;
72 }
73
is_ubox_stack_res(const STACK_RES * res)74 bool is_ubox_stack_res(const STACK_RES *res)
75 {
76 return res->Personality == TYPE_UBOX;
77 }
78
is_ioat_iio_stack_res(const STACK_RES * res)79 bool is_ioat_iio_stack_res(const STACK_RES *res)
80 {
81 return res->Personality == TYPE_DINO;
82 }
83
84 /*
85 * Given a stack resource, figure out whether the corresponding stack has
86 * CXL device.
87 * It goes through pds (proximity domains) structure to see if there is any
88 * generic initiator has device with bus # falls between bus base and
89 * bus limit.
90 */
is_iio_cxl_stack_res(const STACK_RES * res)91 bool is_iio_cxl_stack_res(const STACK_RES *res)
92 {
93 /* pds should be setup ahead of this call */
94 assert(pds.num_pds);
95
96 for (uint8_t i = 0; i < pds.num_pds; i++) {
97 if (pds.pds[i].pd_type != PD_TYPE_GENERIC_INITIATOR)
98 continue;
99
100 uint32_t bus = PCI_BDF(pds.pds[i].dev) >> 20;
101 if (bus >= res->BusBase && bus <= res->BusLimit)
102 return true;
103 }
104
105 return false;
106 }
107
get_cxl_node(void)108 const CXL_NODE_SOCKET *get_cxl_node(void)
109 {
110 size_t hob_size;
111 static const CXL_NODE_SOCKET *hob;
112 static bool hob_check = 0;
113 const uint8_t fsp_hob_cxl_node_socket_guid[16] = FSP_HOB_CXLNODE_GUID;
114
115 if (hob_check == 1)
116 return hob;
117
118 hob = fsp_find_extension_hob_by_guid(fsp_hob_cxl_node_socket_guid, &hob_size);
119 hob_check = 1;
120 if (hob == NULL || hob_size == 0)
121 printk(BIOS_DEBUG,
122 "FSP_HOB_CXLNODE_GUID not found: CXL may not be installed\n");
123 return hob;
124 }
125
get_cxl_node_count(void)126 uint8_t get_cxl_node_count(void)
127 {
128 const CXL_NODE_SOCKET *hob = get_cxl_node();
129 uint8_t count = 0;
130
131 if (hob != NULL) {
132 for (uint8_t skt_id = 0; skt_id < MAX_SOCKET; skt_id++)
133 count += hob[skt_id].CxlNodeCount;
134 }
135
136 return count;
137 }
138
139 /* Returns the UBOX(offset) bus number for socket0 */
socket0_get_ubox_busno(uint8_t offset)140 uint8_t socket0_get_ubox_busno(uint8_t offset)
141 {
142 const IIO_UDS *hob = get_iio_uds();
143
144 for (int stack = 0; stack < MAX_LOGIC_IIO_STACK; ++stack) {
145 if (hob->PlatformData.IIO_resource[0].StackRes[stack].Personality
146 == TYPE_UBOX)
147 return (hob->PlatformData.IIO_resource[0].StackRes[stack].BusBase
148 + offset);
149 }
150 die("Unable to locate UBOX BUS NO");
151 }
152
bios_done_msr(void * unused)153 void bios_done_msr(void *unused)
154 {
155 msr_t msr = rdmsr(MSR_BIOS_DONE);
156 if (!(msr.lo & XEON_SP_ENABLE_IA_UNTRUSTED)) { /* if already locked skip update */
157 msr.lo |= XEON_SP_ENABLE_IA_UNTRUSTED;
158 wrmsr(MSR_BIOS_DONE, msr);
159 }
160 }
161
soc_set_mrc_cold_boot_flag(bool cold_boot_required)162 void soc_set_mrc_cold_boot_flag(bool cold_boot_required)
163 {
164 uint8_t mrc_status = cmos_read(CMOS_OFFSET_MRC_STATUS);
165 uint8_t new_mrc_status = (mrc_status & 0xfe) | cold_boot_required;
166 printk(BIOS_SPEW, "MRC status: 0x%02x want 0x%02x\n", mrc_status, new_mrc_status);
167 if (new_mrc_status != mrc_status)
168 cmos_write(new_mrc_status, CMOS_OFFSET_MRC_STATUS);
169 }
170
is_memtype_reserved(uint16_t mem_type)171 bool is_memtype_reserved(uint16_t mem_type)
172 {
173 return !!(mem_type & MEM_TYPE_RESERVED);
174 }
175
is_memtype_non_volatile(uint16_t mem_type)176 bool is_memtype_non_volatile(uint16_t mem_type)
177 {
178 return !(mem_type & MEMTYPE_VOLATILE_MASK);
179 }
180
is_memtype_processor_attached(uint16_t mem_type)181 bool is_memtype_processor_attached(uint16_t mem_type)
182 {
183 /*
184 * Refer to the definition of MEM_TYPE enum type in
185 * vendorcode/intel/fsp/fsp2_0/sapphirerapids_sp/MemoryMapDataHob.h,
186 * values less than MemTypeCxlAccVolatileMem represents
187 * processor attached memory
188 */
189 return (mem_type < MemTypeCxlAccVolatileMem);
190 }
191