xref: /XiangShan/src/main/scala/xiangshan/backend/fu/FuType.scala (revision c7ffa892dc502e85da0e05e55bee9e6664cfc62b)
1package xiangshan.backend.fu
2
3import chisel3._
4import chisel3.util.BitPat
5import utils.EnumUtils.OHEnumeration
6import org.chipsalliance.cde.config.Parameters
7import xiangshan.XSCoreParamsKey
8
9import scala.language.implicitConversions
10
11object FuType extends OHEnumeration {
12  class OHType(i: Int, name: String) extends super.OHVal(i: Int, name: String)
13
14  def OHType(i: Int, name: String): OHType = new OHType(i, name)
15
16  implicit class fromOHValToLiteral(x: OHType) {
17    def U: UInt = x.ohid.U
18    def U(width: Width): UInt = x.ohid.U(width)
19  }
20
21  private var initVal = 0
22
23  private def addType(name: String): OHType = {
24    val ohval = OHType(initVal, name)
25    initVal += 1
26    ohval
27  }
28
29  // int
30  val jmp = addType(name = "jmp")
31  val brh = addType(name = "brh")
32  val i2f = addType(name = "i2f")
33  val i2v = addType(name = "i2v")
34  val f2v = addType(name = "f2v")
35  val csr = addType(name = "csr")
36  val alu = addType(name = "alu")
37  val mul = addType(name = "mul")
38  val div = addType(name = "div")
39  val fence = addType(name = "fence")
40  val bku = addType(name = "bku")
41
42  // fp
43  val falu = addType(name = "falu")
44  val fmac = addType(name = "fmac")
45  val fcvt = addType(name = "fcvt")
46  val fDivSqrt = addType(name = "fDivSqrt")
47
48  // ls
49  val ldu = addType(name = "ldu")
50  val stu = addType(name = "stu")
51  val mou = addType(name = "mou")
52
53  // vec
54  val vipu = addType(name = "vipu")
55  val vialuF = addType(name = "vialuF")
56  val vppu = addType(name = "vppu")
57  val vimac = addType(name = "vimac")
58  val vidiv = addType(name = "vidiv")
59  val vfpu = addType(name = "vfpu") // will be deleted
60  val vfalu = addType(name = "vfalu")
61  val vfma = addType(name = "vfma")
62  val vfdiv = addType(name = "vfdiv")
63  val vfcvt = addType(name = "vfcvt")
64  val vsetiwi = addType(name = "vsetiwi") // vset read rs write rd
65  val vsetiwf = addType(name = "vsetiwf") // vset read rs write vconfig
66  val vsetfwf = addType(name = "vsetfwf") // vset read old vl write vconfig
67
68  // vec ls
69  val vldu = addType(name = "vldu")
70  val vstu = addType(name = "vstu")
71  val vsegldu = addType(name = "vsegldu")
72  val vsegstu = addType(name = "vsegstu")
73
74  val intArithAll = Seq(jmp, brh, i2f, i2v, csr, alu, mul, div, fence, bku)
75  // dq0 includes int's iq0 and iq1
76  // dq1 includes int's iq2 and iq3
77  def dq0OHTypeSeq(implicit p: Parameters): Seq[Seq[OHType]] = {
78    val intIQParams = p(XSCoreParamsKey).backendParams.intSchdParams.get.issueBlockParams
79    val dq0IQNums = intIQParams.size / 2
80    val iqParams = intIQParams.take(dq0IQNums)
81    val exuParams = iqParams.map(_.exuBlockParams).flatten
82    exuParams.map(_.fuConfigs.map(_.fuType))
83  }
84  def dq1OHTypeSeq(implicit p: Parameters): Seq[Seq[OHType]] = {
85    val intIQParams = p(XSCoreParamsKey).backendParams.intSchdParams.get.issueBlockParams
86    val dq0IQNums = intIQParams.size / 2
87    val iqParams = intIQParams.slice(dq0IQNums,intIQParams.size)
88    val exuParams = iqParams.map(_.exuBlockParams).flatten
89    exuParams.map(_.fuConfigs.map(_.fuType))
90  }
91  def intDq0All(implicit p: Parameters): Seq[OHType] = {
92    dq0OHTypeSeq.flatten.distinct
93  }
94  def intDq0Deq0(implicit p: Parameters): Seq[OHType] = {
95    val fuTypes = dq0OHTypeSeq(p)(0) ++ dq0OHTypeSeq(p)(2)
96    fuTypes.distinct
97  }
98  def intDq0Deq1(implicit p: Parameters): Seq[OHType] = {
99    val fuTypes = dq0OHTypeSeq(p)(1) ++ dq0OHTypeSeq(p)(3)
100    fuTypes.distinct
101  }
102  def intDq1All(implicit p: Parameters): Seq[OHType] = {
103    dq1OHTypeSeq.flatten.distinct
104  }
105  def intDq1Deq0(implicit p: Parameters): Seq[OHType] = {
106    val fuTypes = dq1OHTypeSeq(p)(0) ++ dq1OHTypeSeq(p)(2)
107    fuTypes.distinct
108  }
109  def intDq1Deq1(implicit p: Parameters): Seq[OHType] = {
110    val fuTypes = dq1OHTypeSeq(p)(1) ++ dq1OHTypeSeq(p)(3)
111    fuTypes.distinct
112  }
113  def intBothDeq0(implicit p: Parameters): Seq[OHType] = {
114    val fuTypes = dq0OHTypeSeq(p)(0).intersect(dq0OHTypeSeq(p)(2)).intersect(dq1OHTypeSeq(p)(0)).intersect(dq1OHTypeSeq(p)(2))
115    fuTypes.distinct
116  }
117  def intBothDeq1(implicit p: Parameters): Seq[OHType] = {
118    val fuTypes = dq0OHTypeSeq(p)(1).intersect(dq0OHTypeSeq(p)(3)).intersect(dq1OHTypeSeq(p)(1)).intersect(dq1OHTypeSeq(p)(3))
119    fuTypes.distinct
120  }
121  def is0latency(fuType: UInt): Bool = {
122    val fuTypes = FuConfig.allConfigs.filter(_.latency == CertainLatency(0)).map(_.fuType)
123    FuTypeOrR(fuType, fuTypes)
124  }
125  val fpArithAll = Seq(falu, fcvt, fmac, fDivSqrt, f2v)
126  val scalaMemAll = Seq(ldu, stu, mou)
127  val vecOPI = Seq(vipu, vialuF, vppu, vimac, vidiv)
128  val vecOPF = Seq(vfpu, vfalu, vfma, vfdiv, vfcvt)
129  val vecVSET = Seq(vsetiwi, vsetiwf, vsetfwf)
130  val vecArith = vecOPI ++ vecOPF
131  val vecMem = Seq(vldu, vstu, vsegldu, vsegstu)
132  val vecArithOrMem = vecArith ++ vecMem
133  val vecAll = vecVSET ++ vecArithOrMem
134  val fpOP = fpArithAll ++ Seq(i2f, i2v)
135  val scalaNeedFrm = Seq(i2f, fmac, fDivSqrt)
136  val vectorNeedFrm = Seq(vfalu, vfma, vfdiv, vfcvt)
137
138  def X = BitPat.N(num) // Todo: Don't Care
139
140  def num = this.values.size
141
142  def width = num
143
144  def apply() = UInt(num.W)
145
146  def isInt(fuType: UInt): Bool = FuTypeOrR(fuType, intArithAll) || FuTypeOrR(fuType, vsetiwi, vsetiwf)
147  def isIntDq0(fuType: UInt)(implicit p: Parameters): Bool = FuTypeOrR(fuType, intDq0All)
148  def isIntDq1(fuType: UInt)(implicit p: Parameters): Bool = FuTypeOrR(fuType, intDq1All)
149  def isIntDq0Deq0(fuType: UInt)(implicit p: Parameters): Bool = FuTypeOrR(fuType, intDq0Deq0)
150  def isIntDq0Deq1(fuType: UInt)(implicit p: Parameters): Bool = FuTypeOrR(fuType, intDq0Deq1)
151  def isIntDq1Deq0(fuType: UInt)(implicit p: Parameters): Bool = FuTypeOrR(fuType, intDq1Deq0)
152  def isIntDq1Deq1(fuType: UInt)(implicit p: Parameters): Bool = FuTypeOrR(fuType, intDq1Deq1)
153  def isBothDeq0(fuType: UInt)(implicit p: Parameters): Bool = FuTypeOrR(fuType, intBothDeq0)
154  def isBothDeq1(fuType: UInt)(implicit p: Parameters): Bool = FuTypeOrR(fuType, intBothDeq1)
155  def isAlu(fuType: UInt): Bool = FuTypeOrR(fuType, Seq(alu))
156  def isBrh(fuType: UInt): Bool = FuTypeOrR(fuType, Seq(brh))
157
158  def isVset(fuType: UInt): Bool = FuTypeOrR(fuType, vecVSET)
159
160  def isJump(fuType: UInt): Bool = FuTypeOrR(fuType, jmp)
161
162  def isFArith(fuType: UInt): Bool = FuTypeOrR(fuType, fpArithAll)
163
164  def isMem(fuType: UInt): Bool = FuTypeOrR(fuType, scalaMemAll)
165
166  def isLoadStore(fuType: UInt): Bool = FuTypeOrR(fuType, ldu, stu)
167
168  def isLoad(fuType: UInt): Bool = FuTypeOrR(fuType, ldu)
169
170  def isStore(fuType: UInt): Bool = FuTypeOrR(fuType, stu)
171
172  def isAMO(fuType: UInt): Bool = FuTypeOrR(fuType, mou)
173
174  def isFence(fuType: UInt): Bool = FuTypeOrR(fuType, fence)
175
176  def isCsr(fuType: UInt): Bool = FuTypeOrR(fuType, csr)
177
178  def isVsetRvfWvf(fuType: UInt): Bool = FuTypeOrR(fuType, vsetfwf)
179
180  def isVArith(fuType: UInt): Bool = FuTypeOrR(fuType, vecArith)
181
182  def isVls(fuType: UInt): Bool = FuTypeOrR(fuType, vldu, vstu, vsegldu, vsegstu)
183
184  def isVnonsegls(fuType: UInt): Bool = FuTypeOrR(fuType, vldu, vstu)
185
186  def isVsegls(futype: UInt): Bool = FuTypeOrR(futype, vsegldu, vsegstu)
187
188  def isVLoad(fuType: UInt): Bool = FuTypeOrR(fuType, vldu, vsegldu)
189
190  def isVStore(fuType: UInt): Bool = FuTypeOrR(fuType, vstu, vsegstu)
191
192  def isVSegLoad(fuType: UInt): Bool = FuTypeOrR(fuType, vsegldu)
193
194  def isVSegStore(fuType: UInt): Bool = FuTypeOrR(fuType, vsegstu)
195
196  def isVNonsegLoad(fuType: UInt): Bool = FuTypeOrR(fuType, vldu)
197
198  def isVNonsegStore(fuType: UInt): Bool = FuTypeOrR(fuType, vstu)
199
200  def isVecOPF(fuType: UInt): Bool = FuTypeOrR(fuType, vecOPF)
201
202  def isVArithMem(fuType: UInt): Bool = FuTypeOrR(fuType, vecArithOrMem) // except vset
203
204  def isDivSqrt(fuType: UInt): Bool = FuTypeOrR(fuType, div, fDivSqrt)
205
206  def storeIsAMO(fuType: UInt): Bool = FuTypeOrR(fuType, mou)
207
208  def isVppu(fuType: UInt): Bool = FuTypeOrR(fuType, vppu)
209
210  def isScalaNeedFrm(fuType: UInt): Bool = FuTypeOrR(fuType, scalaNeedFrm)
211
212  def isVectorNeedFrm(fuType: UInt): Bool = FuTypeOrR(fuType, vectorNeedFrm)
213
214  object FuTypeOrR {
215    def apply(fuType: UInt, fu0: OHType, fus: OHType*): Bool = {
216      apply(fuType, fu0 +: fus)
217    }
218
219    def apply(fuType: UInt, fus: Seq[OHType]): Bool = {
220      fus.map(x => fuType(x.id)).fold(false.B)(_ || _)
221    }
222
223    def apply(fuType: OHType, fu0: OHType, fus: OHType*): Boolean = {
224      apply(fuType, fu0 +: fus)
225    }
226
227    def apply(fuTupe: OHType, fus: Seq[OHType]): Boolean = {
228      fus.map(x => x == fuTupe).fold(false)(_ || _)
229    }
230  }
231
232  val functionNameMap = Map(
233    jmp -> "jmp",
234    brh -> "brh",
235    i2f -> "int_to_float",
236    i2v -> "int_to_vector",
237    f2v -> "float_to_vector",
238    csr -> "csr",
239    alu -> "alu",
240    mul -> "mul",
241    div -> "div",
242    fence -> "fence",
243    bku -> "bku",
244    fmac -> "fmac",
245    fDivSqrt -> "fdiv_fsqrt",
246    ldu -> "load",
247    stu -> "store",
248    mou -> "mou",
249    vsetiwi -> "vsetiwi",
250    vsetiwf -> "vsetiwf",
251    vsetfwf -> "vsetfwf",
252    vipu -> "vipu",
253    vialuF -> "vialuF",
254    vfpu -> "vfpu",
255    vldu -> "vldu",
256    vstu -> "vstu",
257    vppu -> "vppu",
258    vimac -> "vimac",
259    vidiv -> "vidiv",
260    vfalu -> "vfalu",
261    vfma -> "vfma",
262    vfdiv -> "vfdiv",
263    vfcvt -> "vfcvt"
264  )
265}
266
267