1 /*
2 * Copyright © 2016 Rob Clark <[email protected]>
3 * SPDX-License-Identifier: MIT
4 *
5 * Authors:
6 * Rob Clark <[email protected]>
7 */
8
9 #include "pipe/p_state.h"
10 #include "util/format/u_format.h"
11 #include "util/u_inlines.h"
12 #include "util/u_memory.h"
13 #include "util/u_string.h"
14
15 #include "fd5_format.h"
16 #include "fd5_texture.h"
17
18 static enum a5xx_tex_clamp
tex_clamp(unsigned wrap,bool * needs_border)19 tex_clamp(unsigned wrap, bool *needs_border)
20 {
21 switch (wrap) {
22 case PIPE_TEX_WRAP_REPEAT:
23 return A5XX_TEX_REPEAT;
24 case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
25 return A5XX_TEX_CLAMP_TO_EDGE;
26 case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
27 *needs_border = true;
28 return A5XX_TEX_CLAMP_TO_BORDER;
29 case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE:
30 /* only works for PoT.. need to emulate otherwise! */
31 return A5XX_TEX_MIRROR_CLAMP;
32 case PIPE_TEX_WRAP_MIRROR_REPEAT:
33 return A5XX_TEX_MIRROR_REPEAT;
34 case PIPE_TEX_WRAP_MIRROR_CLAMP:
35 case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER:
36 /* these two we could perhaps emulate, but we currently
37 * just don't advertise PIPE_CAP_TEXTURE_MIRROR_CLAMP
38 */
39 default:
40 DBG("invalid wrap: %u", wrap);
41 return 0;
42 }
43 }
44
45 static enum a5xx_tex_filter
tex_filter(unsigned filter,bool aniso)46 tex_filter(unsigned filter, bool aniso)
47 {
48 switch (filter) {
49 case PIPE_TEX_FILTER_NEAREST:
50 return A5XX_TEX_NEAREST;
51 case PIPE_TEX_FILTER_LINEAR:
52 return aniso ? A5XX_TEX_ANISO : A5XX_TEX_LINEAR;
53 default:
54 DBG("invalid filter: %u", filter);
55 return 0;
56 }
57 }
58
59 static void *
fd5_sampler_state_create(struct pipe_context * pctx,const struct pipe_sampler_state * cso)60 fd5_sampler_state_create(struct pipe_context *pctx,
61 const struct pipe_sampler_state *cso)
62 {
63 struct fd5_sampler_stateobj *so = CALLOC_STRUCT(fd5_sampler_stateobj);
64 unsigned aniso = util_last_bit(MIN2(cso->max_anisotropy >> 1, 8));
65 bool miplinear = false;
66
67 if (!so)
68 return NULL;
69
70 so->base = *cso;
71
72 if (cso->min_mip_filter == PIPE_TEX_MIPFILTER_LINEAR)
73 miplinear = true;
74
75 so->needs_border = false;
76 so->texsamp0 =
77 COND(miplinear, A5XX_TEX_SAMP_0_MIPFILTER_LINEAR_NEAR) |
78 A5XX_TEX_SAMP_0_XY_MAG(tex_filter(cso->mag_img_filter, aniso)) |
79 A5XX_TEX_SAMP_0_XY_MIN(tex_filter(cso->min_img_filter, aniso)) |
80 A5XX_TEX_SAMP_0_ANISO(aniso) |
81 A5XX_TEX_SAMP_0_WRAP_S(tex_clamp(cso->wrap_s, &so->needs_border)) |
82 A5XX_TEX_SAMP_0_WRAP_T(tex_clamp(cso->wrap_t, &so->needs_border)) |
83 A5XX_TEX_SAMP_0_WRAP_R(tex_clamp(cso->wrap_r, &so->needs_border));
84
85 so->texsamp1 =
86 COND(!cso->seamless_cube_map, A5XX_TEX_SAMP_1_CUBEMAPSEAMLESSFILTOFF) |
87 COND(cso->unnormalized_coords, A5XX_TEX_SAMP_1_UNNORM_COORDS);
88
89 so->texsamp0 |= A5XX_TEX_SAMP_0_LOD_BIAS(cso->lod_bias);
90
91 if (cso->min_mip_filter != PIPE_TEX_MIPFILTER_NONE) {
92 so->texsamp1 |= A5XX_TEX_SAMP_1_MIN_LOD(cso->min_lod) |
93 A5XX_TEX_SAMP_1_MAX_LOD(cso->max_lod);
94 } else {
95 /* If we're not doing mipmap filtering, we still need a slightly > 0
96 * LOD clamp so the HW can decide between min and mag filtering of
97 * level 0.
98 */
99 so->texsamp1 |= A5XX_TEX_SAMP_1_MIN_LOD(MIN2(cso->min_lod, 0.125f)) |
100 A5XX_TEX_SAMP_1_MAX_LOD(MIN2(cso->max_lod, 0.125f));
101 }
102
103 if (cso->compare_mode)
104 so->texsamp1 |=
105 A5XX_TEX_SAMP_1_COMPARE_FUNC(cso->compare_func); /* maps 1:1 */
106
107 return so;
108 }
109
110 static struct pipe_sampler_view *
fd5_sampler_view_create(struct pipe_context * pctx,struct pipe_resource * prsc,const struct pipe_sampler_view * cso)111 fd5_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc,
112 const struct pipe_sampler_view *cso)
113 {
114 struct fd5_pipe_sampler_view *so = CALLOC_STRUCT(fd5_pipe_sampler_view);
115 struct fd_resource *rsc = fd_resource(prsc);
116 enum pipe_format format = cso->format;
117 unsigned lvl, layers = 0;
118
119 if (!so)
120 return NULL;
121
122 if (format == PIPE_FORMAT_X32_S8X24_UINT) {
123 rsc = rsc->stencil;
124 format = rsc->b.b.format;
125 }
126
127 so->base = *cso;
128 pipe_reference(NULL, &prsc->reference);
129 so->base.texture = prsc;
130 so->base.reference.count = 1;
131 so->base.context = pctx;
132
133 so->texconst0 = A5XX_TEX_CONST_0_FMT(fd5_pipe2tex(format)) |
134 A5XX_TEX_CONST_0_SAMPLES(fd_msaa_samples(prsc->nr_samples)) |
135 fd5_tex_swiz(format, cso->swizzle_r, cso->swizzle_g,
136 cso->swizzle_b, cso->swizzle_a);
137
138 /* NOTE: since we sample z24s8 using 8888_UINT format, the swizzle
139 * we get isn't quite right. Use SWAP(XYZW) as a cheap and cheerful
140 * way to re-arrange things so stencil component is where the swiz
141 * expects.
142 *
143 * Note that gallium expects stencil sampler to return (s,s,s,s)
144 * which isn't quite true. To make that happen we'd have to massage
145 * the swizzle. But in practice only the .x component is used.
146 */
147 if (format == PIPE_FORMAT_X24S8_UINT) {
148 so->texconst0 |= A5XX_TEX_CONST_0_SWAP(XYZW);
149 }
150
151 if (util_format_is_srgb(format)) {
152 so->texconst0 |= A5XX_TEX_CONST_0_SRGB;
153 }
154
155 if (cso->target == PIPE_BUFFER) {
156 unsigned elements = cso->u.buf.size / util_format_get_blocksize(format);
157
158 lvl = 0;
159 so->texconst1 = A5XX_TEX_CONST_1_WIDTH(elements & MASK(15)) |
160 A5XX_TEX_CONST_1_HEIGHT(elements >> 15);
161 so->texconst2 = A5XX_TEX_CONST_2_BUFFER;
162 so->offset = cso->u.buf.offset;
163 } else {
164 unsigned miplevels;
165
166 lvl = fd_sampler_first_level(cso);
167 miplevels = fd_sampler_last_level(cso) - lvl;
168 layers = cso->u.tex.last_layer - cso->u.tex.first_layer + 1;
169
170 so->texconst0 |= A5XX_TEX_CONST_0_MIPLVLS(miplevels);
171 so->texconst1 = A5XX_TEX_CONST_1_WIDTH(u_minify(prsc->width0, lvl)) |
172 A5XX_TEX_CONST_1_HEIGHT(u_minify(prsc->height0, lvl));
173 so->texconst2 = A5XX_TEX_CONST_2_PITCHALIGN(rsc->layout.pitchalign - 6) |
174 A5XX_TEX_CONST_2_PITCH(fd_resource_pitch(rsc, lvl));
175 so->offset = fd_resource_offset(rsc, lvl, cso->u.tex.first_layer);
176 }
177
178 so->texconst2 |= A5XX_TEX_CONST_2_TYPE(fd5_tex_type(cso->target));
179
180 switch (cso->target) {
181 case PIPE_TEXTURE_RECT:
182 case PIPE_TEXTURE_1D:
183 case PIPE_TEXTURE_2D:
184 so->texconst3 = A5XX_TEX_CONST_3_ARRAY_PITCH(rsc->layout.layer_size);
185 so->texconst5 = A5XX_TEX_CONST_5_DEPTH(1);
186 break;
187 case PIPE_TEXTURE_1D_ARRAY:
188 case PIPE_TEXTURE_2D_ARRAY:
189 so->texconst3 = A5XX_TEX_CONST_3_ARRAY_PITCH(rsc->layout.layer_size);
190 so->texconst5 = A5XX_TEX_CONST_5_DEPTH(layers);
191 break;
192 case PIPE_TEXTURE_CUBE:
193 case PIPE_TEXTURE_CUBE_ARRAY:
194 so->texconst3 = A5XX_TEX_CONST_3_ARRAY_PITCH(rsc->layout.layer_size);
195 so->texconst5 = A5XX_TEX_CONST_5_DEPTH(layers / 6);
196 break;
197 case PIPE_TEXTURE_3D:
198 so->texconst3 =
199 A5XX_TEX_CONST_3_MIN_LAYERSZ(
200 fd_resource_slice(rsc, prsc->last_level)->size0) |
201 A5XX_TEX_CONST_3_ARRAY_PITCH(fd_resource_slice(rsc, lvl)->size0);
202 so->texconst5 = A5XX_TEX_CONST_5_DEPTH(u_minify(prsc->depth0, lvl));
203 break;
204 default:
205 so->texconst3 = 0x00000000;
206 break;
207 }
208
209 return &so->base;
210 }
211
212 void
fd5_texture_init(struct pipe_context * pctx)213 fd5_texture_init(struct pipe_context *pctx)
214 {
215 pctx->create_sampler_state = fd5_sampler_state_create;
216 pctx->bind_sampler_states = fd_sampler_states_bind;
217 pctx->create_sampler_view = fd5_sampler_view_create;
218 pctx->set_sampler_views = fd_set_sampler_views;
219 }
220