xref: /aosp_15_r20/external/coreboot/payloads/libpayload/include/x86/arch/cpuid.h (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /*
2  *
3  * Copyright 2018 Google Inc.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  * 3. The name of the author may not be used to endorse or promote products
14  *    derived from this software without specific prior written permission.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #ifndef _ARCH_CPUID_H
30 #define _ARCH_CPUID_H
31 
32 #define cpuid(fn, eax, ebx, ecx, edx) \
33 	asm("cpuid" : "=a"(eax), "=b"(ebx), "=c"(ecx), "=d"(edx) : "0"(fn))
34 
35 #define _declare_cpuid(reg)					\
36 	static inline unsigned int cpuid_##reg(unsigned int fn)	\
37 	{							\
38 		unsigned int eax, ebx, ecx, edx;		\
39 		cpuid(fn, eax, ebx, ecx, edx);			\
40 		return reg;					\
41 	}
42 
43 _declare_cpuid(eax)
_declare_cpuid(ebx)44 _declare_cpuid(ebx)
45 _declare_cpuid(ecx)
46 _declare_cpuid(edx)
47 
48 #undef _declare_cpuid
49 
50 #define cpuid_sub_leaf(fn, sub_leaf, eax, ebx, ecx, edx) \
51 	asm("cpuid" : "=a"(eax), "=b"(ebx), "=c"(ecx), "=d"(edx) : "0"(fn), "1"(sub_leaf))
52 
53 #define _declare_cpuid_sub_leaf(reg)					\
54 	static inline unsigned int cpuid_sub_leaf_##reg( \
55 		unsigned int fn, unsigned int sub_leaf)	\
56 	{								\
57 		unsigned int eax, ebx, ecx, edx;			\
58 		cpuid_sub_leaf(fn, sub_leaf, eax, ebx, ecx, edx);	\
59 		return reg;						\
60 	}
61 
62 _declare_cpuid_sub_leaf(eax)
63 _declare_cpuid_sub_leaf(ebx)
64 _declare_cpuid_sub_leaf(ecx)
65 _declare_cpuid_sub_leaf(edx)
66 
67 #undef _declare_cpuid_sub_leaf
68 
69 static inline unsigned int cpuid_max(void)
70 {
71 	return cpuid_eax(0);
72 }
73 
cpuid_family(void)74 static inline unsigned int cpuid_family(void)
75 {
76 	const unsigned int eax = cpuid_eax(1);
77 	return (eax & 0xff00000) >> (20 - 4) | (eax & 0xf00) >> 8;
78 }
79 
cpuid_model(void)80 static inline unsigned int cpuid_model(void)
81 {
82 	const unsigned int eax = cpuid_eax(1);
83 	return (eax & 0xf0000) >> (16 - 4) | (eax & 0xf0) >> 4;
84 }
85 
86 enum intel_fam6_model {
87 	NEHALEM		= 0x25,
88 	SANDYBRIDGE	= 0x2a,
89 	IVYBRIDGE	= 0x3a,
90 	HASWELL		= 0x3c,
91 	BROADWELL_U	= 0x3d,
92 	HASWELL_U	= 0x45,
93 	HASWELL_GT3E	= 0x46,
94 	BROADWELL	= 0x47,
95 	SKYLAKE_U_Y	= 0x4e,
96 	APOLLOLAKE	= 0x5c,
97 	SKYLAKE_S_H	= 0x5e,
98 	KABYLAKE_U_Y	= 0x8e,
99 	KABYLAKE_S_H	= 0x9e,
100 };
101 
102 #endif
103