1 /* 2 * Copyright (c) 2006-2018, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 * 2011-07-25 weety first version 9 */ 10 11 #ifndef __HOST_H__ 12 #define __HOST_H__ 13 14 #include <rtthread.h> 15 16 #ifdef __cplusplus 17 extern "C" { 18 #endif 19 20 struct rt_mmcsd_io_cfg { 21 rt_uint32_t clock; /* clock rate */ 22 rt_uint16_t vdd; 23 24 /* vdd stores the bit number of the selected voltage range from below. */ 25 26 rt_uint8_t bus_mode; /* command output mode */ 27 28 #define MMCSD_BUSMODE_OPENDRAIN 1 29 #define MMCSD_BUSMODE_PUSHPULL 2 30 31 rt_uint8_t chip_select; /* SPI chip select */ 32 33 #define MMCSD_CS_IGNORE 0 34 #define MMCSD_CS_HIGH 1 35 #define MMCSD_CS_LOW 2 36 37 rt_uint8_t power_mode; /* power supply mode */ 38 39 #define MMCSD_POWER_OFF 0 40 #define MMCSD_POWER_UP 1 41 #define MMCSD_POWER_ON 2 42 43 rt_uint8_t bus_width; /* data bus width */ 44 45 #define MMCSD_BUS_WIDTH_1 0 46 #define MMCSD_BUS_WIDTH_4 2 47 #define MMCSD_BUS_WIDTH_8 3 48 49 }; 50 51 struct rt_mmcsd_host; 52 struct rt_mmcsd_req; 53 54 struct rt_mmcsd_host_ops { 55 void (*request)(struct rt_mmcsd_host *host, struct rt_mmcsd_req *req); 56 void (*set_iocfg)(struct rt_mmcsd_host *host, struct rt_mmcsd_io_cfg *io_cfg); 57 rt_int32_t (*get_card_status)(struct rt_mmcsd_host *host); 58 void (*enable_sdio_irq)(struct rt_mmcsd_host *host, rt_int32_t en); 59 }; 60 61 struct rt_mmcsd_host { 62 struct rt_mmcsd_card *card; 63 const struct rt_mmcsd_host_ops *ops; 64 rt_uint32_t freq_min; 65 rt_uint32_t freq_max; 66 struct rt_mmcsd_io_cfg io_cfg; 67 rt_uint32_t valid_ocr; /* current valid OCR */ 68 #define VDD_165_195 (1 << 7) /* VDD voltage 1.65 - 1.95 */ 69 #define VDD_20_21 (1 << 8) /* VDD voltage 2.0 ~ 2.1 */ 70 #define VDD_21_22 (1 << 9) /* VDD voltage 2.1 ~ 2.2 */ 71 #define VDD_22_23 (1 << 10) /* VDD voltage 2.2 ~ 2.3 */ 72 #define VDD_23_24 (1 << 11) /* VDD voltage 2.3 ~ 2.4 */ 73 #define VDD_24_25 (1 << 12) /* VDD voltage 2.4 ~ 2.5 */ 74 #define VDD_25_26 (1 << 13) /* VDD voltage 2.5 ~ 2.6 */ 75 #define VDD_26_27 (1 << 14) /* VDD voltage 2.6 ~ 2.7 */ 76 #define VDD_27_28 (1 << 15) /* VDD voltage 2.7 ~ 2.8 */ 77 #define VDD_28_29 (1 << 16) /* VDD voltage 2.8 ~ 2.9 */ 78 #define VDD_29_30 (1 << 17) /* VDD voltage 2.9 ~ 3.0 */ 79 #define VDD_30_31 (1 << 18) /* VDD voltage 3.0 ~ 3.1 */ 80 #define VDD_31_32 (1 << 19) /* VDD voltage 3.1 ~ 3.2 */ 81 #define VDD_32_33 (1 << 20) /* VDD voltage 3.2 ~ 3.3 */ 82 #define VDD_33_34 (1 << 21) /* VDD voltage 3.3 ~ 3.4 */ 83 #define VDD_34_35 (1 << 22) /* VDD voltage 3.4 ~ 3.5 */ 84 #define VDD_35_36 (1 << 23) /* VDD voltage 3.5 ~ 3.6 */ 85 rt_uint32_t flags; /* define device capabilities */ 86 #define MMCSD_BUSWIDTH_4 (1 << 0) 87 #define MMCSD_BUSWIDTH_8 (1 << 1) 88 #define MMCSD_MUTBLKWRITE (1 << 2) 89 #define MMCSD_HOST_IS_SPI (1 << 3) 90 #define controller_is_spi(host) (host->flags & MMCSD_HOST_IS_SPI) 91 #define MMCSD_SUP_SDIO_IRQ (1 << 4) /* support signal pending SDIO IRQs */ 92 #define MMCSD_SUP_HIGHSPEED (1 << 5) /* support high speed */ 93 94 rt_uint32_t max_seg_size; /* maximum size of one dma segment */ 95 rt_uint32_t max_dma_segs; /* maximum number of dma segments in one request */ 96 rt_uint32_t max_blk_size; /* maximum block size */ 97 rt_uint32_t max_blk_count; /* maximum block count */ 98 99 rt_uint32_t spi_use_crc; 100 struct rt_mutex bus_lock; 101 struct rt_semaphore sem_ack; 102 103 rt_uint32_t sdio_irq_num; 104 struct rt_semaphore *sdio_irq_sem; 105 struct rt_thread *sdio_irq_thread; 106 107 void *private_data; 108 }; 109 mmcsd_delay_ms(rt_uint32_t ms)110rt_inline void mmcsd_delay_ms(rt_uint32_t ms) 111 { 112 if (ms < 1000 / RT_TICK_PER_SECOND) 113 { 114 rt_thread_delay(1); 115 } 116 else 117 { 118 rt_thread_delay(ms/(1000 / RT_TICK_PER_SECOND)); 119 } 120 } 121 122 #ifdef __cplusplus 123 } 124 #endif 125 126 #endif 127