1 /*
2 * Copyright (c) 2006-2018, RT-Thread Development Team
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Change Logs:
7 * Date Author Notes
8 * 2011-07-25 weety first version
9 */
10
11 #ifndef __CORE_H__
12 #define __CORE_H__
13
14 #include <rtthread.h>
15 #include <drivers/mmcsd_host.h>
16 #include <drivers/mmcsd_card.h>
17 #include <drivers/mmcsd_cmd.h>
18
19 #ifdef __cplusplus
20 extern "C" {
21 #endif
22
23 #ifdef RT_MMCSD_DBG
24 #define mmcsd_dbg(fmt, ...) rt_kprintf(fmt, ##__VA_ARGS__)
25 #else
26 #define mmcsd_dbg(fmt, ...)
27 #endif
28
29 struct rt_mmcsd_data {
30 rt_uint32_t blksize;
31 rt_uint32_t blks;
32 rt_uint32_t *buf;
33 rt_int32_t err;
34 rt_uint32_t flags;
35 #define DATA_DIR_WRITE (1 << 0)
36 #define DATA_DIR_READ (1 << 1)
37 #define DATA_STREAM (1 << 2)
38
39 unsigned int bytes_xfered;
40
41 struct rt_mmcsd_cmd *stop; /* stop command */
42 struct rt_mmcsd_req *mrq; /* associated request */
43
44 rt_uint32_t timeout_ns;
45 rt_uint32_t timeout_clks;
46 };
47
48 struct rt_mmcsd_cmd {
49 rt_uint32_t cmd_code;
50 rt_uint32_t arg;
51 rt_uint32_t resp[4];
52 rt_uint32_t flags;
53 /*rsponse types
54 *bits:0~3
55 */
56 #define RESP_MASK (0xF)
57 #define RESP_NONE (0)
58 #define RESP_R1 (1 << 0)
59 #define RESP_R1B (2 << 0)
60 #define RESP_R2 (3 << 0)
61 #define RESP_R3 (4 << 0)
62 #define RESP_R4 (5 << 0)
63 #define RESP_R6 (6 << 0)
64 #define RESP_R7 (7 << 0)
65 #define RESP_R5 (8 << 0) /*SDIO command response type*/
66 /*command types
67 *bits:4~5
68 */
69 #define CMD_MASK (3 << 4) /* command type */
70 #define CMD_AC (0 << 4)
71 #define CMD_ADTC (1 << 4)
72 #define CMD_BC (2 << 4)
73 #define CMD_BCR (3 << 4)
74
75 #define resp_type(cmd) ((cmd)->flags & RESP_MASK)
76
77 /*spi rsponse types
78 *bits:6~8
79 */
80 #define RESP_SPI_MASK (0x7 << 6)
81 #define RESP_SPI_R1 (1 << 6)
82 #define RESP_SPI_R1B (2 << 6)
83 #define RESP_SPI_R2 (3 << 6)
84 #define RESP_SPI_R3 (4 << 6)
85 #define RESP_SPI_R4 (5 << 6)
86 #define RESP_SPI_R5 (6 << 6)
87 #define RESP_SPI_R7 (7 << 6)
88
89 #define spi_resp_type(cmd) ((cmd)->flags & RESP_SPI_MASK)
90 /*
91 * These are the command types.
92 */
93 #define cmd_type(cmd) ((cmd)->flags & CMD_MASK)
94
95 rt_int32_t retries; /* max number of retries */
96 rt_int32_t err;
97
98 struct rt_mmcsd_data *data;
99 struct rt_mmcsd_req *mrq; /* associated request */
100 };
101
102 struct rt_mmcsd_req {
103 struct rt_mmcsd_data *data;
104 struct rt_mmcsd_cmd *cmd;
105 struct rt_mmcsd_cmd *stop;
106 };
107
108 /*the following is response bit*/
109 #define R1_OUT_OF_RANGE (1 << 31) /* er, c */
110 #define R1_ADDRESS_ERROR (1 << 30) /* erx, c */
111 #define R1_BLOCK_LEN_ERROR (1 << 29) /* er, c */
112 #define R1_ERASE_SEQ_ERROR (1 << 28) /* er, c */
113 #define R1_ERASE_PARAM (1 << 27) /* ex, c */
114 #define R1_WP_VIOLATION (1 << 26) /* erx, c */
115 #define R1_CARD_IS_LOCKED (1 << 25) /* sx, a */
116 #define R1_LOCK_UNLOCK_FAILED (1 << 24) /* erx, c */
117 #define R1_COM_CRC_ERROR (1 << 23) /* er, b */
118 #define R1_ILLEGAL_COMMAND (1 << 22) /* er, b */
119 #define R1_CARD_ECC_FAILED (1 << 21) /* ex, c */
120 #define R1_CC_ERROR (1 << 20) /* erx, c */
121 #define R1_ERROR (1 << 19) /* erx, c */
122 #define R1_UNDERRUN (1 << 18) /* ex, c */
123 #define R1_OVERRUN (1 << 17) /* ex, c */
124 #define R1_CID_CSD_OVERWRITE (1 << 16) /* erx, c, CID/CSD overwrite */
125 #define R1_WP_ERASE_SKIP (1 << 15) /* sx, c */
126 #define R1_CARD_ECC_DISABLED (1 << 14) /* sx, a */
127 #define R1_ERASE_RESET (1 << 13) /* sr, c */
128 #define R1_STATUS(x) (x & 0xFFFFE000)
129 #define R1_CURRENT_STATE(x) ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */
130 #define R1_READY_FOR_DATA (1 << 8) /* sx, a */
131 #define R1_APP_CMD (1 << 5) /* sr, c */
132
133
134 #define R1_SPI_IDLE (1 << 0)
135 #define R1_SPI_ERASE_RESET (1 << 1)
136 #define R1_SPI_ILLEGAL_COMMAND (1 << 2)
137 #define R1_SPI_COM_CRC (1 << 3)
138 #define R1_SPI_ERASE_SEQ (1 << 4)
139 #define R1_SPI_ADDRESS (1 << 5)
140 #define R1_SPI_PARAMETER (1 << 6)
141 /* R1 bit 7 is always zero */
142 #define R2_SPI_CARD_LOCKED (1 << 8)
143 #define R2_SPI_WP_ERASE_SKIP (1 << 9) /* or lock/unlock fail */
144 #define R2_SPI_LOCK_UNLOCK_FAIL R2_SPI_WP_ERASE_SKIP
145 #define R2_SPI_ERROR (1 << 10)
146 #define R2_SPI_CC_ERROR (1 << 11)
147 #define R2_SPI_CARD_ECC_ERROR (1 << 12)
148 #define R2_SPI_WP_VIOLATION (1 << 13)
149 #define R2_SPI_ERASE_PARAM (1 << 14)
150 #define R2_SPI_OUT_OF_RANGE (1 << 15) /* or CSD overwrite */
151 #define R2_SPI_CSD_OVERWRITE R2_SPI_OUT_OF_RANGE
152
153 #define CARD_BUSY 0x80000000 /* Card Power up status bit */
154
155 /* R5 response bits */
156 #define R5_COM_CRC_ERROR (1 << 15)
157 #define R5_ILLEGAL_COMMAND (1 << 14)
158 #define R5_ERROR (1 << 11)
159 #define R5_FUNCTION_NUMBER (1 << 9)
160 #define R5_OUT_OF_RANGE (1 << 8)
161 #define R5_STATUS(x) (x & 0xCB00)
162 #define R5_IO_CURRENT_STATE(x) ((x & 0x3000) >> 12)
163
164
165
166 /**
167 * fls - find last (most-significant) bit set
168 * @x: the word to search
169 *
170 * This is defined the same way as ffs.
171 * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
172 */
173
__rt_fls(rt_uint32_t val)174 rt_inline rt_uint32_t __rt_fls(rt_uint32_t val)
175 {
176 rt_uint32_t bit = 32;
177
178 if (!val)
179 return 0;
180 if (!(val & 0xffff0000u))
181 {
182 val <<= 16;
183 bit -= 16;
184 }
185 if (!(val & 0xff000000u))
186 {
187 val <<= 8;
188 bit -= 8;
189 }
190 if (!(val & 0xf0000000u))
191 {
192 val <<= 4;
193 bit -= 4;
194 }
195 if (!(val & 0xc0000000u))
196 {
197 val <<= 2;
198 bit -= 2;
199 }
200 if (!(val & 0x80000000u))
201 {
202 bit -= 1;
203 }
204
205 return bit;
206 }
207
208 #define MMCSD_HOST_PLUGED 0
209 #define MMCSD_HOST_UNPLUGED 1
210
211 int mmcsd_wait_cd_changed(rt_int32_t timeout);
212 void mmcsd_host_lock(struct rt_mmcsd_host *host);
213 void mmcsd_host_unlock(struct rt_mmcsd_host *host);
214 void mmcsd_req_complete(struct rt_mmcsd_host *host);
215 void mmcsd_send_request(struct rt_mmcsd_host *host, struct rt_mmcsd_req *req);
216 rt_int32_t mmcsd_send_cmd(struct rt_mmcsd_host *host, struct rt_mmcsd_cmd *cmd, int retries);
217 rt_int32_t mmcsd_go_idle(struct rt_mmcsd_host *host);
218 rt_int32_t mmcsd_spi_read_ocr(struct rt_mmcsd_host *host, rt_int32_t high_capacity, rt_uint32_t *ocr);
219 rt_int32_t mmcsd_all_get_cid(struct rt_mmcsd_host *host, rt_uint32_t *cid);
220 rt_int32_t mmcsd_get_cid(struct rt_mmcsd_host *host, rt_uint32_t *cid);
221 rt_int32_t mmcsd_get_csd(struct rt_mmcsd_card *card, rt_uint32_t *csd);
222 rt_int32_t mmcsd_select_card(struct rt_mmcsd_card *card);
223 rt_int32_t mmcsd_deselect_cards(struct rt_mmcsd_card *host);
224 rt_int32_t mmcsd_spi_use_crc(struct rt_mmcsd_host *host, rt_int32_t use_crc);
225 void mmcsd_set_chip_select(struct rt_mmcsd_host *host, rt_int32_t mode);
226 void mmcsd_set_clock(struct rt_mmcsd_host *host, rt_uint32_t clk);
227 void mmcsd_set_bus_mode(struct rt_mmcsd_host *host, rt_uint32_t mode);
228 void mmcsd_set_bus_width(struct rt_mmcsd_host *host, rt_uint32_t width);
229 void mmcsd_set_data_timeout(struct rt_mmcsd_data *data, const struct rt_mmcsd_card *card);
230 rt_uint32_t mmcsd_select_voltage(struct rt_mmcsd_host *host, rt_uint32_t ocr);
231 void mmcsd_change(struct rt_mmcsd_host *host);
232 void mmcsd_detect(void *param);
233 struct rt_mmcsd_host *mmcsd_alloc_host(void);
234 void mmcsd_free_host(struct rt_mmcsd_host *host);
235 int rt_mmcsd_core_init(void);
236
237 int rt_mmcsd_blk_init(void);
238 rt_int32_t rt_mmcsd_blk_probe(struct rt_mmcsd_card *card);
239 void rt_mmcsd_blk_remove(struct rt_mmcsd_card *card);
240
241
242 #ifdef __cplusplus
243 }
244 #endif
245
246 #endif
247