1 /*
2  * Copyright (c) 2014 Travis Geiselbrecht
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining
5  * a copy of this software and associated documentation files
6  * (the "Software"), to deal in the Software without restriction,
7  * including without limitation the rights to use, copy, modify, merge,
8  * publish, distribute, sublicense, and/or sell copies of the Software,
9  * and to permit persons to whom the Software is furnished to do so,
10  * subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice shall be
13  * included in all copies or substantial portions of the Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
18  * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
19  * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
20  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
21  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
22  */
23 #pragma once
24 
25 #include <stdbool.h>
26 #include <sys/types.h>
27 #include <compiler.h>
28 
29 __BEGIN_CDECLS
30 
31 #define DSB __asm__ volatile("dsb sy" ::: "memory")
32 #define ISB __asm__ volatile("isb" ::: "memory")
33 
34 #define STRINGIFY(x) #x
35 #define TOSTRING(x) STRINGIFY(x)
36 
37 #define ARM64_READ_SYSREG(reg) \
38 ({ \
39     uint64_t _val; \
40     __asm__ volatile("mrs %0," TOSTRING(reg) : "=r" (_val)); \
41     _val; \
42 })
43 
44 #define ARM64_WRITE_SYSREG_RAW(reg, val) \
45 ({ \
46     __asm__ volatile("msr " TOSTRING(reg) ", %0" :: "r" (val)); \
47 })
48 
49 #define ARM64_WRITE_SYSREG(reg, val) \
50 ({ \
51     ARM64_WRITE_SYSREG_RAW(reg, val); \
52     ISB; \
53 })
54 
55 void arm64_context_switch(vaddr_t *old_sp, vaddr_t new_sp);
56 
57 /* exception handling */
58 struct arm64_iframe_long {
59     uint64_t r[29];
60     uint64_t lr;
61     uint64_t sp;
62     uint64_t spsr;
63     uint64_t fp;
64     uint64_t elr;
65 };
66 
67 struct arm64_iframe_short {
68     uint64_t r[19];
69     uint64_t lr;
70     uint64_t sp;
71     uint64_t spsr;
72     uint64_t fp;
73     uint64_t elr;
74 };
75 
76 struct thread;
77 struct fpstate;
78 
79 /*
80  * This declaration is made to avoid issues with CFI while setting
81  * vector base, with CFI enabled VBAR_EL1 was set wrong, so instead
82  * of jumping to the correct exception entrypoint it was jumping into
83  * the middle of an unrelated function
84  */
85 extern uint32_t arm64_exception_base[];
86 
87 void arm64_el3_to_el1(void);
88 void arm64_fpu_exception(struct arm64_iframe_long *iframe);
89 void arm64_fpu_save_state(struct thread *thread);
90 
91 /**
92  * arm64_fpu_load_fpstate() - Load the FP state from memory.
93  * @fpstate: Pointer to a &struct fpstate containing the new
94  *           values of the FP registers.
95  * @force: Force the load operation even if the @fpstate pointer
96  *         is the same as the previous operation.
97  *
98  * Return:
99  * * %true if the load is performed successfully
100  * * %false if the register values are already present in the registers
101  *
102  * This function will copy the pointer from @fpstate into some internal
103  * storage. For this reason, the pointer should not point
104  * into the stack.
105  */
106 bool arm64_fpu_load_fpstate(struct fpstate *fpstate, bool force);
107 
108 /**
109  * arm64_fpu_save_fpstate() - Save the current values of the FP registers.
110  * @fpstate: Pointer to a &struct fpstate to store the registers into.
111  */
112 void arm64_fpu_save_fpstate(struct fpstate *fpstate);
113 
arm64_fpu_pre_context_switch(struct thread * thread)114 static inline void arm64_fpu_pre_context_switch(struct thread *thread)
115 {
116     uint64_t cpacr = ARM64_READ_SYSREG(cpacr_el1);
117     if ((cpacr >> 20) & 3) {
118         arm64_fpu_save_state(thread);
119         cpacr &= ~(3U << 20);
120         ARM64_WRITE_SYSREG(cpacr_el1, cpacr);
121     }
122 }
123 
124 /* overridable syscall handler */
125 void arm64_syscall(struct arm64_iframe_long *iframe, bool is_64bit);
126 
127 /* Macro to remove PAC protection from a function */
128 #if defined(KERNEL_PAC_ENABLED) && defined(KERNEL_BTI_ENABLED)
129 #define __ARM64_NO_PAC __attribute__((target("branch-protection=bti")))
130 #else
131 #define __ARM64_NO_PAC __attribute__((target("branch-protection=none")))
132 #endif
133 
134 __END_CDECLS
135 
136