xref: /aosp_15_r20/external/coreboot/src/soc/intel/common/tco.h (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef _INTELPCH_TCO_H_
4 #define _INTELPCH_TCO_H_
5 
6 /* TCO registers and fields live behind TCOBASE I/O bar in SMBus device. */
7 #define TCO_RLD				0x00
8 #define TCO_DAT_IN			0x02
9 #define TCO_DAT_OUT			0x03
10 #define TCO1_STS			0x04
11 #define  TCO1_STS_TCO_SLVSEL		(1 << 13)
12 #define  TCO1_STS_CPUSERR		(1 << 12)
13 #define  TCO1_STS_CPUSMI		(1 << 10)
14 #define  TCO1_STS_CPUSCI		(1 << 9)
15 #define  TCO1_STS_BIOSWR		(1 << 8)
16 #define  TCO1_STS_NEWCENTURY		(1 << 7)
17 #define  TCO1_STS_TIMEOUT		(1 << 3)
18 #define  TCO1_STS_TCO_INT		(1 << 2)
19 #define  TCO1_STS_OS_TCO_SMI		(1 << 1)
20 #define  TCO1_STS_NMI2SMI		(1 << 0)
21 #define TCO2_STS			0x06
22 #define  TCO2_STS_SMLINK_SLAVE_SMI	(1 << 2)
23 #define  TCO2_STS_SECOND_TO		(1 << 1)
24 #define  TCO2_INTRD_DET			(1 << 0)
25 #define TCO1_CNT			0x08
26 #define  TCO1_LOCK			(1 << 12)
27 #define  TCO1_TMR_HLT			(1 << 11)
28 #define  TCO1_NMI2SMI_EN		(1 << 9)
29 #define  TCO1_NMI_NOW			(1 << 8)
30 #define TCO2_CNT			0x0A
31 #define  TCO2_OS_POLICY_MASK		(3 << 4)
32 #define  TCO2_OS_POLICY_SHUTDOWN	(1 << 4)
33 #define  TCO2_OS_POLICY_DONOT_LOAD	(1 << 5)
34 #define  TCO2_SMB_ALERT_DISABLE		(1 << 3)
35 #define  TCO2_INTRD_SEL_MASK		(3 << 1)
36 #define  TCO2_INTRD_SEL_SMI		(1 << 2)
37 #define  TCO2_INTRD_SEL_INT		(1 << 1)
38 #define TCO_MESSAGE1			0x0C
39 #define TCO_MESSAGE2			0x0D
40 #define TCO_WDSTATUS			0x0E
41 #define TCO_LEGACY_ELIM			0x10
42 #define  TCO_IRQ12_CAUSE		(1 << 1)
43 #define  TCO_IRQ1_CAUSE			(1 << 0)
44 #define TCO_TMR				0x12
45 #define  TCO_TMR_MASK			0x3FF
46 
47 #endif
48