/aosp_15_r20/external/coreboot/src/soc/amd/genoa_poc/include/soc/ |
H A D | iomap.h | 10 #define SPI_BASE_ADDRESS 0xfec10000 macro
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/aosp_15_r20/external/coreboot/src/soc/intel/baytrail/include/soc/ |
H A D | iomap.h | 30 #define SPI_BASE_ADDRESS 0xfed01000 macro
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/aosp_15_r20/external/coreboot/src/soc/intel/braswell/include/soc/ |
H A D | iomap.h | 31 #define SPI_BASE_ADDRESS 0xfed01000 macro
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/aosp_15_r20/external/coreboot/src/soc/intel/apollolake/include/soc/ |
H A D | iomap.h | 41 #define SPI_BASE_ADDRESS 0xfe010000 macro
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/aosp_15_r20/external/coreboot/src/soc/amd/stoneyridge/include/soc/ |
H A D | iomap.h | 8 #define SPI_BASE_ADDRESS 0xfec10000 macro
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/aosp_15_r20/external/coreboot/src/soc/amd/cezanne/include/soc/ |
H A D | iomap.h | 15 #define SPI_BASE_ADDRESS 0xfec10000 macro
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/aosp_15_r20/external/coreboot/src/soc/intel/xeon_sp/include/soc/ |
H A D | iomap.h | 18 #define SPI_BASE_ADDRESS 0xfe010000 macro
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/aosp_15_r20/external/coreboot/src/soc/amd/mendocino/include/soc/ |
H A D | iomap.h | 15 #define SPI_BASE_ADDRESS 0xfec10000 macro
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/aosp_15_r20/external/coreboot/src/soc/amd/phoenix/include/soc/ |
H A D | iomap.h | 15 #define SPI_BASE_ADDRESS 0xfec10000 macro
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/aosp_15_r20/external/coreboot/src/soc/amd/glinda/include/soc/ |
H A D | iomap.h | 17 #define SPI_BASE_ADDRESS 0xfec10000 macro
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/aosp_15_r20/external/coreboot/src/soc/intel/elkhartlake/include/soc/ |
H A D | iomap.h | 36 #define SPI_BASE_ADDRESS 0xfe010000 macro
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/aosp_15_r20/external/coreboot/src/soc/intel/skylake/include/soc/ |
H A D | iomap.h | 41 #define SPI_BASE_ADDRESS 0xfe010000 macro
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/aosp_15_r20/external/coreboot/src/soc/intel/cannonlake/include/soc/ |
H A D | iomap.h | 45 #define SPI_BASE_ADDRESS 0xfe010000 macro
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/aosp_15_r20/external/coreboot/src/soc/amd/picasso/include/soc/ |
H A D | iomap.h | 11 #define SPI_BASE_ADDRESS 0xfec10000 macro
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/aosp_15_r20/external/coreboot/src/soc/intel/jasperlake/include/soc/ |
H A D | iomap.h | 47 #define SPI_BASE_ADDRESS 0xfe010000 macro
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/aosp_15_r20/external/coreboot/src/soc/intel/meteorlake/include/soc/ |
H A D | iomap.h | 57 #define SPI_BASE_ADDRESS 0xfe010000 macro
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/aosp_15_r20/external/coreboot/src/soc/intel/tigerlake/include/soc/ |
H A D | iomap.h | 65 #define SPI_BASE_ADDRESS 0xfe010000 macro
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/aosp_15_r20/external/coreboot/src/soc/intel/alderlake/include/soc/ |
H A D | iomap.h | 86 #define SPI_BASE_ADDRESS 0xfe010000 macro
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/aosp_15_r20/external/coreboot/src/southbridge/amd/pi/hudson/ |
H A D | hudson.h | 55 #define SPI_BASE_ADDRESS 0xFEC10000 macro
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