1 /** 2 ****************************************************************************** 3 * @file stm32f4xx_hal_spdifrx.h 4 * @author MCD Application Team 5 * @brief Header file of SPDIFRX HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© Copyright (c) 2016 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef STM32F4xx_HAL_SPDIFRX_H 22 #define STM32F4xx_HAL_SPDIFRX_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 /* Includes ------------------------------------------------------------------*/ 29 #include "stm32f4xx_hal_def.h" 30 31 #if defined(STM32F446xx) 32 /** @addtogroup STM32F4xx_HAL_Driver 33 * @{ 34 */ 35 #if defined (SPDIFRX) 36 37 /** @addtogroup SPDIFRX 38 * @{ 39 */ 40 41 /* Exported types ------------------------------------------------------------*/ 42 /** @defgroup SPDIFRX_Exported_Types SPDIFRX Exported Types 43 * @{ 44 */ 45 46 /** 47 * @brief SPDIFRX Init structure definition 48 */ 49 typedef struct 50 { 51 uint32_t InputSelection; /*!< Specifies the SPDIF input selection. 52 This parameter can be a value of @ref SPDIFRX_Input_Selection */ 53 54 uint32_t Retries; /*!< Specifies the Maximum allowed re-tries during synchronization phase. 55 This parameter can be a value of @ref SPDIFRX_Max_Retries */ 56 57 uint32_t WaitForActivity; /*!< Specifies the wait for activity on SPDIF selected input. 58 This parameter can be a value of @ref SPDIFRX_Wait_For_Activity. */ 59 60 uint32_t ChannelSelection; /*!< Specifies whether the control flow will take the channel status from channel A or B. 61 This parameter can be a value of @ref SPDIFRX_Channel_Selection */ 62 63 uint32_t DataFormat; /*!< Specifies the Data samples format (LSB, MSB, ...). 64 This parameter can be a value of @ref SPDIFRX_Data_Format */ 65 66 uint32_t StereoMode; /*!< Specifies whether the peripheral is in stereo or mono mode. 67 This parameter can be a value of @ref SPDIFRX_Stereo_Mode */ 68 69 uint32_t PreambleTypeMask; /*!< Specifies whether The preamble type bits are copied or not into the received frame. 70 This parameter can be a value of @ref SPDIFRX_PT_Mask */ 71 72 uint32_t ChannelStatusMask; /*!< Specifies whether the channel status and user bits are copied or not into the received frame. 73 This parameter can be a value of @ref SPDIFRX_ChannelStatus_Mask */ 74 75 uint32_t ValidityBitMask; /*!< Specifies whether the validity bit is copied or not into the received frame. 76 This parameter can be a value of @ref SPDIFRX_V_Mask */ 77 78 uint32_t ParityErrorMask; /*!< Specifies whether the parity error bit is copied or not into the received frame. 79 This parameter can be a value of @ref SPDIFRX_PE_Mask */ 80 } SPDIFRX_InitTypeDef; 81 82 /** 83 * @brief SPDIFRX SetDataFormat structure definition 84 */ 85 typedef struct 86 { 87 uint32_t DataFormat; /*!< Specifies the Data samples format (LSB, MSB, ...). 88 This parameter can be a value of @ref SPDIFRX_Data_Format */ 89 90 uint32_t StereoMode; /*!< Specifies whether the peripheral is in stereo or mono mode. 91 This parameter can be a value of @ref SPDIFRX_Stereo_Mode */ 92 93 uint32_t PreambleTypeMask; /*!< Specifies whether The preamble type bits are copied or not into the received frame. 94 This parameter can be a value of @ref SPDIFRX_PT_Mask */ 95 96 uint32_t ChannelStatusMask; /*!< Specifies whether the channel status and user bits are copied or not into the received frame. 97 This parameter can be a value of @ref SPDIFRX_ChannelStatus_Mask */ 98 99 uint32_t ValidityBitMask; /*!< Specifies whether the validity bit is copied or not into the received frame. 100 This parameter can be a value of @ref SPDIFRX_V_Mask */ 101 102 uint32_t ParityErrorMask; /*!< Specifies whether the parity error bit is copied or not into the received frame. 103 This parameter can be a value of @ref SPDIFRX_PE_Mask */ 104 105 } SPDIFRX_SetDataFormatTypeDef; 106 107 /** 108 * @brief HAL State structures definition 109 */ 110 typedef enum 111 { 112 HAL_SPDIFRX_STATE_RESET = 0x00U, /*!< SPDIFRX not yet initialized or disabled */ 113 HAL_SPDIFRX_STATE_READY = 0x01U, /*!< SPDIFRX initialized and ready for use */ 114 HAL_SPDIFRX_STATE_BUSY = 0x02U, /*!< SPDIFRX internal process is ongoing */ 115 HAL_SPDIFRX_STATE_BUSY_RX = 0x03U, /*!< SPDIFRX internal Data Flow RX process is ongoing */ 116 HAL_SPDIFRX_STATE_BUSY_CX = 0x04U, /*!< SPDIFRX internal Control Flow RX process is ongoing */ 117 HAL_SPDIFRX_STATE_ERROR = 0x07U /*!< SPDIFRX error state */ 118 } HAL_SPDIFRX_StateTypeDef; 119 120 /** 121 * @brief SPDIFRX handle Structure definition 122 */ 123 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 124 typedef struct __SPDIFRX_HandleTypeDef 125 #else 126 typedef struct 127 #endif 128 { 129 SPDIFRX_TypeDef *Instance; /* SPDIFRX registers base address */ 130 131 SPDIFRX_InitTypeDef Init; /* SPDIFRX communication parameters */ 132 133 uint32_t *pRxBuffPtr; /* Pointer to SPDIFRX Rx transfer buffer */ 134 135 uint32_t *pCsBuffPtr; /* Pointer to SPDIFRX Cx transfer buffer */ 136 137 __IO uint16_t RxXferSize; /* SPDIFRX Rx transfer size */ 138 139 __IO uint16_t RxXferCount; /* SPDIFRX Rx transfer counter 140 (This field is initialized at the 141 same value as transfer size at the 142 beginning of the transfer and 143 decremented when a sample is received. 144 NbSamplesReceived = RxBufferSize-RxBufferCount) */ 145 146 __IO uint16_t CsXferSize; /* SPDIFRX Rx transfer size */ 147 148 __IO uint16_t CsXferCount; /* SPDIFRX Rx transfer counter 149 (This field is initialized at the 150 same value as transfer size at the 151 beginning of the transfer and 152 decremented when a sample is received. 153 NbSamplesReceived = RxBufferSize-RxBufferCount) */ 154 155 DMA_HandleTypeDef *hdmaCsRx; /* SPDIFRX EC60958_channel_status and user_information DMA handle parameters */ 156 157 DMA_HandleTypeDef *hdmaDrRx; /* SPDIFRX Rx DMA handle parameters */ 158 159 __IO HAL_LockTypeDef Lock; /* SPDIFRX locking object */ 160 161 __IO HAL_SPDIFRX_StateTypeDef State; /* SPDIFRX communication state */ 162 163 __IO uint32_t ErrorCode; /* SPDIFRX Error code */ 164 165 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 166 void (*RxHalfCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif); /*!< SPDIFRX Data flow half completed callback */ 167 void (*RxCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif); /*!< SPDIFRX Data flow completed callback */ 168 void (*CxHalfCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif); /*!< SPDIFRX Control flow half completed callback */ 169 void (*CxCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif); /*!< SPDIFRX Control flow completed callback */ 170 void (*ErrorCallback)(struct __SPDIFRX_HandleTypeDef *hspdif); /*!< SPDIFRX error callback */ 171 void (* MspInitCallback)( struct __SPDIFRX_HandleTypeDef * hspdif); /*!< SPDIFRX Msp Init callback */ 172 void (* MspDeInitCallback)( struct __SPDIFRX_HandleTypeDef * hspdif); /*!< SPDIFRX Msp DeInit callback */ 173 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 174 175 } SPDIFRX_HandleTypeDef; 176 /** 177 * @} 178 */ 179 180 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 181 /** 182 * @brief HAL SPDIFRX Callback ID enumeration definition 183 */ 184 typedef enum 185 { 186 HAL_SPDIFRX_RX_HALF_CB_ID = 0x00U, /*!< SPDIFRX Data flow half completed callback ID */ 187 HAL_SPDIFRX_RX_CPLT_CB_ID = 0x01U, /*!< SPDIFRX Data flow completed callback */ 188 HAL_SPDIFRX_CX_HALF_CB_ID = 0x02U, /*!< SPDIFRX Control flow half completed callback */ 189 HAL_SPDIFRX_CX_CPLT_CB_ID = 0x03U, /*!< SPDIFRX Control flow completed callback */ 190 HAL_SPDIFRX_ERROR_CB_ID = 0x04U, /*!< SPDIFRX error callback */ 191 HAL_SPDIFRX_MSPINIT_CB_ID = 0x05U, /*!< SPDIFRX Msp Init callback ID */ 192 HAL_SPDIFRX_MSPDEINIT_CB_ID = 0x06U /*!< SPDIFRX Msp DeInit callback ID */ 193 }HAL_SPDIFRX_CallbackIDTypeDef; 194 195 /** 196 * @brief HAL SPDIFRX Callback pointer definition 197 */ 198 typedef void (*pSPDIFRX_CallbackTypeDef)(SPDIFRX_HandleTypeDef * hspdif); /*!< pointer to an SPDIFRX callback function */ 199 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 200 201 /* Exported constants --------------------------------------------------------*/ 202 /** @defgroup SPDIFRX_Exported_Constants SPDIFRX Exported Constants 203 * @{ 204 */ 205 /** @defgroup SPDIFRX_ErrorCode SPDIFRX Error Code 206 * @{ 207 */ 208 #define HAL_SPDIFRX_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */ 209 #define HAL_SPDIFRX_ERROR_TIMEOUT ((uint32_t)0x00000001U) /*!< Timeout error */ 210 #define HAL_SPDIFRX_ERROR_OVR ((uint32_t)0x00000002U) /*!< OVR error */ 211 #define HAL_SPDIFRX_ERROR_PE ((uint32_t)0x00000004U) /*!< Parity error */ 212 #define HAL_SPDIFRX_ERROR_DMA ((uint32_t)0x00000008U) /*!< DMA transfer error */ 213 #define HAL_SPDIFRX_ERROR_UNKNOWN ((uint32_t)0x00000010U) /*!< Unknown Error error */ 214 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 215 #define HAL_SPDIFRX_ERROR_INVALID_CALLBACK ((uint32_t)0x00000020U) /*!< Invalid Callback error */ 216 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 217 /** 218 * @} 219 */ 220 221 /** @defgroup SPDIFRX_Input_Selection SPDIFRX Input Selection 222 * @{ 223 */ 224 #define SPDIFRX_INPUT_IN0 ((uint32_t)0x00000000U) 225 #define SPDIFRX_INPUT_IN1 ((uint32_t)0x00010000U) 226 #define SPDIFRX_INPUT_IN2 ((uint32_t)0x00020000U) 227 #define SPDIFRX_INPUT_IN3 ((uint32_t)0x00030000U) 228 /** 229 * @} 230 */ 231 232 /** @defgroup SPDIFRX_Max_Retries SPDIFRX Maximum Retries 233 * @{ 234 */ 235 #define SPDIFRX_MAXRETRIES_NONE ((uint32_t)0x00000000U) 236 #define SPDIFRX_MAXRETRIES_3 ((uint32_t)0x00001000U) 237 #define SPDIFRX_MAXRETRIES_15 ((uint32_t)0x00002000U) 238 #define SPDIFRX_MAXRETRIES_63 ((uint32_t)0x00003000U) 239 /** 240 * @} 241 */ 242 243 /** @defgroup SPDIFRX_Wait_For_Activity SPDIFRX Wait For Activity 244 * @{ 245 */ 246 #define SPDIFRX_WAITFORACTIVITY_OFF ((uint32_t)0x00000000U) 247 #define SPDIFRX_WAITFORACTIVITY_ON ((uint32_t)SPDIFRX_CR_WFA) 248 /** 249 * @} 250 */ 251 252 /** @defgroup SPDIFRX_PT_Mask SPDIFRX Preamble Type Mask 253 * @{ 254 */ 255 #define SPDIFRX_PREAMBLETYPEMASK_OFF ((uint32_t)0x00000000U) 256 #define SPDIFRX_PREAMBLETYPEMASK_ON ((uint32_t)SPDIFRX_CR_PTMSK) 257 /** 258 * @} 259 */ 260 261 /** @defgroup SPDIFRX_ChannelStatus_Mask SPDIFRX Channel Status Mask 262 * @{ 263 */ 264 #define SPDIFRX_CHANNELSTATUS_OFF ((uint32_t)0x00000000U) /* The channel status and user bits are copied into the SPDIF_DR */ 265 #define SPDIFRX_CHANNELSTATUS_ON ((uint32_t)SPDIFRX_CR_CUMSK) /* The channel status and user bits are not copied into the SPDIF_DR, zeros are written instead*/ 266 /** 267 * @} 268 */ 269 270 /** @defgroup SPDIFRX_V_Mask SPDIFRX Validity Mask 271 * @{ 272 */ 273 #define SPDIFRX_VALIDITYMASK_OFF ((uint32_t)0x00000000U) 274 #define SPDIFRX_VALIDITYMASK_ON ((uint32_t)SPDIFRX_CR_VMSK) 275 /** 276 * @} 277 */ 278 279 /** @defgroup SPDIFRX_PE_Mask SPDIFRX Parity Error Mask 280 * @{ 281 */ 282 #define SPDIFRX_PARITYERRORMASK_OFF ((uint32_t)0x00000000U) 283 #define SPDIFRX_PARITYERRORMASK_ON ((uint32_t)SPDIFRX_CR_PMSK) 284 /** 285 * @} 286 */ 287 288 /** @defgroup SPDIFRX_Channel_Selection SPDIFRX Channel Selection 289 * @{ 290 */ 291 #define SPDIFRX_CHANNEL_A ((uint32_t)0x00000000U) 292 #define SPDIFRX_CHANNEL_B ((uint32_t)SPDIFRX_CR_CHSEL) 293 /** 294 * @} 295 */ 296 297 /** @defgroup SPDIFRX_Data_Format SPDIFRX Data Format 298 * @{ 299 */ 300 #define SPDIFRX_DATAFORMAT_LSB ((uint32_t)0x00000000U) 301 #define SPDIFRX_DATAFORMAT_MSB ((uint32_t)0x00000010U) 302 #define SPDIFRX_DATAFORMAT_32BITS ((uint32_t)0x00000020U) 303 /** 304 * @} 305 */ 306 307 /** @defgroup SPDIFRX_Stereo_Mode SPDIFRX Stereo Mode 308 * @{ 309 */ 310 #define SPDIFRX_STEREOMODE_DISABLE ((uint32_t)0x00000000U) 311 #define SPDIFRX_STEREOMODE_ENABLE ((uint32_t)SPDIFRX_CR_RXSTEO) 312 /** 313 * @} 314 */ 315 316 /** @defgroup SPDIFRX_State SPDIFRX State 317 * @{ 318 */ 319 320 #define SPDIFRX_STATE_IDLE ((uint32_t)0xFFFFFFFCU) 321 #define SPDIFRX_STATE_SYNC ((uint32_t)0x00000001U) 322 #define SPDIFRX_STATE_RCV ((uint32_t)SPDIFRX_CR_SPDIFEN) 323 /** 324 * @} 325 */ 326 327 /** @defgroup SPDIFRX_Interrupts_Definition SPDIFRX Interrupts Definition 328 * @{ 329 */ 330 #define SPDIFRX_IT_RXNE ((uint32_t)SPDIFRX_IMR_RXNEIE) 331 #define SPDIFRX_IT_CSRNE ((uint32_t)SPDIFRX_IMR_CSRNEIE) 332 #define SPDIFRX_IT_PERRIE ((uint32_t)SPDIFRX_IMR_PERRIE) 333 #define SPDIFRX_IT_OVRIE ((uint32_t)SPDIFRX_IMR_OVRIE) 334 #define SPDIFRX_IT_SBLKIE ((uint32_t)SPDIFRX_IMR_SBLKIE) 335 #define SPDIFRX_IT_SYNCDIE ((uint32_t)SPDIFRX_IMR_SYNCDIE) 336 #define SPDIFRX_IT_IFEIE ((uint32_t)SPDIFRX_IMR_IFEIE ) 337 /** 338 * @} 339 */ 340 341 /** @defgroup SPDIFRX_Flags_Definition SPDIFRX Flags Definition 342 * @{ 343 */ 344 #define SPDIFRX_FLAG_RXNE ((uint32_t)SPDIFRX_SR_RXNE) 345 #define SPDIFRX_FLAG_CSRNE ((uint32_t)SPDIFRX_SR_CSRNE) 346 #define SPDIFRX_FLAG_PERR ((uint32_t)SPDIFRX_SR_PERR) 347 #define SPDIFRX_FLAG_OVR ((uint32_t)SPDIFRX_SR_OVR) 348 #define SPDIFRX_FLAG_SBD ((uint32_t)SPDIFRX_SR_SBD) 349 #define SPDIFRX_FLAG_SYNCD ((uint32_t)SPDIFRX_SR_SYNCD) 350 #define SPDIFRX_FLAG_FERR ((uint32_t)SPDIFRX_SR_FERR) 351 #define SPDIFRX_FLAG_SERR ((uint32_t)SPDIFRX_SR_SERR) 352 #define SPDIFRX_FLAG_TERR ((uint32_t)SPDIFRX_SR_TERR) 353 /** 354 * @} 355 */ 356 357 /** 358 * @} 359 */ 360 361 /* Exported macros -----------------------------------------------------------*/ 362 /** @defgroup SPDIFRX_Exported_macros SPDIFRX Exported Macros 363 * @{ 364 */ 365 366 /** @brief Reset SPDIFRX handle state 367 * @param __HANDLE__ SPDIFRX handle. 368 * @retval None 369 */ 370 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 371 #define __HAL_SPDIFRX_RESET_HANDLE_STATE(__HANDLE__) do{\ 372 (__HANDLE__)->State = HAL_SPDIFRX_STATE_RESET;\ 373 (__HANDLE__)->MspInitCallback = NULL;\ 374 (__HANDLE__)->MspDeInitCallback = NULL;\ 375 }while(0) 376 #else 377 #define __HAL_SPDIFRX_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPDIFRX_STATE_RESET) 378 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 379 380 /** @brief Disable the specified SPDIFRX peripheral (IDLE State). 381 * @param __HANDLE__ specifies the SPDIFRX Handle. 382 * @retval None 383 */ 384 #define __HAL_SPDIFRX_IDLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= SPDIFRX_STATE_IDLE) 385 386 /** @brief Enable the specified SPDIFRX peripheral (SYNC State). 387 * @param __HANDLE__ specifies the SPDIFRX Handle. 388 * @retval None 389 */ 390 #define __HAL_SPDIFRX_SYNC(__HANDLE__) ((__HANDLE__)->Instance->CR |= SPDIFRX_STATE_SYNC) 391 392 393 /** @brief Enable the specified SPDIFRX peripheral (RCV State). 394 * @param __HANDLE__ specifies the SPDIFRX Handle. 395 * @retval None 396 */ 397 #define __HAL_SPDIFRX_RCV(__HANDLE__) ((__HANDLE__)->Instance->CR |= SPDIFRX_STATE_RCV) 398 399 400 /** @brief Enable or disable the specified SPDIFRX interrupts. 401 * @param __HANDLE__ specifies the SPDIFRX Handle. 402 * @param __INTERRUPT__ specifies the interrupt source to enable or disable. 403 * This parameter can be one of the following values: 404 * @arg SPDIFRX_IT_RXNE 405 * @arg SPDIFRX_IT_CSRNE 406 * @arg SPDIFRX_IT_PERRIE 407 * @arg SPDIFRX_IT_OVRIE 408 * @arg SPDIFRX_IT_SBLKIE 409 * @arg SPDIFRX_IT_SYNCDIE 410 * @arg SPDIFRX_IT_IFEIE 411 * @retval None 412 */ 413 #define __HAL_SPDIFRX_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__)) 414 #define __HAL_SPDIFRX_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR &= (uint16_t)(~(__INTERRUPT__))) 415 416 /** @brief Checks if the specified SPDIFRX interrupt source is enabled or disabled. 417 * @param __HANDLE__ specifies the SPDIFRX Handle. 418 * @param __INTERRUPT__ specifies the SPDIFRX interrupt source to check. 419 * This parameter can be one of the following values: 420 * @arg SPDIFRX_IT_RXNE 421 * @arg SPDIFRX_IT_CSRNE 422 * @arg SPDIFRX_IT_PERRIE 423 * @arg SPDIFRX_IT_OVRIE 424 * @arg SPDIFRX_IT_SBLKIE 425 * @arg SPDIFRX_IT_SYNCDIE 426 * @arg SPDIFRX_IT_IFEIE 427 * @retval The new state of __IT__ (TRUE or FALSE). 428 */ 429 #define __HAL_SPDIFRX_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IMR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 430 431 /** @brief Checks whether the specified SPDIFRX flag is set or not. 432 * @param __HANDLE__ specifies the SPDIFRX Handle. 433 * @param __FLAG__ specifies the flag to check. 434 * This parameter can be one of the following values: 435 * @arg SPDIFRX_FLAG_RXNE 436 * @arg SPDIFRX_FLAG_CSRNE 437 * @arg SPDIFRX_FLAG_PERR 438 * @arg SPDIFRX_FLAG_OVR 439 * @arg SPDIFRX_FLAG_SBD 440 * @arg SPDIFRX_FLAG_SYNCD 441 * @arg SPDIFRX_FLAG_FERR 442 * @arg SPDIFRX_FLAG_SERR 443 * @arg SPDIFRX_FLAG_TERR 444 * @retval The new state of __FLAG__ (TRUE or FALSE). 445 */ 446 #define __HAL_SPDIFRX_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) ? SET : RESET) 447 448 /** @brief Clears the specified SPDIFRX SR flag, in setting the proper IFCR register bit. 449 * @param __HANDLE__ specifies the USART Handle. 450 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set 451 * to clear the corresponding interrupt 452 * This parameter can be one of the following values: 453 * @arg SPDIFRX_FLAG_PERR 454 * @arg SPDIFRX_FLAG_OVR 455 * @arg SPDIFRX_SR_SBD 456 * @arg SPDIFRX_SR_SYNCD 457 * @retval None 458 */ 459 #define __HAL_SPDIFRX_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->IFCR = (uint32_t)(__IT_CLEAR__)) 460 461 /** 462 * @} 463 */ 464 465 /* Exported functions --------------------------------------------------------*/ 466 /** @addtogroup SPDIFRX_Exported_Functions 467 * @{ 468 */ 469 470 /** @addtogroup SPDIFRX_Exported_Functions_Group1 471 * @{ 472 */ 473 /* Initialization/de-initialization functions **********************************/ 474 HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif); 475 HAL_StatusTypeDef HAL_SPDIFRX_DeInit (SPDIFRX_HandleTypeDef *hspdif); 476 void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif); 477 void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif); 478 HAL_StatusTypeDef HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef *hspdif, SPDIFRX_SetDataFormatTypeDef sDataFormat); 479 480 /* Callbacks Register/UnRegister functions ***********************************/ 481 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 482 HAL_StatusTypeDef HAL_SPDIFRX_RegisterCallback(SPDIFRX_HandleTypeDef *hspdif, HAL_SPDIFRX_CallbackIDTypeDef CallbackID, pSPDIFRX_CallbackTypeDef pCallback); 483 HAL_StatusTypeDef HAL_SPDIFRX_UnRegisterCallback(SPDIFRX_HandleTypeDef *hspdif, HAL_SPDIFRX_CallbackIDTypeDef CallbackID); 484 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 485 /** 486 * @} 487 */ 488 489 /** @addtogroup SPDIFRX_Exported_Functions_Group2 490 * @{ 491 */ 492 /* I/O operation functions ***************************************************/ 493 /* Blocking mode: Polling */ 494 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout); 495 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout); 496 497 /* Non-Blocking mode: Interrupt */ 498 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size); 499 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size); 500 void HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef *hspdif); 501 502 /* Non-Blocking mode: DMA */ 503 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size); 504 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size); 505 HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif); 506 507 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/ 508 void HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif); 509 void HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef *hspdif); 510 void HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef *hspdif); 511 void HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif); 512 void HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef *hspdif); 513 /** 514 * @} 515 */ 516 517 /** @addtogroup SPDIFRX_Exported_Functions_Group3 518 * @{ 519 */ 520 /* Peripheral Control and State functions ************************************/ 521 HAL_SPDIFRX_StateTypeDef HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef const * const hspdif); 522 uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef const * const hspdif); 523 /** 524 * @} 525 */ 526 527 /** 528 * @} 529 */ 530 /* Private types -------------------------------------------------------------*/ 531 /* Private variables ---------------------------------------------------------*/ 532 /* Private constants ---------------------------------------------------------*/ 533 /* Private macros ------------------------------------------------------------*/ 534 /** @defgroup SPDIFRX_Private_Macros SPDIFRX Private Macros 535 * @{ 536 */ 537 #define IS_SPDIFRX_INPUT_SELECT(INPUT) (((INPUT) == SPDIFRX_INPUT_IN1) || \ 538 ((INPUT) == SPDIFRX_INPUT_IN2) || \ 539 ((INPUT) == SPDIFRX_INPUT_IN3) || \ 540 ((INPUT) == SPDIFRX_INPUT_IN0)) 541 542 #define IS_SPDIFRX_MAX_RETRIES(RET) (((RET) == SPDIFRX_MAXRETRIES_NONE) || \ 543 ((RET) == SPDIFRX_MAXRETRIES_3) || \ 544 ((RET) == SPDIFRX_MAXRETRIES_15) || \ 545 ((RET) == SPDIFRX_MAXRETRIES_63)) 546 547 #define IS_SPDIFRX_WAIT_FOR_ACTIVITY(VAL) (((VAL) == SPDIFRX_WAITFORACTIVITY_ON) || \ 548 ((VAL) == SPDIFRX_WAITFORACTIVITY_OFF)) 549 550 #define IS_PREAMBLE_TYPE_MASK(VAL) (((VAL) == SPDIFRX_PREAMBLETYPEMASK_ON) || \ 551 ((VAL) == SPDIFRX_PREAMBLETYPEMASK_OFF)) 552 553 #define IS_VALIDITY_MASK(VAL) (((VAL) == SPDIFRX_VALIDITYMASK_OFF) || \ 554 ((VAL) == SPDIFRX_VALIDITYMASK_ON)) 555 556 #define IS_PARITY_ERROR_MASK(VAL) (((VAL) == SPDIFRX_PARITYERRORMASK_OFF) || \ 557 ((VAL) == SPDIFRX_PARITYERRORMASK_ON)) 558 559 #define IS_SPDIFRX_CHANNEL(CHANNEL) (((CHANNEL) == SPDIFRX_CHANNEL_A) || \ 560 ((CHANNEL) == SPDIFRX_CHANNEL_B)) 561 562 #define IS_SPDIFRX_DATA_FORMAT(FORMAT) (((FORMAT) == SPDIFRX_DATAFORMAT_LSB) || \ 563 ((FORMAT) == SPDIFRX_DATAFORMAT_MSB) || \ 564 ((FORMAT) == SPDIFRX_DATAFORMAT_32BITS)) 565 566 #define IS_STEREO_MODE(MODE) (((MODE) == SPDIFRX_STEREOMODE_DISABLE) || \ 567 ((MODE) == SPDIFRX_STEREOMODE_ENABLE)) 568 569 #define IS_CHANNEL_STATUS_MASK(VAL) (((VAL) == SPDIFRX_CHANNELSTATUS_ON) || \ 570 ((VAL) == SPDIFRX_CHANNELSTATUS_OFF)) 571 572 /** 573 * @} 574 */ 575 576 /* Private functions ---------------------------------------------------------*/ 577 /** @defgroup SPDIFRX_Private_Functions SPDIFRX Private Functions 578 * @{ 579 */ 580 /** 581 * @} 582 */ 583 584 /** 585 * @} 586 */ 587 #endif /* SPDIFRX */ 588 /** 589 * @} 590 */ 591 #endif /* STM32F446xx */ 592 593 #ifdef __cplusplus 594 } 595 #endif 596 597 598 #endif /* __STM32F4xx_HAL_SPDIFRX_H */ 599 600 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 601