Home
last modified time | relevance | path

Searched defs:SMI_EN (Results 1 – 20 of 20) sorted by relevance

/aosp_15_r20/external/coreboot/src/southbridge/intel/common/
H A Dpmutil.h87 #define SMI_EN 0x30 macro
/aosp_15_r20/external/coreboot/src/southbridge/intel/i82371eb/
H A Di82371eb.h80 #define SMI_EN (1<<0) /* SMI enable */ macro
/aosp_15_r20/external/coreboot/src/soc/intel/xeon_sp/include/soc/
H A Dpm.h29 #define SMI_EN 0x30 macro
/aosp_15_r20/external/coreboot/src/southbridge/intel/i82801dx/
H A Di82801dx.h119 #define SMI_EN 0x30 macro
/aosp_15_r20/external/coreboot/src/soc/intel/broadwell/include/soc/
H A Dpm.h30 #define SMI_EN 0x30 macro
/aosp_15_r20/external/coreboot/src/soc/intel/cannonlake/include/soc/
H A Dpm.h26 #define SMI_EN 0x30 macro
/aosp_15_r20/external/coreboot/src/soc/intel/alderlake/include/soc/
H A Dpm.h32 #define SMI_EN 0x30 macro
/aosp_15_r20/external/coreboot/src/soc/intel/elkhartlake/include/soc/
H A Dpm.h26 #define SMI_EN 0x30 macro
/aosp_15_r20/external/coreboot/src/soc/intel/tigerlake/include/soc/
H A Dpm.h32 #define SMI_EN 0x30 macro
/aosp_15_r20/external/coreboot/src/soc/intel/jasperlake/include/soc/
H A Dpm.h26 #define SMI_EN 0x30 macro
/aosp_15_r20/external/coreboot/src/soc/intel/meteorlake/include/soc/
H A Dpm.h26 #define SMI_EN 0x30 macro
/aosp_15_r20/external/coreboot/src/soc/intel/apollolake/include/soc/
H A Dpm.h32 #define SMI_EN 0x40 macro
/aosp_15_r20/external/coreboot/src/soc/intel/skylake/include/soc/
H A Dpm.h35 #define SMI_EN 0x30 macro
/aosp_15_r20/external/coreboot/src/soc/intel/braswell/include/soc/
H A Dpm.h169 #define SMI_EN 0x30 macro
/aosp_15_r20/external/coreboot/src/soc/intel/denverton_ns/include/soc/
H A Dpmc.h81 #define SMI_EN 0x30 macro
/aosp_15_r20/external/coreboot/src/southbridge/intel/i82801gx/
H A Di82801gx.h304 #define SMI_EN 0x30 macro
/aosp_15_r20/external/coreboot/src/soc/intel/baytrail/include/soc/
H A Dpm.h207 #define SMI_EN 0x30 macro
/aosp_15_r20/external/coreboot/src/southbridge/intel/ibexpeak/
H A Dpch.h422 #define SMI_EN 0x30 macro
/aosp_15_r20/external/coreboot/src/southbridge/intel/bd82x6x/
H A Dpch.h470 #define SMI_EN 0x30 macro
/aosp_15_r20/external/coreboot/src/southbridge/intel/lynxpoint/
H A Dpch.h673 #define SMI_EN 0x30 macro