Searched defs:Rsb (Results 1 – 6 of 6) sorted by relevance
| /aosp_15_r20/art/compiler/utils/arm/ |
| H A D | assembler_arm_vixl.cc | 63 ___ Rsb(reg, reg, 0); in PoisonHeapReference() local
68 ___ Rsb(reg, reg, 0); in UnpoisonHeapReference() local
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| /aosp_15_r20/external/vixl/examples/aarch32/ |
| H A D | abs.cc | 41 __ Rsb(mi, r0, r0, 0); in GenerateAbs() local
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| /aosp_15_r20/art/compiler/optimizing/ |
| H A D | code_generator_arm_vixl.cc | 3871 __ Rsb(OutputRegister(neg), InputRegisterAt(neg, 0), 0); in VisitNeg() local
4498 __ Rsb(out, dividend, 0); in DivRemOneOrMinusOne() local
4520 __ Rsb(out, out, 0); in DivRemByPowerOfTwo() local
5312 __ Rsb(negated, RegisterFrom(rhs), 0); in HandleIntegerRotate() local
5371 __ Rsb(RegisterFrom(negated), RegisterFrom(in), 0); in HandleLongRotate() local
5378 __ Rsb(LeaveFlags, shift_left, shift_right, Operand::From(kArmBitsPerWord)); in HandleLongRotate() local
5569 __ Rsb(temp, o_l, Operand::From(kArmBitsPerWord)); in HandleShift() local
5588 __ Rsb(temp, o_h, Operand::From(kArmBitsPerWord)); in HandleShift() local
5606 __ Rsb(temp, o_h, Operand::From(kArmBitsPerWord)); in HandleShift() local
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| H A D | intrinsics_arm_vixl.cc | 2066 __ Rsb(out_reg_hi, in_reg_hi, 0); in GenLowestOneBit() local
2067 __ Rsb(out_reg_lo, in_reg_lo, 0); in GenLowestOneBit() local
2091 __ Rsb(temp, in, 0); in GenLowestOneBit() local
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| /aosp_15_r20/external/swiftshader/third_party/subzero/src/ |
| H A D | IceInstARM32.h | 413 Rsb, enumerator
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| /aosp_15_r20/external/vixl/src/aarch32/ |
| H A D | macro-assembler-aarch32.h | 3213 void Rsb(Condition cond, Register rd, Register rn, const Operand& operand) { in Rsb() function
3227 void Rsb(Register rd, Register rn, const Operand& operand) { in Rsb() function
3230 void Rsb(FlagsUpdate flags, in Rsb() function
3254 void Rsb(FlagsUpdate flags, in Rsb() function
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