1 /** 2 ****************************************************************************** 3 * @file stm32f4xx_hal_sdram.h 4 * @author MCD Application Team 5 * @brief Header file of SDRAM HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef __STM32F4xx_HAL_SDRAM_H 22 #define __STM32F4xx_HAL_SDRAM_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ 29 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) 30 31 /* Includes ------------------------------------------------------------------*/ 32 #include "stm32f4xx_ll_fmc.h" 33 34 /** @addtogroup STM32F4xx_HAL_Driver 35 * @{ 36 */ 37 38 /** @addtogroup SDRAM 39 * @{ 40 */ 41 42 /* Exported typedef ----------------------------------------------------------*/ 43 /** @defgroup SDRAM_Exported_Types SDRAM Exported Types 44 * @{ 45 */ 46 47 /** 48 * @brief HAL SDRAM State structure definition 49 */ 50 typedef enum 51 { 52 HAL_SDRAM_STATE_RESET = 0x00U, /*!< SDRAM not yet initialized or disabled */ 53 HAL_SDRAM_STATE_READY = 0x01U, /*!< SDRAM initialized and ready for use */ 54 HAL_SDRAM_STATE_BUSY = 0x02U, /*!< SDRAM internal process is ongoing */ 55 HAL_SDRAM_STATE_ERROR = 0x03U, /*!< SDRAM error state */ 56 HAL_SDRAM_STATE_WRITE_PROTECTED = 0x04U, /*!< SDRAM device write protected */ 57 HAL_SDRAM_STATE_PRECHARGED = 0x05U /*!< SDRAM device precharged */ 58 59 } HAL_SDRAM_StateTypeDef; 60 61 /** 62 * @brief SDRAM handle Structure definition 63 */ 64 #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1) 65 typedef struct __SDRAM_HandleTypeDef 66 #else 67 typedef struct 68 #endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */ 69 { 70 FMC_SDRAM_TypeDef *Instance; /*!< Register base address */ 71 72 FMC_SDRAM_InitTypeDef Init; /*!< SDRAM device configuration parameters */ 73 74 __IO HAL_SDRAM_StateTypeDef State; /*!< SDRAM access state */ 75 76 HAL_LockTypeDef Lock; /*!< SDRAM locking object */ 77 78 DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */ 79 80 #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1) 81 void (* MspInitCallback) ( struct __SDRAM_HandleTypeDef * hsdram); /*!< SDRAM Msp Init callback */ 82 void (* MspDeInitCallback) ( struct __SDRAM_HandleTypeDef * hsdram); /*!< SDRAM Msp DeInit callback */ 83 void (* RefreshErrorCallback) ( struct __SDRAM_HandleTypeDef * hsdram); /*!< SDRAM Refresh Error callback */ 84 void (* DmaXferCpltCallback) ( DMA_HandleTypeDef * hdma); /*!< SDRAM DMA Xfer Complete callback */ 85 void (* DmaXferErrorCallback) ( DMA_HandleTypeDef * hdma); /*!< SDRAM DMA Xfer Error callback */ 86 #endif 87 } SDRAM_HandleTypeDef; 88 89 #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1) 90 /** 91 * @brief HAL SDRAM Callback ID enumeration definition 92 */ 93 typedef enum 94 { 95 HAL_SDRAM_MSP_INIT_CB_ID = 0x00U, /*!< SDRAM MspInit Callback ID */ 96 HAL_SDRAM_MSP_DEINIT_CB_ID = 0x01U, /*!< SDRAM MspDeInit Callback ID */ 97 HAL_SDRAM_REFRESH_ERR_CB_ID = 0x02U, /*!< SDRAM Refresh Error Callback ID */ 98 HAL_SDRAM_DMA_XFER_CPLT_CB_ID = 0x03U, /*!< SDRAM DMA Xfer Complete Callback ID */ 99 HAL_SDRAM_DMA_XFER_ERR_CB_ID = 0x04U /*!< SDRAM DMA Xfer Error Callback ID */ 100 }HAL_SDRAM_CallbackIDTypeDef; 101 102 /** 103 * @brief HAL SDRAM Callback pointer definition 104 */ 105 typedef void (*pSDRAM_CallbackTypeDef)(SDRAM_HandleTypeDef *hsdram); 106 typedef void (*pSDRAM_DmaCallbackTypeDef)(DMA_HandleTypeDef *hdma); 107 #endif 108 /** 109 * @} 110 */ 111 112 /* Exported constants --------------------------------------------------------*/ 113 /* Exported macro ------------------------------------------------------------*/ 114 /** @defgroup SDRAM_Exported_Macros SDRAM Exported Macros 115 * @{ 116 */ 117 118 /** @brief Reset SDRAM handle state 119 * @param __HANDLE__ specifies the SDRAM handle. 120 * @retval None 121 */ 122 #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1) 123 #define __HAL_SDRAM_RESET_HANDLE_STATE(__HANDLE__) do { \ 124 (__HANDLE__)->State = HAL_SDRAM_STATE_RESET; \ 125 (__HANDLE__)->MspInitCallback = NULL; \ 126 (__HANDLE__)->MspDeInitCallback = NULL; \ 127 } while(0) 128 #else 129 #define __HAL_SDRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SDRAM_STATE_RESET) 130 #endif 131 /** 132 * @} 133 */ 134 135 /* Exported functions --------------------------------------------------------*/ 136 /** @addtogroup SDRAM_Exported_Functions SDRAM Exported Functions 137 * @{ 138 */ 139 140 /** @addtogroup SDRAM_Exported_Functions_Group1 141 * @{ 142 */ 143 144 /* Initialization/de-initialization functions *********************************/ 145 HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing); 146 HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram); 147 void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram); 148 void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram); 149 150 void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram); 151 void HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef *hsdram); 152 void HAL_SDRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma); 153 void HAL_SDRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma); 154 /** 155 * @} 156 */ 157 158 /** @addtogroup SDRAM_Exported_Functions_Group2 159 * @{ 160 */ 161 /* I/O operation functions ****************************************************/ 162 HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize); 163 HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize); 164 HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize); 165 HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize); 166 HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize); 167 HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize); 168 169 HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t * pAddress, uint32_t *pDstBuffer, uint32_t BufferSize); 170 HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize); 171 172 #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1) 173 /* SDRAM callback registering/unregistering */ 174 HAL_StatusTypeDef HAL_SDRAM_RegisterCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId, pSDRAM_CallbackTypeDef pCallback); 175 HAL_StatusTypeDef HAL_SDRAM_UnRegisterCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId); 176 HAL_StatusTypeDef HAL_SDRAM_RegisterDmaCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId, pSDRAM_DmaCallbackTypeDef pCallback); 177 #endif 178 179 /** 180 * @} 181 */ 182 183 /** @addtogroup SDRAM_Exported_Functions_Group3 184 * @{ 185 */ 186 /* SDRAM Control functions *****************************************************/ 187 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram); 188 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram); 189 HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout); 190 HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate); 191 HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber); 192 uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram); 193 /** 194 * @} 195 */ 196 197 /** @addtogroup SDRAM_Exported_Functions_Group4 198 * @{ 199 */ 200 /* SDRAM State functions ********************************************************/ 201 HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram); 202 /** 203 * @} 204 */ 205 206 /** 207 * @} 208 */ 209 210 /** 211 * @} 212 */ 213 214 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */ 215 216 /** 217 * @} 218 */ 219 220 #ifdef __cplusplus 221 } 222 #endif 223 224 #endif /* __STM32F4xx_HAL_SDRAM_H */ 225 226 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 227