1 2 /*===================== begin_copyright_notice ================================== 3 4 # Copyright (c) 2024, Intel Corporation 5 # 6 # Permission is hereby granted, free of charge, to any person obtaining a 7 # copy of this software and associated documentation files (the "Software"), 8 # to deal in the Software without restriction, including without limitation 9 # the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 # and/or sell copies of the Software, and to permit persons to whom the 11 # Software is furnished to do so, subject to the following conditions: 12 # 13 # The above copyright notice and this permission notice shall be included 14 # in all copies or substantial portions of the Software. 15 # 16 # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 17 # OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 # THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 # OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 # ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 # OTHER DEALINGS IN THE SOFTWARE. 23 24 ======================= end_copyright_notice ==================================*/ 25 //! 26 //! \file mhw_vdbox_vvcp_hwcmd_xe2_lpm_X.h 27 //! \brief Auto-generated constructors for MHW and states. 28 //! \details This file may not be included outside of m15_X as other components 29 //! should use MHW interface to interact with MHW commands and states. 30 //! 31 32 // DO NOT EDIT 33 34 #ifndef __MHW_VDBOX_VVCP_HWCMD_XE2_LPM_X_H__ 35 #define __MHW_VDBOX_VVCP_HWCMD_XE2_LPM_X_H__ 36 37 #pragma once 38 #pragma pack(1) 39 40 #include "mhw_hwcmd.h" 41 #include <cstdint> 42 #include <cstddef> 43 #include "media_class_trace.h" 44 45 namespace mhw 46 { 47 namespace vdbox 48 { 49 namespace vvcp 50 { 51 namespace xe2_lpm_base 52 { 53 namespace xe2_lpm 54 { 55 class Cmd 56 { 57 58 public: GetOpLength(uint32_t uiLength)59 static uint32_t GetOpLength(uint32_t uiLength) { return __CODEGEN_OP_LENGTH(uiLength); } 60 61 //! 62 //! \brief MEMORYADDRESSATTRIBUTES 63 //! \details 64 //! This field controls the priority of arbitration used in the GAC/GAM 65 //! pipeline for this surface. It defines the attributes for VDBOX addresses 66 //! on BDW+. 67 //! 68 struct MEMORYADDRESSATTRIBUTES_CMD 69 { 70 union 71 { 72 struct 73 { 74 uint32_t Reserved0 : __CODEGEN_BITFIELD(0, 0); //!< Reserved 75 uint32_t BaseAddressIndexToMemoryObjectControlStateMocsTables : __CODEGEN_BITFIELD( 1, 6) ; //!< Base Address - Index to Memory Object Control State (MOCS) Tables 76 uint32_t BaseAddressArbitrationPriorityControl : __CODEGEN_BITFIELD( 7, 8) ; //!< Base Address - Arbitration Priority Control 77 uint32_t BaseAddressMemoryCompressionEnable : __CODEGEN_BITFIELD( 9, 9) ; //!< Base Address - Memory Compression Enable 78 uint32_t CompressionType : __CODEGEN_BITFIELD(10, 10) ; //!< COMPRESSION_TYPE 79 uint32_t Reserved11 : __CODEGEN_BITFIELD(11, 11) ; //!< Reserved 80 uint32_t BaseAddressRowStoreScratchBufferCacheSelect : __CODEGEN_BITFIELD(12, 12) ; //!< BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT 81 uint32_t Tilemode : __CODEGEN_BITFIELD(13, 14) ; //!< TILEMODE 82 uint32_t Reserved15 : __CODEGEN_BITFIELD(15, 31) ; //!< Reserved 83 }; 84 uint32_t Value; 85 } DW0; 86 87 //! \name Local enumerations 88 89 //! \brief COMPRESSION_TYPE 90 //! \details 91 //! Indicates if buffer is render/media compressed. 92 enum COMPRESSION_TYPE 93 { 94 COMPRESSION_TYPE_MEDIACOMPRESSIONENABLE = 0, //!< No additional details 95 COMPRESSION_TYPE_RENDERCOMPRESSIONENABLE = 1, //!< Only support rendered compression with unified memory 96 }; 97 98 //! \brief BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT 99 //! \details 100 //! This field controls if the Row Store is going to store inside Media 101 //! Cache (rowstore cache) or to LLC. 102 enum BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT 103 { 104 BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT_UNNAMED0 = 0, //!< Buffer going to LLC. 105 BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT_UNNAMED1 = 1, //!< Buffer going to Internal Media Storage. 106 }; 107 108 enum TILEMODE 109 { 110 TILEMODE_LINEAR = 0, //!< No additional details 111 TILEMODE_TILES_64K = 1, //!< No additional details 112 TILEMODE_TILEX = 2, //!< No additional details 113 TILEMODE_TILEF = 3, //!< No additional details 114 }; 115 116 //! \name Initializations 117 118 //! \brief Explicit member initialization function 119 MEMORYADDRESSATTRIBUTES_CMD(); 120 121 static const size_t dwSize = 1; 122 static const size_t byteSize = 4; 123 }; 124 125 //! 126 //! \brief SPLITBASEADDRESS4KBYTEALIGNED 127 //! \details 128 //! Specifies a 64-bit (48-bit canonical) 4K-byte aligned memory base 129 //! address. GraphicsAddress is a 64-bit value [63:0], but only a portion of 130 //! it is used by hardware. The upper reserved bits are ignored and MBZ. 131 //! 132 //! Bits 63:48 must be zero. 133 //! 134 struct SPLITBASEADDRESS4KBYTEALIGNED_CMD 135 { 136 union 137 { 138 struct 139 { 140 uint64_t Reserved0 : __CODEGEN_BITFIELD( 0, 11) ; //!< Reserved 141 uint64_t BaseAddress : __CODEGEN_BITFIELD(12, 56) ; //!< Base Address 142 uint64_t Reserved57 : __CODEGEN_BITFIELD(57, 63) ; //!< Reserved 143 }; 144 uint32_t Value[2]; 145 } DW0_1; 146 147 //! \name Local enumerations 148 149 //! \name Initializations 150 151 //! \brief Explicit member initialization function 152 SPLITBASEADDRESS4KBYTEALIGNED_CMD(); 153 154 static const size_t dwSize = 2; 155 static const size_t byteSize = 8; 156 }; 157 158 //! 159 //! \brief SPLITBASEADDRESS64BYTEALIGNED 160 //! \details 161 //! Specifies a 64-bit (48-bit canonical) 64-byte aligned memory base 162 //! address. 163 //! 164 //! Bits 63:48 must be zero. 165 //! 166 struct SPLITBASEADDRESS64BYTEALIGNED_CMD 167 { 168 union 169 { 170 struct 171 { 172 uint64_t Reserved0 : __CODEGEN_BITFIELD( 0, 5) ; //!< Reserved 173 uint64_t BaseAddress : __CODEGEN_BITFIELD( 6, 56) ; //!< Base Address 174 uint64_t Reserved57 : __CODEGEN_BITFIELD(57, 63) ; //!< Reserved 175 }; 176 uint32_t Value[2]; 177 } DW0_1; 178 179 //! \name Local enumerations 180 181 //! \name Initializations 182 183 //! \brief Explicit member initialization function 184 SPLITBASEADDRESS64BYTEALIGNED_CMD(); 185 186 static const size_t dwSize = 2; 187 static const size_t byteSize = 8; 188 }; 189 190 struct ALF_LUMA_CLIP_IDX_ENTRY 191 { 192 union 193 { 194 struct 195 { 196 uint32_t alf_luma_clip_idx0 : __CODEGEN_BITFIELD( 0, 1) ; 197 uint32_t alf_luma_clip_idx1 : __CODEGEN_BITFIELD( 2, 3) ; 198 uint32_t alf_luma_clip_idx2 : __CODEGEN_BITFIELD( 4, 5) ; 199 uint32_t alf_luma_clip_idx3 : __CODEGEN_BITFIELD( 6, 7) ; 200 uint32_t alf_luma_clip_idx4 : __CODEGEN_BITFIELD( 8, 9) ; 201 uint32_t alf_luma_clip_idx5 : __CODEGEN_BITFIELD( 10, 11) ; 202 uint32_t alf_luma_clip_idx6 : __CODEGEN_BITFIELD( 12, 13) ; 203 uint32_t alf_luma_clip_idx7 : __CODEGEN_BITFIELD( 14, 15) ; 204 uint32_t alf_luma_clip_idx8 : __CODEGEN_BITFIELD( 16, 17) ; 205 uint32_t alf_luma_clip_idx9 : __CODEGEN_BITFIELD( 18, 19) ; 206 uint32_t alf_luma_clip_idx10 : __CODEGEN_BITFIELD( 20, 21) ; 207 uint32_t alf_luma_clip_idx11 : __CODEGEN_BITFIELD( 22, 23) ; 208 uint32_t Reserved28 : __CODEGEN_BITFIELD( 24, 31) ; //!< Reserved 209 }; 210 uint32_t Value; 211 }; 212 }; 213 214 struct VVCP_APS_ALF_PARAMSET 215 { 216 union 217 { 218 struct 219 { 220 uint32_t AlfLumaCoeffDeltaIdx0 : __CODEGEN_BITFIELD( 0, 4) ; //!< Reserved 221 uint32_t AlfLumaCoeffDeltaIdx1 : __CODEGEN_BITFIELD( 5, 9) ; //!< lmcs_min_bin_idx 222 uint32_t AlfLumaCoeffDeltaIdx2 : __CODEGEN_BITFIELD(10, 14) ; //!< Reserved 223 uint32_t AlfLumaCoeffDeltaIdx3 : __CODEGEN_BITFIELD(15, 19) ; //!< lmcs_delta_max_bin_idx 224 uint32_t AlfLumaCoeffDeltaIdx4 : __CODEGEN_BITFIELD(20, 24) ; //!< Reserved 225 uint32_t AlfLumaCoeffDeltaIdx5 : __CODEGEN_BITFIELD(25, 29) ; //!< Reserved 226 uint32_t Reserved28 : __CODEGEN_BITFIELD(30, 31) ; //!< Reserved 227 }; 228 uint32_t Value; 229 } DW0; 230 union 231 { 232 struct 233 { 234 uint32_t AlfLumaCoeffDeltaIdx6 : __CODEGEN_BITFIELD( 0, 4) ; //!< Reserved 235 uint32_t AlfLumaCoeffDeltaIdx7 : __CODEGEN_BITFIELD( 5, 9) ; //!< lmcs_min_bin_idx 236 uint32_t AlfLumaCoeffDeltaIdx8 : __CODEGEN_BITFIELD(10, 14) ; //!< Reserved 237 uint32_t AlfLumaCoeffDeltaIdx9 : __CODEGEN_BITFIELD(15, 19) ; //!< lmcs_delta_max_bin_idx 238 uint32_t AlfLumaCoeffDeltaIdx10 : __CODEGEN_BITFIELD(20, 24) ; //!< Reserved 239 uint32_t AlfLumaCoeffDeltaIdx11 : __CODEGEN_BITFIELD(25, 29) ; //!< Reserved 240 uint32_t Reserved28 : __CODEGEN_BITFIELD(30, 31) ; //!< Reserved 241 }; 242 uint32_t Value; 243 } DW1; 244 union 245 { 246 struct 247 { 248 uint32_t AlfLumaCoeffDeltaIdx12 : __CODEGEN_BITFIELD( 0, 4) ; //!< Reserved 249 uint32_t AlfLumaCoeffDeltaIdx13 : __CODEGEN_BITFIELD( 5, 9) ; //!< lmcs_min_bin_idx 250 uint32_t AlfLumaCoeffDeltaIdx14 : __CODEGEN_BITFIELD(10, 14) ; //!< Reserved 251 uint32_t AlfLumaCoeffDeltaIdx15 : __CODEGEN_BITFIELD(15, 19) ; //!< lmcs_delta_max_bin_idx 252 uint32_t AlfLumaCoeffDeltaIdx16 : __CODEGEN_BITFIELD(20, 24) ; //!< Reserved 253 uint32_t AlfLumaCoeffDeltaIdx17 : __CODEGEN_BITFIELD(25, 29) ; //!< Reserved 254 uint32_t Reserved28 : __CODEGEN_BITFIELD(30, 31) ; //!< Reserved 255 }; 256 uint32_t Value; 257 } DW2; 258 union 259 { 260 struct 261 { 262 uint32_t AlfLumaCoeffDeltaIdx18 : __CODEGEN_BITFIELD( 0, 4) ; //!< Reserved 263 uint32_t AlfLumaCoeffDeltaIdx19 : __CODEGEN_BITFIELD( 5, 9) ; //!< lmcs_min_bin_idx 264 uint32_t AlfLumaCoeffDeltaIdx20 : __CODEGEN_BITFIELD(10, 14) ; //!< Reserved 265 uint32_t AlfLumaCoeffDeltaIdx21 : __CODEGEN_BITFIELD(15, 19) ; //!< lmcs_delta_max_bin_idx 266 uint32_t AlfLumaCoeffDeltaIdx22 : __CODEGEN_BITFIELD(20, 24) ; //!< Reserved 267 uint32_t AlfLumaCoeffDeltaIdx23 : __CODEGEN_BITFIELD(25, 29) ; //!< Reserved 268 uint32_t Reserved28 : __CODEGEN_BITFIELD(30, 31) ; //!< Reserved 269 }; 270 uint32_t Value; 271 } DW3; 272 union 273 { 274 struct 275 { 276 uint32_t AlfLumaCoeffDeltaIdx24 : __CODEGEN_BITFIELD( 0, 4) ; //!< Reserved 277 uint32_t Reserved28 : __CODEGEN_BITFIELD( 5, 31) ; //!< Reserved 278 }; 279 uint32_t Value; 280 } DW4; 281 282 ALF_LUMA_CLIP_IDX_ENTRY AlfLumaClipIdx[25]; //DW5-29 283 uint32_t DW30_Reserved;//DW30, reserved 284 uint32_t DW31_Reserved;//DW31, reserved 285 uint32_t AlfCoeffL[80];//DW32..111 286 uint32_t AlfCoeffC[12];//DW112..123 287 uint32_t AlfChromaClipIdx[3];// alf_chroma_clip_idx;//DW124..126 288 uint32_t D127_Reserved; 289 290 union 291 { 292 struct 293 { 294 uint32_t AlfCcCbFiltersSignalledMinus1 : __CODEGEN_BITFIELD( 0, 1) ; //!< Reserved 295 uint32_t Reserved32 : __CODEGEN_BITFIELD( 2, 3) ; //!< Reserved 296 uint32_t AlfCcCbCoeffSign :__CODEGEN_BITFIELD( 4, 31) ; 297 }; 298 uint32_t Value; 299 } DW128; 300 301 uint32_t AlfCcCbMappedCoeffAbs[7];// DW129..135, alf_cc_cb_mapped_coeff_abs[ 4 ][ 7 ] 302 303 union 304 { 305 struct 306 { 307 uint32_t AlfCcCrFiltersSignalledMinus1 : __CODEGEN_BITFIELD( 0, 1) ; //!< Reserved 308 uint32_t Reserved32 : __CODEGEN_BITFIELD( 2, 3) ; //!< Reserved 309 uint32_t AlfCcCrCoeffSign :__CODEGEN_BITFIELD( 4, 31) ; 310 }; 311 uint32_t Value; 312 } DW136; 313 314 uint32_t AlfCcCrMappedCoeffAbs[7];// DW137..143, alf_cc_cr_mapped_coeff_abs[4][7] 315 316 317 318 319 //! \name Local enumerations 320 321 //! \name Initializations 322 323 //! \brief Explicit member initialization function 324 VVCP_APS_ALF_PARAMSET(); 325 326 static const size_t dwSize = 144; 327 static const size_t byteSize = 576; 328 }; 329 330 331 //! 332 //! \brief VVCP_APS_LMCS_PARAMSET 333 //! \details 334 //! The lmcs_data() generic syntax arrays are replaced by the corresponding 335 //! derived LmcsPivot[17, InvScaleCoeff[ 16] and ChromaScaleCoeff[ 16] 336 //! arrays in the VVC spec. Driver sends only one set of LMCS Parameters to 337 //! HW in the APS LMCS Data Buffer. The set being sent corresponds to the 338 //! APS ID specified in the Slice Header. 339 //! 340 //! This APS LMCS Data Buffer is required to be cacheline (CL) aligned. An 341 //! APS LMCS Parameter Settakes up 1 CL(16 DWords). 342 //! 343 struct VVCP_APS_LMCS_PARAMSET_CMD 344 { 345 union 346 { 347 struct 348 { 349 uint32_t Reserved0 : __CODEGEN_BITFIELD( 0, 15) ; //!< Reserved 350 uint32_t LmcsMinBinIdx : __CODEGEN_BITFIELD(16, 19) ; //!< lmcs_min_bin_idx 351 uint32_t Reserved20 : __CODEGEN_BITFIELD(20, 23) ; //!< Reserved 352 uint32_t LmcsDeltaMaxBinIdx : __CODEGEN_BITFIELD(24, 27) ; //!< lmcs_delta_max_bin_idx 353 uint32_t Reserved28 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 354 }; 355 uint32_t Value; 356 } DW0; 357 union 358 { 359 struct 360 { 361 uint16_t Scalecoeff[16] ; //!< ScaleCoeff[ 16 ] 362 }; 363 uint32_t Value[8]; 364 } DW1_8; 365 union 366 { 367 struct 368 { 369 uint16_t Invscalecoeff[16] ; //!< InvScaleCoeff[ 16 ] 370 }; 371 uint32_t Value[8]; 372 } DW9_16; 373 union 374 { 375 struct 376 { 377 uint16_t Chromascalecoeff[16] ; //!< ChromaScaleCoeff[ 16 ] 378 }; 379 uint32_t Value[8]; 380 } DW17_24; 381 union 382 { 383 struct 384 { 385 uint16_t Lmcspivot[16] ; //!< LmcsPivot[ 16 ] 386 }; 387 uint32_t Value[8]; 388 } DW25_32; 389 390 391 //! \name Local enumerations 392 393 //! \name Initializations 394 395 //! \brief Explicit member initialization function 396 VVCP_APS_LMCS_PARAMSET_CMD(); 397 398 static const size_t dwSize = 33; 399 static const size_t byteSize = 132; 400 }; 401 402 //! 403 //! \brief VVCP_APS_SCALINGLIST_PARAMSET 404 //! \details 405 //! The scaling_list_data() generic syntax arrays are replaced by the 406 //! corresponding derived ScalingMatrix arrays in the VVC spec. Driver sends 407 //! only one set of Scaling Matrices to HW in the APS ScalingList Data 408 //! Buffer. The set being sent corresponds to the APS ID specified in the 409 //! Slice Header. The set being sent contains the following 4 arrays: 410 //! 1) ScalingMatrixDCRec[ 14 ]; 411 //! 2) ScalingMatrixRec2x2[ 2 ][ 2 ][ 2 ]; 412 //! 3) ScalingMatrixRec4x4[ 6 ][ 4 ][ 4 ]; and 413 //! 4) ScalingMatrixRec8x8[ 20 ][ 8 ][ 8 ]. 414 //! This APS ScalingList Data Buffer is required to be cacheline (CL) 415 //! aligned. The set of Scaling Matrices takes up 22 CLs (350DWords). 416 //! 417 struct VVCP_APS_SCALINGLIST_PARAMSET_CMD 418 { 419 uint32_t Onescalingmatrixset[351]; //!< OneScalingMatrixSet 420 421 //! \name Local enumerations 422 423 //! \name Initializations 424 425 //! \brief Explicit member initialization function 426 VVCP_APS_SCALINGLIST_PARAMSET_CMD(); 427 428 static const size_t dwSize = 351; 429 static const size_t byteSize = 1404; 430 }; 431 432 //! 433 //! \brief VVCP_DPB_ENTRY 434 //! \details 435 //! This structure define one entry of the array VVCP_DPB_ENTRY[i=0 .. 14]. 436 //! Each entry of VVCP_DPB_ENTRY[i=0..14] is associated with the 437 //! corresponding DPB buffer defined as Reference Picture Base Address 438 //! (RefAddr[i=..14]) in the VVCP_PIPE_BUF_ADDR_STATE Command. 439 //! 440 struct VVCP_DPB_ENTRY_CMD 441 { 442 union 443 { 444 struct 445 { 446 uint32_t DRefscalingwinleftoffsetI : __CODEGEN_BITFIELD( 0, 19) ; //!< D_refScalingWinLeftOffset[ i ] 447 uint32_t Reserved : __CODEGEN_BITFIELD(20, 31) ; //!< reserved bits 448 }; 449 uint32_t Value; 450 } DW0; 451 union 452 { 453 struct 454 { 455 uint32_t DRefscalingwinrightoffsetI : __CODEGEN_BITFIELD( 0, 19) ; //!< D_Refscalingwinrightoffset[ i ] 456 uint32_t Reserved : __CODEGEN_BITFIELD(20, 31) ; //!< reserved bits 457 }; 458 uint32_t Value; 459 } DW1; 460 union 461 { 462 struct 463 { 464 uint32_t DRefscalingwintopoffsetI : __CODEGEN_BITFIELD( 0, 19) ; //!< D_Refscalingwintopoffset[ i ] 465 uint32_t Reserved : __CODEGEN_BITFIELD(20, 31) ; //!< reserved bits 466 }; 467 uint32_t Value; 468 } DW2; 469 union 470 { 471 struct 472 { 473 uint32_t DRefscalingwinbottomoffsetI : __CODEGEN_BITFIELD( 0, 19) ; //!< D_Refscalingwinbottomoffset[ i ] 474 uint32_t Reserved : __CODEGEN_BITFIELD(20, 31) ; //!< reserved bits 475 }; 476 uint32_t Value; 477 } DW3; 478 union 479 { 480 struct 481 { 482 uint32_t DRefpicscalex0J : __CODEGEN_BITFIELD( 0, 15) ; //!< D_RefPicScaleX0[ j ] 483 uint32_t DRefpicscalex1J : __CODEGEN_BITFIELD(16, 31) ; //!< D_RefPicScaleX1[ j ] 484 }; 485 uint32_t Value; 486 } DW4; 487 union 488 { 489 struct 490 { 491 uint32_t DRefpicwidthI : __CODEGEN_BITFIELD( 0, 15) ; //!< D_refPicWidth[ j ] 492 uint32_t DRefpicheightI : __CODEGEN_BITFIELD(16, 31) ; //!< D_refPicHeight[ j ] 493 }; 494 uint32_t Value; 495 } DW5; 496 497 //! \name Local enumerations 498 499 //! \name Initializations 500 501 //! \brief Explicit member initialization function 502 VVCP_DPB_ENTRY_CMD(); 503 504 static const size_t dwSize = 6; 505 static const size_t byteSize = 24; 506 }; 507 508 //! 509 //! \brief VVCP_PIC_ALF_PARAMETER_ENTRY 510 //! \details 511 //! This structure define one entry of the array 512 //! VVCP_PIC_ALF_PARAMETER_ENTRY[i=0 .. 7]. 513 //! Each entry is 16-bits, and only the lower 14-bits [13:0] are defined, 514 //! [15:14] are not used and are undefined. 515 //! Each entry of the array VVCP_PIC_ALF_PARAMETER_ENTRY[i] corresponds to 516 //! one set of selected APS ALF framelevel parametersthat have moved from 517 //! APS_ALF_DATA_BUFFER to PIC_STATE instead. 518 //! 519 struct VVCP_PIC_ALF_PARAMETER_ENTRY_CMD 520 { 521 union 522 { 523 struct 524 { 525 uint16_t AlfLumaFilterSignalFlag : __CODEGEN_BITFIELD( 0, 0) ; //!< alf_luma_filter_signal_flag 526 uint16_t AlfChromaFilterSignalFlag : __CODEGEN_BITFIELD( 1, 1) ; //!< alf_chroma_filter_signal_flag 527 uint16_t AlfCcCbFilterSignalFlag : __CODEGEN_BITFIELD( 2, 2) ; //!< alf_cc_cb_filter_signal_flag 528 uint16_t AlfCcCrFilterSignalFlag : __CODEGEN_BITFIELD( 3, 3) ; //!< alf_cc_cr_filter_signal_flag 529 uint16_t AlfLumaClipFlag : __CODEGEN_BITFIELD( 4, 4) ; //!< alf_luma_clip_flag 530 uint16_t AlfChromaClipFlag : __CODEGEN_BITFIELD( 5, 5) ; //!< alf_chroma_clip_flag 531 uint16_t Reserved6 : __CODEGEN_BITFIELD( 6, 7) ; //!< Reserved 532 uint16_t AlfLumaNumFiltersSignalledMinus1 : __CODEGEN_BITFIELD( 8, 12) ; //!< alf_luma_num_filters_signalled_minus1 533 uint16_t AlfChromaNumAltFiltersMinus1 : __CODEGEN_BITFIELD(13, 15) ; //!< alf_chroma_num_alt_filters_minus1 534 }; 535 uint16_t Value; 536 } DW0; 537 538 //! \name Local enumerations 539 540 //! \name Initializations 541 542 //! \brief Explicit member initialization function 543 VVCP_PIC_ALF_PARAMETER_ENTRY_CMD(); 544 545 static const size_t dwSize = 0; 546 static const size_t byteSize = 2; 547 }; 548 549 //! 550 //! \brief VVCP_REF_LIST_ENTRY 551 //! \details 552 //! This structure define one entry of the array VVCP_REF_LIST_ENTRY[i=0 .. 553 //! 14]. 554 //! Each entry of VVCP_REF_LIST_ENTRY[i] corresponds to a [listIdx][i] 555 //! element of the corresponding variable defined in the REF_IDX_STATE 556 //! Command. 557 //! 558 //! 559 struct VVCP_REF_LIST_ENTRY_CMD 560 { 561 union 562 { 563 struct 564 { 565 uint32_t RefpiclistListidxI : __CODEGEN_BITFIELD( 0, 3) ; //!< RefPicList[listIdx][i] 566 uint32_t StRefPicFlagListidxRplsidxI : __CODEGEN_BITFIELD( 4, 4) ; //!< ST_REF_PIC_FLAG_LISTIDX__RPLSIDX__I_ 567 uint32_t RprconstraintsactiveflagListidxI : __CODEGEN_BITFIELD( 5, 5) ; //!< RprConstraintsActiveFlag[listIdx][ i ] 568 uint32_t Reserved6 : __CODEGEN_BITFIELD( 6, 14) ; //!< Reserved 569 uint32_t DUnavailablerefpicListidxI : __CODEGEN_BITFIELD(15, 15) ; //!< D_UnavailableRefPic[listIdx][ i ] 570 uint32_t DDiffpicordercntListidxI : __CODEGEN_BITFIELD(16, 31) ; //!< D_DiffPicOrderCnt[listIdx][ i ] 571 }; 572 uint32_t Value; 573 } DW0; 574 575 //! \name Local enumerations 576 577 //! \brief ST_REF_PIC_FLAG_LISTIDX__RPLSIDX__I_ 578 //! \details 579 //! listIdx = 0 for L0, 1 for L1, and i = [0 .. 14] is that of an entry 580 //! in the array VVCP_REF_LIST_ENTRY[i]. rplsIdx is ignored by HW and is set 581 //! by Driver to pick a single flag from thearrayst_ref_pic_flag[ listIdx ][ 582 //! rplsIdx ][ i ]. 583 //! st_ref_pic_flag equalto 1, specifies, the current reference frame 584 //! (i)is an STRP entry. st_ref_pic_flag equal to 0, specifies that it is an 585 //! LTRP entry. 586 enum ST_REF_PIC_FLAG_LISTIDX__RPLSIDX__I_ 587 { 588 ST_REF_PIC_FLAG_LISTIDX_RPLSIDX_I_LONGTERMREFERENCE = 0, //!< No additional details 589 ST_REF_PIC_FLAG_LISTIDX_RPLSIDX_I_SHORTTERMREFERENCE = 1, //!< No additional details 590 }; 591 592 //! \name Initializations 593 594 //! \brief Explicit member initialization function 595 VVCP_REF_LIST_ENTRY_CMD(); 596 597 static const size_t dwSize = 1; 598 static const size_t byteSize = 4; 599 }; 600 601 //! 602 //! \brief VVCP_SPS_CHROMAQPTABLE 603 //! \details 604 //! This is the exact same array variable ChromaQpTable[i=0/1/2][j=-12 to 605 //! 63] derived in the VVC Spec at SPS frame level. 606 //! This surface must be cacheline (CL) aligned. The size of this data 607 //! structure is 4 CLs (which is 64 DWords). 608 //! 609 //! 610 struct VVCP_SPS_CHROMAQPTABLE_CMD 611 { 612 uint32_t Chromaqptable[57]; //!< ChromaQpTable[][] 613 614 //! \name Local enumerations 615 616 //! \name Initializations 617 618 //! \brief Explicit member initialization function 619 VVCP_SPS_CHROMAQPTABLE_CMD(); 620 621 static const size_t dwSize = 57; 622 static const size_t byteSize = 228; 623 }; 624 625 //! 626 //! \brief VD_CONTROL_STATE_BODY 627 //! \details 628 //! 629 //! 630 struct VD_CONTROL_STATE_BODY_CMD 631 { 632 union 633 { 634 struct 635 { 636 uint32_t PipelineInitialization : __CODEGEN_BITFIELD( 0, 0) ; //!< Pipeline Initialization 637 uint32_t VdboxPipelineArchitectureClockgateDisable : __CODEGEN_BITFIELD( 1, 1) ; //!< VDBOX_PIPELINE_ARCHITECTURE_CLOCKGATE_DISABLE 638 uint32_t Reserved2 : __CODEGEN_BITFIELD( 2, 31) ; //!< Reserved 639 }; 640 uint32_t Value; 641 } DW0; 642 union 643 { 644 struct 645 { 646 uint32_t PipeScalableModePipeLock : __CODEGEN_BITFIELD( 0, 0) ; //!< Pipe Scalable Mode Pipe Lock 647 uint32_t PipeScalableModePipeUnlock : __CODEGEN_BITFIELD( 1, 1) ; //!< Pipe Scalable Mode Pipe Unlock 648 uint32_t MemoryImplicitFlush : __CODEGEN_BITFIELD( 2, 2) ; //!< Memory Implicit Flush 649 uint32_t Reserved35 : __CODEGEN_BITFIELD( 3, 31) ; //!< Reserved 650 }; 651 uint32_t Value; 652 } DW1; 653 654 //! \name Local enumerations 655 656 //! \brief VDBOX_PIPELINE_ARCHITECTURE_CLOCKGATE_DISABLE 657 //! \details 658 //! This is used to disable the architecture clockgate for AWM (in AVP 659 //! pipeline) or HWM (in HCP pipeline) if needed. 660 enum VDBOX_PIPELINE_ARCHITECTURE_CLOCKGATE_DISABLE 661 { 662 VDBOX_PIPELINE_ARCHITECTURE_CLOCKGATE_DISABLE_ENABLE = 0, //!< No additional details 663 VDBOX_PIPELINE_ARCHITECTURE_CLOCKGATE_DISABLE_DISABLE = 1, //!< No additional details 664 }; 665 666 //! \name Initializations 667 668 //! \brief Explicit member initialization function 669 VD_CONTROL_STATE_BODY_CMD(); 670 671 static const size_t dwSize = 2; 672 static const size_t byteSize = 8; 673 }; 674 675 //! 676 //! \brief VVCP_WEIGHTOFFSET_LUMA_ENTRY 677 //! \details 678 //! 679 //! 680 struct VVCP_WEIGHTOFFSET_LUMA_ENTRY_CMD 681 { 682 union 683 { 684 struct 685 { 686 uint32_t DeltaLumaWeightLxI : __CODEGEN_BITFIELD( 0, 15) ; //!< delta_luma_weight_lX[i] 687 uint32_t LumaOffsetLxI : __CODEGEN_BITFIELD(16, 31) ; //!< luma_offset_lX[i] 688 }; 689 uint32_t Value; 690 } DW0; 691 692 //! \name Local enumerations 693 694 //! \name Initializations 695 696 //! \brief Explicit member initialization function 697 VVCP_WEIGHTOFFSET_LUMA_ENTRY_CMD(); 698 699 static const size_t dwSize = 1; 700 static const size_t byteSize = 4; 701 }; 702 703 //! 704 //! \brief VVCP_WEIGHTOFFSET_CHROMA_ENTRY 705 //! \details 706 //! 707 //! 708 struct VVCP_WEIGHTOFFSET_CHROMA_ENTRY_CMD 709 { 710 union 711 { 712 struct 713 { 714 uint32_t DeltaChromaWeightLxIJ : __CODEGEN_BITFIELD( 0, 15) ; //!< delta_chroma_weight_lX[ i ][ j ] 715 uint32_t DeltaChromaOffsetLxIJ : __CODEGEN_BITFIELD(16, 31) ; //!< delta_chroma_offset_lX[ i ][ j ] 716 }; 717 uint32_t Value; 718 } DW0; 719 720 //! \name Local enumerations 721 722 //! \name Initializations 723 724 //! \brief Explicit member initialization function 725 VVCP_WEIGHTOFFSET_CHROMA_ENTRY_CMD(); 726 727 static const size_t dwSize = 1; 728 static const size_t byteSize = 4; 729 }; 730 731 //! 732 //! \brief VVCP_BSD_OBJECT 733 //! \details 734 //! The VVCP_BSD_OBJECT command fetches the VVC bit stream for a slice 735 //! starting with the first byte in the slice. The bit stream ends with the 736 //! last non-zero bit of the frame and does not include any zero-padding at 737 //! the end of the bit stream (??? is this restriction needed). There can be 738 //! multiple slices in a VVC frame and thus this command can be issued 739 //! multiple times per frame. 740 //! The VVCP_BSD_OBJECT command must be the last command issued in the 741 //! sequence of batch commands before the VVCP starts decoding. Prior to 742 //! issuing this command, it is assumed that all configuration parameters of 743 //! VVC have been loaded including workload configuration registers and 744 //! configuration tables. When this command is issued, the VVCP is waiting 745 //! for bit stream data to be presented to the shift register. 746 //! 747 struct VVCP_BSD_OBJECT_CMD 748 { 749 union 750 { 751 struct 752 { 753 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 754 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 755 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 21) ; //!< MEDIA_INSTRUCTION_COMMAND 756 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(22, 26) ; //!< MEDIA_INSTRUCTION_OPCODE 757 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE_TYPE 758 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 759 }; 760 uint32_t Value; 761 } DW0; 762 union 763 { 764 struct 765 { 766 uint32_t IndirectBsdDataLength ; //!< Indirect BSD Data Length 767 }; 768 uint32_t Value; 769 } DW1; 770 union 771 { 772 struct 773 { 774 uint32_t IndirectDataStartAddress ; //!< Indirect Data Start Address 775 }; 776 uint32_t Value; 777 } DW2; 778 779 //! \name Local enumerations 780 781 enum MEDIA_INSTRUCTION_COMMAND 782 { 783 MEDIA_INSTRUCTION_COMMAND_VVCPBSDOBJECTSTATE = 32, //!< No additional details 784 }; 785 786 //! \brief MEDIA_INSTRUCTION_OPCODE 787 //! \details 788 //! Codec/Engine Name = VVC 789 enum MEDIA_INSTRUCTION_OPCODE 790 { 791 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 15, //!< No additional details 792 }; 793 794 enum PIPELINE_TYPE 795 { 796 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 797 }; 798 799 enum COMMAND_TYPE 800 { 801 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 802 }; 803 804 //! \name Initializations 805 806 //! \brief Explicit member initialization function 807 VVCP_BSD_OBJECT_CMD(); 808 809 static const size_t dwSize = 3; 810 static const size_t byteSize = 12; 811 }; 812 813 //! 814 //! \brief VVCP_DPB_STATE 815 //! \details 816 //! The VVCP_DPB_STATE command is used to provide global information to all 817 //! reference pictures in the DPB, regardless of Reference Picture List L0 818 //! and L1 definitions. Parameters that are associated with Reference 819 //! Picture List L0 and L1 , should be kept in the VVCP_REF_IDX_STATE 820 //! Command. 821 //! This command is associated with the corresponding DPB buffer defined 822 //! asReference Picture Base Address (RefAddr[0-14]) in the 823 //! VVCP_PIPE_BUF_ADDR_STATE Command. 824 //! This is a picture level state command and is issued in both encoding and 825 //! decoding processes. 826 //! 827 struct VVCP_DPB_STATE_CMD 828 { 829 union 830 { 831 struct 832 { 833 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 834 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 835 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 21) ; //!< MEDIA_INSTRUCTION_COMMAND 836 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(22, 26) ; //!< MEDIA_INSTRUCTION_OPCODE 837 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE_TYPE 838 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 839 }; 840 uint32_t Value; 841 } DW0; 842 VVCP_DPB_ENTRY_CMD Entries[15]; //!< DW1..90, Entries 843 844 //! \name Local enumerations 845 846 enum MEDIA_INSTRUCTION_COMMAND 847 { 848 MEDIA_INSTRUCTION_COMMAND_VVCPDPBSTATE = 4, //!< No additional details 849 }; 850 851 //! \brief MEDIA_INSTRUCTION_OPCODE 852 //! \details 853 //! Codec/Engine Name = VVC 854 enum MEDIA_INSTRUCTION_OPCODE 855 { 856 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 15, //!< No additional details 857 }; 858 859 enum PIPELINE_TYPE 860 { 861 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 862 }; 863 864 enum COMMAND_TYPE 865 { 866 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 867 }; 868 869 //! \name Initializations 870 871 //! \brief Explicit member initialization function 872 VVCP_DPB_STATE_CMD(); 873 874 static const size_t dwSize = 91; 875 static const size_t byteSize = 364; 876 }; 877 878 //! 879 //! \brief VVCP_IND_OBJ_BASE_ADDR_STATE 880 //! \details 881 //! The VVCP_IND_OBJ_BASE_ADDR_STATE command is used to define the indirect 882 //! object base address of the VVCcompressed bitstream in graphics memory. 883 //! This is a frame level command issued in both encoding and decoding 884 //! processes. 885 //! Although a frame is coded as separate slices, all compressed slice 886 //! bitstreams are still required to line up sequentially as one VVC 887 //! bitstream. Hence, there is only one Indirect Object Base Address for the 888 //! entire VVC codedframe. If the frame contains more than 1 slice, the BSD 889 //! Object Command will be issued multiple times, once for each slice and 890 //! with its own slice bitstream starting memory address. 891 //! 892 struct VVCP_IND_OBJ_BASE_ADDR_STATE_CMD 893 { 894 union 895 { 896 struct 897 { 898 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 899 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 900 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 21) ; //!< MEDIA_INSTRUCTION_COMMAND 901 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(22, 26) ; //!< MEDIA_INSTRUCTION_OPCODE 902 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE_TYPE 903 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 904 }; 905 uint32_t Value; 906 } DW0; 907 SPLITBASEADDRESS4KBYTEALIGNED_CMD VvcpIndirectBitstreamObjectBaseAddress; //!< DW1..2, VVCP Indirect Bitstream Object Base Address 908 MEMORYADDRESSATTRIBUTES_CMD VvcpIndirectBitstreamObjectMemoryAddressAttributes; //!< DW3, VVCP Indirect Bitstream Object Memory Address Attributes 909 910 //! \name Local enumerations 911 912 enum MEDIA_INSTRUCTION_COMMAND 913 { 914 MEDIA_INSTRUCTION_COMMAND_VVCPINDOBJBASEADDRSTATE = 3, //!< No additional details 915 }; 916 917 //! \brief MEDIA_INSTRUCTION_OPCODE 918 //! \details 919 //! Codec/Engine Name = VVC 920 enum MEDIA_INSTRUCTION_OPCODE 921 { 922 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 15, //!< No additional details 923 }; 924 925 enum PIPELINE_TYPE 926 { 927 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 928 }; 929 930 enum COMMAND_TYPE 931 { 932 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 933 }; 934 935 //! \name Initializations 936 937 //! \brief Explicit member initialization function 938 VVCP_IND_OBJ_BASE_ADDR_STATE_CMD(); 939 940 static const size_t dwSize = 4; 941 static const size_t byteSize = 16; 942 }; 943 944 //! 945 //! \brief VVCP_MEM_DATA_ACCESS 946 //! \details 947 //! This command is used to modify the control of VVCP pipe (as well as HCP 948 //! and AVP Pipes). It can be inserted anywhere within a frame. It can be 949 //! inserted multiple times within a frame as well. 950 //! 951 struct VVCP_MEM_DATA_ACCESS_CMD 952 { 953 union 954 { 955 struct 956 { 957 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 958 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 959 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 21) ; //!< MEDIA_INSTRUCTION_COMMAND 960 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(22, 26) ; //!< MEDIA_INSTRUCTION_OPCODE 961 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE_TYPE 962 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 963 }; 964 uint32_t Value; 965 } DW0; 966 union 967 { 968 struct 969 { 970 uint32_t DataId : __CODEGEN_BITFIELD( 0, 7) ; //!< DATA_ID 971 uint32_t Reserved40 : __CODEGEN_BITFIELD( 8, 30) ; //!< Reserved 972 uint32_t AccessType : __CODEGEN_BITFIELD(31, 31) ; //!< ACCESS_TYPE 973 }; 974 uint32_t Value; 975 } DW1; 976 SPLITBASEADDRESS4KBYTEALIGNED_CMD DataAccessBaseAddress; //!< DW2..3, Data Access Base Address 977 MEMORYADDRESSATTRIBUTES_CMD DataAccessMemoryAddressAttributes; //!< DW4, Data Access Memory Address Attributes 978 union 979 { 980 struct 981 { 982 uint32_t ImmediateValue ; //!< Immediate Value 983 }; 984 uint32_t Value; 985 } DW5; 986 987 //! \name Local enumerations 988 989 enum MEDIA_INSTRUCTION_COMMAND 990 { 991 MEDIA_INSTRUCTION_COMMAND_VVCPMEMDATAACCESS = 15, //!< No additional details 992 }; 993 994 //! \brief MEDIA_INSTRUCTION_OPCODE 995 //! \details 996 //! Codec/EngineName = VVC 997 enum MEDIA_INSTRUCTION_OPCODE 998 { 999 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAMEFORVVCP = 15, //!< No additional details 1000 }; 1001 1002 enum PIPELINE_TYPE 1003 { 1004 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 1005 }; 1006 1007 enum COMMAND_TYPE 1008 { 1009 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 1010 }; 1011 1012 //! \brief DATA_ID 1013 //! \details 1014 //! Indicate the requested read/write data 1015 enum DATA_ID 1016 { 1017 DATA_ID_VVCPUNITDONE = 0, //!< This register contains VVCP unit dones.This register must be write-only. 1018 DATA_ID_VVCPSTATUS = 1, //!< This register contains VVCP unit status.This register must be write-only. 1019 DATA_ID_VVCPERRORSTATUS = 2, //!< This register contains VVCP error status.This register must be write-only. 1020 DATA_ID_VVCPSLICEPERFCNT = 3, //!< This register contains VVCP slice perf.This register must be write-only. 1021 DATA_ID_VVCPVCWMCRC = 4, //!< This register contains VVCP VCWM output CRC.This register must be write-only. 1022 DATA_ID_VVCPVCMXCRC = 5, //!< This register contains VVCP VCMX output CRC.This register must be write-only. 1023 DATA_ID_VVCPVCEDCRC = 6, //!< This register contains VVCP VCED output CRC.This register must be write-only. 1024 DATA_ID_VVCPVCMCCRC = 7, //!< This register contains VVCP VCMC output CRC.This register must be write-only. 1025 DATA_ID_VVCPVCPRCRC = 8, //!< This register contains VVCP VCPR output CRC.This register must be write-only. 1026 DATA_ID_VVCPVCLFCRC = 9, //!< This register contains VVCP VCLF output CRC.This register must be write-only. 1027 DATA_ID_VVCPVCALFCRC = 10, //!< This register contains VVCP VCALF output CRC.This register must be write-only. 1028 DATA_ID_VVCPMEMORYLATENCYCOUNT1 = 11, //!< This register contains VVCP Motion Comp Memory Latency counter 1.This register must be write-only. 1029 DATA_ID_VVCPMEMORYLATENCYCOUNT2 = 12, //!< This register contains VVCP Motion Comp Memory Latency counter 2.This register must be write-only. 1030 DATA_ID_VVCPMOTIONCOMPMISSCOUNT = 13, //!< This register contains VVCP Motion Comp Miss Counter.This register must be write-only. 1031 DATA_ID_VVCPMOTIONCOMPREADCOUNT = 14, //!< This register contains VVCP Motion Comp Read Counter.This register must be write-only. 1032 DATA_ID_IMMEDIATE = 255, //!< Use the 32-bit immediate values (provided in this instruction below) and write it to memory.This register must be write-only. 1033 }; 1034 1035 //! \brief ACCESS_TYPE 1036 //! \details 1037 //! Indicate if the data is read or write to memory 1038 enum ACCESS_TYPE 1039 { 1040 ACCESS_TYPE_READ = 0, //!< No additional details 1041 ACCESS_TYPE_WRITE = 1, //!< No additional details 1042 }; 1043 1044 //! \name Initializations 1045 1046 //! \brief Explicit member initialization function 1047 VVCP_MEM_DATA_ACCESS_CMD(); 1048 1049 static const size_t dwSize = 6; 1050 static const size_t byteSize = 24; 1051 }; 1052 1053 //! 1054 //! \brief VVCP_PIC_STATE 1055 //! \details 1056 //! This is a frame level command and is issued only once per workload for 1057 //! both VVC encoding and decoding processes. 1058 //! 1059 struct VVCP_PIC_STATE_CMD 1060 { 1061 union 1062 { 1063 struct 1064 { 1065 uint32_t Lengthfield : __CODEGEN_BITFIELD( 0, 11) ; //!< LENGTHFIELD 1066 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 1067 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 21) ; //!< MEDIA_INSTRUCTION_COMMAND 1068 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(22, 26) ; //!< MEDIA_INSTRUCTION_OPCODE 1069 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE_TYPE 1070 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 1071 }; 1072 uint32_t Value; 1073 } DW0; 1074 union 1075 { 1076 struct 1077 { 1078 uint32_t SpsSubpicInfoPresentFlag : __CODEGEN_BITFIELD( 0, 0) ; //!< sps_subpic_info_present_flag 1079 uint32_t SpsIndependentSubpicsFlag : __CODEGEN_BITFIELD( 1, 1) ; //!< sps_independent_subpics_flag 1080 uint32_t SpsSubpicSameSizeFlag : __CODEGEN_BITFIELD( 2, 2) ; //!< sps_subpic_same_size_flag 1081 uint32_t SpsEntropyCodingSyncEnabledFlag : __CODEGEN_BITFIELD( 3, 3) ; //!< sps_entropy_coding_sync_enabled_flag 1082 uint32_t SpsQtbttDualTreeIntraFlag : __CODEGEN_BITFIELD( 4, 4) ; //!< sps_qtbtt_dual_tree_intra_flag 1083 uint32_t SpsMaxLumaTransformSize64Flag : __CODEGEN_BITFIELD( 5, 5) ; //!< sps_max_luma_transform_size_64_flag 1084 uint32_t SpsTransformSkipEnabledFlag : __CODEGEN_BITFIELD( 6, 6) ; //!< sps_transform_skip_enabled_flag 1085 uint32_t SpsBdpcmEnabledFlag : __CODEGEN_BITFIELD( 7, 7) ; //!< sps_bdpcm_enabled_flag 1086 uint32_t SpsMtsEnabledFlag : __CODEGEN_BITFIELD( 8, 8) ; //!< sps_mts_enabled_flag 1087 uint32_t SpsExplicitMtsIntraEnabledFlag : __CODEGEN_BITFIELD( 9, 9) ; //!< sps_explicit_mts_intra_enabled_flag 1088 uint32_t SpsExplicitMtsInterEnabledFlag : __CODEGEN_BITFIELD(10, 10) ; //!< sps_explicit_mts_inter_enabled_flag 1089 uint32_t SpsLfnstEnabledFlag : __CODEGEN_BITFIELD(11, 11) ; //!< sps_lfnst_enabled_flag 1090 uint32_t SpsJointCbcrEnabledFlag : __CODEGEN_BITFIELD(12, 12) ; //!< sps_joint_cbcr_enabled_flag 1091 uint32_t SpsSameQpTableForChromaFlag : __CODEGEN_BITFIELD(13, 13) ; //!< sps_same_qp_table_for_chroma_flag 1092 uint32_t Reserved46 : __CODEGEN_BITFIELD(14, 14) ; //!< Reserved 1093 uint32_t DLmcsDisabledFlag : __CODEGEN_BITFIELD(15, 15) ; //!< D_lmcs_disabled_flag 1094 uint32_t DDblkDisabledFlag : __CODEGEN_BITFIELD(16, 16) ; //!< D_dblk_disabled_flag 1095 uint32_t DSaoLumaDisabledFlag : __CODEGEN_BITFIELD(17, 17) ; //!< D_sao_luma_disabled_flag 1096 uint32_t DSaoChromaDisabledFlag : __CODEGEN_BITFIELD(18, 18) ; //!< D_sao_chroma_disabled_flag 1097 uint32_t DAlfDisabledFlag : __CODEGEN_BITFIELD(19, 19) ; //!< D_alf_disabled_flag 1098 uint32_t DAlfCbDisabledFlag : __CODEGEN_BITFIELD(20, 20) ; //!< D_alf_cb_disabled_flag 1099 uint32_t DAlfCrDisabledFlag : __CODEGEN_BITFIELD(21, 21) ; //!< D_alf_cr_disabled_flag 1100 uint32_t DAlfCcCbDisabledFlag : __CODEGEN_BITFIELD(22, 22) ; //!< D_alf_cc_cb_disabled_flag 1101 uint32_t DAlfCcCrDisabledFlag : __CODEGEN_BITFIELD(23, 23) ; //!< D_alf_cc_cr_disabled_flag 1102 uint32_t DSingleSliceFrameFlag : __CODEGEN_BITFIELD(24, 24) ; //!< D_single_slice_frame_flag 1103 uint32_t Reserved56 : __CODEGEN_BITFIELD(25, 31) ; //!< Reserved 1104 }; 1105 uint32_t Value; 1106 } DW1; 1107 union 1108 { 1109 struct 1110 { 1111 uint32_t SpsSbtmvpEnabledFlag : __CODEGEN_BITFIELD( 0, 0) ; //!< sps_sbtmvp_enabled_flag 1112 uint32_t SpsAmvrEnabledFlag : __CODEGEN_BITFIELD( 1, 1) ; //!< sps_amvr_enabled_flag 1113 uint32_t SpsSmvdEnabledFlag : __CODEGEN_BITFIELD( 2, 2) ; //!< sps_smvd_enabled_flag 1114 uint32_t SpsMmvdEnabledFlag : __CODEGEN_BITFIELD( 3, 3) ; //!< sps_mmvd_enabled_flag 1115 uint32_t SpsSbtEnabledFlag : __CODEGEN_BITFIELD( 4, 4) ; //!< sps_sbt_enabled_flag 1116 uint32_t SpsAffineEnabledFlag : __CODEGEN_BITFIELD( 5, 5) ; //!< sps_affine_enabled_flag 1117 uint32_t Sps6ParamAffineEnabledFlag : __CODEGEN_BITFIELD( 6, 6) ; //!< sps_6param_affine_enabled_flag 1118 uint32_t SpsAffineAmvrEnabledFlag : __CODEGEN_BITFIELD( 7, 7) ; //!< sps_affine_amvr_enabled_flag 1119 uint32_t SpsBcwEnabledFlag : __CODEGEN_BITFIELD( 8, 8) ; //!< sps_bcw_enabled_flag 1120 uint32_t SpsCiipEnabledFlag : __CODEGEN_BITFIELD( 9, 9) ; //!< sps_ciip_enabled_flag 1121 uint32_t SpsGpmEnabledFlag : __CODEGEN_BITFIELD(10, 10) ; //!< sps_gpm_enabled_flag 1122 uint32_t SpsIspEnabledFlag : __CODEGEN_BITFIELD(11, 11) ; //!< sps_isp_enabled_flag 1123 uint32_t SpsMrlEnabledFlag : __CODEGEN_BITFIELD(12, 12) ; //!< sps_mrl_enabled_flag 1124 uint32_t SpsMipEnabledFlag : __CODEGEN_BITFIELD(13, 13) ; //!< sps_mip_enabled_flag 1125 uint32_t SpsCclmEnabledFlag : __CODEGEN_BITFIELD(14, 14) ; //!< sps_cclm_enabled_flag 1126 uint32_t SpsChromaHorizontalCollocatedFlag : __CODEGEN_BITFIELD(15, 15) ; //!< sps_chroma_horizontal_collocated_flag 1127 uint32_t SpsChromaVerticalCollocatedFlag : __CODEGEN_BITFIELD(16, 16) ; //!< sps_chroma_vertical_collocated_flag 1128 uint32_t SpsTemporalMvpEnabledFlag : __CODEGEN_BITFIELD(17, 17) ; //!< sps_temporal_mvp_enabled_flag 1129 uint32_t Reserved81 : __CODEGEN_BITFIELD(18, 23) ; //!< Reserved 1130 uint32_t SpsPaletteEnabledFlag : __CODEGEN_BITFIELD(24, 24) ; //!< sps_palette_enabled_flag 1131 uint32_t SpsActEnabledFlag : __CODEGEN_BITFIELD(25, 25) ; //!< sps_act_enabled_flag 1132 uint32_t SpsIbcEnabledFlag : __CODEGEN_BITFIELD(26, 26) ; //!< sps_ibc_enabled_flag 1133 uint32_t SpsLadfEnabledFlag : __CODEGEN_BITFIELD(27, 27) ; //!< sps_ladf_enabled_flag 1134 uint32_t SpsScalingMatrixForLfnstDisabledFlag : __CODEGEN_BITFIELD(28, 28) ; //!< sps_scaling_matrix_for_lfnst_disabled_flag 1135 uint32_t SpsScalingMatrixForAlternativeColorSpaceDisabledFlag : __CODEGEN_BITFIELD(29, 29) ; //!< sps_scaling_matrix_for_alternative_color_space_disabled_flag 1136 uint32_t SpsScalingMatrixDesignatedColorSpaceFlag : __CODEGEN_BITFIELD(30, 30) ; //!< sps_scaling_matrix_designated_color_space_flag 1137 uint32_t Reserved95 : __CODEGEN_BITFIELD(31, 31) ; //!< Reserved 1138 }; 1139 uint32_t Value; 1140 } DW2; 1141 union 1142 { 1143 struct 1144 { 1145 uint32_t PpsLoopFilterAcrossTilesEnabledFlag : __CODEGEN_BITFIELD( 0, 0) ; //!< pps_loop_filter_across_tiles_enabled_flag 1146 uint32_t PpsRectSliceFlag : __CODEGEN_BITFIELD( 1, 1) ; //!< pps_rect_slice_flag 1147 uint32_t PpsSingleSlicePerSubpicFlag : __CODEGEN_BITFIELD( 2, 2) ; //!< pps_single_slice_per_subpic_flag 1148 uint32_t PpsLoopFilterAcrossSlicesEnabledFlag : __CODEGEN_BITFIELD( 3, 3) ; //!< pps_loop_filter_across_slices_enabled_flag 1149 uint32_t PpsWeightedPredFlag : __CODEGEN_BITFIELD( 4, 4) ; //!< pps_weighted_pred_flag 1150 uint32_t PpsWeightedBipredFlag : __CODEGEN_BITFIELD( 5, 5) ; //!< pps_weighted_bipred_flag 1151 uint32_t PpsRefWraparoundEnabledFlag : __CODEGEN_BITFIELD( 6, 6) ; //!< pps_ref_wraparound_enabled_flag 1152 uint32_t PpsCuQpDeltaEnabledFlag : __CODEGEN_BITFIELD( 7, 7) ; //!< pps_cu_qp_delta_enabled_flag 1153 uint32_t Reserved104 : __CODEGEN_BITFIELD( 8, 21) ; //!< Reserved 1154 uint32_t Virtualboundariespresentflag : __CODEGEN_BITFIELD(22, 22) ; //!< VirtualBoundariesPresentFlag 1155 uint32_t PhNonRefPicFlag : __CODEGEN_BITFIELD(23, 23) ; //!< ph_non_ref_pic_flag 1156 uint32_t PhChromaResidualScaleFlag : __CODEGEN_BITFIELD(24, 24) ; //!< ph_chroma_residual_scale_flag 1157 uint32_t PhTemporalMvpEnabledFlag : __CODEGEN_BITFIELD(25, 25) ; //!< ph_temporal_mvp_enabled_flag 1158 uint32_t PhMmvdFullpelOnlyFlag : __CODEGEN_BITFIELD(26, 26) ; //!< ph_mmvd_fullpel_only_flag 1159 uint32_t PhMvdL1ZeroFlag : __CODEGEN_BITFIELD(27, 27) ; //!< ph_mvd_l1_zero_flag 1160 uint32_t PhBdofDisabledFlag : __CODEGEN_BITFIELD(28, 28) ; //!< ph_bdof_disabled_flag 1161 uint32_t PhDmvrDisabledFlag : __CODEGEN_BITFIELD(29, 29) ; //!< ph_dmvr_disabled_flag 1162 uint32_t PhProfDisabledFlag : __CODEGEN_BITFIELD(30, 30) ; //!< ph_prof_disabled_flag 1163 uint32_t PhJointCbcrSignFlag : __CODEGEN_BITFIELD(31, 31) ; //!< ph_joint_cbcr_sign_flag 1164 }; 1165 uint32_t Value; 1166 } DW3; 1167 union 1168 { 1169 struct 1170 { 1171 uint32_t SpsChromaFormatIdc : __CODEGEN_BITFIELD( 0, 3) ; //!< SPS_CHROMA_FORMAT_IDC 1172 uint32_t SpsLog2CtuSizeMinus5 : __CODEGEN_BITFIELD( 4, 7) ; //!< SPS_LOG2_CTU_SIZE_MINUS5 1173 uint32_t SpsBitdepthMinus8 : __CODEGEN_BITFIELD( 8, 11) ; //!< SPS_BITDEPTH_MINUS8 1174 uint32_t SpsLog2MinLumaCodingBlockSizeMinus2 : __CODEGEN_BITFIELD(12, 15) ; //!< SPS_LOG2_MIN_LUMA_CODING_BLOCK_SIZE_MINUS2 1175 uint32_t SpsNumSubpicsMinus1 : __CODEGEN_BITFIELD(16, 31) ; //!< sps_num_subpics_minus1 1176 }; 1177 uint32_t Value; 1178 } DW4; 1179 union 1180 { 1181 struct 1182 { 1183 uint32_t SpsLog2TransformSkipMaxSizeMinus2 : __CODEGEN_BITFIELD( 0, 3) ; //!< sps_log2_transform_skip_max_size_minus2 1184 uint32_t SpsSixMinusMaxNumMergeCand : __CODEGEN_BITFIELD( 4, 7) ; //!< sps_six_minus_max_num_merge_cand 1185 uint32_t SpsFiveMinusMaxNumSubblockMergeCand : __CODEGEN_BITFIELD( 8, 11) ; //!< sps_five_minus_max_num_subblock_merge_cand 1186 uint32_t DMaxNumGpmMergeCand : __CODEGEN_BITFIELD(12, 15) ; //!< sps_max_num_merge_cand_minus_max_num_gpm_cand 1187 uint32_t SpsLog2ParallelMergeLevelMinus2 : __CODEGEN_BITFIELD(16, 19) ; //!< sps_log2_parallel_merge_level_minus2 1188 uint32_t SpsMinQpPrimeTs : __CODEGEN_BITFIELD(20, 23) ; //!< sps_min_qp_prime_ts 1189 uint32_t SpsSixMinusMaxNumIbcMergeCand : __CODEGEN_BITFIELD(24, 27) ; //!< sps_six_minus_max_num_ibc_merge_cand 1190 uint32_t Reserved188 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 1191 }; 1192 uint32_t Value; 1193 } DW5; 1194 union 1195 { 1196 struct 1197 { 1198 uint32_t SpsLadfQpOffset0 : __CODEGEN_BITFIELD( 0, 7) ; //!< sps_ladf_qp_offset[ 0 ] 1199 uint32_t SpsLadfQpOffset1 : __CODEGEN_BITFIELD( 8, 15) ; //!< sps_ladf_qp_offset[ 1 ] 1200 uint32_t SpsLadfQpOffset2 : __CODEGEN_BITFIELD(16, 23) ; //!< sps_ladf_qp_offset[ 2 ] 1201 uint32_t SpsLadfQpOffset3 : __CODEGEN_BITFIELD(24, 31) ; //!< sps_ladf_qp_offset[ 3 ] 1202 }; 1203 uint32_t Value; 1204 } DW6; 1205 union 1206 { 1207 struct 1208 { 1209 uint32_t SpsLadfDeltaThresholdMinus10 : __CODEGEN_BITFIELD( 0, 11) ; //!< sps_ladf_delta_threshold_minus1[ 0 ] 1210 uint32_t SpsLadfDeltaThresholdMinus11 : __CODEGEN_BITFIELD(12, 23) ; //!< sps_ladf_delta_threshold_minus1[ 1 ] 1211 uint32_t SpsLadfLowestIntervalQpOffset : __CODEGEN_BITFIELD(24, 31) ; //!< sps_ladf_lowest_interval_qp_offset 1212 }; 1213 uint32_t Value; 1214 } DW7; 1215 union 1216 { 1217 struct 1218 { 1219 uint32_t SpsLadfDeltaThresholdMinus12 : __CODEGEN_BITFIELD( 0, 11) ; //!< sps_ladf_delta_threshold_minus1[ 2 ] 1220 uint32_t SpsLadfDeltaThresholdMinus13 : __CODEGEN_BITFIELD(12, 23) ; //!< sps_ladf_delta_threshold_minus1[ 3 ] 1221 uint32_t Reserved280 : __CODEGEN_BITFIELD(24, 29) ; //!< Reserved 1222 uint32_t SpsNumLadfIntervalsMinus2 : __CODEGEN_BITFIELD(30, 31) ; //!< sps_num_ladf_intervals_minus2 1223 }; 1224 uint32_t Value; 1225 } DW8; 1226 union 1227 { 1228 struct 1229 { 1230 uint32_t PpsPicWidthInLumaSamples : __CODEGEN_BITFIELD( 0, 15) ; //!< pps_pic_width_in_luma_samples 1231 uint32_t PpsPicHeightInLumaSamples : __CODEGEN_BITFIELD(16, 31) ; //!< pps_pic_height_in_luma_samples 1232 }; 1233 uint32_t Value; 1234 } DW9; 1235 union 1236 { 1237 struct 1238 { 1239 uint32_t PpsScalingWinLeftOffset : __CODEGEN_BITFIELD( 0, 19) ; //!< pps_scaling_win_left_offset 1240 uint32_t Reserved412 : __CODEGEN_BITFIELD(20, 31) ; //!< Reserved 1241 }; 1242 uint32_t Value; 1243 } DW10; 1244 union 1245 { 1246 struct 1247 { 1248 uint32_t PpsScalingWinRightOffset : __CODEGEN_BITFIELD( 0, 19) ; //!< pps_scaling_win_right_offset 1249 uint32_t Reserved412 : __CODEGEN_BITFIELD(20, 31) ; //!< Reserved 1250 }; 1251 uint32_t Value; 1252 } DW11; 1253 union 1254 { 1255 struct 1256 { 1257 uint32_t PpsScalingWinTopOffset : __CODEGEN_BITFIELD( 0, 19) ; //!< pps_scaling_win_top_offset 1258 uint32_t Reserved412 : __CODEGEN_BITFIELD(20, 31) ; //!< Reserved 1259 }; 1260 uint32_t Value; 1261 } DW12; 1262 union 1263 { 1264 struct 1265 { 1266 uint32_t PpsScalingWinBottomOffset : __CODEGEN_BITFIELD( 0, 19) ; //!< pps_scaling_win_bottom_offset 1267 uint32_t Reserved412 : __CODEGEN_BITFIELD(20, 31) ; //!< Reserved 1268 }; 1269 uint32_t Value; 1270 } DW13; 1271 union 1272 { 1273 struct 1274 { 1275 uint32_t DNumtilerowsminus1 : __CODEGEN_BITFIELD(0, 11) ; //!< D_NumTileRowsMinus1 1276 uint32_t Reserved412 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 1277 uint32_t DNumtilecolumnsminus1 : __CODEGEN_BITFIELD(16, 27) ; //!< D_NumTileColumnsMinus1 1278 uint32_t Reserved428 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 1279 }; 1280 uint32_t Value; 1281 } DW14; 1282 1283 union 1284 { 1285 struct 1286 { 1287 uint32_t PpsCbQpOffset : __CODEGEN_BITFIELD(0, 7) ; //!< pps_cb_qp_offset 1288 uint32_t PpsCrQpOffset : __CODEGEN_BITFIELD(8, 15) ; //!< pps_cr_qp_offset 1289 uint32_t PpsJointCbcrQpOffsetValue : __CODEGEN_BITFIELD(16, 23) ; //!< pps_joint_cbcr_qp_offset_value 1290 uint32_t PpsChromaQpOffsetListLenMinus1 : __CODEGEN_BITFIELD(24, 27) ; //!< pps_chroma_qp_offset_list_len_minus1 1291 uint32_t Reserved460 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 1292 }; 1293 uint32_t Value; 1294 } DW15; 1295 1296 union 1297 { 1298 struct 1299 { 1300 uint32_t PpsCbQpOffsetList0 : __CODEGEN_BITFIELD(0, 7) ; //!< pps_cb_qp_offset_list[ 0 ] 1301 uint32_t PpsCbQpOffsetList1 : __CODEGEN_BITFIELD(8, 15) ; //!< pps_cb_qp_offset_list[ 1 ] 1302 uint32_t PpsCbQpOffsetList2 : __CODEGEN_BITFIELD(16, 23) ; //!< pps_cb_qp_offset_list[ 2 ] 1303 uint32_t PpsCbQpOffsetList3 : __CODEGEN_BITFIELD(24, 31) ; //!< pps_cb_qp_offset_list[ 3 ] 1304 }; 1305 uint32_t Value; 1306 } DW16; 1307 union 1308 { 1309 struct 1310 { 1311 uint32_t PpsCbQpOffsetList4 : __CODEGEN_BITFIELD(0, 7) ; //!< pps_cb_qp_offset_list[ 4 ] 1312 uint32_t PpsCbQpOffsetList5 : __CODEGEN_BITFIELD(8, 15) ; //!< pps_cb_qp_offset_list[ 5 ] 1313 uint32_t PpsPicWidthMinusWraparoundOffset : __CODEGEN_BITFIELD(16, 31) ; //!< pps_pic_width_minus_wraparound_offset 1314 }; 1315 uint32_t Value; 1316 } DW17; 1317 union 1318 { 1319 struct 1320 { 1321 uint32_t PpsCrQpOffsetList0 : __CODEGEN_BITFIELD(0, 7) ; //!< pps_cr_qp_offset_list[ 0 ] 1322 uint32_t PpsCrQpOffsetList1 : __CODEGEN_BITFIELD(8, 15) ; //!< pps_cr_qp_offset_list[ 1 ] 1323 uint32_t PpsCrQpOffsetList2 : __CODEGEN_BITFIELD(16, 23) ; //!< pps_cr_qp_offset_list[ 2 ] 1324 uint32_t PpsCrQpOffsetList3 : __CODEGEN_BITFIELD( 24, 31) ; //!< pps_cr_qp_offset_list[ 3 ] 1325 }; 1326 uint32_t Value; 1327 } DW18; 1328 union 1329 { 1330 struct 1331 { 1332 uint32_t PpsCrQpOffsetList4 : __CODEGEN_BITFIELD(0, 7) ; //!< pps_cr_qp_offset_list[ 4 ] 1333 uint32_t PpsCrQpOffsetList5 : __CODEGEN_BITFIELD(8, 15) ; //!< pps_cr_qp_offset_list[ 5 ] 1334 uint32_t Reserved576 : __CODEGEN_BITFIELD(16, 31) ; //!< Reserved 1335 }; 1336 uint32_t Value; 1337 } DW19; 1338 union 1339 { 1340 struct 1341 { 1342 uint32_t PpsJointCbcrQpOffsetList0 : __CODEGEN_BITFIELD(0, 7) ; //!< pps_joint_cbcr_qp_offset_list[ 0 ] 1343 uint32_t PpsJointCbcrQpOffsetList1 : __CODEGEN_BITFIELD(8, 15) ; //!< pps_joint_cbcr_qp_offset_list[ 1 ] 1344 uint32_t PpsJointCbcrQpOffsetList2 : __CODEGEN_BITFIELD(16, 23) ; //!< pps_joint_cbcr_qp_offset_list[ 2 ] 1345 uint32_t PpsJointCbcrQpOffsetList3 : __CODEGEN_BITFIELD(24, 31) ; //!< pps_joint_cbcr_qp_offset_list[ 3 ] 1346 }; 1347 uint32_t Value; 1348 } DW20; 1349 union 1350 { 1351 struct 1352 { 1353 uint32_t PpsJointCbcrQpOffsetList4 : __CODEGEN_BITFIELD(0, 7) ; //!< pps_joint_cbcr_qp_offset_list[ 4 ] 1354 uint32_t PpsJointCbcrQpOffsetList5 : __CODEGEN_BITFIELD(8, 15) ; //!< pps_joint_cbcr_qp_offset_list[ 5 ] 1355 uint32_t Reserved640 : __CODEGEN_BITFIELD(16, 31) ; //!< Reserved 1356 }; 1357 uint32_t Value; 1358 } DW21; 1359 union 1360 { 1361 struct 1362 { 1363 uint32_t Numvervirtualboundaries : __CODEGEN_BITFIELD(0, 3) ; //!< NumVerVirtualBoundaries 1364 uint32_t Numhorvirtualboundaries : __CODEGEN_BITFIELD(4, 7) ; //!< NumHorVirtualBoundaries 1365 uint32_t PhLog2DiffMinQtMinCbIntraSliceLuma : __CODEGEN_BITFIELD(8, 11) ; //!< ph_log2_diff_min_qt_min_cb_intra_slice_luma 1366 uint32_t PhMaxMttHierarchyDepthIntraSliceLuma : __CODEGEN_BITFIELD(12, 15) ; //!< ph_max_mtt_hierarchy_depth_intra_slice_luma 1367 uint32_t PhLog2DiffMaxBtMinQtIntraSliceLuma : __CODEGEN_BITFIELD(16, 19) ; //!< ph_log2_diff_max_bt_min_qt_intra_slice_luma 1368 uint32_t PhLog2DiffMaxTtMinQtIntraSliceLuma : __CODEGEN_BITFIELD(20, 23) ; //!< ph_log2_diff_max_tt_min_qt_intra_slice_luma 1369 uint32_t PhLog2DiffMinQtMinCbIntraSliceChroma : __CODEGEN_BITFIELD(24, 27) ; //!< ph_log2_diff_min_qt_min_cb_intra_slice_chroma 1370 uint32_t PhMaxMttHierarchyDepthIntraSliceChroma : __CODEGEN_BITFIELD(28, 31) ; //!< ph_max_mtt_hierarchy_depth_intra_slice_chroma 1371 }; 1372 uint32_t Value; 1373 } DW22; 1374 union 1375 { 1376 struct 1377 { 1378 uint32_t DVirtualboundaryposxminus10 : __CODEGEN_BITFIELD(0, 12) ; //!< D_VirtualBoundaryPosXMinus1[ 0 ] 1379 uint32_t Reserved701 : __CODEGEN_BITFIELD(13, 15) ; //!< Reserved 1380 uint32_t DVirtualboundaryposyminus10 : __CODEGEN_BITFIELD(16, 28) ; //!< D_VirtualBoundaryPosYMinus1[ 0 ] 1381 uint32_t Reserved717 : __CODEGEN_BITFIELD(29, 31) ; //!< Reserved 1382 }; 1383 uint32_t Value; 1384 } DW23; 1385 union 1386 { 1387 struct 1388 { 1389 uint32_t DVirtualboundaryposxminus11 : __CODEGEN_BITFIELD(0, 12) ; //!< D_VirtualBoundaryPosXMinus1[ 1 ] 1390 uint32_t Reserved733 : __CODEGEN_BITFIELD(13, 15) ; //!< Reserved 1391 uint32_t DVirtualboundaryposyminus11 : __CODEGEN_BITFIELD( 16, 28) ; //!< D_VirtualBoundaryPosYMinus1[ 1 ] 1392 uint32_t Reserved749 : __CODEGEN_BITFIELD(29, 31) ; //!< Reserved 1393 }; 1394 uint32_t Value; 1395 } DW24; 1396 union 1397 { 1398 struct 1399 { 1400 uint32_t DVirtualboundaryposxminus12 : __CODEGEN_BITFIELD(0, 12) ; //!< D_VirtualBoundaryPosXMinus1[ 2 ] 1401 uint32_t Reserved765 : __CODEGEN_BITFIELD(13, 15) ; //!< Reserved 1402 uint32_t DVirtualboundaryposyminus12 : __CODEGEN_BITFIELD( 16, 28) ; //!< D_VirtualBoundaryPosYMinus1[ 2 ] 1403 uint32_t Reserved781 : __CODEGEN_BITFIELD(29, 31) ; //!< Reserved 1404 }; 1405 uint32_t Value; 1406 } DW25; 1407 union 1408 { 1409 struct 1410 { 1411 uint32_t PhLog2DiffMaxBtMinQtIntraSliceChroma : __CODEGEN_BITFIELD(0, 3) ; //!< ph_log2_diff_max_bt_min_qt_intra_slice_chroma 1412 uint32_t PhLog2DiffMaxTtMinQtIntraSliceChroma : __CODEGEN_BITFIELD(4, 7) ; //!< ph_log2_diff_max_tt_min_qt_intra_slice_chroma 1413 uint32_t PhCuQpDeltaSubdivIntraSlice : __CODEGEN_BITFIELD(8, 15) ; //!< ph_cu_qp_delta_subdiv_intra_slice 1414 uint32_t PhCuChromaQpOffsetSubdivIntraSlice : __CODEGEN_BITFIELD( 16, 23) ; //!< ph_cu_chroma_qp_offset_subdiv_intra_slice 1415 uint32_t PhLog2DiffMinQtMinCbInterSlice : __CODEGEN_BITFIELD( 24, 27) ; //!< ph_log2_diff_min_qt_min_cb_inter_slice 1416 uint32_t PhMaxMttHierarchyDepthInterSlice : __CODEGEN_BITFIELD(28, 31) ; //!< ph_max_mtt_hierarchy_depth_inter_slice 1417 }; 1418 uint32_t Value; 1419 } DW26; 1420 union 1421 { 1422 struct 1423 { 1424 uint32_t PhLog2DiffMaxBtMinQtInterSlice : __CODEGEN_BITFIELD(0, 3) ; //!< ph_log2_diff_max_bt_min_qt_inter_slice 1425 uint32_t PhLog2DiffMaxTtMinQtInterSlice : __CODEGEN_BITFIELD(4, 7) ; //!< ph_log2_diff_max_tt_min_qt_inter_slice 1426 uint32_t PhCuQpDeltaSubdivInterSlice : __CODEGEN_BITFIELD(8, 15) ; //!< ph_cu_qp_delta_subdiv_inter_slice 1427 uint32_t PhCuChromaQpOffsetSubdivInterSlice : __CODEGEN_BITFIELD( 16, 23) ; //!< ph_cu_chroma_qp_offset_subdiv_inter_slice 1428 uint32_t Reserved840 : __CODEGEN_BITFIELD( 24, 31) ; //!< Reserved 1429 }; 1430 1431 uint32_t Value; 1432 } DW27; 1433 1434 union 1435 { 1436 struct 1437 { 1438 uint32_t DActiveapsid : __CODEGEN_BITFIELD(0, 7) ; //!< D_ActiveAPSID 1439 uint32_t Reserved856 : __CODEGEN_BITFIELD(8, 31) ; //!< Reserved 1440 }; 1441 1442 uint32_t Value; 1443 } DW28; 1444 1445 VVCP_PIC_ALF_PARAMETER_ENTRY_CMD DPicApsalfparamsets[8]; 1446 1447 //! \name Local enumerations 1448 1449 //! \brief LENGTHFIELD 1450 //! \details 1451 //! (Excludes Dwords 0, 1). 1452 enum LENGTHFIELD 1453 { 1454 LENGTHFIELD_DWORDLENGTH_LENGTHBIAS = 29, //!< No additional details 1455 }; 1456 1457 enum MEDIA_INSTRUCTION_COMMAND 1458 { 1459 MEDIA_INSTRUCTION_COMMAND_VVCPPICSTATE = 16, //!< No additional details 1460 }; 1461 1462 enum MEDIA_INSTRUCTION_OPCODE 1463 { 1464 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAMEVVC = 15, //!< No additional details 1465 }; 1466 1467 enum PIPELINE_TYPE 1468 { 1469 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 1470 }; 1471 1472 enum COMMAND_TYPE 1473 { 1474 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 1475 }; 1476 1477 //! \brief SPS_CHROMA_FORMAT_IDC 1478 //! \details 1479 //! style="margin-bottom:11px"><span 1480 //! style="line-height:107%"><span 1481 //! style="font-family:Calibri,sans-serif">specifies the chroma sampling 1482 //! relative to the luma sampling. 1483 //! style="margin-bottom:11px"><span 1484 //! style="line-height:107%">0 1485 //! - Monochrome (not supported yet) 1486 //! style="margin-bottom:11px"><span 1487 //! style="line-height:107%">1 1488 //! - 4:2:0 1489 //! style="margin-bottom:11px"><span 1490 //! style="line-height:107%">2 1491 //! - 4:2:2 (not supported yet) 1492 //! style="margin-bottom:11px"><span 1493 //! style="line-height:107%">3 1494 //! - 4:4:4 (not supported yet) 1495 enum SPS_CHROMA_FORMAT_IDC 1496 { 1497 SPS_CHROMA_FORMAT_IDC_420 = 1, //!< No additional details 1498 }; 1499 1500 //! \brief SPS_LOG2_CTU_SIZE_MINUS5 1501 //! \details 1502 //! style="margin-bottom:11px"><span 1503 //! style="line-height:107%"><span 1504 //! style="font-family:Calibri,sans-serif">(sps_log2_ctu_size_minus5 + 5) 1505 //! specifies the luma coding tree block size of each CTU. The value of 1506 //! sps_log2_ctu_size_minus5 shall be in the range of 0 to 2, inclusive. The 1507 //! value 3 for sps_log2_ctu_size_minus5 is reserved for future 1508 //! use. 1509 enum SPS_LOG2_CTU_SIZE_MINUS5 1510 { 1511 SPS_LOG2_CTU_SIZE_MINUS5_CTUSIZE32 = 0, //!< Indicates CTU Size is 32x32. 1512 SPS_LOG2_CTU_SIZE_MINUS5_CTUSIZE64 = 1, //!< Indicates CTU Size is 64x64. 1513 SPS_LOG2_CTU_SIZE_MINUS5_CTUSIZE128 = 2, //!< Indicates CTU Size is 128x128. 1514 }; 1515 1516 //! \brief SPS_BITDEPTH_MINUS8 1517 //! \details 1518 //! <span 1519 //! style="font-family:"Calibri",sans-serif">(sps_bitdepth_minus8 1520 //! + 8) specifies the bit depth of the samples of the luma and chroma 1521 //! arrays, BitDepth, and the value of the luma and chroma quantization 1522 //! parameter range offset, QpBdOffset. 1523 enum SPS_BITDEPTH_MINUS8 1524 { 1525 SPS_BITDEPTH_MINUS8_8_BIT = 0, //!< No additional details 1526 SPS_BITDEPTH_MINUS8_10_BIT = 2, //!< No additional details 1527 }; 1528 1529 //! \brief SPS_LOG2_MIN_LUMA_CODING_BLOCK_SIZE_MINUS2 1530 //! \details 1531 //! style="margin-bottom:11px"><span 1532 //! style="line-height:107%"><span 1533 //! style="font-family:Calibri,sans-serif">(sps_log2_min_luma_coding_block_size_minus2 1534 //! + 2) specifies the minimum luma coding block size. The value range of 1535 //! sps_log2_min_luma_coding_block_size_minus2 shall be in the range of 0 to 1536 //! Min(4,sps_log2_ctu_size_minus5+3), inclusive. 1537 //! style="margin-bottom:11px">0 - 4x4 pixel block size; 1538 //! style="margin-bottom:11px">1 - 8x8pixel block size; 1539 //! style="margin-bottom:11px">2 - 16x16pixel block size; 1540 //! style="margin-bottom:11px">3 - 32x32pixel block size; 1541 //! style="margin-bottom:11px">4 - 64x64pixel block size. 1542 enum SPS_LOG2_MIN_LUMA_CODING_BLOCK_SIZE_MINUS2 1543 { 1544 SPS_LOG2_MIN_LUMA_CODING_BLOCK_SIZE_MINUS2_4X4PIXELBLOCKSIZE = 0, //!< No additional details 1545 SPS_LOG2_MIN_LUMA_CODING_BLOCK_SIZE_MINUS2_8X8PIXELBLOCKSIZE = 1, //!< No additional details 1546 SPS_LOG2_MIN_LUMA_CODING_BLOCK_SIZE_MINUS2_16X16PIXELBLOCKSIZE = 2, //!< No additional details 1547 SPS_LOG2_MIN_LUMA_CODING_BLOCK_SIZE_MINUS2_32X32PIXELBLOCKSIZE = 3, //!< No additional details 1548 SPS_LOG2_MIN_LUMA_CODING_BLOCK_SIZE_MINUS2_64X64PIXELBLOCKSIZE = 4, //!< No additional details 1549 }; 1550 1551 //! \name Initializations 1552 1553 //! \brief Explicit member initialization function 1554 VVCP_PIC_STATE_CMD(); 1555 1556 static const size_t dwSize = 33; 1557 static const size_t byteSize = 132; 1558 }; 1559 1560 struct VVCP_REFERENCE_PICTURE_ENTRY_CMD 1561 { 1562 SPLITBASEADDRESS64BYTEALIGNED_CMD ReferencePictureBaseAddress0Refaddr; 1563 MEMORYADDRESSATTRIBUTES_CMD ReferencePictureMemoryAddressAttributes; //!< DW6, Reference Picture 0 Memory Address Attributes 1564 1565 //! \name Initializations 1566 1567 //! \brief Explicit member initialization function 1568 VVCP_REFERENCE_PICTURE_ENTRY_CMD(); 1569 1570 static const size_t dwSize = 3; 1571 static const size_t byteSize = 12; 1572 }; 1573 1574 //! 1575 //! \brief VVCP_PIPE_BUF_ADDR_STATE 1576 //! \details 1577 //! This state command provides the memory base addresses for the row store 1578 //! buffer and reconstructed pictureoutput buffers required by the VVCP. 1579 //! This is a picture level state command and is shared by both encoding and 1580 //! decoding processes. 1581 //! All pixel surface addresses must be 4K byte aligned. There is a max of 8 1582 //! Reference Picture BufferAddresses, and all share the same third address 1583 //! DW in specifying 57-bit address. 1584 //! 1585 struct VVCP_PIPE_BUF_ADDR_STATE_CMD 1586 { 1587 union 1588 { 1589 struct 1590 { 1591 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 1592 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 1593 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 21) ; //!< MEDIA_INSTRUCTION_COMMAND 1594 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(22, 26) ; //!< MEDIA_INSTRUCTION_OPCODE 1595 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE_TYPE 1596 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 1597 }; 1598 uint32_t Value; 1599 } DW0; 1600 SPLITBASEADDRESS4KBYTEALIGNED_CMD DecodedPictureBaseAddress; //!< DW1..2, Decoded Picture Base Address 1601 MEMORYADDRESSATTRIBUTES_CMD DecodedPictureMemoryAddressAttributes; //!< DW3, Decoded Picture Memory Address Attributes 1602 1603 VVCP_REFERENCE_PICTURE_ENTRY_CMD ReferencePicture[15]; //!< DW4..48, Reference Pictures [0..14] Base Address and Memory Address Attributes 1604 VVCP_REFERENCE_PICTURE_ENTRY_CMD CollocatedMotionVectorTemporalBuffer[15]; //!< DW49..93, Collocated Motion Vector Temporal Buffer [0..14] Base Address and Memory Address Attributes 1605 1606 SPLITBASEADDRESS64BYTEALIGNED_CMD CurrentMotionVectorTemporalBufferBaseAddress; //!< DW94..95, Current Motion Vector Temporal Buffer Base Address 1607 MEMORYADDRESSATTRIBUTES_CMD CurrentMotionVectorTemporalBufferMemoryAddressAttributes; //!< DW96, Current Motion Vector Temporal Buffer Memory Address Attributes 1608 SPLITBASEADDRESS4KBYTEALIGNED_CMD ApsScalinglistDataBufferBaseAddress; //!< DW97..98, APS ScalingList Data Buffer Base Address 1609 MEMORYADDRESSATTRIBUTES_CMD ApsScalinglistDataBufferMemoryAddressAttributes; //!< DW99, APS ScalingList Data Buffer Memory Address Attributes 1610 SPLITBASEADDRESS4KBYTEALIGNED_CMD ApsAlfDataBufferBaseAddress; //!< DW100..101, APS ALF Data Buffer Base Address 1611 MEMORYADDRESSATTRIBUTES_CMD ApsAlfDataBufferMemoryAddressAttributes; //!< DW102, APS ALF Data Buffer Memory Address Attributes 1612 SPLITBASEADDRESS4KBYTEALIGNED_CMD SpsChromaqpTableBufferBaseAddress; //!< DW103..104, SPS ChromaQP Table Buffer Base Address 1613 MEMORYADDRESSATTRIBUTES_CMD SpsChromaqpTableBufferMemoryAddressAttributes; //!< DW105, SPS ChromaQP Table Buffer Memory Address Attributes 1614 SPLITBASEADDRESS64BYTEALIGNED_CMD VcedLineBufferBaseAddress; //!< DW106..107, VCED Line Buffer Base Address 1615 MEMORYADDRESSATTRIBUTES_CMD VcedLineBufferMemoryAddressAttributes; //!< DW108, VCED Line Buffer Memory Address Attributes 1616 SPLITBASEADDRESS64BYTEALIGNED_CMD VcmvLineBufferBaseAddress; //!< DW109..110, VCMV Line Buffer Base Address 1617 MEMORYADDRESSATTRIBUTES_CMD VcmvLineBufferMemoryAddressAttributes; //!< DW111, VCMV Line Buffer Memory Address Attributes 1618 SPLITBASEADDRESS64BYTEALIGNED_CMD VcprLineBufferBaseAddress; //!< DW112..113, VCPR Line Buffer Base Address 1619 MEMORYADDRESSATTRIBUTES_CMD VcprLineBufferMemoryAddressAttributes; //!< DW114, VCPR Line Buffer Memory Address Attributes 1620 SPLITBASEADDRESS64BYTEALIGNED_CMD VclfYLineBufferBaseAddress; //!< DW115..116, VCLF Y Line Buffer Base Address 1621 MEMORYADDRESSATTRIBUTES_CMD VclfYLineBufferMemoryAddressAttributes; //!< DW117, VCLF Y Line Buffer Memory Address Attributes 1622 SPLITBASEADDRESS64BYTEALIGNED_CMD VclfYTileRowBufferBaseAddress; //!< DW118..119, VCLF Y Tile Row Buffer Base Address 1623 MEMORYADDRESSATTRIBUTES_CMD VclfYTileRowBufferMemoryAddressAttributes; //!< DW120, VCLF Y Tile Row Buffer Memory Address Attributes 1624 SPLITBASEADDRESS64BYTEALIGNED_CMD VclfYTileColumnBufferBaseAddress; //!< DW121..122, VCLF Y Tile Column Buffer Base Address 1625 MEMORYADDRESSATTRIBUTES_CMD VclfYTileColumnBufferMemoryAddressAttributes; //!< DW123, VCLF Y Tile Column Buffer Memory Address Attributes 1626 SPLITBASEADDRESS64BYTEALIGNED_CMD VclfULineBufferBaseAddress; //!< DW124..125, VCLF U Line Buffer Base Address 1627 MEMORYADDRESSATTRIBUTES_CMD VclfULineBufferMemoryAddressAttributes; //!< DW126, VCLF U Line Buffer Memory Address Attributes 1628 SPLITBASEADDRESS64BYTEALIGNED_CMD VclfUTileRowBufferBaseAddress; //!< DW127..128, VCLF U Tile Row Buffer Base Address 1629 MEMORYADDRESSATTRIBUTES_CMD VclfUTileRowBufferMemoryAddressAttributes; //!< DW129, VCLF U Tile Row Buffer Memory Address Attributes 1630 SPLITBASEADDRESS64BYTEALIGNED_CMD VclfUTileColumnBufferBaseAddress; //!< DW130..131, VCLF U Tile Column Buffer Base Address 1631 MEMORYADDRESSATTRIBUTES_CMD VclfUTileColumnBufferMemoryAddressAttributes; //!< DW132, VCLF U Tile Column Buffer Memory Address Attributes 1632 SPLITBASEADDRESS64BYTEALIGNED_CMD VclfVLineBufferBaseAddress; //!< DW133..134, VCLF V Line Buffer Base Address 1633 MEMORYADDRESSATTRIBUTES_CMD VclfVLineBufferMemoryAddressAttributes; //!< DW135, VCLF V Line Buffer Memory Address Attributes 1634 SPLITBASEADDRESS64BYTEALIGNED_CMD VclfVTileRowBufferBaseAddress; //!< DW136..137, VCLF V Tile Row Buffer Base Address 1635 MEMORYADDRESSATTRIBUTES_CMD VclfVTileRowBufferMemoryAddressAttributes; //!< DW138, VCLF V Tile Row Buffer Memory Address Attributes 1636 SPLITBASEADDRESS64BYTEALIGNED_CMD VclfVTileColumnBufferBaseAddress; //!< DW139..140, VCLF V Tile Column Buffer Base Address 1637 MEMORYADDRESSATTRIBUTES_CMD VclfVTileColumnBufferMemoryAddressAttributes; //!< DW141, VCLF V Tile Column Buffer Memory Address Attributes 1638 SPLITBASEADDRESS64BYTEALIGNED_CMD VcsaoYLineBufferBaseAddress; //!< DW142..143, VCSAO Y Line Buffer Base Address 1639 MEMORYADDRESSATTRIBUTES_CMD VcsaoYLineBufferMemoryAddressAttributes; //!< DW144, VCSAO Y Line Buffer Memory Address Attributes 1640 SPLITBASEADDRESS64BYTEALIGNED_CMD VcsaoYTileRowBufferBaseAddress; //!< DW145..146, VCSAO Y Tile Row Buffer Base Address 1641 MEMORYADDRESSATTRIBUTES_CMD VcsaoYTileRowBufferMemoryAddressAttributes; //!< DW147, VCSAO Y Tile Row Buffer Memory Address Attributes 1642 SPLITBASEADDRESS64BYTEALIGNED_CMD VcsaoYTileColumnBufferBaseAddress; //!< DW148..149, VCSAO Y Tile Column Buffer Base Address 1643 MEMORYADDRESSATTRIBUTES_CMD VcsaoYTileColumnBufferMemoryAddressAttributes; //!< DW150, VCSAO Y Tile Column Buffer Memory Address Attributes 1644 SPLITBASEADDRESS64BYTEALIGNED_CMD VcsaoULineBufferBaseAddress; //!< DW151..152, VCSAO U Line Buffer Base Address 1645 MEMORYADDRESSATTRIBUTES_CMD VcsaoULineBufferMemoryAddressAttributes; //!< DW153, VCSAO U Line Buffer Memory Address Attributes 1646 SPLITBASEADDRESS64BYTEALIGNED_CMD VcsaoUTileRowBufferBaseAddress; //!< DW154..155, VCSAO U Tile Row Buffer Base Address 1647 MEMORYADDRESSATTRIBUTES_CMD VcsaoUTileRowBufferMemoryAddressAttributes; //!< DW156, VCSAO U Tile Row Buffer Memory Address Attributes 1648 SPLITBASEADDRESS64BYTEALIGNED_CMD VcsaoUTileColumnBufferBaseAddress; //!< DW157..158, VCSAO U Tile Column Buffer Base Address 1649 MEMORYADDRESSATTRIBUTES_CMD VcsaoUTileColumnBufferMemoryAddressAttributes; //!< DW159, VCSAO U Tile Column Buffer Memory Address Attributes 1650 SPLITBASEADDRESS64BYTEALIGNED_CMD VcsaoVLineBufferBaseAddress; //!< DW160..161, VCSAO V Line Buffer Base Address 1651 MEMORYADDRESSATTRIBUTES_CMD VcsaoVLineBufferMemoryAddressAttributes; //!< DW162, VCSAO V Line Buffer Memory Address Attributes 1652 SPLITBASEADDRESS64BYTEALIGNED_CMD VcsaoVTileRowBufferBaseAddress; //!< DW163..164, VCSAO V Tile Row Buffer Base Address 1653 MEMORYADDRESSATTRIBUTES_CMD VcsaoVTileRowBufferMemoryAddressAttributes; //!< DW165, VCSAO V Tile Row Buffer Memory Address Attributes 1654 SPLITBASEADDRESS64BYTEALIGNED_CMD VcsaoVTileColumnBufferBaseAddress; //!< DW166..167, VCSAO V Tile Column Buffer Base Address 1655 MEMORYADDRESSATTRIBUTES_CMD VcsaoVTileColumnBufferMemoryAddressAttributes; //!< DW168, VCSAO V Tile Column Buffer Memory Address Attributes 1656 SPLITBASEADDRESS64BYTEALIGNED_CMD VcalfLineBufferBaseAddress; //!< DW169..170, VCALF Line Buffer Base Address 1657 MEMORYADDRESSATTRIBUTES_CMD VcalfLineBufferMemoryAddressAttributes; //!< DW171, VCALF Line Buffer Memory Address Attributes 1658 SPLITBASEADDRESS64BYTEALIGNED_CMD VcalfTileRowBufferBaseAddress; //!< DW172..173, VCALF Tile Row Buffer Base Address 1659 MEMORYADDRESSATTRIBUTES_CMD VcalfTileRowBufferMemoryAddressAttributes; //!< DW174, VCALF Tile Row Buffer Memory Address Attributes 1660 SPLITBASEADDRESS64BYTEALIGNED_CMD VcalfYTileColumnBufferBaseAddress; //!< DW175..176, VCALF Y Tile Column Buffer Base Address 1661 MEMORYADDRESSATTRIBUTES_CMD VcalfYTileColumnBufferMemoryAddressAttributes; //!< DW177, VCALF Y Tile Column Buffer Memory Address Attributes 1662 SPLITBASEADDRESS64BYTEALIGNED_CMD VcalfUTileColumnBufferBaseAddress; //!< DW178..179, VCALF U Tile Column Buffer Base Address 1663 MEMORYADDRESSATTRIBUTES_CMD VcalfUTileColumnBufferMemoryAddressAttributes; //!< DW180, VCALF U Tile Column Buffer Memory Address Attributes 1664 SPLITBASEADDRESS64BYTEALIGNED_CMD VcalfVTileColumnBufferBaseAddress; //!< DW181..182, VCALF V Tile Column Buffer Base Address 1665 MEMORYADDRESSATTRIBUTES_CMD VcalfVTileColumnBufferMemoryAddressAttributes; //!< DW183, VCALF V Tile Column Buffer Memory Address Attributes 1666 1667 //! \name Local enumerations 1668 1669 enum MEDIA_INSTRUCTION_COMMAND 1670 { 1671 MEDIA_INSTRUCTION_COMMAND_VVCPPIPEBUFADDRSTATE = 2, //!< No additional details 1672 }; 1673 1674 //! \brief MEDIA_INSTRUCTION_OPCODE 1675 //! \details 1676 //! Codec/Engine Name = VVC 1677 enum MEDIA_INSTRUCTION_OPCODE 1678 { 1679 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 15, //!< No additional details 1680 }; 1681 1682 enum PIPELINE_TYPE 1683 { 1684 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 1685 }; 1686 1687 enum COMMAND_TYPE 1688 { 1689 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 1690 }; 1691 1692 //! \name Initializations 1693 1694 //! \brief Explicit member initialization function 1695 VVCP_PIPE_BUF_ADDR_STATE_CMD(); 1696 1697 static const size_t dwSize = 184; 1698 static const size_t byteSize = 736; 1699 }; 1700 1701 //! 1702 //! \brief VVCP_PIPE_MODE_SELECT 1703 //! \details 1704 //! The workload for the VVCP is based upon a single slice decode. There is 1705 //! no states saved between slice and frame decoding/encoding in the VVCP. 1706 //! Once the bit stream DMA is configured with the VVCP_BSD_OBJECT command, 1707 //! and the bitstream is presented to the VVCP Pipeline, the slice decode 1708 //! will begin. 1709 //! The VVCP_PIPE_MODE_SELECT command is responsible for general pipeline 1710 //! level configuration that would normally be set once for a single stream 1711 //! encode or decode and would not be modified on a frame and slice workload 1712 //! basis. 1713 //! This is a picture level state command and is shared by both encoding and 1714 //! decoding processes. 1715 //! 1716 struct VVCP_PIPE_MODE_SELECT_CMD 1717 { 1718 union 1719 { 1720 struct 1721 { 1722 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 1723 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 1724 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 21) ; //!< MEDIA_INSTRUCTION_COMMAND 1725 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(22, 26) ; //!< MEDIA_INSTRUCTION_OPCODE 1726 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE_TYPE 1727 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 1728 }; 1729 uint32_t Value; 1730 } DW0; 1731 union 1732 { 1733 struct 1734 { 1735 uint32_t CodecSelect : __CODEGEN_BITFIELD( 0, 0) ; //!< CODEC_SELECT 1736 uint32_t Reserved33 : __CODEGEN_BITFIELD( 1, 2) ; //!< Reserved 1737 uint32_t PicStatusErrorReportEnable : __CODEGEN_BITFIELD( 3, 3) ; //!< PIC_STATUSERROR_REPORT_ENABLE 1738 uint32_t Reserved36 : __CODEGEN_BITFIELD( 4, 4) ; //!< Reserved 1739 uint32_t CodecStandardSelect : __CODEGEN_BITFIELD( 5, 7) ; //!< CODEC_STANDARD_SELECT 1740 uint32_t Reserved40 : __CODEGEN_BITFIELD( 8, 12) ; //!< Reserved 1741 uint32_t MultiEngineMode : __CODEGEN_BITFIELD(13, 14) ; //!< MULTI_ENGINE_MODE 1742 uint32_t PipeWorkingMode : __CODEGEN_BITFIELD(15, 16) ; //!< PIPE_WORKING_MODE 1743 uint32_t Reserved49 : __CODEGEN_BITFIELD(17, 22) ; //!< Reserved 1744 uint32_t MotionCompMemoryTrackerCounterEnable : __CODEGEN_BITFIELD(23, 23) ; //!< Motion Comp Memory Tracker Counter Enable 1745 uint32_t Reserved51 : __CODEGEN_BITFIELD(24, 31) ; //!< Reserved 1746 }; 1747 uint32_t Value; 1748 } DW1; 1749 union 1750 { 1751 struct 1752 { 1753 uint32_t PicStatusErrorReportId ; //!< Pic Status/Error Report ID 1754 }; 1755 uint32_t Value; 1756 } DW2; 1757 union 1758 { 1759 struct 1760 { 1761 uint32_t Reserved96 ; //!< Reserved 1762 }; 1763 uint32_t Value; 1764 } DW3; 1765 union 1766 { 1767 struct 1768 { 1769 uint32_t Reserved97 ; //!< Reserved 1770 }; 1771 uint32_t Value; 1772 } DW4; 1773 union 1774 { 1775 struct 1776 { 1777 uint32_t Reserved98 ; //!< Reserved 1778 }; 1779 uint32_t Value; 1780 } DW5; 1781 1782 //! \name Local enumerations 1783 1784 enum MEDIA_INSTRUCTION_COMMAND 1785 { 1786 MEDIA_INSTRUCTION_COMMAND_VVCPPIPEMODESELECT = 0, //!< No additional details 1787 }; 1788 1789 //! \brief MEDIA_INSTRUCTION_OPCODE 1790 //! \details 1791 //! Codec/Engine Name = VVC 1792 enum MEDIA_INSTRUCTION_OPCODE 1793 { 1794 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 15, //!< No additional details 1795 }; 1796 1797 enum PIPELINE_TYPE 1798 { 1799 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 1800 }; 1801 1802 enum COMMAND_TYPE 1803 { 1804 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 1805 }; 1806 1807 enum CODEC_SELECT 1808 { 1809 CODEC_SELECT_DECODE = 0, //!< No additional details 1810 }; 1811 1812 enum PIC_STATUSERROR_REPORT_ENABLE 1813 { 1814 PIC_STATUSERROR_REPORT_ENABLE_DISABLE = 0, //!< Disable status/error reporting 1815 PIC_STATUSERROR_REPORT_ENABLE_ENABLE = 1, //!< Status/Error reporting is written out once per picture. The Pic Status/Error Report ID in DWord3 along with the status/error status bits are packed into one cache line and written to the Status/Error Buffer address in the VVCP_PIPE_BUF_ADDR_STATE command. Must be zero for encoder mode. 1816 }; 1817 1818 enum CODEC_STANDARD_SELECT 1819 { 1820 CODEC_STANDARD_SELECT_VVC = 3, //!< No additional details 1821 }; 1822 1823 //! \brief MULTI_ENGINE_MODE 1824 //! \details 1825 //! This indicates the current pipe is in single pipe mode or if in pipe 1826 //! scalable mode is in left/right/middle pipe in multi-engine mode. 1827 enum MULTI_ENGINE_MODE 1828 { 1829 MULTI_ENGINE_MODE_SINGLEENGINEMODE = 0, //!< This is for single engine mode 1830 }; 1831 1832 //! \brief PIPE_WORKING_MODE 1833 //! \details 1834 //! This programs the working mode for VVCP pipe. 1835 enum PIPE_WORKING_MODE 1836 { 1837 PIPE_WORKING_MODE_LEGACYDECODERENCODERMODE_SINGLEPIPE = 0, //!< This is for single pipe mode without pipe scalability. It is used by both decoder and encoder. 1838 }; 1839 1840 //! \name Initializations 1841 1842 //! \brief Explicit member initialization function 1843 VVCP_PIPE_MODE_SELECT_CMD(); 1844 1845 static const size_t dwSize = 6; 1846 static const size_t byteSize = 24; 1847 }; 1848 1849 //! 1850 //! \brief VVCP_REF_IDX_STATE 1851 //! \details 1852 //! VVCP allows max 15reference idx entries in each of the L0 and L1 1853 //! Reference Picture list for a progressive picture. Each field picture is 1854 //! handled as if it were a progressive picture. 1855 //! For P-Slice, this command is issued only once, representing L0 list. For 1856 //! B-Slice, this command can be issued up to two times, one for L0 list and 1857 //! one for L1 list. 1858 //! This is a slice level command used in both encoding and decoding 1859 //! processes. 1860 //! 1861 struct VVCP_REF_IDX_STATE_CMD 1862 { 1863 union 1864 { 1865 struct 1866 { 1867 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 1868 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 1869 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 21) ; //!< MEDIA_INSTRUCTION_COMMAND 1870 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(22, 26) ; //!< MEDIA_INSTRUCTION_OPCODE 1871 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE_TYPE 1872 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 1873 }; 1874 uint32_t Value; 1875 } DW0; 1876 union 1877 { 1878 struct 1879 { 1880 uint32_t Listidx : __CODEGEN_BITFIELD( 0, 0) ; //!< LISTIDX 1881 uint32_t Reserved33 : __CODEGEN_BITFIELD( 1, 7) ; //!< Reserved 1882 uint32_t Refidxsymlx : __CODEGEN_BITFIELD( 8, 11) ; //!< RefIdxSymLX 1883 uint32_t Reserved44 : __CODEGEN_BITFIELD(12, 31) ; //!< Reserved 1884 }; 1885 uint32_t Value; 1886 } DW1; 1887 VVCP_REF_LIST_ENTRY_CMD Entries[15]; //!< DW2..16, Entries 1888 1889 //! \name Local enumerations 1890 1891 enum MEDIA_INSTRUCTION_COMMAND 1892 { 1893 MEDIA_INSTRUCTION_COMMAND_VVCPREFIDXSTATE = 18, //!< No additional details 1894 }; 1895 1896 //! \brief MEDIA_INSTRUCTION_OPCODE 1897 //! \details 1898 //! Codec/Engine Name = VVC 1899 enum MEDIA_INSTRUCTION_OPCODE 1900 { 1901 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 15, //!< No additional details 1902 }; 1903 1904 enum PIPELINE_TYPE 1905 { 1906 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 1907 }; 1908 1909 enum COMMAND_TYPE 1910 { 1911 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 1912 }; 1913 1914 //! \brief LISTIDX 1915 //! \details 1916 //! There are max 2 possible reference picture list L0 and L1, so listIdx 1917 //! can be 0 or 1 only. 1918 //! listIdx is set to 0, when this Ref_IDX_STATE command is issued for 1919 //! L0. 1920 //! listIdx is set to 1, when this Ref_IDX_STATE command is issued for 1921 //! L1. 1922 enum LISTIDX 1923 { 1924 LISTIDX_REFERENCEPICTURELIST0 = 0, //!< No additional details 1925 LISTIDX_REFERENCEPICTURELIST1 = 1, //!< No additional details 1926 }; 1927 1928 //! \name Initializations 1929 1930 //! \brief Explicit member initialization function 1931 VVCP_REF_IDX_STATE_CMD(); 1932 1933 static const size_t dwSize = 17; 1934 static const size_t byteSize = 68; 1935 }; 1936 1937 //! 1938 //! \brief VVCP_SLICE_STATE 1939 //! \details 1940 //! 1941 //! 1942 struct VVCP_SLICE_STATE_CMD 1943 { 1944 union 1945 { 1946 struct 1947 { 1948 uint32_t Lengthfield : __CODEGEN_BITFIELD( 0, 11) ; //!< LENGTHFIELD 1949 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 1950 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 21) ; //!< MEDIA_INSTRUCTION_COMMAND 1951 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(22, 26) ; //!< MEDIA_INSTRUCTION_OPCODE 1952 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE_TYPE 1953 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 1954 }; 1955 uint32_t Value; 1956 } DW0; 1957 union 1958 { 1959 struct 1960 { 1961 uint32_t ShAlfEnabledFlag : __CODEGEN_BITFIELD( 0, 0) ; //!< sh_alf_enabled_flag 1962 uint32_t ShAlfCbEnabledFlag : __CODEGEN_BITFIELD( 1, 1) ; //!< sh_alf_cb_enabled_flag 1963 uint32_t ShAlfCrEnabledFlag : __CODEGEN_BITFIELD( 2, 2) ; //!< sh_alf_cr_enabled_flag 1964 uint32_t ShAlfCcCbEnabledFlag : __CODEGEN_BITFIELD( 3, 3) ; //!< sh_alf_cc_cb_enabled_flag 1965 uint32_t ShAlfCcCrEnabledFlag : __CODEGEN_BITFIELD( 4, 4) ; //!< sh_alf_cc_cr_enabled_flag 1966 uint32_t ShLmcsUsedFlag : __CODEGEN_BITFIELD( 5, 5) ; //!< sh_lmcs_used_flag 1967 uint32_t ShExplicitScalingListUsedFlag : __CODEGEN_BITFIELD( 6, 6) ; //!< sh_explicit_scaling_list_used_flag 1968 uint32_t ShCabacInitFlag : __CODEGEN_BITFIELD( 7, 7) ; //!< sh_cabac_init_flag 1969 uint32_t ShCollocatedFromL0Flag : __CODEGEN_BITFIELD( 8, 8) ; //!< sh_collocated_from_l0_flag 1970 uint32_t ShCuChromaQpOffsetEnabledFlag : __CODEGEN_BITFIELD( 9, 9) ; //!< sh_cu_chroma_qp_offset_enabled_flag 1971 uint32_t ShSaoLumaUsedFlag : __CODEGEN_BITFIELD(10, 10) ; //!< sh_sao_luma_used_flag 1972 uint32_t ShSaoChromaUsedFlag : __CODEGEN_BITFIELD(11, 11) ; //!< sh_sao_chroma_used_flag 1973 uint32_t ShDeblockingFilterDisabledFlag : __CODEGEN_BITFIELD(12, 12) ; //!< sh_deblocking_filter_disabled_flag 1974 uint32_t ShDepQuantUsedFlag : __CODEGEN_BITFIELD(13, 13) ; //!< sh_dep_quant_used_flag 1975 uint32_t ShSignDataHidingUsedFlag : __CODEGEN_BITFIELD(14, 14) ; //!< sh_sign_data_hiding_used_flag 1976 uint32_t ShTsResidualCodingDisabledFlag : __CODEGEN_BITFIELD(15, 15) ; //!< sh_ts_residual_coding_disabled_flag 1977 uint32_t Nobackwardpredflag : __CODEGEN_BITFIELD(16, 16) ; //!< NoBackwardPredFlag 1978 uint32_t PVvcpDebugEnable : __CODEGEN_BITFIELD(17, 17) ; //!< P_vvcp_debug_enable 1979 uint32_t Reserved50 : __CODEGEN_BITFIELD(18, 21) ; //!< Reserved 1980 uint32_t DIsRightMostSliceOfSubpicFlag : __CODEGEN_BITFIELD(22, 22) ; //!< D_IsRightMostSliceOfSubpic_flag 1981 uint32_t DIsLeftMostSliceOfSubpicFlag : __CODEGEN_BITFIELD(23, 23) ; //!< D_IsLeftMostSliceOfSubpic_flag 1982 uint32_t DIsBottomMostSliceOfSubpicFlag : __CODEGEN_BITFIELD(24, 24) ; //!< D_IsBottomMostSliceOfSubpic_flag 1983 uint32_t DIsTopMostSliceOfSubpicFlag : __CODEGEN_BITFIELD(25, 25) ; //!< D_IsTopMostSliceOfSubpic_flag 1984 uint32_t DMultipleSlicesInTileFlag : __CODEGEN_BITFIELD(26, 26) ; //!< D_multiple_slices_in_tile flag 1985 uint32_t DIsbottommostsliceoftileFlag : __CODEGEN_BITFIELD(27, 27) ; //!< D_IsBottomMostSliceOfTile_flag 1986 uint32_t DIstopmostsliceoftileFlag : __CODEGEN_BITFIELD(28, 28) ; //!< D_IsTopMostSliceOfTile_flag 1987 uint32_t DSubpicTreatedAsPicFlag : __CODEGEN_BITFIELD(29, 29) ; //!< D_subpic_treated_as_pic_flag 1988 uint32_t DLoopFilterAcrossSubpicEnabledFlag : __CODEGEN_BITFIELD(30, 30) ; //!< D_loop_filter_across_subpic_enabled_flag 1989 uint32_t DLastsliceofpicFlag : __CODEGEN_BITFIELD(31, 31) ; //!< D_LastSliceOfPic_flag 1990 }; 1991 uint32_t Value; 1992 } DW1; 1993 union 1994 { 1995 struct 1996 { 1997 uint32_t Numctusincurrslice ; //!< NumCtusInCurrSlice 1998 }; 1999 uint32_t Value; 2000 } DW2; 2001 union 2002 { 2003 struct 2004 { 2005 uint32_t ShNumTilesInSliceMinus1 : __CODEGEN_BITFIELD( 0, 15) ; //!< sh_num_tiles_in_slice_minus1 2006 uint32_t ShSliceType : __CODEGEN_BITFIELD(16, 19) ; //!< SH_SLICE_TYPE 2007 uint32_t ShNumAlfApsIdsLuma : __CODEGEN_BITFIELD(20, 23) ; //!< sh_num_alf_aps_ids_luma 2008 uint32_t AlfChromaNumAltFiltersMinus1 : __CODEGEN_BITFIELD(24, 26) ; //!< alf_chroma_num_alt_filters_minus1 2009 uint32_t Reserved123 : __CODEGEN_BITFIELD(27, 27) ; //!< Reserved 2010 uint32_t AlfCcCbFiltersSignalledMinus1 : __CODEGEN_BITFIELD(28, 29) ; //!< alf_cc_cb_filters_signalled_minus1 2011 uint32_t AlfCcCrFiltersSignalledMinus1 : __CODEGEN_BITFIELD(30, 31) ; //!< alf_cc_cr_filters_signalled_minus1 2012 }; 2013 uint32_t Value; 2014 } DW3; 2015 union 2016 { 2017 struct 2018 { 2019 uint32_t ShAlfApsIdLuma0 : __CODEGEN_BITFIELD( 0, 3) ; //!< sh_alf_aps_id_luma[ 0 ] 2020 uint32_t ShAlfApsIdLuma1 : __CODEGEN_BITFIELD( 4, 7) ; //!< sh_alf_aps_id_luma[ 1 ] 2021 uint32_t ShAlfApsIdLuma2 : __CODEGEN_BITFIELD( 8, 11) ; //!< sh_alf_aps_id_luma[ 2 ] 2022 uint32_t ShAlfApsIdLuma3 : __CODEGEN_BITFIELD(12, 15) ; //!< sh_alf_aps_id_luma[ 3 ] 2023 uint32_t ShAlfApsIdLuma4 : __CODEGEN_BITFIELD(16, 19) ; //!< sh_alf_aps_id_luma[ 4 ] 2024 uint32_t ShAlfApsIdLuma5 : __CODEGEN_BITFIELD(20, 23) ; //!< sh_alf_aps_id_luma[ 5 ] 2025 uint32_t ShAlfApsIdLuma6 : __CODEGEN_BITFIELD(24, 27) ; //!< sh_alf_aps_id_luma[ 6 ] 2026 uint32_t Reserved156 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 2027 }; 2028 uint32_t Value; 2029 } DW4; 2030 union 2031 { 2032 struct 2033 { 2034 uint32_t ShAlfApsIdChroma : __CODEGEN_BITFIELD( 0, 3) ; //!< sh_alf_aps_id_chroma 2035 uint32_t ShAlfCcCbApsId : __CODEGEN_BITFIELD( 4, 7) ; //!< sh_alf_cc_cb_aps_id 2036 uint32_t ShAlfCcCrApsId : __CODEGEN_BITFIELD( 8, 11) ; //!< sh_alf_cc_cr_aps_id 2037 uint32_t Numrefidxactive0 : __CODEGEN_BITFIELD(12, 15) ; //!< NumRefIdxActive[ 0 ] 2038 uint32_t Numrefidxactive1 : __CODEGEN_BITFIELD(16, 19) ; //!< NumRefIdxActive[ 1 ] 2039 uint32_t Reserved180 : __CODEGEN_BITFIELD(20, 23) ; //!< Reserved 2040 uint32_t ShCollocatedRefIdx : __CODEGEN_BITFIELD(24, 31) ; //!< sh_collocated_ref_idx 2041 }; 2042 uint32_t Value; 2043 } DW5; 2044 union 2045 { 2046 struct 2047 { 2048 uint32_t Sliceqpy : __CODEGEN_BITFIELD( 0, 7) ; //!< SliceQpY 2049 uint32_t ShCbQpOffset : __CODEGEN_BITFIELD( 8, 15) ; //!< sh_cb_qp_offset 2050 uint32_t ShCrQpOffset : __CODEGEN_BITFIELD(16, 23) ; //!< sh_cr_qp_offset 2051 uint32_t ShJointCbcrQpOffset : __CODEGEN_BITFIELD(24, 31) ; //!< sh_joint_cbcr_qp_offset 2052 }; 2053 uint32_t Value; 2054 } DW6; 2055 union 2056 { 2057 struct 2058 { 2059 uint32_t ShLumaBetaOffsetDiv2 : __CODEGEN_BITFIELD( 0, 7) ; //!< sh_luma_beta_offset_div2 2060 uint32_t ShLumaTcOffsetDiv2 : __CODEGEN_BITFIELD( 8, 15) ; //!< sh_luma_tc_offset_div2 2061 uint32_t ShCbBetaOffsetDiv2 : __CODEGEN_BITFIELD(16, 23) ; //!< sh_cb_beta_offset_div2 2062 uint32_t ShCbTcOffsetDiv2 : __CODEGEN_BITFIELD(24, 31) ; //!< sh_cb_tc_offset_div2 2063 }; 2064 uint32_t Value; 2065 } DW7; 2066 union 2067 { 2068 struct 2069 { 2070 uint32_t ShCrBetaOffsetDiv2 : __CODEGEN_BITFIELD( 0, 7) ; //!< sh_cr_beta_offset_div2 2071 uint32_t ShCrTcOffsetDiv2 : __CODEGEN_BITFIELD( 8, 15) ; //!< sh_cr_tc_offset_div2 2072 uint32_t Reserved272 : __CODEGEN_BITFIELD(16, 31) ; //!< Reserved 2073 }; 2074 uint32_t Value; 2075 } DW8; 2076 union 2077 { 2078 struct 2079 { 2080 uint32_t Reserved288 : __CODEGEN_BITFIELD( 0, 15) ; //!< Reserved 2081 uint32_t LmcsMinBinIdx : __CODEGEN_BITFIELD(16, 19) ; //!< lmcs_min_bin_idx 2082 uint32_t Reserved308 : __CODEGEN_BITFIELD(20, 23) ; //!< Reserved 2083 uint32_t LmcsDeltaMaxBinIdx : __CODEGEN_BITFIELD(24, 27) ; //!< lmcs_delta_max_bin_idx 2084 uint32_t Reserved316 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 2085 }; 2086 uint32_t Value; 2087 } DW9; 2088 union 2089 { 2090 struct 2091 { 2092 uint16_t Scalecoeff[16] ; //!< ScaleCoeff[ 16 ] 2093 }; 2094 uint32_t Value[8]; 2095 } DW10_17; 2096 union 2097 { 2098 struct 2099 { 2100 uint16_t Invscalecoeff[16] ; //!< InvScaleCoeff[ 16 ] 2101 }; 2102 uint32_t Value[8]; 2103 } DW18_25; 2104 union 2105 { 2106 struct 2107 { 2108 uint16_t Chromascalecoeff[16] ; //!< ChromaScaleCoeff[ 16 ] 2109 }; 2110 uint32_t Value[8]; 2111 } DW26_33; 2112 2113 uint32_t Lmcspivot161[8]; //!< LmcsPivot[ 16:1 ] 2114 2115 union 2116 { 2117 struct 2118 { 2119 uint32_t DSubpicCtuTopLeftX : __CODEGEN_BITFIELD( 0, 15) ; //!< D_subpic_ctu_top_left_x 2120 uint32_t DSubpicCtuTopLeftY : __CODEGEN_BITFIELD(16, 31) ; //!< D_subpic_ctu_top_left_y 2121 }; 2122 uint32_t Value; 2123 } DW42; 2124 union 2125 { 2126 struct 2127 { 2128 uint32_t DSubpicWidthMinus1 : __CODEGEN_BITFIELD( 0, 15) ; //!< D_subpic_width_minus1 2129 uint32_t DSubpicHeightMinus1 : __CODEGEN_BITFIELD(16, 31) ; //!< D_subpic_height_minus1 2130 }; 2131 uint32_t Value; 2132 } DW43; 2133 union 2134 { 2135 struct 2136 { 2137 uint32_t Reserved1415 : __CODEGEN_BITFIELD( 0, 7) ; //!< Reserved 2138 uint32_t Reserved1416 : __CODEGEN_BITFIELD( 8, 15) ; //!< Reserved 2139 uint32_t Reserved1417 : __CODEGEN_BITFIELD(16, 31) ; //!< Reserved 2140 }; 2141 uint32_t Value; 2142 } DW44; 2143 union 2144 { 2145 struct 2146 { 2147 uint32_t DToplefttilex : __CODEGEN_BITFIELD( 0, 7) ; //!< D_TopLeftTileX 2148 uint32_t Reserved1448 : __CODEGEN_BITFIELD( 8, 15) ; //!< Reserved 2149 uint32_t DToplefttiley : __CODEGEN_BITFIELD(16, 31) ; //!< D_TopLeftTileY 2150 }; 2151 uint32_t Value; 2152 } DW45; 2153 union 2154 { 2155 struct 2156 { 2157 uint32_t DSliceheightinctus : __CODEGEN_BITFIELD( 0, 15) ; //!< D_sliceHeightInCtus 2158 uint32_t Reserved1488 : __CODEGEN_BITFIELD(16, 31) ; //!< Reserved 2159 }; 2160 uint32_t Value; 2161 } DW46; 2162 union 2163 { 2164 struct 2165 { 2166 uint32_t DSlicestartctbx : __CODEGEN_BITFIELD( 0, 15) ; //!< D_SliceStartCtbX 2167 uint32_t DSlicestartctby : __CODEGEN_BITFIELD(16, 31) ; //!< D_SliceStartCtbY 2168 }; 2169 uint32_t Value; 2170 } DW47; 2171 2172 //! \name Local enumerations 2173 2174 //! \brief LENGTHFIELD 2175 //! \details 2176 //! (Excludes Dwords 0, 1). 2177 enum LENGTHFIELD 2178 { 2179 LENGTHFIELD_DWORDLENGTH_LENGTHBIAS = 46, //!< No additional details 2180 }; 2181 2182 enum MEDIA_INSTRUCTION_COMMAND 2183 { 2184 MEDIA_INSTRUCTION_COMMAND_VVCPSLICESTATE = 20, //!< No additional details 2185 }; 2186 2187 enum MEDIA_INSTRUCTION_OPCODE 2188 { 2189 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAMEVVC = 15, //!< No additional details 2190 }; 2191 2192 enum PIPELINE_TYPE 2193 { 2194 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 2195 }; 2196 2197 enum COMMAND_TYPE 2198 { 2199 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 2200 }; 2201 2202 //! \brief SH_SLICE_TYPE 2203 //! \details 2204 //! style="margin-bottom:11px">specifies the coding type of the slice, 0 2205 //! = B slice, 1 = P slice, 2 = I slice. For more detail refers to the VVC 2206 //! Spec. 2207 enum SH_SLICE_TYPE 2208 { 2209 SH_SLICE_TYPE_B_SLICE = 0, //!< No additional details 2210 SH_SLICE_TYPE_P_SLICE = 1, //!< No additional details 2211 SH_SLICE_TYPE_I_SLICE = 2, //!< No additional details 2212 }; 2213 2214 //! \name Initializations 2215 2216 //! \brief Explicit member initialization function 2217 VVCP_SLICE_STATE_CMD(); 2218 2219 static const size_t dwSize = 48; 2220 static const size_t byteSize = 192; 2221 }; 2222 2223 //! 2224 //! \brief VVCP_SURFACE_STATE 2225 //! \details 2226 //! The VVCP_SURFACE_STATE command is responsible for defining the frame 2227 //! buffer pitch and the offset of the chroma component. 2228 //! This is a picture level state command and is shared by both encoding and 2229 //! decoding processes. 2230 //! For Decoder, this command is issued once per surface type. There is one 2231 //! reconstructed surface, 8 reference pictures surfaces. 2232 //! For all tiling surface, Tile4/Tile64 are supported and indicated on the 2233 //! MemoryAttributes field on its corresponding address field. 2234 //! Note : When NV12 and Tile4/Tile64are being used, full pitch and 2235 //! interleaved UV is always in use. U and V Xoffset must be set to 0; U and 2236 //! V Yoffset must be 8-pixel aligned. For 10-bit pixel, P010 surface 2237 //! definition is being used. 2238 //! 2239 struct VVCP_SURFACE_STATE_CMD 2240 { 2241 union 2242 { 2243 struct 2244 { 2245 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 2246 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 2247 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 21) ; //!< MEDIA_INSTRUCTION_COMMAND 2248 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(22, 26) ; //!< MEDIA_INSTRUCTION_OPCODE 2249 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE_TYPE 2250 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 2251 }; 2252 uint32_t Value; 2253 } DW0; 2254 union 2255 { 2256 struct 2257 { 2258 uint32_t SurfacePitchMinus1 : __CODEGEN_BITFIELD( 0, 16) ; //!< Surface Pitch Minus1 2259 uint32_t Reserved49 : __CODEGEN_BITFIELD(17, 26) ; //!< Reserved 2260 uint32_t SurfaceId : __CODEGEN_BITFIELD(27, 31) ; //!< SURFACE_ID 2261 }; 2262 uint32_t Value; 2263 } DW1; 2264 union 2265 { 2266 struct 2267 { 2268 uint32_t YOffsetForUCbInPixel : __CODEGEN_BITFIELD( 0, 14) ; //!< Y Offset for U(Cb) in pixel 2269 uint32_t Reserved79 : __CODEGEN_BITFIELD(15, 26) ; //!< Reserved 2270 uint32_t SurfaceFormat : __CODEGEN_BITFIELD(27, 31) ; //!< SURFACE_FORMAT 2271 }; 2272 uint32_t Value; 2273 } DW2; 2274 union 2275 { 2276 struct 2277 { 2278 uint32_t Reserved96 ; //!< Reserved 2279 }; 2280 uint32_t Value; 2281 } DW3; 2282 union 2283 { 2284 struct 2285 { 2286 uint32_t Reserved128 : __CODEGEN_BITFIELD( 0, 15) ; //!< Reserved 2287 uint32_t CompressionFormat : __CODEGEN_BITFIELD(16, 20) ; //!< Compression Format 2288 uint32_t Reserved149 : __CODEGEN_BITFIELD(21, 31) ; //!< Reserved 2289 }; 2290 uint32_t Value; 2291 } DW4; 2292 2293 //! \name Local enumerations 2294 2295 enum MEDIA_INSTRUCTION_COMMAND 2296 { 2297 MEDIA_INSTRUCTION_COMMAND_VVCPSURFACESTATE = 1, //!< No additional details 2298 }; 2299 2300 //! \brief MEDIA_INSTRUCTION_OPCODE 2301 //! \details 2302 //! Codec/Engine Name = VVC 2303 enum MEDIA_INSTRUCTION_OPCODE 2304 { 2305 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 15, //!< No additional details 2306 }; 2307 2308 enum PIPELINE_TYPE 2309 { 2310 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 2311 }; 2312 2313 enum COMMAND_TYPE 2314 { 2315 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 2316 }; 2317 2318 enum SURFACE_ID 2319 { 2320 SURFACE_ID_RECONSTRUCTEDPICTURE = 0, //!< This is for the reconstructed picture surface state 2321 SURFACE_ID_REFERENCEPICTURE0 = 17, //!< This is for Reference Picture 0 2322 SURFACE_ID_REFERENCEPICTURE1 = 18, //!< This is for Reference Picture 1 2323 SURFACE_ID_REFERENCEPICTURE2 = 19, //!< This is for Reference Picture 2 2324 SURFACE_ID_REFERENCEPICTURE3 = 20, //!< This is for Reference Picture 3 2325 SURFACE_ID_REFERENCEPICTURE4 = 21, //!< This is for Reference Picture 4 2326 SURFACE_ID_REFERENCEPICTURE5 = 22, //!< This is for Reference Picture 5 2327 SURFACE_ID_REFERENCEPICTURE6 = 23, //!< This is for Reference Picture 6 2328 SURFACE_ID_REFERENCEPICTURE7 = 24, //!< This is for Reference Picture 7 2329 SURFACE_ID_REFERENCEPICTURE8 = 25, //!< This is for Reference Picture 8 2330 SURFACE_ID_REFERENCEPICTURE9 = 26, //!< This is for Reference Picture 9 2331 SURFACE_ID_REFERENCEPICTURE10 = 27, //!< This is for Reference Picture 10 2332 SURFACE_ID_REFERENCEPICTURE11 = 28, //!< This is for Reference Picture 11 2333 SURFACE_ID_REFERENCEPICTURE12 = 29, //!< This is for Reference Picture 12 2334 SURFACE_ID_REFERENCEPICTURE13 = 30, //!< This is for Reference Picture 13 2335 SURFACE_ID_REFERENCEPICTURE14 = 31, //!< This is for Reference Picture 14 2336 }; 2337 2338 //! \brief SURFACE_FORMAT 2339 //! \details 2340 //! Specifies the format of the surface. 2341 //! 2342 enum SURFACE_FORMAT 2343 { 2344 SURFACE_FORMAT_PLANAR4208 = 4, //!< No additional details 2345 SURFACE_FORMAT_P010 = 13, //!< This format can be used for 8, 9, 10 bit 420 format 2346 }; 2347 2348 //! \name Initializations 2349 2350 //! \brief Explicit member initialization function 2351 VVCP_SURFACE_STATE_CMD(); 2352 2353 static const size_t dwSize = 5; 2354 static const size_t byteSize = 20; 2355 }; 2356 2357 //! 2358 //! \brief VVCP_TILE_CODING 2359 //! \details 2360 //! 2361 //! 2362 struct VVCP_TILE_CODING_CMD 2363 { 2364 union 2365 { 2366 struct 2367 { 2368 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 2369 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 2370 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 21) ; //!< MEDIA_INSTRUCTION_COMMAND 2371 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(22, 26) ; //!< MEDIA_INSTRUCTION_OPCODE 2372 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE_TYPE 2373 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 2374 }; 2375 uint32_t Value; 2376 } DW0; 2377 union 2378 { 2379 struct 2380 { 2381 uint32_t Tilecolbdval : __CODEGEN_BITFIELD( 0, 10) ; //!< TileColBdVal 2382 uint32_t Reserved43 : __CODEGEN_BITFIELD(11, 15) ; //!< Reserved 2383 uint32_t Tilerowbdval : __CODEGEN_BITFIELD(16, 26) ; //!< TileRowBdVal 2384 uint32_t Reserved59 : __CODEGEN_BITFIELD(27, 31) ; //!< Reserved 2385 }; 2386 uint32_t Value; 2387 } DW1; 2388 union 2389 { 2390 struct 2391 { 2392 uint32_t Colwidthval : __CODEGEN_BITFIELD( 0, 11) ; //!< ColWidthVal 2393 uint32_t Reserved76 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 2394 uint32_t Rowheightval : __CODEGEN_BITFIELD(16, 27) ; //!< RowHeightVal 2395 uint32_t Reserved92 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 2396 }; 2397 uint32_t Value; 2398 } DW2; 2399 union 2400 { 2401 struct 2402 { 2403 uint32_t DCurrenttilecolumnposition : __CODEGEN_BITFIELD( 0, 10) ; //!< D_CurrentTileColumnPosition 2404 uint32_t Reserved107 : __CODEGEN_BITFIELD(11, 15) ; //!< Reserved 2405 uint32_t DCurrenttilerowposition : __CODEGEN_BITFIELD(16, 26) ; //!< D_CurrentTileRowPosition 2406 uint32_t Reserved123 : __CODEGEN_BITFIELD(27, 31) ; //!< Reserved 2407 }; 2408 uint32_t Value; 2409 } DW3; 2410 union 2411 { 2412 struct 2413 { 2414 uint32_t Reserved128 : __CODEGEN_BITFIELD( 0, 19) ; //!< Reserved 2415 uint32_t DIsrightmosttileofsliceFlag : __CODEGEN_BITFIELD(20, 20) ; //!< D_IsRightMostTileOfSlice_flag 2416 uint32_t DIsleftmosttileofsliceFlag : __CODEGEN_BITFIELD(21, 21) ; //!< D_IsLeftMostTileOfSlice_flag 2417 uint32_t DIsbottommosttileofsliceFlag : __CODEGEN_BITFIELD(22, 22) ; //!< D_IsBottomMostTileOfSlice_flag 2418 uint32_t DIstopmosttileofsliceFlag : __CODEGEN_BITFIELD(23, 23) ; //!< D_IsTopMostTileOfSlice_flag 2419 uint32_t Reserved129 : __CODEGEN_BITFIELD(24, 27) ; //!< Reserved 2420 uint32_t DIsrightmosttileofframeFlag : __CODEGEN_BITFIELD(28, 28) ; //!< D_IsRightMostTileOfFrame_flag 2421 uint32_t DIsleftmosttileofframeFlag : __CODEGEN_BITFIELD(29, 29) ; //!< D_IsLeftMostTileOfFrame_flag 2422 uint32_t DIsbottommosttileofframeFlag : __CODEGEN_BITFIELD(30, 30) ; //!< D_IsBottomMostTileOfFrame_flag 2423 uint32_t DIstopmosttileofframeFlag : __CODEGEN_BITFIELD(31, 31) ; //!< D_IsTopMostTileOfFrame_flag 2424 }; 2425 uint32_t Value; 2426 } DW4; 2427 2428 //! \name Local enumerations 2429 2430 enum MEDIA_INSTRUCTION_COMMAND 2431 { 2432 MEDIA_INSTRUCTION_COMMAND_VVCPTILECODING = 21, //!< No additional details 2433 }; 2434 2435 enum MEDIA_INSTRUCTION_OPCODE 2436 { 2437 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAMEVVC = 15, //!< No additional details 2438 }; 2439 2440 enum PIPELINE_TYPE 2441 { 2442 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 2443 }; 2444 2445 enum COMMAND_TYPE 2446 { 2447 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 2448 }; 2449 2450 //! \name Initializations 2451 2452 //! \brief Explicit member initialization function 2453 VVCP_TILE_CODING_CMD(); 2454 2455 static const size_t dwSize = 5; 2456 static const size_t byteSize = 20; 2457 }; 2458 2459 //! 2460 //! \brief VVCP_VD_CONTROL_STATE 2461 //! \details 2462 //! This command is used to modify the control of VVCP pipe (as well as HCP 2463 //! and AVP Pipes). It can be inserted anywhere within a frame. It can be 2464 //! inserted multiple times within a frame as well. 2465 //! 2466 struct VVCP_VD_CONTROL_STATE_CMD 2467 { 2468 union 2469 { 2470 struct 2471 { 2472 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 2473 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 2474 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 21) ; //!< MEDIA_INSTRUCTION_COMMAND 2475 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(22, 26) ; //!< MEDIA_INSTRUCTION_OPCODE 2476 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE_TYPE 2477 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 2478 }; 2479 uint32_t Value; 2480 } DW0; 2481 VD_CONTROL_STATE_BODY_CMD VdControlStateBody; //!< DW1..2, VD Control State Body 2482 2483 //! \name Local enumerations 2484 2485 enum MEDIA_INSTRUCTION_COMMAND 2486 { 2487 MEDIA_INSTRUCTION_COMMAND_VDCONTROLSTATE = 10, //!< No additional details 2488 }; 2489 2490 //! \brief MEDIA_INSTRUCTION_OPCODE 2491 //! \details 2492 //! Codec/EngineName = VVC 2493 enum MEDIA_INSTRUCTION_OPCODE 2494 { 2495 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAMEFORVVCP = 15, //!< No additional details 2496 }; 2497 2498 enum PIPELINE_TYPE 2499 { 2500 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 2501 }; 2502 2503 enum COMMAND_TYPE 2504 { 2505 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 2506 }; 2507 2508 //! \name Initializations 2509 2510 //! \brief Explicit member initialization function 2511 VVCP_VD_CONTROL_STATE_CMD(); 2512 2513 static const size_t dwSize = 3; 2514 static const size_t byteSize = 12; 2515 }; 2516 2517 //! 2518 //! \brief VVCP_WEIGHTOFFSET_STATE 2519 //! \details 2520 //! This slice level command is issued in both the encoding and decoding 2521 //! processes, if the weighted_pred_flag orweighted_bipred_flag equals one. 2522 //! If zero, then this command is not issued. 2523 //! Weight Prediction Values are provided in this command. Only Explicit 2524 //! Weight Prediction is supported inencoder. 2525 //! For P-Slice, this command is issued only once together with 2526 //! VVCP_REF_IDX_STATE Command for L0 list. ForB-Slice, this command can be 2527 //! issued up to two times together with VVCP_REF_IDX_STATE Command, one 2528 //! forL0 list and one for L1 list. 2529 //! 2530 struct VVCP_WEIGHTOFFSET_STATE_CMD 2531 { 2532 union 2533 { 2534 struct 2535 { 2536 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 2537 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 2538 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 21) ; //!< MEDIA_INSTRUCTION_COMMAND 2539 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(22, 26) ; //!< MEDIA_INSTRUCTION_OPCODE 2540 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE_TYPE 2541 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 2542 }; 2543 uint32_t Value; 2544 } DW0; 2545 union 2546 { 2547 struct 2548 { 2549 uint32_t Listidx : __CODEGEN_BITFIELD( 0, 0) ; //!< LISTIDX 2550 uint32_t Reserved33 : __CODEGEN_BITFIELD( 1, 7) ; //!< Reserved 2551 uint32_t LumaLog2WeightDenom : __CODEGEN_BITFIELD( 8, 11) ; //!< luma_log2_weight_denom 2552 uint32_t Chromalog2Weightdenom : __CODEGEN_BITFIELD(12, 15) ; //!< ChromaLog2WeightDenom 2553 uint32_t Reserved48 : __CODEGEN_BITFIELD(16, 31) ; //!< Reserved 2554 }; 2555 uint32_t Value; 2556 } DW1; 2557 union 2558 { 2559 struct 2560 { 2561 uint32_t LumaWeightLxFlagI : __CODEGEN_BITFIELD( 0, 15) ; //!< luma_weight_lX_flag[ i ] 2562 uint32_t ChromaWeightLxFlagI : __CODEGEN_BITFIELD(16, 31) ; //!< chroma_weight_lX_flag[ i ] 2563 }; 2564 uint32_t Value; 2565 } DW2; 2566 VVCP_WEIGHTOFFSET_LUMA_ENTRY_CMD DLumaweightsoffsets[15]; //!< DW3..17, D_LumaWeightsOffsets 2567 VVCP_WEIGHTOFFSET_CHROMA_ENTRY_CMD DChromacbweightsoffsets[15]; //!< DW18..32, D_ChromaCbWeightsOffsets 2568 VVCP_WEIGHTOFFSET_CHROMA_ENTRY_CMD DChromacrweightsoffsets[15]; //!< DW33..47, D_ChromaCrWeightsOffsets 2569 2570 //! \name Local enumerations 2571 2572 enum MEDIA_INSTRUCTION_COMMAND 2573 { 2574 MEDIA_INSTRUCTION_COMMAND_VVCPWEIGHTOFFSETSTATE = 19, //!< No additional details 2575 }; 2576 2577 //! \brief MEDIA_INSTRUCTION_OPCODE 2578 //! \details 2579 //! Codec/Engine Name = VVC = 0Fh 2580 enum MEDIA_INSTRUCTION_OPCODE 2581 { 2582 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 15, //!< No additional details 2583 }; 2584 2585 enum PIPELINE_TYPE 2586 { 2587 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 2588 }; 2589 2590 enum COMMAND_TYPE 2591 { 2592 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 2593 }; 2594 2595 //! \brief LISTIDX 2596 //! \details 2597 //! There are max 2 possible reference picture list L0 and L1, so listIdx 2598 //! can be 0 or 1 only. 2599 //! listIdx is set to 0, when this VVCP_WEIGHTOFFSET_STATE command is 2600 //! issued for L0. 2601 //! listIdx is set to 1, when this VVCP_WEIGHTOFFSET_STATE command is 2602 //! issued for L1. 2603 enum LISTIDX 2604 { 2605 LISTIDX_REFERENCEPICTURELIST0 = 0, //!< No additional details 2606 LISTIDX_REFERENCEPICTURELIST1 = 1, //!< No additional details 2607 }; 2608 2609 //! \name Initializations 2610 2611 //! \brief Explicit member initialization function 2612 VVCP_WEIGHTOFFSET_STATE_CMD(); 2613 2614 static const size_t dwSize = 48; 2615 static const size_t byteSize = 192; 2616 }; 2617 2618 MEDIA_CLASS_DEFINE_END(mhw__vdbox__vvcp__xe2_lpm_base__xe2_lpm__Cmd) 2619 }; 2620 2621 } // namespace xe2_lpm 2622 } // namespace xe2_lpm_base 2623 } // namespace vvcp 2624 } // namespace vdbox 2625 } // namespace mhw 2626 2627 #pragma pack() 2628 2629 #endif // __MHW_VDBOX_VVCP_HWCMD_XE2_LPM_X_H__ 2630