/aosp_15_r20/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonBlockRanges.cpp | 74 void HexagonBlockRanges::RangeList::include(const RangeList &RL) { in include() 389 RangeList &RL = F->second; in computeDeadMap() local 461 const HexagonBlockRanges::RangeList &RL) { in operator <<() 479 const HexagonBlockRanges::RangeList &RL = I.second; in operator <<() local
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H A D | HexagonFrameLowering.cpp | 1996 HexagonBlockRanges::RangeList &RL = FIRangeMap[FI].Map[&B]; in optimizeSpillSlots() local 2013 auto &RL = FIRangeMap[I.first].Map[&B]; in optimizeSpillSlots() local 2025 auto &RL = FIRangeMap[I.first].Map[&B]; in optimizeSpillSlots() local 2098 HexagonBlockRanges::RangeList &RL = FIRangeMap[FI].Map[&B]; in optimizeSpillSlots() local
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/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Hexagon/ |
H A D | HexagonBlockRanges.cpp | 75 void HexagonBlockRanges::RangeList::include(const RangeList &RL) { in include() 442 RangeList &RL = F->second; in computeDeadMap() local 514 const HexagonBlockRanges::RangeList &RL) { in operator <<() 532 const HexagonBlockRanges::RangeList &RL = I.second; in operator <<() local
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H A D | HexagonFrameLowering.cpp | 2289 HexagonBlockRanges::RangeList &RL = FIRangeMap[FI].Map[&B]; in optimizeSpillSlots() local 2306 auto &RL = FIRangeMap[I.first].Map[&B]; in optimizeSpillSlots() local 2318 auto &RL = FIRangeMap[I.first].Map[&B]; in optimizeSpillSlots() local 2396 HexagonBlockRanges::RangeList &RL = FIRangeMap[FI].Map[&B]; in optimizeSpillSlots() local
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/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
H A D | HexagonBlockRanges.cpp | 75 void HexagonBlockRanges::RangeList::include(const RangeList &RL) { in include() 442 RangeList &RL = F->second; in computeDeadMap() local 514 const HexagonBlockRanges::RangeList &RL) { in operator <<() 532 const HexagonBlockRanges::RangeList &RL = I.second; in operator <<() local
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H A D | HexagonFrameLowering.cpp | 2188 HexagonBlockRanges::RangeList &RL = FIRangeMap[FI].Map[&B]; in optimizeSpillSlots() local 2205 auto &RL = FIRangeMap[I.first].Map[&B]; in optimizeSpillSlots() local 2217 auto &RL = FIRangeMap[I.first].Map[&B]; in optimizeSpillSlots() local 2295 HexagonBlockRanges::RangeList &RL = FIRangeMap[FI].Map[&B]; in optimizeSpillSlots() local
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/aosp_15_r20/external/clang/lib/StaticAnalyzer/Checkers/ |
H A D | PaddingChecker.cpp | 79 const ASTRecordLayout &RL = ASTContext.getASTRecordLayout(RD); in visitRecord() local 168 const ASTRecordLayout &RL) { in calculateBaselinePad() 204 const ASTRecordLayout &RL) { in calculateOptimalPad()
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/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeTypesGeneric.cpp | 506 SDValue LL, LH, RL, RH, CL, CH; in SplitRes_SELECT() local 544 SDValue LL, LH, RL, RH; in SplitRes_SELECT_CC() local
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/aosp_15_r20/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeTypesGeneric.cpp | 525 SDValue LL, LH, RL, RH, CL, CH; in SplitRes_SELECT() local 547 SDValue LL, LH, RL, RH; in SplitRes_SELECT_CC() local
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/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeTypesGeneric.cpp | 507 SDValue LL, LH, RL, RH, CL, CH; in SplitRes_Select() local 556 SDValue LL, LH, RL, RH; in SplitRes_SELECT_CC() local
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/aosp_15_r20/external/coreboot/src/vendorcode/mediatek/mt8195/dramc/ |
H A D | DRAM_config_collctioin.c | 87 U32 RL=0; in Get_RL_by_MR_LP4() local
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/aosp_15_r20/external/coreboot/src/vendorcode/mediatek/mt8192/dramc/ |
H A D | DRAM_config_collctioin.c | 87 U32 RL=0; in Get_RL_by_MR_LP4() local
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/aosp_15_r20/external/tensorflow/tensorflow/python/debug/cli/ |
H A D | cli_config.py | 23 RL = debugger_cli_common.RichLine variable
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H A D | curses_widgets.py | 19 RL = debugger_cli_common.RichLine variable
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H A D | cli_shared.py | 28 RL = debugger_cli_common.RichLine variable
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H A D | profile_analyzer_cli.py | 30 RL = debugger_cli_common.RichLine variable
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/aosp_15_r20/external/openthread/third_party/mbedtls/repo/library/ |
H A D | Makefile | 90 RL ?= ranlib macro
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/aosp_15_r20/external/mbedtls/library/ |
H A D | Makefile | 67 RL ?= ranlib macro
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/aosp_15_r20/external/coreboot/src/soc/intel/baytrail/include/soc/ |
H A D | pcie.h | 21 # define RL (1 << 5) macro
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/aosp_15_r20/external/coreboot/src/soc/intel/braswell/include/soc/ |
H A D | pcie.h | 21 # define RL (1 << 5) macro
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/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyExplicitLocals.cpp | 379 auto RL = Reg2Local.find(Reg); in runOnMachineFunction() local
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/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyExplicitLocals.cpp | 410 auto RL = Reg2Local.find(Reg); in runOnMachineFunction() local
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/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Remarks/ |
H A D | YAMLRemarkSerializer.cpp | 26 std::optional<RemarkLocation> RL, T FunctionName, in mapRemarkHeader()
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/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Remarks/ |
H A D | YAMLRemarkSerializer.cpp | 24 Optional<RemarkLocation> RL, T FunctionName, in mapRemarkHeader()
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/aosp_15_r20/external/clang/lib/CodeGen/ |
H A D | CGObjCRuntime.cpp | 41 const ASTRecordLayout *RL; in LookupFieldBitOffset() local
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