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Searched defs:RL (Results 1 – 25 of 94) sorted by relevance

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/aosp_15_r20/external/llvm/lib/Target/Hexagon/
H A DHexagonBlockRanges.cpp74 void HexagonBlockRanges::RangeList::include(const RangeList &RL) { in include()
389 RangeList &RL = F->second; in computeDeadMap() local
461 const HexagonBlockRanges::RangeList &RL) { in operator <<()
479 const HexagonBlockRanges::RangeList &RL = I.second; in operator <<() local
H A DHexagonFrameLowering.cpp1996 HexagonBlockRanges::RangeList &RL = FIRangeMap[FI].Map[&B]; in optimizeSpillSlots() local
2013 auto &RL = FIRangeMap[I.first].Map[&B]; in optimizeSpillSlots() local
2025 auto &RL = FIRangeMap[I.first].Map[&B]; in optimizeSpillSlots() local
2098 HexagonBlockRanges::RangeList &RL = FIRangeMap[FI].Map[&B]; in optimizeSpillSlots() local
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Hexagon/
H A DHexagonBlockRanges.cpp75 void HexagonBlockRanges::RangeList::include(const RangeList &RL) { in include()
442 RangeList &RL = F->second; in computeDeadMap() local
514 const HexagonBlockRanges::RangeList &RL) { in operator <<()
532 const HexagonBlockRanges::RangeList &RL = I.second; in operator <<() local
H A DHexagonFrameLowering.cpp2289 HexagonBlockRanges::RangeList &RL = FIRangeMap[FI].Map[&B]; in optimizeSpillSlots() local
2306 auto &RL = FIRangeMap[I.first].Map[&B]; in optimizeSpillSlots() local
2318 auto &RL = FIRangeMap[I.first].Map[&B]; in optimizeSpillSlots() local
2396 HexagonBlockRanges::RangeList &RL = FIRangeMap[FI].Map[&B]; in optimizeSpillSlots() local
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
H A DHexagonBlockRanges.cpp75 void HexagonBlockRanges::RangeList::include(const RangeList &RL) { in include()
442 RangeList &RL = F->second; in computeDeadMap() local
514 const HexagonBlockRanges::RangeList &RL) { in operator <<()
532 const HexagonBlockRanges::RangeList &RL = I.second; in operator <<() local
H A DHexagonFrameLowering.cpp2188 HexagonBlockRanges::RangeList &RL = FIRangeMap[FI].Map[&B]; in optimizeSpillSlots() local
2205 auto &RL = FIRangeMap[I.first].Map[&B]; in optimizeSpillSlots() local
2217 auto &RL = FIRangeMap[I.first].Map[&B]; in optimizeSpillSlots() local
2295 HexagonBlockRanges::RangeList &RL = FIRangeMap[FI].Map[&B]; in optimizeSpillSlots() local
/aosp_15_r20/external/clang/lib/StaticAnalyzer/Checkers/
H A DPaddingChecker.cpp79 const ASTRecordLayout &RL = ASTContext.getASTRecordLayout(RD); in visitRecord() local
168 const ASTRecordLayout &RL) { in calculateBaselinePad()
204 const ASTRecordLayout &RL) { in calculateOptimalPad()
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeTypesGeneric.cpp506 SDValue LL, LH, RL, RH, CL, CH; in SplitRes_SELECT() local
544 SDValue LL, LH, RL, RH; in SplitRes_SELECT_CC() local
/aosp_15_r20/external/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeTypesGeneric.cpp525 SDValue LL, LH, RL, RH, CL, CH; in SplitRes_SELECT() local
547 SDValue LL, LH, RL, RH; in SplitRes_SELECT_CC() local
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeTypesGeneric.cpp507 SDValue LL, LH, RL, RH, CL, CH; in SplitRes_Select() local
556 SDValue LL, LH, RL, RH; in SplitRes_SELECT_CC() local
/aosp_15_r20/external/coreboot/src/vendorcode/mediatek/mt8195/dramc/
H A DDRAM_config_collctioin.c87 U32 RL=0; in Get_RL_by_MR_LP4() local
/aosp_15_r20/external/coreboot/src/vendorcode/mediatek/mt8192/dramc/
H A DDRAM_config_collctioin.c87 U32 RL=0; in Get_RL_by_MR_LP4() local
/aosp_15_r20/external/tensorflow/tensorflow/python/debug/cli/
H A Dcli_config.py23 RL = debugger_cli_common.RichLine variable
H A Dcurses_widgets.py19 RL = debugger_cli_common.RichLine variable
H A Dcli_shared.py28 RL = debugger_cli_common.RichLine variable
H A Dprofile_analyzer_cli.py30 RL = debugger_cli_common.RichLine variable
/aosp_15_r20/external/openthread/third_party/mbedtls/repo/library/
H A DMakefile90 RL ?= ranlib macro
/aosp_15_r20/external/mbedtls/library/
H A DMakefile67 RL ?= ranlib macro
/aosp_15_r20/external/coreboot/src/soc/intel/baytrail/include/soc/
H A Dpcie.h21 # define RL (1 << 5) macro
/aosp_15_r20/external/coreboot/src/soc/intel/braswell/include/soc/
H A Dpcie.h21 # define RL (1 << 5) macro
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
H A DWebAssemblyExplicitLocals.cpp379 auto RL = Reg2Local.find(Reg); in runOnMachineFunction() local
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/WebAssembly/
H A DWebAssemblyExplicitLocals.cpp410 auto RL = Reg2Local.find(Reg); in runOnMachineFunction() local
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Remarks/
H A DYAMLRemarkSerializer.cpp26 std::optional<RemarkLocation> RL, T FunctionName, in mapRemarkHeader()
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Remarks/
H A DYAMLRemarkSerializer.cpp24 Optional<RemarkLocation> RL, T FunctionName, in mapRemarkHeader()
/aosp_15_r20/external/clang/lib/CodeGen/
H A DCGObjCRuntime.cpp41 const ASTRecordLayout *RL; in LookupFieldBitOffset() local

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